From patchwork Wed Jan 16 18:46:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 10766803 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8EE84139A for ; Wed, 16 Jan 2019 18:46:35 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7E4302EBBC for ; Wed, 16 Jan 2019 18:46:35 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 711BF2EBDC; Wed, 16 Jan 2019 18:46:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0CE262EBBC for ; Wed, 16 Jan 2019 18:46:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729369AbfAPSqe (ORCPT ); Wed, 16 Jan 2019 13:46:34 -0500 Received: from mail-pg1-f193.google.com ([209.85.215.193]:34107 "EHLO mail-pg1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728621AbfAPSqe (ORCPT ); Wed, 16 Jan 2019 13:46:34 -0500 Received: by mail-pg1-f193.google.com with SMTP id j10so3219487pga.1 for ; Wed, 16 Jan 2019 10:46:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=RnFz/AG+HRuZACi2rZk82YB8mLxedD5PZQoVniGXyfQ=; b=STVkav8DfilZnOzHiehqxmSejo1v0eOj0mNIY35HUu5gLp0znTn/MZKXBN+xvoj6sU ZT7r7GPo5/yS+Co1J6S2YZrgPd+RY0qyI4/mWhG/R/idJX1Q/B6FCW0xyjklHJfQ1oQf 35/WwMB1WQlTIStVt44NjsDpsCj0de2H2ffuc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=RnFz/AG+HRuZACi2rZk82YB8mLxedD5PZQoVniGXyfQ=; b=tY0nhz0gkuiMRqGRomSqR4XRomWTKc2xptlk6LFe9da81LaM6Hn+0RoEkPzZlha+DF kLfr0UOvBvJFugeBdlenkZHIXei5pWq3U0y0lIxWHNYBmKp4lMslyqH2Ea3FeD7WbryZ X48/BkQWUWw24WxXkvxLZYz1tdtKsyUtmbyBYnUo6Hi2NmgG44K2TRtyBDlwSjhfWZ1m g3XBpTU4f0MXllMUU02A+7XrHl2aqZlY1/mhJ56fnDpCBGHk/ziRskgcdJOqXXvz9LW6 A7AhRxU7BflX9cZpUjc0GV8OH0kKU3is9rYH72aul5z5Q3xhErngo+MKAi7bCZ7/6MSZ oiWw== X-Gm-Message-State: AJcUukeDi5CQEfzmjDv/It1PDoJoYLt/UOa3sgZL7aU0oUffmgDabaxb nCVkeDmygiD2XYlBok8geA0Oag== X-Google-Smtp-Source: ALg8bN6sk5vEhpdPSkL5GIHaDDxV74Y2fGlWV8HtFkHeIwjDzuKGA9g7AvvUpzvHS4DHPKc1nEBELg== X-Received: by 2002:a63:f444:: with SMTP id p4mr10122599pgk.124.1547664392958; Wed, 16 Jan 2019 10:46:32 -0800 (PST) Received: from tictac2.mtv.corp.google.com ([2620:15c:202:1:c8e0:70d7:4be7:a36]) by smtp.gmail.com with ESMTPSA id k186sm8138902pge.13.2019.01.16.10.46.31 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 16 Jan 2019 10:46:32 -0800 (PST) From: Douglas Anderson To: Rob Clark , Jordan Crouse Cc: Bjorn Andersson , Stephen Boyd , Rajendra Nayak , Andy Gross , linux-arm-msm@vger.kernel.org, Viresh Kumar , "Kristian H . Kristensen" , Douglas Anderson , Colin Ian King , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Sharat Masetty , David Airlie , freedreno@lists.freedesktop.org, Mamta Shukla , Daniel Vetter Subject: [PATCH v2 1/2] drm/msm: Fix A6XX support for opp-level Date: Wed, 16 Jan 2019 10:46:21 -0800 Message-Id: <20190116184623.77136-1-dianders@chromium.org> X-Mailer: git-send-email 2.20.1.97.g81188d93c3-goog MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The bindings for Qualcomm opp levels changed after being Acked but before landing. Thus the code in the GPU driver that was relying on the old bindings is now broken. Let's change the code to match the new bindings by adjusting the old string 'qcom,level' to the new string 'opp-level'. See the patch ("dt-bindings: opp: Introduce opp-level bindings"). NOTE: we will do additional cleanup to totally remove the string from the code and use the new dev_pm_opp_get_level() but we'll do it in a future patch. This will facilitate getting the important code fix in sooner without having to deal with cross-maintainer dependencies. This patch needs to land before the patch ("arm64: dts: sdm845: Add gpu and gmu device nodes") since if a tree contains the device tree patch but not this one you'll get a crash at bootup. Fixes: 4b565ca5a2cb ("drm/msm: Add A6XX device support") Signed-off-by: Douglas Anderson Reviewed-by: Jordan Crouse --- Changes in v2: - Split into two patches to facilitate landing. drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c index 5beb83d1cf87..ce1b3cc4bf6d 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c @@ -944,7 +944,7 @@ static u32 a6xx_gmu_get_arc_level(struct device *dev, unsigned long freq) np = dev_pm_opp_get_of_node(opp); if (np) { - of_property_read_u32(np, "qcom,level", &val); + of_property_read_u32(np, "opp-level", &val); of_node_put(np); } From patchwork Wed Jan 16 18:46:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 10766807 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 16EE1139A for ; Wed, 16 Jan 2019 18:46:39 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 075352EBBA for ; Wed, 16 Jan 2019 18:46:39 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EF2E02EBDC; Wed, 16 Jan 2019 18:46:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 922B52EBBA for ; Wed, 16 Jan 2019 18:46:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729022AbfAPSqg (ORCPT ); Wed, 16 Jan 2019 13:46:36 -0500 Received: from mail-pg1-f195.google.com ([209.85.215.195]:38319 "EHLO mail-pg1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729445AbfAPSqf (ORCPT ); Wed, 16 Jan 2019 13:46:35 -0500 Received: by mail-pg1-f195.google.com with SMTP id g189so3208341pgc.5 for ; Wed, 16 Jan 2019 10:46:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=FU7vnujm7PFqQbun8zmDwXg0wlx5eTmKlDoI+BggiOU=; b=KrGLquoODRhwxeMU7zgaKr61t6GHgp3yL7dO1D3O4j+XaXhhLQfp00LkNE4wYTeeJ1 GBBj8fZlb2U8a+HH5VsLf/stDaGODzNt4HXXsUQH90UOVbh5k+7DN8gibqYRFDZsuPkf 4z1j4KHKTLXP57jkQj9CThndsjF0hQboeqpkw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=FU7vnujm7PFqQbun8zmDwXg0wlx5eTmKlDoI+BggiOU=; b=oUgxTWxp1vK01XI8Cizc1UsSTumzsfJ2WGs8wGH2oT8j2qMcrunZN4qa6dlskJg5vv LG3BLbDbfkrRKtIZc5v91NYte7yWm/Dcva6LfH4Ivg1ypofDdE1Ap2h2Hb3DiO083WCN 8qLmdyr2XTx0eUsNxvoJq+H40ZmfXokaE95pGjGSV1tEWNswNknL//Aa6wbReaiJRQSG I+5LnbbfjOYp7FFC9vRh2EeZQWspTEH70pghvwrPvnYcNVGyBGpmvRkKbZG5gDUVZj+k K+S8EDgNjoKTjwKYmvHmP6n20FJAjkcqyNBfjlz9ubhVw1o7M2EAMq90WBws8oggUBFA sTNA== X-Gm-Message-State: AJcUukfnOcVmyrKU6Rdy8E6KRYJoGACx07cFnnyVEtiD+pEoozOc9yTW GwZ5O5moR1H82ueX2y+Jl6WfPw== X-Google-Smtp-Source: ALg8bN415uNxmPPZwJn8lkLzuqEUKrI/rXNceInBgwImlGAIb5dSZBe4/+wy2j3BE49nDqGts9qTLw== X-Received: by 2002:a62:6ec8:: with SMTP id j191mr11252708pfc.198.1547664394565; Wed, 16 Jan 2019 10:46:34 -0800 (PST) Received: from tictac2.mtv.corp.google.com ([2620:15c:202:1:c8e0:70d7:4be7:a36]) by smtp.gmail.com with ESMTPSA id k186sm8138902pge.13.2019.01.16.10.46.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 16 Jan 2019 10:46:33 -0800 (PST) From: Douglas Anderson To: Rob Clark , Jordan Crouse Cc: Bjorn Andersson , Stephen Boyd , Rajendra Nayak , Andy Gross , linux-arm-msm@vger.kernel.org, Viresh Kumar , "Kristian H . Kristensen" , Douglas Anderson , Colin Ian King , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Sharat Masetty , David Airlie , freedreno@lists.freedesktop.org, Mamta Shukla , Daniel Vetter Subject: [PATCH v2 2/2] drm/msm: Cleanup A6XX opp-level reading Date: Wed, 16 Jan 2019 10:46:22 -0800 Message-Id: <20190116184623.77136-2-dianders@chromium.org> X-Mailer: git-send-email 2.20.1.97.g81188d93c3-goog In-Reply-To: <20190116184623.77136-1-dianders@chromium.org> References: <20190116184623.77136-1-dianders@chromium.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The patch ("OPP: Add support for parsing the 'opp-level' property") adds an API enabling a cleaner way to read the opp-level. Let's use the new API. Signed-off-by: Douglas Anderson Reviewed-by: Jordan Crouse --- Obviously this can't land until we have a tree that contains the patch adding the API. I believe that means we'll want to target this patch for 5.2. Luckily it's fine to wait since this patch has no functional changes--it's all cleanup. Changes in v2: - Split into two patches to facilitate landing. drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 17 ++++++----------- 1 file changed, 6 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c index ce1b3cc4bf6d..900f18dc1577 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c @@ -928,25 +928,20 @@ static int a6xx_gmu_memory_probe(struct a6xx_gmu *gmu) } /* Return the 'arc-level' for the given frequency */ -static u32 a6xx_gmu_get_arc_level(struct device *dev, unsigned long freq) +static unsigned int a6xx_gmu_get_arc_level(struct device *dev, + unsigned long freq) { struct dev_pm_opp *opp; - struct device_node *np; - u32 val = 0; + unsigned int val; if (!freq) return 0; - opp = dev_pm_opp_find_freq_exact(dev, freq, true); + opp = dev_pm_opp_find_freq_exact(dev, freq, true); if (IS_ERR(opp)) return 0; - np = dev_pm_opp_get_of_node(opp); - - if (np) { - of_property_read_u32(np, "opp-level", &val); - of_node_put(np); - } + val = dev_pm_opp_get_level(opp); dev_pm_opp_put(opp); @@ -982,7 +977,7 @@ static int a6xx_gmu_rpmh_arc_votes_init(struct device *dev, u32 *votes, /* Construct a vote for each frequency */ for (i = 0; i < freqs_count; i++) { u8 pindex = 0, sindex = 0; - u32 level = a6xx_gmu_get_arc_level(dev, freqs[i]); + unsigned int level = a6xx_gmu_get_arc_level(dev, freqs[i]); /* Get the primary index that matches the arc level */ for (j = 0; j < pri_count; j++) {