From patchwork Thu Sep 8 16:11:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 12970324 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5EA8FC38145 for ; Thu, 8 Sep 2022 16:13:39 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 78C761727; Thu, 8 Sep 2022 18:12:47 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz 78C761727 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1662653617; bh=1WqDXB6TtMeZzZFF3fs3733gWICaFEYhBDZ7cjhR2OA=; h=From:To:Subject:Date:In-Reply-To:References:Cc:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=T0yQd3neswj2LYURb/EOOjZpZXgb1U5LrzKTvwM4BpK/ckSNc1rbhnQyp1xBb6BUk 6B9Tvo3hHnBlQT51YP6MhmuZwlNy5jJbyahDAtpyfnkKIGoZuZfdGT6sAc3K6etlXt p/ORfzFzQkYge8T+6VOVw8lDgk/d9OV+Lb54Tnvw= Received: from alsa1.perex.cz (localhost.localdomain [127.0.0.1]) by alsa1.perex.cz (Postfix) with ESMTP id D9A5EF8053C; Thu, 8 Sep 2022 18:12:16 +0200 (CEST) Received: by alsa1.perex.cz (Postfix, from userid 50401) id 08BF8F800CB; Thu, 8 Sep 2022 18:12:12 +0200 (CEST) Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id 1657BF800CB for ; Thu, 8 Sep 2022 18:12:02 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz 1657BF800CB Authentication-Results: alsa1.perex.cz; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="Ud2KDDIO" Received: from notapiano.myfiosgateway.com (unknown [70.107.189.129]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: nfraprado) by madras.collabora.co.uk (Postfix) with ESMTPSA id DF1B46601FAB; Thu, 8 Sep 2022 17:12:00 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1662653522; bh=1WqDXB6TtMeZzZFF3fs3733gWICaFEYhBDZ7cjhR2OA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Ud2KDDIOyNnhmTMC9QXzaAgg+/iyYCs8GWhqGH7L139TirmExcqzaQPID3SD88/pq JbOZbqjrA9uDtl99WJpvwrP8Oztap+Z1qt5e3YO85H9/iCAtsJU+kiKpBUiZuEQnwZ wMbZK0oAAYiopT6Dxo6FiSj2Kou3dLPhv9owaoaySS5P6SPTDOf918+6WxOe8PPW5J 29YYUqM9+RzCosGHrbJMeSvPC3ugl5x37rIKUhCGx3AFJTgemtE2jHY4DKqZWmjEDL E0sdWpcyAQ3x2UiMF7xBBUZtjw6QiYysOe3qUql4mPiEwf0eeT/UC3uu4ASl2RAh12 kUK0UlJdhVIdA== From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= To: Mark Brown , Matthias Brugger Subject: [PATCH 01/10] ASoC: mediatek: mt8192: Allow setting shared clocks from machine driver Date: Thu, 8 Sep 2022 12:11:45 -0400 Message-Id: <20220908161154.648557-2-nfraprado@collabora.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220908161154.648557-1-nfraprado@collabora.com> References: <20220908161154.648557-1-nfraprado@collabora.com> MIME-Version: 1.0 Cc: alsa-devel@alsa-project.org, =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , Liam Girdwood , linux-kernel@vger.kernel.org, Takashi Iwai , linux-mediatek@lists.infradead.org, kernel@collabora.com, linux-arm-kernel@lists.infradead.org, AngeloGioacchino Del Regno X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Add a new function to configure the shared clock between two i2s ports, and export it. This will allow the clock sharing to be set from the machine driver instead of the devicetree. Signed-off-by: Nícolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Tested-by: AngeloGioacchino Del Regno --- sound/soc/mediatek/mt8192/mt8192-afe-common.h | 3 +++ sound/soc/mediatek/mt8192/mt8192-dai-i2s.c | 26 +++++++++++++++++++ 2 files changed, 29 insertions(+) diff --git a/sound/soc/mediatek/mt8192/mt8192-afe-common.h b/sound/soc/mediatek/mt8192/mt8192-afe-common.h index d55eff46cc7f..ad461dcb6ee1 100644 --- a/sound/soc/mediatek/mt8192/mt8192-afe-common.h +++ b/sound/soc/mediatek/mt8192/mt8192-afe-common.h @@ -159,6 +159,9 @@ int mt8192_dai_src_register(struct mtk_base_afe *afe); int mt8192_dai_pcm_register(struct mtk_base_afe *afe); int mt8192_dai_tdm_register(struct mtk_base_afe *afe); +int mt8192_dai_i2s_set_share(struct mtk_base_afe *afe, const char *main_i2s_name, + const char *secondary_i2s_name); + unsigned int mt8192_general_rate_transform(struct device *dev, unsigned int rate); unsigned int mt8192_rate_transform(struct device *dev, diff --git a/sound/soc/mediatek/mt8192/mt8192-dai-i2s.c b/sound/soc/mediatek/mt8192/mt8192-dai-i2s.c index 5b29340f9516..630ed7261fc3 100644 --- a/sound/soc/mediatek/mt8192/mt8192-dai-i2s.c +++ b/sound/soc/mediatek/mt8192/mt8192-dai-i2s.c @@ -2057,6 +2057,32 @@ static int mt8192_dai_i2s_get_share(struct mtk_base_afe *afe) return 0; } +/** + * mt8192_dai_i2s_set_share() - Set up I2S ports to share a single clock. + * @afe: Pointer to &struct mtk_base_afe + * @main_i2s_name: The name of the I2S port that will provide the clock + * @secondary_i2s_name: The name of the I2S port that will use this clock + */ +int mt8192_dai_i2s_set_share(struct mtk_base_afe *afe, const char *main_i2s_name, + const char *secondary_i2s_name) +{ + struct mtk_afe_i2s_priv *secondary_i2s_priv; + int main_i2s_id; + + secondary_i2s_priv = get_i2s_priv_by_name(afe, secondary_i2s_name); + if (!secondary_i2s_priv) + return -EINVAL; + + main_i2s_id = get_i2s_id_by_name(afe, main_i2s_name); + if (main_i2s_id < 0) + return main_i2s_id; + + secondary_i2s_priv->share_i2s_id = main_i2s_id; + + return 0; +} +EXPORT_SYMBOL_GPL(mt8192_dai_i2s_set_share); + static int mt8192_dai_i2s_set_priv(struct mtk_base_afe *afe) { int i; From patchwork Thu Sep 8 16:11:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 12970325 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B14EEC54EE9 for ; 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Thu, 8 Sep 2022 18:12:16 +0200 (CEST) Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id 1D63CF80533 for ; Thu, 8 Sep 2022 18:12:04 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz 1D63CF80533 Authentication-Results: alsa1.perex.cz; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="PDpRlUWL" Received: from notapiano.myfiosgateway.com (unknown [70.107.189.129]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: nfraprado) by madras.collabora.co.uk (Postfix) with ESMTPSA id 658A76601FAD; Thu, 8 Sep 2022 17:12:02 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1662653523; bh=+qFGD7EsVOMCHijee7Bbkw5A9Fp6Xf4TG9HqiOy8lhY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=PDpRlUWLVoFYCjUTw/P9R7WVugq9T61WXY9RVX4vlizt15qERlivqMLWgQsnW6NY8 pKtTFtppDYxFp2eeezxwdG03Sz3MBHeJWTMOgFTCmIHGZTlnvIEwF1bCB6L56OakUo 4dRwWXnUrnFK6Z5KlSdFo7b8ix8L6D5HphKMHk9cbvGQqmbDRuWRH+mo8+Vll87Qgw 1BdFVnNgFDixyD7dnb2UuwdNrxiHctyYUCWriOJDig5Pxtf9+T+gWKG5chPvrK+XCD wVP7b6OBlo/qbL87N1ekcjCyOW5Cdm8WVPgKmFl5IsL7+NatxY645uVf2b8IOtsKMw YkoZ91NDnau1A== From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= To: Mark Brown , Matthias Brugger Subject: [PATCH 02/10] ASoC: mediatek: mt8192-mt6359: Make i2s9 share the clock from i2s8 Date: Thu, 8 Sep 2022 12:11:46 -0400 Message-Id: <20220908161154.648557-3-nfraprado@collabora.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220908161154.648557-1-nfraprado@collabora.com> References: <20220908161154.648557-1-nfraprado@collabora.com> MIME-Version: 1.0 Cc: alsa-devel@alsa-project.org, Miaoqian Lin , =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , linux-kernel@vger.kernel.org, Takashi Iwai , Liam Girdwood , Jiaxin Yu , Tzung-Bi Shih , linux-mediatek@lists.infradead.org, Akihiko Odaki , kernel@collabora.com, linux-arm-kernel@lists.infradead.org, AngeloGioacchino Del Regno X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Both i2s8 and i2s9 are connected to the rt5682 codec and should share the same clock to work in a full-duplex manner. Set the clock sharing during the initialization for rt5682. Signed-off-by: Nícolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Tested-by: AngeloGioacchino Del Regno --- sound/soc/mediatek/mt8192/mt8192-mt6359-rt1015-rt5682.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/sound/soc/mediatek/mt8192/mt8192-mt6359-rt1015-rt5682.c b/sound/soc/mediatek/mt8192/mt8192-mt6359-rt1015-rt5682.c index d0f9d66627b1..044d6ab71f0a 100644 --- a/sound/soc/mediatek/mt8192/mt8192-mt6359-rt1015-rt5682.c +++ b/sound/soc/mediatek/mt8192/mt8192-mt6359-rt1015-rt5682.c @@ -311,12 +311,21 @@ static int mt8192_mt6359_init(struct snd_soc_pcm_runtime *rtd) static int mt8192_rt5682_init(struct snd_soc_pcm_runtime *rtd) { + struct snd_soc_component *cmpnt_afe = + snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME); + struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt_afe); struct snd_soc_component *cmpnt_codec = asoc_rtd_to_codec(rtd, 0)->component; struct mt8192_mt6359_priv *priv = snd_soc_card_get_drvdata(rtd->card); struct snd_soc_jack *jack = &priv->headset_jack; int ret; + ret = mt8192_dai_i2s_set_share(afe, "I2S8", "I2S9"); + if (ret) { + dev_err(rtd->dev, "Failed to set up shared clocks\n"); + return ret; + } + ret = snd_soc_card_jack_new(rtd->card, "Headset Jack", SND_JACK_HEADSET | SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2 | From patchwork Thu Sep 8 16:11:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 12970323 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7F24DC54EE9 for ; Thu, 8 Sep 2022 16:13:28 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 9DA62172F; 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Thu, 8 Sep 2022 18:12:06 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz 8522FF804B3 Authentication-Results: alsa1.perex.cz; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="QXzUjpAT" Received: from notapiano.myfiosgateway.com (unknown [70.107.189.129]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: nfraprado) by madras.collabora.co.uk (Postfix) with ESMTPSA id 3BB776601FAE; Thu, 8 Sep 2022 17:12:04 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1662653525; bh=xEF1CQNN9sntlz4PLeIKwVS7wPU/B5aUiicOkcoBGNg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QXzUjpATw+vcXLt0B57A1UD38hGGFrLsbi95cKwhFYv3CQXtwc9z5UYGoAk7R3PQm +aOQYa5FmFd/ZPJQxPkX8zzaoLUmPWnM2Ug6OpNeg3uGC/tMJsiD+t4+5785ji7krJ PL61L7za3JIHWSPBXc6MHI2FXEPftMtfPUDdJLIUEsl0aSgT9cCFsJkes4LWxIkMcN n927BxS+qUE8l9+MUb8VjVSX/AGhEuEi8nUhs7+EblODXeJmLF8orSUZTSjJBsmHOh X8v/Vz9NKqibPmFBXHT6TAyjaZTT2VoZPA+116upf1o3NWenVJ3Pt7DiZALn0LtU3T JGnXnqOuh+ItQ== From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= To: Mark Brown , Matthias Brugger Subject: [PATCH 03/10] ASoC: mediatek: mt8192: Remove clock share parsing from DT Date: Thu, 8 Sep 2022 12:11:47 -0400 Message-Id: <20220908161154.648557-4-nfraprado@collabora.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220908161154.648557-1-nfraprado@collabora.com> References: <20220908161154.648557-1-nfraprado@collabora.com> MIME-Version: 1.0 Cc: alsa-devel@alsa-project.org, =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , Liam Girdwood , linux-kernel@vger.kernel.org, Takashi Iwai , linux-mediatek@lists.infradead.org, kernel@collabora.com, linux-arm-kernel@lists.infradead.org, AngeloGioacchino Del Regno X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Now that the clock sharing for i2s ports can be configured from the sound machine driver, remove the logic that was used to parse the properties from the devicetree. Signed-off-by: Nícolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Tested-by: AngeloGioacchino Del Regno --- sound/soc/mediatek/mt8192/mt8192-dai-i2s.c | 35 ---------------------- 1 file changed, 35 deletions(-) diff --git a/sound/soc/mediatek/mt8192/mt8192-dai-i2s.c b/sound/soc/mediatek/mt8192/mt8192-dai-i2s.c index 630ed7261fc3..ea516d63d94d 100644 --- a/sound/soc/mediatek/mt8192/mt8192-dai-i2s.c +++ b/sound/soc/mediatek/mt8192/mt8192-dai-i2s.c @@ -45,7 +45,6 @@ struct mtk_afe_i2s_priv { int rate; /* for determine which apll to use */ int low_jitter_en; - const char *share_property_name; int share_i2s_id; int mclk_id; @@ -1984,79 +1983,50 @@ static const struct mtk_afe_i2s_priv mt8192_i2s_priv[DAI_I2S_NUM] = { [DAI_I2S0] = { .id = MT8192_DAI_I2S_0, .mclk_id = MT8192_I2S0_MCK, - .share_property_name = "i2s0-share", .share_i2s_id = -1, }, [DAI_I2S1] = { .id = MT8192_DAI_I2S_1, .mclk_id = MT8192_I2S1_MCK, - .share_property_name = "i2s1-share", .share_i2s_id = -1, }, [DAI_I2S2] = { .id = MT8192_DAI_I2S_2, .mclk_id = MT8192_I2S2_MCK, - .share_property_name = "i2s2-share", .share_i2s_id = -1, }, [DAI_I2S3] = { .id = MT8192_DAI_I2S_3, .mclk_id = MT8192_I2S3_MCK, - .share_property_name = "i2s3-share", .share_i2s_id = -1, }, [DAI_I2S5] = { .id = MT8192_DAI_I2S_5, .mclk_id = MT8192_I2S5_MCK, - .share_property_name = "i2s5-share", .share_i2s_id = -1, }, [DAI_I2S6] = { .id = MT8192_DAI_I2S_6, .mclk_id = MT8192_I2S6_MCK, - .share_property_name = "i2s6-share", .share_i2s_id = -1, }, [DAI_I2S7] = { .id = MT8192_DAI_I2S_7, .mclk_id = MT8192_I2S7_MCK, - .share_property_name = "i2s7-share", .share_i2s_id = -1, }, [DAI_I2S8] = { .id = MT8192_DAI_I2S_8, .mclk_id = MT8192_I2S8_MCK, - .share_property_name = "i2s8-share", .share_i2s_id = -1, }, [DAI_I2S9] = { .id = MT8192_DAI_I2S_9, .mclk_id = MT8192_I2S9_MCK, - .share_property_name = "i2s9-share", .share_i2s_id = -1, }, }; -static int mt8192_dai_i2s_get_share(struct mtk_base_afe *afe) -{ - struct mt8192_afe_private *afe_priv = afe->platform_priv; - const struct device_node *of_node = afe->dev->of_node; - const char *of_str; - const char *property_name; - struct mtk_afe_i2s_priv *i2s_priv; - int i; - - for (i = 0; i < DAI_I2S_NUM; i++) { - i2s_priv = afe_priv->dai_priv[mt8192_i2s_priv[i].id]; - property_name = mt8192_i2s_priv[i].share_property_name; - if (of_property_read_string(of_node, property_name, &of_str)) - continue; - i2s_priv->share_i2s_id = get_i2s_id_by_name(afe, of_str); - } - - return 0; -} - /** * mt8192_dai_i2s_set_share() - Set up I2S ports to share a single clock. * @afe: Pointer to &struct mtk_base_afe @@ -2127,10 +2097,5 @@ int mt8192_dai_i2s_register(struct mtk_base_afe *afe) if (ret) return ret; - /* parse share i2s */ - ret = mt8192_dai_i2s_get_share(afe); - if (ret) - return ret; - return 0; } From patchwork Thu Sep 8 16:11:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 12970326 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7E237C54EE9 for ; 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t=1662653526; bh=1m8CobNwZn4GhVwZE+bnolPPFRG5PI3OCAmyya1eAAI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ZXi4qRc1Z4CqK2vX59XBgyqXt/EKvwcoMQvhBcNRm9auQetdppCb3o1TMd26hhmQk 5ByJWTReYOHoFECKSxGvFHHj08WqNjQkpkJTvS3pfWc9rMjaH//yttXpb938dSlwpz PAsM/6AZRxa/a3DNTokHEoZi2C3UGwmu13IQ4nND6pqiNVDjNaG0Pam3Hg4NvEH1Mv a3GF4G8PJ3SizXkExy6WEgzRT5xxTcPy3BRg2Xz44nzWegMw2KyOxnCoB9vuxy5KK1 +ojlAq2aBAlL3a7xHdFQ61ozPaeeN1sQbjGMW0GEz7kp9S8C/JwpnkaCm5FA5+Olj1 CBtlDEE0q1FHA== From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= To: Mark Brown , Matthias Brugger Subject: [PATCH 04/10] ASoC: mediatek: mt8183: Allow setting shared clocks from machine driver Date: Thu, 8 Sep 2022 12:11:48 -0400 Message-Id: <20220908161154.648557-5-nfraprado@collabora.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220908161154.648557-1-nfraprado@collabora.com> References: <20220908161154.648557-1-nfraprado@collabora.com> MIME-Version: 1.0 Cc: alsa-devel@alsa-project.org, =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , Liam Girdwood , linux-kernel@vger.kernel.org, Takashi Iwai , linux-mediatek@lists.infradead.org, kernel@collabora.com, linux-arm-kernel@lists.infradead.org, AngeloGioacchino Del Regno X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Add a new function to configure the shared clock between two i2s ports, and export it. This will allow the clock sharing to be set from the machine driver instead of the devicetree. Signed-off-by: Nícolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno --- sound/soc/mediatek/mt8183/mt8183-afe-common.h | 3 +++ sound/soc/mediatek/mt8183/mt8183-dai-i2s.c | 26 +++++++++++++++++++ 2 files changed, 29 insertions(+) diff --git a/sound/soc/mediatek/mt8183/mt8183-afe-common.h b/sound/soc/mediatek/mt8183/mt8183-afe-common.h index b220e7a7db7e..40ab48c1566c 100644 --- a/sound/soc/mediatek/mt8183/mt8183-afe-common.h +++ b/sound/soc/mediatek/mt8183/mt8183-afe-common.h @@ -99,6 +99,9 @@ unsigned int mt8183_general_rate_transform(struct device *dev, unsigned int mt8183_rate_transform(struct device *dev, unsigned int rate, int aud_blk); +int mt8183_dai_i2s_set_share(struct mtk_base_afe *afe, const char *main_i2s_name, + const char *secondary_i2s_name); + /* dai register */ int mt8183_dai_adda_register(struct mtk_base_afe *afe); int mt8183_dai_pcm_register(struct mtk_base_afe *afe); diff --git a/sound/soc/mediatek/mt8183/mt8183-dai-i2s.c b/sound/soc/mediatek/mt8183/mt8183-dai-i2s.c index 138591d71ebd..8902ff608d26 100644 --- a/sound/soc/mediatek/mt8183/mt8183-dai-i2s.c +++ b/sound/soc/mediatek/mt8183/mt8183-dai-i2s.c @@ -1026,6 +1026,32 @@ static int mt8183_dai_i2s_get_share(struct mtk_base_afe *afe) return 0; } +/** + * mt8183_dai_i2s_set_share() - Set up I2S ports to share a single clock. + * @afe: Pointer to &struct mtk_base_afe + * @main_i2s_name: The name of the I2S port that will provide the clock + * @secondary_i2s_name: The name of the I2S port that will use this clock + */ +int mt8183_dai_i2s_set_share(struct mtk_base_afe *afe, const char *main_i2s_name, + const char *secondary_i2s_name) +{ + struct mtk_afe_i2s_priv *secondary_i2s_priv; + int main_i2s_id; + + secondary_i2s_priv = get_i2s_priv_by_name(afe, secondary_i2s_name); + if (!secondary_i2s_priv) + return -EINVAL; + + main_i2s_id = get_i2s_id_by_name(afe, main_i2s_name); + if (main_i2s_id < 0) + return main_i2s_id; + + secondary_i2s_priv->share_i2s_id = main_i2s_id; + + return 0; +} +EXPORT_SYMBOL_GPL(mt8183_dai_i2s_set_share); + static int mt8183_dai_i2s_set_priv(struct mtk_base_afe *afe) { struct mt8183_afe_private *afe_priv = afe->platform_priv; From patchwork Thu Sep 8 16:11:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 12970327 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A2FC9C54EE9 for ; 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h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Nl/he3U60A7/mmgUgn1oAI3NYZ0K4NjWYcPAeotjqMG63AIKvdYbW22sn8i4sGwfL oBXqKBhTyC2/NAmixhnv90LYSA0vsqOiPSEr+iLwG8Qjkw1lnLlrpyKSSW5nPHupOD FF4cSGmxgnKf1nXBjbO/4XEGxJm5nSyJTqi9g6AeKyAclUV9myPkDGFd5q1iHVIJQd Lz8kvaCZ/fdDdwdC07q0eicmTSJbPjx6ZhMBnUkzBFbGnuUkhZLZQXCgQvMDNT8FvV vWZ9cVL+fkGohQjZRzkURs8TeQvprWWYhve2oFVE8Nfz82XC1/2DSOw9P9fvv4BIgc EhyL3GJLLrtBQ== From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= To: Mark Brown , Matthias Brugger Subject: [PATCH 05/10] ASoC: mediatek: mt8183: Configure shared clocks Date: Thu, 8 Sep 2022 12:11:49 -0400 Message-Id: <20220908161154.648557-6-nfraprado@collabora.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220908161154.648557-1-nfraprado@collabora.com> References: <20220908161154.648557-1-nfraprado@collabora.com> MIME-Version: 1.0 Cc: alsa-devel@alsa-project.org, Miaoqian Lin , =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , linux-kernel@vger.kernel.org, Takashi Iwai , Liam Girdwood , Jiaxin Yu , Tzung-Bi Shih , linux-mediatek@lists.infradead.org, Rikard Falkeborn , Akihiko Odaki , kernel@collabora.com, linux-arm-kernel@lists.infradead.org, AngeloGioacchino Del Regno X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" i2s0 and i2s5 are paired input/output connected to the same codec and should share the same clock. Likewise for i2s2 and i2s3. Set the clock sharing for each pair during the DAI initialization. Signed-off-by: Nícolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno --- .../mediatek/mt8183/mt8183-da7219-max98357.c | 33 +++++++++++++++++++ .../mt8183/mt8183-mt6358-ts3a227-max98357.c | 33 +++++++++++++++++++ 2 files changed, 66 insertions(+) diff --git a/sound/soc/mediatek/mt8183/mt8183-da7219-max98357.c b/sound/soc/mediatek/mt8183/mt8183-da7219-max98357.c index b33cc9a73ed1..9f22d3939818 100644 --- a/sound/soc/mediatek/mt8183/mt8183-da7219-max98357.c +++ b/sound/soc/mediatek/mt8183/mt8183-da7219-max98357.c @@ -17,6 +17,7 @@ #include "../../codecs/da7219-aad.h" #include "../../codecs/da7219.h" #include "../../codecs/rt1015.h" +#include "../common/mtk-afe-platform-driver.h" #include "mt8183-afe-common.h" #define DA7219_CODEC_DAI "da7219-hifi" @@ -372,6 +373,36 @@ static int mt8183_da7219_max98357_hdmi_init(struct snd_soc_pcm_runtime *rtd) &priv->hdmi_jack, NULL); } +static int mt8183_bt_init(struct snd_soc_pcm_runtime *rtd) +{ + struct snd_soc_component *cmpnt_afe = + snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME); + struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt_afe); + int ret; + + ret = mt8183_dai_i2s_set_share(afe, "I2S5", "I2S0"); + if (ret) { + dev_err(rtd->dev, "Failed to set up shared clocks\n"); + return ret; + } + return 0; +} + +static int mt8183_da7219_init(struct snd_soc_pcm_runtime *rtd) +{ + struct snd_soc_component *cmpnt_afe = + snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME); + struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt_afe); + int ret; + + ret = mt8183_dai_i2s_set_share(afe, "I2S2", "I2S3"); + if (ret) { + dev_err(rtd->dev, "Failed to set up shared clocks\n"); + return ret; + } + return 0; +} + static struct snd_soc_dai_link mt8183_da7219_dai_links[] = { /* FE */ { @@ -500,6 +531,7 @@ static struct snd_soc_dai_link mt8183_da7219_dai_links[] = { .ignore_suspend = 1, .be_hw_params_fixup = mt8183_i2s_hw_params_fixup, .ops = &mt8183_da7219_i2s_ops, + .init = &mt8183_da7219_init, SND_SOC_DAILINK_REG(i2s2), }, { @@ -515,6 +547,7 @@ static struct snd_soc_dai_link mt8183_da7219_dai_links[] = { .ignore_suspend = 1, .be_hw_params_fixup = mt8183_i2s_hw_params_fixup, .ops = &mt8183_mt6358_i2s_ops, + .init = &mt8183_bt_init, SND_SOC_DAILINK_REG(i2s5), }, { diff --git a/sound/soc/mediatek/mt8183/mt8183-mt6358-ts3a227-max98357.c b/sound/soc/mediatek/mt8183/mt8183-mt6358-ts3a227-max98357.c index ab157db78335..a86085223677 100644 --- a/sound/soc/mediatek/mt8183/mt8183-mt6358-ts3a227-max98357.c +++ b/sound/soc/mediatek/mt8183/mt8183-mt6358-ts3a227-max98357.c @@ -15,6 +15,7 @@ #include "../../codecs/rt1015.h" #include "../../codecs/ts3a227e.h" +#include "../common/mtk-afe-platform-driver.h" #include "mt8183-afe-common.h" #define RT1015_CODEC_DAI "rt1015-aif" @@ -391,6 +392,36 @@ mt8183_mt6358_ts3a227_max98357_hdmi_init(struct snd_soc_pcm_runtime *rtd) &priv->hdmi_jack, NULL); } +static int mt8183_bt_init(struct snd_soc_pcm_runtime *rtd) +{ + struct snd_soc_component *cmpnt_afe = + snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME); + struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt_afe); + int ret; + + ret = mt8183_dai_i2s_set_share(afe, "I2S5", "I2S0"); + if (ret) { + dev_err(rtd->dev, "Failed to set up shared clocks\n"); + return ret; + } + return 0; +} + +static int mt8183_i2s2_init(struct snd_soc_pcm_runtime *rtd) +{ + struct snd_soc_component *cmpnt_afe = + snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME); + struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt_afe); + int ret; + + ret = mt8183_dai_i2s_set_share(afe, "I2S2", "I2S3"); + if (ret) { + dev_err(rtd->dev, "Failed to set up shared clocks\n"); + return ret; + } + return 0; +} + static struct snd_soc_dai_link mt8183_mt6358_ts3a227_dai_links[] = { /* FE */ { @@ -527,6 +558,7 @@ static struct snd_soc_dai_link mt8183_mt6358_ts3a227_dai_links[] = { .ignore_suspend = 1, .be_hw_params_fixup = mt8183_i2s_hw_params_fixup, .ops = &mt8183_mt6358_i2s_ops, + .init = &mt8183_i2s2_init, SND_SOC_DAILINK_REG(i2s2), }, { @@ -541,6 +573,7 @@ static struct snd_soc_dai_link mt8183_mt6358_ts3a227_dai_links[] = { .dpcm_playback = 1, .ignore_suspend = 1, .ops = &mt8183_mt6358_i2s_ops, + .init = &mt8183_bt_init, SND_SOC_DAILINK_REG(i2s5), }, { From patchwork Thu Sep 8 16:11:50 2022 Content-Type: text/plain; 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Signed-off-by: Nícolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno --- sound/soc/mediatek/mt8183/mt8183-dai-i2s.c | 31 ---------------------- 1 file changed, 31 deletions(-) diff --git a/sound/soc/mediatek/mt8183/mt8183-dai-i2s.c b/sound/soc/mediatek/mt8183/mt8183-dai-i2s.c index 8902ff608d26..6a9ace4180d3 100644 --- a/sound/soc/mediatek/mt8183/mt8183-dai-i2s.c +++ b/sound/soc/mediatek/mt8183/mt8183-dai-i2s.c @@ -43,7 +43,6 @@ struct mtk_afe_i2s_priv { int rate; /* for determine which apll to use */ int low_jitter_en; - const char *share_property_name; int share_i2s_id; int mclk_id; @@ -977,55 +976,30 @@ static const struct mtk_afe_i2s_priv mt8183_i2s_priv[DAI_I2S_NUM] = { [DAI_I2S0] = { .id = MT8183_DAI_I2S_0, .mclk_id = MT8183_I2S0_MCK, - .share_property_name = "i2s0-share", .share_i2s_id = -1, }, [DAI_I2S1] = { .id = MT8183_DAI_I2S_1, .mclk_id = MT8183_I2S1_MCK, - .share_property_name = "i2s1-share", .share_i2s_id = -1, }, [DAI_I2S2] = { .id = MT8183_DAI_I2S_2, .mclk_id = MT8183_I2S2_MCK, - .share_property_name = "i2s2-share", .share_i2s_id = -1, }, [DAI_I2S3] = { .id = MT8183_DAI_I2S_3, .mclk_id = MT8183_I2S3_MCK, - .share_property_name = "i2s3-share", .share_i2s_id = -1, }, [DAI_I2S5] = { .id = MT8183_DAI_I2S_5, .mclk_id = MT8183_I2S5_MCK, - .share_property_name = "i2s5-share", .share_i2s_id = -1, }, }; -static int mt8183_dai_i2s_get_share(struct mtk_base_afe *afe) -{ - struct mt8183_afe_private *afe_priv = afe->platform_priv; - const struct device_node *of_node = afe->dev->of_node; - const char *of_str; - const char *property_name; - struct mtk_afe_i2s_priv *i2s_priv; - int i; - - for (i = 0; i < DAI_I2S_NUM; i++) { - i2s_priv = afe_priv->dai_priv[mt8183_i2s_priv[i].id]; - property_name = mt8183_i2s_priv[i].share_property_name; - if (of_property_read_string(of_node, property_name, &of_str)) - continue; - i2s_priv->share_i2s_id = get_i2s_id_by_name(afe, of_str); - } - - return 0; -} - /** * mt8183_dai_i2s_set_share() - Set up I2S ports to share a single clock. * @afe: Pointer to &struct mtk_base_afe @@ -1100,10 +1074,5 @@ int mt8183_dai_i2s_register(struct mtk_base_afe *afe) if (ret) return ret; - /* parse share i2s */ - ret = mt8183_dai_i2s_get_share(afe); - if (ret) - return ret; - return 0; } From patchwork Thu Sep 8 16:11:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 12970329 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 33F15C6FA86 for ; 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t=1662653533; bh=oZmUg/3CYzDxISO0EVaOSkEiswwr+ZAd5SKGH9COfyY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=c4YQgJBp8ARBFpRiZ/h1dvKhW93tKBPpiVYMWdmQa+Bn0zpuL3amXqTNvYUAU8ahD yWGB2EeiXrt1MddjzbhAZZzDyH2E+FWt/cGtFIVq/grOJVtAF+BIY50XRiYICeAUxr +R91qLSKisjIxhReL2EyYqPmZ//flVLwRIFA8R5q3YYTeqTQfDPuedZqxDju3lagcn n8o9PywTdTf6bG20tUm46RAIVKs40aZs9dV+ILl5jwC0WUd1wpqA1dvqLKdwPEg3ox /TG+aNmdCgo0qucwar2wNVhgdNpuWXEmwMkeqTL+ZoUInUdch7mst8hQHsrB/PgPLX y2jLsioMSUetQ== From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= To: Mark Brown , Matthias Brugger Subject: [PATCH 08/10] ASoC: mediatek: mt8186: Allow setting shared clocks from machine driver Date: Thu, 8 Sep 2022 12:11:52 -0400 Message-Id: <20220908161154.648557-9-nfraprado@collabora.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220908161154.648557-1-nfraprado@collabora.com> References: <20220908161154.648557-1-nfraprado@collabora.com> MIME-Version: 1.0 Cc: alsa-devel@alsa-project.org, Chunxu Li , =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , linux-kernel@vger.kernel.org, Takashi Iwai , Liam Girdwood , Jiaxin Yu , linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, kernel@collabora.com, Dan Carpenter , AngeloGioacchino Del Regno X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Add a new function to configure the shared clock between two i2s ports, and export it. This will allow the clock sharing to be set from the machine driver instead of the devicetree. Signed-off-by: Nícolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno --- sound/soc/mediatek/mt8186/mt8186-afe-common.h | 3 +++ sound/soc/mediatek/mt8186/mt8186-dai-i2s.c | 26 +++++++++++++++++++ 2 files changed, 29 insertions(+) diff --git a/sound/soc/mediatek/mt8186/mt8186-afe-common.h b/sound/soc/mediatek/mt8186/mt8186-afe-common.h index b8f03e1b7e49..d59258520995 100644 --- a/sound/soc/mediatek/mt8186/mt8186-afe-common.h +++ b/sound/soc/mediatek/mt8186/mt8186-afe-common.h @@ -189,6 +189,9 @@ unsigned int mt8186_rate_transform(struct device *dev, unsigned int mt8186_tdm_relatch_rate_transform(struct device *dev, unsigned int rate); +int mt8186_dai_i2s_set_share(struct mtk_base_afe *afe, const char *main_i2s_name, + const char *secondary_i2s_name); + int mt8186_dai_set_priv(struct mtk_base_afe *afe, int id, int priv_size, const void *priv_data); diff --git a/sound/soc/mediatek/mt8186/mt8186-dai-i2s.c b/sound/soc/mediatek/mt8186/mt8186-dai-i2s.c index e553a555d168..7e8cad682c83 100644 --- a/sound/soc/mediatek/mt8186/mt8186-dai-i2s.c +++ b/sound/soc/mediatek/mt8186/mt8186-dai-i2s.c @@ -1184,6 +1184,32 @@ static int mt8186_dai_i2s_get_share(struct mtk_base_afe *afe) return 0; } +/** + * mt8186_dai_i2s_set_share() - Set up I2S ports to share a single clock. + * @afe: Pointer to &struct mtk_base_afe + * @main_i2s_name: The name of the I2S port that will provide the clock + * @secondary_i2s_name: The name of the I2S port that will use this clock + */ +int mt8186_dai_i2s_set_share(struct mtk_base_afe *afe, const char *main_i2s_name, + const char *secondary_i2s_name) +{ + struct mtk_afe_i2s_priv *secondary_i2s_priv; + int main_i2s_id; + + secondary_i2s_priv = get_i2s_priv_by_name(afe, secondary_i2s_name); + if (!secondary_i2s_priv) + return -EINVAL; + + main_i2s_id = get_i2s_id_by_name(afe, main_i2s_name); + if (main_i2s_id < 0) + return main_i2s_id; + + secondary_i2s_priv->share_i2s_id = main_i2s_id; + + return 0; +} +EXPORT_SYMBOL_GPL(mt8186_dai_i2s_set_share); + static int mt8186_dai_i2s_set_priv(struct mtk_base_afe *afe) { int i; From patchwork Thu Sep 8 16:11:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 12970330 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1EA4EC38145 for ; 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t=1662653535; bh=uhx5omwpic5bk4/kTplSRf0+UKyLNhVsKRgsymwMjJE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=eGtmnm70gO430MvZvviUFurvGCYkSFhzJuJqJbxlkBO1PPiHAXHW+o5xGqHNcSZaB uNKM3FgiI93HiqUAkgJVQOQesThAMQ+lGpZsfyanVVFtPFBDH9tvHNOdJyGmIY/M5l NANeS7bTJz6h4qCj/CSAe5fiO2+r/AVpYOR32qeb76RmcgD3EwnLiGSA7kchvddR5T qKBTWFglh3T2/0qJioVIXsXqrhusD9+Zt7LnSitdcBgw805FdpC/+BavsYDiQDX4Hj w4GPoVfB4b/EQT9TKEkGkSO2fVOuWEESLAXUFt4nuPeEbbkYZ0aKAz796XMZA2KyAR F6w2SVcV/JLTA== From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= To: Mark Brown , Matthias Brugger Subject: [PATCH 09/10] ASoC: mediatek: mt8186: Configure shared clocks Date: Thu, 8 Sep 2022 12:11:53 -0400 Message-Id: <20220908161154.648557-10-nfraprado@collabora.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220908161154.648557-1-nfraprado@collabora.com> References: <20220908161154.648557-1-nfraprado@collabora.com> MIME-Version: 1.0 Cc: alsa-devel@alsa-project.org, "chunxu.li" , =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , linux-kernel@vger.kernel.org, Takashi Iwai , Liam Girdwood , Jiaxin Yu , linux-mediatek@lists.infradead.org, kernel@collabora.com, linux-arm-kernel@lists.infradead.org, AngeloGioacchino Del Regno X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" i2s0 and i2s1 are paired input/output connected to the same codec and should share the same clock. Likewise for i2s2 and i2s3. Set the clock sharing for each pair during the codec's initialization. Signed-off-by: Nícolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno --- .../mt8186/mt8186-mt6366-da7219-max98357.c | 18 ++++++++++++++++++ .../mt8186/mt8186-mt6366-rt1019-rt5682s.c | 18 ++++++++++++++++++ 2 files changed, 36 insertions(+) diff --git a/sound/soc/mediatek/mt8186/mt8186-mt6366-da7219-max98357.c b/sound/soc/mediatek/mt8186/mt8186-mt6366-da7219-max98357.c index 17a15bec41da..6f93f9dd4623 100644 --- a/sound/soc/mediatek/mt8186/mt8186-mt6366-da7219-max98357.c +++ b/sound/soc/mediatek/mt8186/mt8186-mt6366-da7219-max98357.c @@ -54,6 +54,9 @@ static struct snd_soc_codec_conf mt8186_mt6366_da7219_max98357_codec_conf[] = { static int mt8186_da7219_init(struct snd_soc_pcm_runtime *rtd) { + struct snd_soc_component *cmpnt_afe = + snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME); + struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt_afe); struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(rtd->card); struct mt8186_mt6366_da7219_max98357_priv *priv = soc_card_data->mach_priv; @@ -62,6 +65,12 @@ static int mt8186_da7219_init(struct snd_soc_pcm_runtime *rtd) asoc_rtd_to_codec(rtd, 0)->component; int ret; + ret = mt8186_dai_i2s_set_share(afe, "I2S1", "I2S0"); + if (ret) { + dev_err(rtd->dev, "Failed to set up shared clocks\n"); + return ret; + } + /* Enable Headset and 4 Buttons Jack detection */ ret = snd_soc_card_jack_new(rtd->card, "Headset Jack", SND_JACK_HEADSET | SND_JACK_BTN_0 | @@ -160,6 +169,9 @@ static const struct snd_soc_ops mt8186_da7219_i2s_ops = { static int mt8186_mt6366_da7219_max98357_hdmi_init(struct snd_soc_pcm_runtime *rtd) { + struct snd_soc_component *cmpnt_afe = + snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME); + struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt_afe); struct snd_soc_component *cmpnt_codec = asoc_rtd_to_codec(rtd, 0)->component; struct mtk_soc_card_data *soc_card_data = @@ -167,6 +179,12 @@ static int mt8186_mt6366_da7219_max98357_hdmi_init(struct snd_soc_pcm_runtime *r struct mt8186_mt6366_da7219_max98357_priv *priv = soc_card_data->mach_priv; int ret; + ret = mt8186_dai_i2s_set_share(afe, "I2S3", "I2S2"); + if (ret) { + dev_err(rtd->dev, "Failed to set up shared clocks\n"); + return ret; + } + ret = snd_soc_card_jack_new(rtd->card, "HDMI Jack", SND_JACK_LINEOUT, &priv->hdmi_jack); if (ret) { dev_err(rtd->dev, "HDMI Jack creation failed: %d\n", ret); diff --git a/sound/soc/mediatek/mt8186/mt8186-mt6366-rt1019-rt5682s.c b/sound/soc/mediatek/mt8186/mt8186-mt6366-rt1019-rt5682s.c index 393d179d61de..247f20f594d9 100644 --- a/sound/soc/mediatek/mt8186/mt8186-mt6366-rt1019-rt5682s.c +++ b/sound/soc/mediatek/mt8186/mt8186-mt6366-rt1019-rt5682s.c @@ -58,6 +58,9 @@ static struct snd_soc_codec_conf mt8186_mt6366_rt1019_rt5682s_codec_conf[] = { static int mt8186_rt5682s_init(struct snd_soc_pcm_runtime *rtd) { + struct snd_soc_component *cmpnt_afe = + snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME); + struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt_afe); struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(rtd->card); struct mt8186_mt6366_rt1019_rt5682s_priv *priv = soc_card_data->mach_priv; @@ -66,6 +69,12 @@ static int mt8186_rt5682s_init(struct snd_soc_pcm_runtime *rtd) asoc_rtd_to_codec(rtd, 0)->component; int ret; + ret = mt8186_dai_i2s_set_share(afe, "I2S1", "I2S0"); + if (ret) { + dev_err(rtd->dev, "Failed to set up shared clocks\n"); + return ret; + } + ret = snd_soc_card_jack_new(rtd->card, "Headset Jack", SND_JACK_HEADSET | SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2 | @@ -136,6 +145,9 @@ static const struct snd_soc_ops mt8186_rt5682s_i2s_ops = { static int mt8186_mt6366_rt1019_rt5682s_hdmi_init(struct snd_soc_pcm_runtime *rtd) { + struct snd_soc_component *cmpnt_afe = + snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME); + struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt_afe); struct snd_soc_component *cmpnt_codec = asoc_rtd_to_codec(rtd, 0)->component; struct mtk_soc_card_data *soc_card_data = @@ -143,6 +155,12 @@ static int mt8186_mt6366_rt1019_rt5682s_hdmi_init(struct snd_soc_pcm_runtime *rt struct mt8186_mt6366_rt1019_rt5682s_priv *priv = soc_card_data->mach_priv; int ret; + ret = mt8186_dai_i2s_set_share(afe, "I2S3", "I2S2"); + if (ret) { + dev_err(rtd->dev, "Failed to set up shared clocks\n"); + return ret; + } + ret = snd_soc_card_jack_new(rtd->card, "HDMI Jack", SND_JACK_LINEOUT, &priv->hdmi_jack); if (ret) { dev_err(rtd->dev, "HDMI Jack creation failed: %d\n", ret); From patchwork Thu Sep 8 16:11:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 12970331 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0530EC38145 for ; Thu, 8 Sep 2022 16:15:31 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 49AC11749; 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Thu, 8 Sep 2022 18:12:18 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz 46C19F80553 Authentication-Results: alsa1.perex.cz; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="jtWMhA7r" Received: from notapiano.myfiosgateway.com (unknown [70.107.189.129]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: nfraprado) by madras.collabora.co.uk (Postfix) with ESMTPSA id 888606601FBA; Thu, 8 Sep 2022 17:12:15 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1662653537; bh=jIUdtkT4ddNfSHRyN+v/gxKe5FoYLf2qnOUA50l2MJs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=jtWMhA7rx+v6qQhy1Em7Y3pjtbUzQj8/i1otNHUbCYCcSaCUyEfcrU2ep2jWw7n+c Vi7Kw2+2ZrR9iKeic1dCieNkmsEanp0Dae2wZImJZrWNi7UyhFIG2bX6hvCUjh6S2R My48lMeVEcfu0JzQXZKVWZrHkuDftmfZ9BCePITcAodyj2OABTO2xo4MCuJfO08ZWc meiQP8R/jUvThecyTUbwOfNjOtkQl1GbPtCf1/xoIJwKQu8WwzWVdkHKF8OrnjPS1B uELc+YqiumTjSPxbkalPp1hg7QzjL51eJyZyiKGo2/hawSfVf94nhOdPd+hpTPOI/M VeILSfFXCcBRQ== From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= To: Mark Brown , Matthias Brugger Subject: [PATCH 10/10] ASoC: mediatek: mt8186: Remove clock share parsing from DT Date: Thu, 8 Sep 2022 12:11:54 -0400 Message-Id: <20220908161154.648557-11-nfraprado@collabora.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220908161154.648557-1-nfraprado@collabora.com> References: <20220908161154.648557-1-nfraprado@collabora.com> MIME-Version: 1.0 Cc: alsa-devel@alsa-project.org, Chunxu Li , =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , linux-kernel@vger.kernel.org, Takashi Iwai , Liam Girdwood , Jiaxin Yu , linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, kernel@collabora.com, Dan Carpenter , AngeloGioacchino Del Regno X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Now that the clock sharing for i2s ports can be configured from the sound machine driver, remove the logic that was used to parse the properties from the devicetree. Signed-off-by: Nícolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno --- sound/soc/mediatek/mt8186/mt8186-dai-i2s.c | 30 ---------------------- 1 file changed, 30 deletions(-) diff --git a/sound/soc/mediatek/mt8186/mt8186-dai-i2s.c b/sound/soc/mediatek/mt8186/mt8186-dai-i2s.c index 7e8cad682c83..f07181be4370 100644 --- a/sound/soc/mediatek/mt8186/mt8186-dai-i2s.c +++ b/sound/soc/mediatek/mt8186/mt8186-dai-i2s.c @@ -44,7 +44,6 @@ struct mtk_afe_i2s_priv { int low_jitter_en; int master; /* only i2s0 has slave mode*/ - const char *share_property_name; int share_i2s_id; int mclk_id; @@ -1140,50 +1139,26 @@ static const struct mtk_afe_i2s_priv mt8186_i2s_priv[DAI_I2S_NUM] = { [DAI_I2S0] = { .id = MT8186_DAI_I2S_0, .mclk_id = MT8186_I2S0_MCK, - .share_property_name = "i2s0-share", .share_i2s_id = -1, }, [DAI_I2S1] = { .id = MT8186_DAI_I2S_1, .mclk_id = MT8186_I2S1_MCK, - .share_property_name = "i2s1-share", .share_i2s_id = -1, }, [DAI_I2S2] = { .id = MT8186_DAI_I2S_2, .mclk_id = MT8186_I2S2_MCK, - .share_property_name = "i2s2-share", .share_i2s_id = -1, }, [DAI_I2S3] = { .id = MT8186_DAI_I2S_3, /* clock gate naming is hf_faud_i2s4_m_ck*/ .mclk_id = MT8186_I2S4_MCK, - .share_property_name = "i2s3-share", .share_i2s_id = -1, } }; -static int mt8186_dai_i2s_get_share(struct mtk_base_afe *afe) -{ - struct mt8186_afe_private *afe_priv = afe->platform_priv; - const struct device_node *of_node = afe->dev->of_node; - const char *of_str; - const char *property_name; - struct mtk_afe_i2s_priv *i2s_priv; - int i; - - for (i = 0; i < DAI_I2S_NUM; i++) { - i2s_priv = afe_priv->dai_priv[mt8186_i2s_priv[i].id]; - property_name = mt8186_i2s_priv[i].share_property_name; - if (of_property_read_string(of_node, property_name, &of_str)) - continue; - i2s_priv->share_i2s_id = get_i2s_id_by_name(afe, of_str); - } - - return 0; -} - /** * mt8186_dai_i2s_set_share() - Set up I2S ports to share a single clock. * @afe: Pointer to &struct mtk_base_afe @@ -1252,10 +1227,5 @@ int mt8186_dai_i2s_register(struct mtk_base_afe *afe) if (ret) return ret; - /* parse share i2s */ - ret = mt8186_dai_i2s_get_share(afe); - if (ret) - return ret; - return 0; }