From patchwork Fri Sep 9 08:44:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krishna chaitanya chundru X-Patchwork-Id: 12971237 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2A4B1ECAAD3 for ; Fri, 9 Sep 2022 08:45:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:List-Subscribe:List-Help: List-Post:List-Archive:List-Unsubscribe:List-Id:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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Fri, 09 Sep 2022 08:45:05 +0000 Received: from APBLRPPMTA02.qualcomm.com (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 2898j42Q014222; Fri, 9 Sep 2022 08:45:04 GMT Received: from hu-sgudaval-hyd.qualcomm.com (hu-krichai-hyd.qualcomm.com [10.213.110.37]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTP id 2898j4LL014214; Fri, 09 Sep 2022 08:45:04 +0000 Received: by hu-sgudaval-hyd.qualcomm.com (Postfix, from userid 4058933) id 0302544AC; Fri, 9 Sep 2022 14:15:04 +0530 (+0530) From: Krishna chaitanya chundru To: helgaas@kernel.org Cc: linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, mka@chromium.org, quic_vbadigan@quicinc.com, quic_hemantk@quicinc.com, quic_nitegupt@quicinc.com, quic_skananth@quicinc.com, quic_ramkri@quicinc.com, manivannan.sadhasivam@linaro.org, swboyd@chromium.org, dmitry.baryshkov@linaro.org, Krishna chaitanya chundru , Kishon Vijay Abraham I , Vinod Koul , linux-phy@lists.infradead.org (open list:GENERIC PHY FRAMEWORK) Subject: [PATCH v6 3/5] phy: core: Add support for phy power down & power up Date: Fri, 9 Sep 2022 14:14:42 +0530 Message-Id: <1662713084-8106-4-git-send-email-quic_krichai@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1662713084-8106-1-git-send-email-quic_krichai@quicinc.com> References: <1662713084-8106-1-git-send-email-quic_krichai@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: __Wr50mEm9u1Riga9jMsOS-WY3lYLWLn X-Proofpoint-ORIG-GUID: __Wr50mEm9u1Riga9jMsOS-WY3lYLWLn X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-09_04,2022-09-09_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 impostorscore=0 suspectscore=0 bulkscore=0 malwarescore=0 mlxlogscore=841 lowpriorityscore=0 spamscore=0 clxscore=1011 priorityscore=1501 mlxscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2207270000 definitions=main-2209090029 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220909_014514_492510_5621DE5F X-CRM114-Status: GOOD ( 15.38 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org Introducing phy power down/up callbacks for allowing to park the link-state in L1ss without holding any PCIe resources during system suspend. Signed-off-by: Krishna chaitanya chundru --- drivers/phy/phy-core.c | 30 ++++++++++++++++++++++++++++++ include/linux/phy/phy.h | 20 ++++++++++++++++++++ 2 files changed, 50 insertions(+) diff --git a/drivers/phy/phy-core.c b/drivers/phy/phy-core.c index d93ddf1..1b0b757 100644 --- a/drivers/phy/phy-core.c +++ b/drivers/phy/phy-core.c @@ -441,6 +441,36 @@ int phy_set_speed(struct phy *phy, int speed) } EXPORT_SYMBOL_GPL(phy_set_speed); +int phy_power_down(struct phy *phy) +{ + int ret; + + if (!phy || !phy->ops->power_down) + return 0; + + mutex_lock(&phy->mutex); + ret = phy->ops->power_down(phy); + mutex_unlock(&phy->mutex); + + return ret; +} +EXPORT_SYMBOL_GPL(phy_power_down); + +int phy_power_up(struct phy *phy) +{ + int ret; + + if (!phy || !phy->ops->power_up) + return 0; + + mutex_lock(&phy->mutex); + ret = phy->ops->power_up(phy); + mutex_unlock(&phy->mutex); + + return ret; +} +EXPORT_SYMBOL_GPL(phy_power_up); + int phy_reset(struct phy *phy) { int ret; diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h index b141375..3a45f4d 100644 --- a/include/linux/phy/phy.h +++ b/include/linux/phy/phy.h @@ -76,6 +76,8 @@ union phy_configure_opts { * @set_mode: set the mode of the phy * @set_media: set the media type of the phy (optional) * @set_speed: set the speed of the phy (optional) + * @power_down: parking the phy in power down state + * @power_up: pulling back the phy from power down * @reset: resetting the phy * @calibrate: calibrate the phy * @release: ops to be performed while the consumer relinquishes the PHY @@ -89,6 +91,8 @@ struct phy_ops { int (*set_mode)(struct phy *phy, enum phy_mode mode, int submode); int (*set_media)(struct phy *phy, enum phy_media media); int (*set_speed)(struct phy *phy, int speed); + int (*power_down)(struct phy *phy); + int (*power_up)(struct phy *phy); /** * @configure: @@ -226,6 +230,8 @@ int phy_init(struct phy *phy); int phy_exit(struct phy *phy); int phy_power_on(struct phy *phy); int phy_power_off(struct phy *phy); +int phy_power_down(struct phy *phy); +int phy_power_up(struct phy *phy); int phy_set_mode_ext(struct phy *phy, enum phy_mode mode, int submode); #define phy_set_mode(phy, mode) \ phy_set_mode_ext(phy, mode, 0) @@ -349,6 +355,20 @@ static inline int phy_power_off(struct phy *phy) return -ENOSYS; } +static inline int phy_power_down(struct phy *phy) +{ + if (!phy) + return 0; + return -ENOSYS; +} + +static inline int phy_power_up(struct phy *phy) +{ + if (!phy) + return 0; + return -ENOSYS; +} + static inline int phy_set_mode_ext(struct phy *phy, enum phy_mode mode, int submode) { From patchwork Fri Sep 9 08:44:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krishna chaitanya chundru X-Patchwork-Id: 12971238 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 62182C6FA89 for ; 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Fri, 09 Sep 2022 08:45:14 +0000 Received: from pps.filterd (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTP id 2898j583014253; Fri, 9 Sep 2022 08:45:05 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 3jc00m8vqa-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Fri, 09 Sep 2022 08:45:05 +0000 Received: from APBLRPPMTA02.qualcomm.com (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 2898j4Vg014229; Fri, 9 Sep 2022 08:45:05 GMT Received: from hu-sgudaval-hyd.qualcomm.com (hu-krichai-hyd.qualcomm.com [10.213.110.37]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTP id 2898j4Wr014215; Fri, 09 Sep 2022 08:45:04 +0000 Received: by hu-sgudaval-hyd.qualcomm.com (Postfix, from userid 4058933) id 44B1644AD; Fri, 9 Sep 2022 14:15:04 +0530 (+0530) From: Krishna chaitanya chundru To: helgaas@kernel.org Cc: linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, mka@chromium.org, quic_vbadigan@quicinc.com, quic_hemantk@quicinc.com, quic_nitegupt@quicinc.com, quic_skananth@quicinc.com, quic_ramkri@quicinc.com, manivannan.sadhasivam@linaro.org, swboyd@chromium.org, dmitry.baryshkov@linaro.org, Krishna chaitanya chundru , Stanimir Varbanov , Andy Gross , Bjorn Andersson , Konrad Dybcio , Lorenzo Pieralisi , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Bjorn Helgaas , Kishon Vijay Abraham I , Vinod Koul , linux-phy@lists.infradead.org (open list:GENERIC PHY FRAMEWORK) Subject: [PATCH v6 4/5] phy: qcom: Add power down/up callbacks to pcie phy Date: Fri, 9 Sep 2022 14:14:43 +0530 Message-Id: <1662713084-8106-5-git-send-email-quic_krichai@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1662713084-8106-1-git-send-email-quic_krichai@quicinc.com> References: <1662713084-8106-1-git-send-email-quic_krichai@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: BCA4Ed_CBbbMwOml2C-4x5euSfWHWTaT X-Proofpoint-ORIG-GUID: BCA4Ed_CBbbMwOml2C-4x5euSfWHWTaT X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-09_04,2022-09-09_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 adultscore=0 impostorscore=0 spamscore=0 phishscore=0 clxscore=1015 mlxscore=0 malwarescore=0 priorityscore=1501 lowpriorityscore=0 bulkscore=0 mlxlogscore=809 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2207270000 definitions=main-2209090030 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220909_014521_024090_2B38C972 X-CRM114-Status: GOOD ( 18.31 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org Add phy power down/up callbacks to pcie phy. Using these callbacks we can release phy resources like phy specific clocks but continue maintain pcie link in l1ss state. This can help in parking pcie link in l1ss state during system suspend (S3). Signed-off-by: Krishna chaitanya chundru --- drivers/pci/controller/dwc/pcie-qcom.c | 6 ++-- drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 50 ++++++++++++++++++++++++++++++++ 2 files changed, 54 insertions(+), 2 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c index 15c2067..1d4b1b0 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -1326,7 +1326,8 @@ static int qcom_pcie_resume_2_7_0(struct qcom_pcie *pcie) ret = clk_bulk_prepare_enable(res->num_clks, res->clks); - phy_power_on(pcie->phy); + /* Bring back PHY from power down */ + phy_power_up(pcie->phy); return ret; } @@ -1335,7 +1336,8 @@ static int qcom_pcie_suspend_2_7_0(struct qcom_pcie *pcie) { struct qcom_pcie_resources_2_7_0 *res = &pcie->res.v2_7_0; - phy_power_off(pcie->phy); + /* Power down PHY to park the link state in L1ss */ + phy_power_down(pcie->phy); clk_bulk_disable_unprepare(res->num_clks, res->clks); return 0; diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c index 3ddbb8e..c6b3b82 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c @@ -2145,6 +2145,54 @@ static int qcom_qmp_phy_pcie_exit(struct phy *phy) return 0; } +static int qcom_qmp_phy_pcie_power_up(struct phy *phy) +{ + struct qmp_phy *qphy = phy_get_drvdata(phy); + struct qcom_qmp *qmp = qphy->qmp; + const struct qmp_phy_cfg *cfg = qphy->cfg; + int ret; + + ret = clk_bulk_prepare_enable(cfg->num_clks, qmp->clks); + if (ret) + return ret; + + ret = clk_prepare_enable(qphy->pipe_clk); + if (ret) + return ret; + + /* Pull out PHY from POWER DOWN state */ + if (cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL]) { + qphy_setbits(qphy->pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], + cfg->pwrdn_ctrl); + } else { + qphy_setbits(qphy->pcs, QPHY_V2_PCS_POWER_DOWN_CONTROL, + cfg->pwrdn_ctrl); + } + + return 0; +} + +static int qcom_qmp_phy_pcie_power_down(struct phy *phy) +{ + struct qmp_phy *qphy = phy_get_drvdata(phy); + struct qcom_qmp *qmp = qphy->qmp; + const struct qmp_phy_cfg *cfg = qphy->cfg; + + clk_disable_unprepare(qphy->pipe_clk); + clk_bulk_disable_unprepare(cfg->num_clks, qmp->clks); + + /* Put PHY into POWER DOWN state: active low */ + if (cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL]) { + qphy_clrbits(qphy->pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], + cfg->pwrdn_ctrl); + } else { + qphy_clrbits(qphy->pcs, QPHY_V2_PCS_POWER_DOWN_CONTROL, + cfg->pwrdn_ctrl); + } + + return 0; +} + static int qcom_qmp_phy_pcie_enable(struct phy *phy) { int ret; @@ -2304,6 +2352,8 @@ static const struct phy_ops qcom_qmp_phy_pcie_ops = { .power_on = qcom_qmp_phy_pcie_enable, .power_off = qcom_qmp_phy_pcie_disable, .set_mode = qcom_qmp_phy_pcie_set_mode, + .power_down = qcom_qmp_phy_pcie_power_down, + .power_up = qcom_qmp_phy_pcie_power_up, .owner = THIS_MODULE, };