From patchwork Wed Sep 14 09:50:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Siddharth Vadapalli X-Patchwork-Id: 12975923 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 094B8C6FA86 for ; Wed, 14 Sep 2022 09:52:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231687AbiINJwW (ORCPT ); Wed, 14 Sep 2022 05:52:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53028 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231624AbiINJv4 (ORCPT ); Wed, 14 Sep 2022 05:51:56 -0400 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4CB2266138; Wed, 14 Sep 2022 02:51:50 -0700 (PDT) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 28E9p5nN006774; Wed, 14 Sep 2022 04:51:05 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1663149065; bh=CL2cbBVuEBtxASYb7DpsxyZqCktdhjJgBmatAHDUBeQ=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=yLuqpJ04LtErmTj1lZBXz/FmzWqKn48YD1w4vT/t/G5cFY4q7nrbLWxytz+xHaqCa WTzSXLruFOEaO1qO1KBLrSSGuE2VRY8srVyzh9L0Po/3mODK8lSloureiBSE4s1RRQ 5kAqme2dwmsTTe+vNiTKB6JNqgLfSuRYq6oglKV0= Received: from DLEE108.ent.ti.com (dlee108.ent.ti.com [157.170.170.38]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 28E9p5Mj010314 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 14 Sep 2022 04:51:05 -0500 Received: from DLEE101.ent.ti.com (157.170.170.31) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Wed, 14 Sep 2022 04:51:05 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Wed, 14 Sep 2022 04:51:05 -0500 Received: from uda0492258.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 28E9osD1046564; Wed, 14 Sep 2022 04:51:00 -0500 From: Siddharth Vadapalli To: , , , , , , , , , , , CC: , , , , , Subject: [PATCH 1/8] dt-bindings: net: ti: k3-am654-cpsw-nuss: Update bindings for J721e CPSW9G Date: Wed, 14 Sep 2022 15:20:46 +0530 Message-ID: <20220914095053.189851-2-s-vadapalli@ti.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220914095053.189851-1-s-vadapalli@ti.com> References: <20220914095053.189851-1-s-vadapalli@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Update bindings for TI K3 J721e SoC which contains 9 ports (8 external ports) CPSW9G module and add compatible for it. Changes made: - Add new compatible ti,j721e-cpswxg-nuss for CPSW9G. - Extend pattern properties for new compatible. - Change maximum number of CPSW ports to 8 for new compatible. Signed-off-by: Siddharth Vadapalli --- .../bindings/net/ti,k3-am654-cpsw-nuss.yaml | 23 +++++++++++++++++-- 1 file changed, 21 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml b/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml index 821974815dec..868b7fb58b06 100644 --- a/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml +++ b/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml @@ -57,6 +57,7 @@ properties: - ti,am654-cpsw-nuss - ti,j7200-cpswxg-nuss - ti,j721e-cpsw-nuss + - ti,j721e-cpswxg-nuss - ti,am642-cpsw-nuss reg: @@ -111,7 +112,7 @@ properties: const: 0 patternProperties: - "^port@[1-4]$": + "^port@[1-8]$": type: object description: CPSWxG NUSS external ports @@ -121,7 +122,7 @@ properties: properties: reg: minimum: 1 - maximum: 4 + maximum: 8 description: CPSW port number phys: @@ -181,6 +182,21 @@ required: - '#size-cells' allOf: + - if: + not: + properties: + compatible: + contains: + const: ti,j721e-cpswxg-nuss + then: + properties: + ethernet-ports: + patternProperties: + "^port@[5-8]$": false + properties: + reg: + maximum: 4 + - if: not: properties: @@ -192,6 +208,9 @@ allOf: ethernet-ports: patternProperties: "^port@[3-4]$": false + properties: + reg: + maximum: 2 additionalProperties: false From patchwork Wed Sep 14 09:50:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Siddharth Vadapalli X-Patchwork-Id: 12975911 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7963CECAAD3 for ; Wed, 14 Sep 2022 09:51:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231302AbiINJvb (ORCPT ); Wed, 14 Sep 2022 05:51:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52492 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229716AbiINJv0 (ORCPT ); Wed, 14 Sep 2022 05:51:26 -0400 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 558D1647F3; Wed, 14 Sep 2022 02:51:25 -0700 (PDT) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 28E9pAvR101276; Wed, 14 Sep 2022 04:51:10 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1663149070; bh=+u6FR2UGcNaI+4wkBrazoF5ehxal+nWP3zm0vD1dGwg=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=U2erNgg/uK3DljGTGk7g4Btj7dbbPjrDvFdQOeW2QCTgDUb0B0YjmQLHPaEbSY61G G9z6djCgX5y6w6msSGPXbqBWkS/3ujYMvmo9RYeTNrju2UtBHMeGE/p4RFlrDWp32t QYu5hlBqA4xa+K8iL3MRveelOtOSuMxKMCZWV/yc= Received: from DLEE108.ent.ti.com (dlee108.ent.ti.com [157.170.170.38]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 28E9pA3e020292 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 14 Sep 2022 04:51:10 -0500 Received: from DLEE101.ent.ti.com (157.170.170.31) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Wed, 14 Sep 2022 04:51:10 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Wed, 14 Sep 2022 04:51:10 -0500 Received: from uda0492258.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 28E9osD2046564; Wed, 14 Sep 2022 04:51:05 -0500 From: Siddharth Vadapalli To: , , , , , , , , , , , CC: , , , , , Subject: [PATCH 2/8] net: ethernet: ti: am65-cpsw: Add support for SERDES configuration Date: Wed, 14 Sep 2022 15:20:47 +0530 Message-ID: <20220914095053.189851-3-s-vadapalli@ti.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220914095053.189851-1-s-vadapalli@ti.com> References: <20220914095053.189851-1-s-vadapalli@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Use PHY framework APIs to initialize the SERDES connected to CPSW. Define the functions am65_cpsw_init_phy(), am65_cpsw_enable_phy() and am65_cpsw_disable_phy() and invoke in am65_cpsw_nuss_init_slave_ports(), am65_cpsw_mac_link_up() and am65_cpsw_mac_link_down() respectively. Signed-off-by: Siddharth Vadapalli --- drivers/net/ethernet/ti/am65-cpsw-nuss.c | 55 ++++++++++++++++++++++++ 1 file changed, 55 insertions(+) diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.c b/drivers/net/ethernet/ti/am65-cpsw-nuss.c index 7ef5d8208a4e..4e06def3b0de 100644 --- a/drivers/net/ethernet/ti/am65-cpsw-nuss.c +++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.c @@ -1404,6 +1404,50 @@ static const struct net_device_ops am65_cpsw_nuss_netdev_ops = { .ndo_get_devlink_port = am65_cpsw_ndo_get_devlink_port, }; +static void am65_cpsw_disable_phy(struct phy *phy) +{ + phy_power_off(phy); + phy_exit(phy); +} + +static int am65_cpsw_enable_phy(struct phy *phy) +{ + int ret; + + ret = phy_init(phy); + if (ret < 0) + return ret; + + ret = phy_power_on(phy); + if (ret < 0) { + phy_exit(phy); + return ret; + } + + return 0; +} + +static int am65_cpsw_init_phy(struct device *dev, struct device_node *port_np) +{ + const char *name = "serdes-phy"; + struct phy *phy; + int ret; + + phy = devm_of_phy_get(dev, port_np, name); + if (PTR_ERR(phy) == -ENODEV) + return 0; + + ret = am65_cpsw_enable_phy(phy); + if (ret < 0) + goto err_phy; + + return 0; + +err_phy: + devm_phy_put(dev, phy); + return ret; +} + static void am65_cpsw_nuss_mac_config(struct phylink_config *config, unsigned int mode, const struct phylink_link_state *state) { @@ -1427,6 +1471,9 @@ static void am65_cpsw_nuss_mac_link_down(struct phylink_config *config, unsigned struct net_device *ndev = port->ndev; int tmo; + /* disable phy */ + am65_cpsw_disable_phy(port->slave.ifphy); + /* disable forwarding */ cpsw_ale_control_set(common->ale, port->port_id, ALE_PORT_STATE, ALE_PORT_STATE_DISABLE); @@ -1472,6 +1519,9 @@ static void am65_cpsw_nuss_mac_link_up(struct phylink_config *config, struct phy cpsw_sl_ctl_set(port->slave.mac_sl, mac_control); + /* enable phy */ + am65_cpsw_enable_phy(port->slave.ifphy); + /* enable forwarding */ cpsw_ale_control_set(common->ale, port->port_id, ALE_PORT_STATE, ALE_PORT_STATE_FORWARD); @@ -1881,6 +1931,11 @@ static int am65_cpsw_nuss_init_slave_ports(struct am65_cpsw_common *common) goto of_node_put; } + /* Initialize the phy for the port */ + ret = am65_cpsw_init_phy(dev, port_np); + if (ret) + return ret; + port->slave.mac_only = of_property_read_bool(port_np, "ti,mac-only"); From patchwork Wed Sep 14 09:50:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Siddharth Vadapalli X-Patchwork-Id: 12975914 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 71AF8ECAAD3 for ; Wed, 14 Sep 2022 09:51:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231569AbiINJvt (ORCPT ); Wed, 14 Sep 2022 05:51:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52834 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231228AbiINJvm (ORCPT ); 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Wed, 14 Sep 2022 04:51:15 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Wed, 14 Sep 2022 04:51:15 -0500 Received: from uda0492258.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 28E9osD3046564; Wed, 14 Sep 2022 04:51:10 -0500 From: Siddharth Vadapalli To: , , , , , , , , , , , CC: , , , , , Subject: [PATCH 3/8] net: ethernet: ti: am65-cpsw: Add mac control function Date: Wed, 14 Sep 2022 15:20:48 +0530 Message-ID: <20220914095053.189851-4-s-vadapalli@ti.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220914095053.189851-1-s-vadapalli@ti.com> References: <20220914095053.189851-1-s-vadapalli@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Add function am65_cpsw_nuss_mac_control() corresponding to the mac control register writes that are performed in the am65_cpsw_nuss_mac_link_up() function and use it in the am65_cpsw_nuss_mac_link_up() function. The newly added function will be used in am65_cpsw_nuss_mac_config() function in a future patch, thereby making it necessary to define a new function for the redundant mac control operations. Signed-off-by: Siddharth Vadapalli --- drivers/net/ethernet/ti/am65-cpsw-nuss.c | 45 ++++++++++++++---------- 1 file changed, 26 insertions(+), 19 deletions(-) diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.c b/drivers/net/ethernet/ti/am65-cpsw-nuss.c index 4e06def3b0de..c7e6ad374e1a 100644 --- a/drivers/net/ethernet/ti/am65-cpsw-nuss.c +++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.c @@ -1448,6 +1448,31 @@ static int am65_cpsw_init_phy(struct device *dev, struct device_node *port_np) return ret; } +static void am65_cpsw_nuss_mac_control(struct am65_cpsw_port *port, phy_interface_t interface, + int speed, int duplex, bool tx_pause, bool rx_pause) +{ + u32 mac_control = CPSW_SL_CTL_GMII_EN; + + if (speed == SPEED_1000) + mac_control |= CPSW_SL_CTL_GIG; + if (speed == SPEED_10 && interface == PHY_INTERFACE_MODE_RGMII) + /* Can be used with in band mode only */ + mac_control |= CPSW_SL_CTL_EXT_EN; + if (speed == SPEED_100 && interface == PHY_INTERFACE_MODE_RMII) + mac_control |= CPSW_SL_CTL_IFCTL_A; + if (duplex) + mac_control |= CPSW_SL_CTL_FULLDUPLEX; + + /* rx_pause/tx_pause */ + if (rx_pause) + mac_control |= CPSW_SL_CTL_RX_FLOW_EN; + + if (tx_pause) + mac_control |= CPSW_SL_CTL_TX_FLOW_EN; + + cpsw_sl_ctl_set(port->slave.mac_sl, mac_control); +} + static void am65_cpsw_nuss_mac_config(struct phylink_config *config, unsigned int mode, const struct phylink_link_state *state) { @@ -1497,27 +1522,9 @@ static void am65_cpsw_nuss_mac_link_up(struct phylink_config *config, struct phy phylink_config); struct am65_cpsw_port *port = container_of(slave, struct am65_cpsw_port, slave); struct am65_cpsw_common *common = port->common; - u32 mac_control = CPSW_SL_CTL_GMII_EN; struct net_device *ndev = port->ndev; - if (speed == SPEED_1000) - mac_control |= CPSW_SL_CTL_GIG; - if (speed == SPEED_10 && interface == PHY_INTERFACE_MODE_RGMII) - /* Can be used with in band mode only */ - mac_control |= CPSW_SL_CTL_EXT_EN; - if (speed == SPEED_100 && interface == PHY_INTERFACE_MODE_RMII) - mac_control |= CPSW_SL_CTL_IFCTL_A; - if (duplex) - mac_control |= CPSW_SL_CTL_FULLDUPLEX; - - /* rx_pause/tx_pause */ - if (rx_pause) - mac_control |= CPSW_SL_CTL_RX_FLOW_EN; - - if (tx_pause) - mac_control |= CPSW_SL_CTL_TX_FLOW_EN; - - cpsw_sl_ctl_set(port->slave.mac_sl, mac_control); + am65_cpsw_nuss_mac_control(port, interface, speed, duplex, tx_pause, rx_pause); /* enable phy */ am65_cpsw_enable_phy(port->slave.ifphy); From patchwork Wed Sep 14 09:50:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Siddharth Vadapalli X-Patchwork-Id: 12975913 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E7DBDECAAD8 for ; Wed, 14 Sep 2022 09:51:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231382AbiINJvr (ORCPT ); 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Wed, 14 Sep 2022 04:51:21 -0500 Received: from DLEE101.ent.ti.com (157.170.170.31) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Wed, 14 Sep 2022 04:51:20 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Wed, 14 Sep 2022 04:51:20 -0500 Received: from uda0492258.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 28E9osD4046564; Wed, 14 Sep 2022 04:51:16 -0500 From: Siddharth Vadapalli To: , , , , , , , , , , , CC: , , , , , Subject: [PATCH 4/8] net: ethernet: ti: am65-cpsw: Add mac enable link function Date: Wed, 14 Sep 2022 15:20:49 +0530 Message-ID: <20220914095053.189851-5-s-vadapalli@ti.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220914095053.189851-1-s-vadapalli@ti.com> References: <20220914095053.189851-1-s-vadapalli@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Add function am65_cpsw_nuss_mac_enable_link() to invoke am65_cpsw_enable_phy(), cpsw_ale_control_set(), am65_cpsw_qos_link_up() and netif_tx_wake_all_queues() to prevent duplicate code. The above set of function calls are currently invoked by the am65_cpsw_nuss_mac_link_up() function. In a later patch in this series meant for adding fixed-link support, even the am65_cpsw_nuss_mac_config() function will invoke the same set of functions. Signed-off-by: Siddharth Vadapalli --- drivers/net/ethernet/ti/am65-cpsw-nuss.c | 25 ++++++++++++++---------- 1 file changed, 15 insertions(+), 10 deletions(-) diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.c b/drivers/net/ethernet/ti/am65-cpsw-nuss.c index c7e6ad374e1a..72b1df12f320 100644 --- a/drivers/net/ethernet/ti/am65-cpsw-nuss.c +++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.c @@ -1473,6 +1473,20 @@ static void am65_cpsw_nuss_mac_control(struct am65_cpsw_port *port, phy_interfac cpsw_sl_ctl_set(port->slave.mac_sl, mac_control); } +static void am65_cpsw_nuss_mac_enable_link(struct am65_cpsw_port *port, int speed, int duplex) +{ + struct am65_cpsw_common *common = port->common; + struct net_device *ndev = port->ndev; + /* enable phy */ + am65_cpsw_enable_phy(port->slave.ifphy); + + /* enable forwarding */ + cpsw_ale_control_set(common->ale, port->port_id, ALE_PORT_STATE, ALE_PORT_STATE_FORWARD); + + am65_cpsw_qos_link_up(ndev, speed); + netif_tx_wake_all_queues(ndev); +} + static void am65_cpsw_nuss_mac_config(struct phylink_config *config, unsigned int mode, const struct phylink_link_state *state) { @@ -1521,19 +1535,10 @@ static void am65_cpsw_nuss_mac_link_up(struct phylink_config *config, struct phy struct am65_cpsw_slave_data *slave = container_of(config, struct am65_cpsw_slave_data, phylink_config); struct am65_cpsw_port *port = container_of(slave, struct am65_cpsw_port, slave); - struct am65_cpsw_common *common = port->common; - struct net_device *ndev = port->ndev; am65_cpsw_nuss_mac_control(port, interface, speed, duplex, tx_pause, rx_pause); - /* enable phy */ - am65_cpsw_enable_phy(port->slave.ifphy); - - /* enable forwarding */ - cpsw_ale_control_set(common->ale, port->port_id, ALE_PORT_STATE, ALE_PORT_STATE_FORWARD); - - am65_cpsw_qos_link_up(ndev, speed); - netif_tx_wake_all_queues(ndev); + am65_cpsw_nuss_mac_enable_link(port, speed, duplex); } static const struct phylink_mac_ops am65_cpsw_phylink_mac_ops = { From patchwork Wed Sep 14 09:50:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Siddharth Vadapalli X-Patchwork-Id: 12975915 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1B84DC6FA86 for ; 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Wed, 14 Sep 2022 04:51:26 -0500 Received: from DFLE106.ent.ti.com (10.64.6.27) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Wed, 14 Sep 2022 04:51:26 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE106.ent.ti.com (10.64.6.27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Wed, 14 Sep 2022 04:51:25 -0500 Received: from uda0492258.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 28E9osD5046564; Wed, 14 Sep 2022 04:51:21 -0500 From: Siddharth Vadapalli To: , , , , , , , , , , , CC: , , , , , Subject: [PATCH 5/8] net: ethernet: ti: am65-cpsw: Add support for fixed-link configuration Date: Wed, 14 Sep 2022 15:20:50 +0530 Message-ID: <20220914095053.189851-6-s-vadapalli@ti.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220914095053.189851-1-s-vadapalli@ti.com> References: <20220914095053.189851-1-s-vadapalli@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Check for fixed-link in am65_cpsw_nuss_mac_config() using struct am65_cpsw_slave_data's phy_node property to obtain fwnode. Since am65_cpsw_nuss_mac_link_up() is not invoked in fixed-link mode, perform the relevant operations in am65_cpsw_nuss_mac_config() itself. Signed-off-by: Siddharth Vadapalli --- drivers/net/ethernet/ti/am65-cpsw-nuss.c | 40 ++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.c b/drivers/net/ethernet/ti/am65-cpsw-nuss.c index 72b1df12f320..1739c389af20 100644 --- a/drivers/net/ethernet/ti/am65-cpsw-nuss.c +++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.c @@ -1494,10 +1494,50 @@ static void am65_cpsw_nuss_mac_config(struct phylink_config *config, unsigned in phylink_config); struct am65_cpsw_port *port = container_of(slave, struct am65_cpsw_port, slave); struct am65_cpsw_common *common = port->common; + struct fwnode_handle *fwnode; + bool fixed_link = false; if (common->pdata.extra_modes & BIT(state->interface)) writel(AM65_CPSW_SGMII_CONTROL_MR_AN_ENABLE, port->sgmii_base + AM65_CPSW_SGMII_CONTROL_REG); + + /* Detecting fixed-link */ + fwnode = of_node_to_fwnode(port->slave.phy_node); + if (fwnode) + fixed_link = !!fwnode_get_named_child_node(fwnode, "fixed-link"); + + if (fixed_link) { + /* In fixed-link mode, mac_link_up is not invoked. + * Therefore, the relevant mac_link_up operations + * have to be moved to mac_config. + */ + am65_cpsw_nuss_mac_control(port, state->interface, state->speed, + state->duplex, state->pause & MLO_PAUSE_TX, + state->pause & MLO_PAUSE_RX); + + if (state->speed == SPEED_1000) + mr_adv_ability |= MAC2MAC_MR_ADV_ABILITY_1G; + if (state->speed == SPEED_100) + mr_adv_ability |= MAC2MAC_MR_ADV_ABILITY_100M; + if (state->duplex) + mr_adv_ability |= MAC2MAC_MR_ADV_ABILITY_FULLDUPLEX; + + if (state->interface == PHY_INTERFACE_MODE_SGMII && + (common->pdata.extra_modes & BIT(state->interface))) { + writel(mr_adv_ability, + port->sgmii_base + AM65_CPSW_SGMII_MR_ADV_ABILITY_REG); + writel((AM65_CPSW_SGMII_CONTROL_MASTER_MODE | + AM65_CPSW_SGMII_CONTROL_MR_AN_ENABLE), + port->sgmii_base + AM65_CPSW_SGMII_CONTROL_REG); + } + + am65_cpsw_nuss_mac_enable_link(port, state->speed, state->duplex); + } else { + if (state->interface == PHY_INTERFACE_MODE_SGMII && + (common->pdata.extra_modes & BIT(state->interface))) + writel(MAC2PHY_MR_ADV_ABILITY, + port->sgmii_base + AM65_CPSW_SGMII_MR_ADV_ABILITY_REG); + } } static void am65_cpsw_nuss_mac_link_down(struct phylink_config *config, unsigned int mode, From patchwork Wed Sep 14 09:50:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Siddharth Vadapalli X-Patchwork-Id: 12975924 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4A734C6FA8A for ; Wed, 14 Sep 2022 09:52:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231652AbiINJw0 (ORCPT ); Wed, 14 Sep 2022 05:52:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53612 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231651AbiINJwD (ORCPT ); Wed, 14 Sep 2022 05:52:03 -0400 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8C4C36555A; Wed, 14 Sep 2022 02:51:55 -0700 (PDT) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 28E9pVXb116306; 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Wed, 14 Sep 2022 04:51:30 -0500 Received: from uda0492258.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 28E9osD6046564; Wed, 14 Sep 2022 04:51:26 -0500 From: Siddharth Vadapalli To: , , , , , , , , , , , CC: , , , , , Subject: [PATCH 6/8] net: ethernet: ti: am65-cpsw: Add support for SGMII mode for J7200 CPSW5G Date: Wed, 14 Sep 2022 15:20:51 +0530 Message-ID: <20220914095053.189851-7-s-vadapalli@ti.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220914095053.189851-1-s-vadapalli@ti.com> References: <20220914095053.189851-1-s-vadapalli@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Add support for SGMII mode in both fixed-link MAC2MAC master mode and MAC2PHY modes for CPSW5G ports. Add SGMII mode to the list of extra_modes in j7200_cpswxg_pdata. The MAC2PHY mode has been tested in fixed-link mode using a bootstrapped PHY. The MAC2MAC mode has been tested by a customer with J7200 SoC on their device. Signed-off-by: Siddharth Vadapalli --- drivers/net/ethernet/ti/am65-cpsw-nuss.c | 19 ++++++++++++++++--- 1 file changed, 16 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.c b/drivers/net/ethernet/ti/am65-cpsw-nuss.c index 1739c389af20..3f40178436ff 100644 --- a/drivers/net/ethernet/ti/am65-cpsw-nuss.c +++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.c @@ -75,7 +75,15 @@ #define AM65_CPSW_PORTN_REG_TS_CTL_LTYPE2 0x31C #define AM65_CPSW_SGMII_CONTROL_REG 0x010 +#define AM65_CPSW_SGMII_MR_ADV_ABILITY_REG 0x018 #define AM65_CPSW_SGMII_CONTROL_MR_AN_ENABLE BIT(0) +#define AM65_CPSW_SGMII_CONTROL_MASTER_MODE BIT(5) + +#define MAC2MAC_MR_ADV_ABILITY_BASE (BIT(15) | BIT(0)) +#define MAC2MAC_MR_ADV_ABILITY_FULLDUPLEX BIT(12) +#define MAC2MAC_MR_ADV_ABILITY_1G BIT(11) +#define MAC2MAC_MR_ADV_ABILITY_100M BIT(10) +#define MAC2PHY_MR_ADV_ABILITY BIT(0) #define AM65_CPSW_CTL_VLAN_AWARE BIT(1) #define AM65_CPSW_CTL_P0_ENABLE BIT(2) @@ -1493,6 +1501,7 @@ static void am65_cpsw_nuss_mac_config(struct phylink_config *config, unsigned in struct am65_cpsw_slave_data *slave = container_of(config, struct am65_cpsw_slave_data, phylink_config); struct am65_cpsw_port *port = container_of(slave, struct am65_cpsw_port, slave); + u32 mr_adv_ability = MAC2MAC_MR_ADV_ABILITY_BASE; struct am65_cpsw_common *common = port->common; struct fwnode_handle *fwnode; bool fixed_link = false; @@ -2105,8 +2114,12 @@ am65_cpsw_nuss_init_port_ndev(struct am65_cpsw_common *common, u32 port_idx) __set_bit(PHY_INTERFACE_MODE_RMII, port->slave.phylink_config.supported_interfaces); } else if (common->pdata.extra_modes & BIT(port->slave.phy_if)) { - __set_bit(PHY_INTERFACE_MODE_QSGMII, - port->slave.phylink_config.supported_interfaces); + if (port->slave.phy_if == PHY_INTERFACE_MODE_QSGMII) + __set_bit(PHY_INTERFACE_MODE_QSGMII, + port->slave.phylink_config.supported_interfaces); + else + __set_bit(PHY_INTERFACE_MODE_SGMII, + port->slave.phylink_config.supported_interfaces); } else { dev_err(dev, "selected phy-mode is not supported\n"); return -EOPNOTSUPP; @@ -2744,7 +2757,7 @@ static const struct am65_cpsw_pdata j7200_cpswxg_pdata = { .quirks = 0, .ale_dev_id = "am64-cpswxg", .fdqring_mode = K3_RINGACC_RING_MODE_RING, - .extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII), + .extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII) | BIT(PHY_INTERFACE_MODE_SGMII), }; static const struct of_device_id am65_cpsw_nuss_of_mtable[] = { From patchwork Wed Sep 14 09:50:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Siddharth Vadapalli X-Patchwork-Id: 12975925 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E29E3ECAAD8 for ; Wed, 14 Sep 2022 09:52:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231653AbiINJwj (ORCPT ); Wed, 14 Sep 2022 05:52:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52956 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231248AbiINJwQ (ORCPT ); Wed, 14 Sep 2022 05:52:16 -0400 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A37AF6717C; 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Wed, 14 Sep 2022 04:51:36 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Wed, 14 Sep 2022 04:51:36 -0500 Received: from uda0492258.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 28E9osD7046564; Wed, 14 Sep 2022 04:51:31 -0500 From: Siddharth Vadapalli To: , , , , , , , , , , , CC: , , , , , Subject: [PATCH 7/8] net: ethernet: ti: am65-cpsw: Add support for J721e CPSW9G Date: Wed, 14 Sep 2022 15:20:52 +0530 Message-ID: <20220914095053.189851-8-s-vadapalli@ti.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220914095053.189851-1-s-vadapalli@ti.com> References: <20220914095053.189851-1-s-vadapalli@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org CPSW9G in J721e supports additional modes like QSGMII and SGMII. Add new compatible for J721e in am65-cpsw driver. Signed-off-by: Siddharth Vadapalli --- drivers/net/ethernet/ti/am65-cpsw-nuss.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.c b/drivers/net/ethernet/ti/am65-cpsw-nuss.c index 3f40178436ff..65114f233550 100644 --- a/drivers/net/ethernet/ti/am65-cpsw-nuss.c +++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.c @@ -2760,11 +2760,19 @@ static const struct am65_cpsw_pdata j7200_cpswxg_pdata = { .extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII) | BIT(PHY_INTERFACE_MODE_SGMII), }; +static const struct am65_cpsw_pdata j721e_cpswxg_pdata = { + .quirks = 0, + .ale_dev_id = "am64-cpswxg", + .fdqring_mode = K3_RINGACC_RING_MODE_MESSAGE, + .extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII), +}; + static const struct of_device_id am65_cpsw_nuss_of_mtable[] = { { .compatible = "ti,am654-cpsw-nuss", .data = &am65x_sr1_0}, { .compatible = "ti,j721e-cpsw-nuss", .data = &j721e_pdata}, { .compatible = "ti,am642-cpsw-nuss", .data = &am64x_cpswxg_pdata}, { .compatible = "ti,j7200-cpswxg-nuss", .data = &j7200_cpswxg_pdata}, + { .compatible = "ti,j721e-cpswxg-nuss", .data = &j721e_cpswxg_pdata}, { /* sentinel */ }, }; MODULE_DEVICE_TABLE(of, am65_cpsw_nuss_of_mtable); From patchwork Wed Sep 14 09:50:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Siddharth Vadapalli X-Patchwork-Id: 12975926 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E527EECAAD8 for ; Wed, 14 Sep 2022 09:53:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231602AbiINJw6 (ORCPT ); Wed, 14 Sep 2022 05:52:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52848 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231666AbiINJwT (ORCPT ); Wed, 14 Sep 2022 05:52:19 -0400 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 796506565D; Wed, 14 Sep 2022 02:52:03 -0700 (PDT) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 28E9pgCv006856; Wed, 14 Sep 2022 04:51:42 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1663149102; bh=jZ76uSuZhXZjsZjXWD/06XAteIeAkGI6eyzBwMeFOEE=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=UdtdaPl/xWuiHsKBokVePBxqtF75XnCrICibPQ8aEsq3XIvzhBTqNfJxL0hQDXcQ5 HVyaMLsq2WghXhv3gwJ0aavfSl95Yn/RVbKXHvwUD3vSQbolYZASppDcZ1GINWL4SC fOymixUoD9F7ccfb9LZc8U/fUeX9q5878z5qr9Vw= Received: from DLEE110.ent.ti.com (dlee110.ent.ti.com [157.170.170.21]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 28E9pgxb010483 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 14 Sep 2022 04:51:42 -0500 Received: from DLEE105.ent.ti.com (157.170.170.35) by DLEE110.ent.ti.com (157.170.170.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Wed, 14 Sep 2022 04:51:41 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Wed, 14 Sep 2022 04:51:41 -0500 Received: from uda0492258.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 28E9osD8046564; Wed, 14 Sep 2022 04:51:37 -0500 From: Siddharth Vadapalli To: , , , , , , , , , , , CC: , , , , , Subject: [PATCH 8/8] net: ethernet: ti: am65-cpsw: Enable SGMII mode for J721e CPSW9G Date: Wed, 14 Sep 2022 15:20:53 +0530 Message-ID: <20220914095053.189851-9-s-vadapalli@ti.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220914095053.189851-1-s-vadapalli@ti.com> References: <20220914095053.189851-1-s-vadapalli@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Add SGMII mode to the list of extra_modes in j721e_cpswxg_pdata. Signed-off-by: Siddharth Vadapalli --- drivers/net/ethernet/ti/am65-cpsw-nuss.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.c b/drivers/net/ethernet/ti/am65-cpsw-nuss.c index 65114f233550..442e87055cf3 100644 --- a/drivers/net/ethernet/ti/am65-cpsw-nuss.c +++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.c @@ -2764,7 +2764,7 @@ static const struct am65_cpsw_pdata j721e_cpswxg_pdata = { .quirks = 0, .ale_dev_id = "am64-cpswxg", .fdqring_mode = K3_RINGACC_RING_MODE_MESSAGE, - .extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII), + .extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII) | BIT(PHY_INTERFACE_MODE_SGMII), }; static const struct of_device_id am65_cpsw_nuss_of_mtable[] = {