From patchwork Thu Sep 15 15:25:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 12977573 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 93FE7ECAAA1 for ; Thu, 15 Sep 2022 15:28:09 +0000 (UTC) Received: from localhost ([::1]:43202 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oYqme-0002Kp-JA for qemu-devel@archiver.kernel.org; Thu, 15 Sep 2022 11:28:08 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56606) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oYqkW-0007nQ-6U; Thu, 15 Sep 2022 11:25:56 -0400 Received: from mail-ej1-x62c.google.com ([2a00:1450:4864:20::62c]:43535) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1oYqkU-0007Dw-J3; Thu, 15 Sep 2022 11:25:55 -0400 Received: by mail-ej1-x62c.google.com with SMTP id lh5so1212407ejb.10; Thu, 15 Sep 2022 08:25:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=nzugGvytbDNUTu0tbrVX+Lh2a7ZkRAaoKEr707jbXjk=; b=otlb+twSpJa7jA8FoO440eRq+QscM1WDGIb9Rrv4s1gCAK1ht1T5DmAiodlL0tqKyY Co2lQk4MXKNhGQ+VV0hsv4i81iYQZIKXnQJfx+SP8p55h6xVtJKn4WpFuApPcipFukcC 8rAzyEaPMDwUIWl2lf+Ty2LOF4PO3GePmqdFkgAugtM4AeKQ4fktL3fJN2qF0sRIXifJ /pbhfpRW2FP+oe2pJ7XYchBemdwNg3Ng9U5gllj2EUp7Ec12m1dQqexg4pm2hCYKQJOA DPWHI1UXOGblSbwBxPxW6sYZiRHeb3IhAoXtey/wMfggtNfZ8BuUDsNsClyI+HHEvbA/ CeMg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=nzugGvytbDNUTu0tbrVX+Lh2a7ZkRAaoKEr707jbXjk=; b=HkEoWueYG1VLq4LNsErEmtX6SjwWEjM2DbT/tBkZ95QuwCqntu4Srd2iZXmMN5KAT4 dmBPkzfk+u6hjnZa9xJSnYoBRx/emBoFDoMaTv4g5eYHKpzSvfkXIHodE2z22ZFr8cK/ xqllPH3DpVUMsG/RhaijVj6tG5TtjBOOUjcPvRXEqXfxILXPCkIUxdbzGzEkJneExM+k centLUxdJhMxiNDklJusfInLMX9zfH8yacu5HbA9xgjhhMQAVU5YpE9NE0iggjj0E5FI 67qNrVbkKtgTIBAy2iFBfXf96GyrBg7jQ7u1dDm8vf4J4MaI0bSYzdcv05ATda5vumqV 22xQ== X-Gm-Message-State: ACrzQf0hNkYL/pyG7l6Lbto2DYDFojxHQUHyfmosQnmVKdj3kdbG99BG D7eLCiQY1YnjSlWtz8MZ5gPh7bSOrWA= X-Google-Smtp-Source: AMsMyM7sdXqG69kFVFH1U7di19u2QIsiMz/9jSz94HWxEAfZwM/o7jIvDRFwklGl4HqxJ2owPPYitw== X-Received: by 2002:a17:907:7208:b0:73d:7097:ac6f with SMTP id dr8-20020a170907720800b0073d7097ac6fmr379137ejc.388.1663255552224; Thu, 15 Sep 2022 08:25:52 -0700 (PDT) Received: from localhost.localdomain (dynamic-077-191-182-143.77.191.pool.telefonica.de. [77.191.182.143]) by smtp.gmail.com with ESMTPSA id 2-20020a170906210200b00730979f568fsm9297138ejt.150.2022.09.15.08.25.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Sep 2022 08:25:51 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Kevin Wolf , Hanna Reitz , qemu-block@nongnu.org, Bin Meng , qemu-ppc@nongnu.org, Bernhard Beschow Subject: [PATCH 01/11] hw/ppc/meson: Allow e500 boards to be enabled separately Date: Thu, 15 Sep 2022 17:25:10 +0200 Message-Id: <20220915152520.21948-2-shentey@gmail.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220915152520.21948-1-shentey@gmail.com> References: <20220915152520.21948-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62c; envelope-from=shentey@gmail.com; helo=mail-ej1-x62c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Gives users more fine-grained control over what should be compiled into QEMU. Signed-off-by: Bernhard Beschow Reviewed-by: Bin Meng Reviewed-by: Philippe Mathieu-Daudé --- configs/devices/ppc-softmmu/default.mak | 3 ++- hw/ppc/Kconfig | 8 ++++++++ hw/ppc/meson.build | 6 ++---- 3 files changed, 12 insertions(+), 5 deletions(-) diff --git a/configs/devices/ppc-softmmu/default.mak b/configs/devices/ppc-softmmu/default.mak index 658a454426..a887f5438b 100644 --- a/configs/devices/ppc-softmmu/default.mak +++ b/configs/devices/ppc-softmmu/default.mak @@ -1,7 +1,8 @@ # Default configuration for ppc-softmmu # For embedded PPCs: -CONFIG_E500=y +CONFIG_E500PLAT=y +CONFIG_MPC8544DS=y CONFIG_PPC405=y CONFIG_PPC440=y CONFIG_VIRTEX=y diff --git a/hw/ppc/Kconfig b/hw/ppc/Kconfig index 3a4418a69e..22a64745d4 100644 --- a/hw/ppc/Kconfig +++ b/hw/ppc/Kconfig @@ -132,6 +132,14 @@ config E500 select FDT_PPC select DS1338 +config E500PLAT + bool + select E500 + +config MPC8544DS + bool + select E500 + config VIRTEX bool select PPC4XX diff --git a/hw/ppc/meson.build b/hw/ppc/meson.build index 62801923f3..32babc9b48 100644 --- a/hw/ppc/meson.build +++ b/hw/ppc/meson.build @@ -71,12 +71,10 @@ ppc_ss.add(when: 'CONFIG_MAC_OLDWORLD', if_true: files('mac_oldworld.c')) # NewWorld PowerMac ppc_ss.add(when: 'CONFIG_MAC_NEWWORLD', if_true: files('mac_newworld.c')) # e500 +ppc_ss.add(when: 'CONFIG_E500PLAT', if_true: files('e500plat.c')) +ppc_ss.add(when: 'CONFIG_MPC8544DS', if_true: files('mpc8544ds.c')) ppc_ss.add(when: 'CONFIG_E500', if_true: files( 'e500.c', - 'mpc8544ds.c', - 'e500plat.c' -)) -ppc_ss.add(when: 'CONFIG_E500', if_true: files( 'mpc8544_guts.c', 'ppce500_spin.c' )) From patchwork Thu Sep 15 15:25:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 12977574 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A2FF4C6FA89 for ; Thu, 15 Sep 2022 15:28:11 +0000 (UTC) Received: from localhost ([::1]:52532 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oYqmg-0002Sl-Km for qemu-devel@archiver.kernel.org; Thu, 15 Sep 2022 11:28:10 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56608) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oYqkX-0007ng-5z; Thu, 15 Sep 2022 11:25:57 -0400 Received: from mail-ed1-x52b.google.com ([2a00:1450:4864:20::52b]:44581) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1oYqkV-0007Ej-Kg; Thu, 15 Sep 2022 11:25:56 -0400 Received: by mail-ed1-x52b.google.com with SMTP id x94so10170467ede.11; Thu, 15 Sep 2022 08:25:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=50TUYZdhxcE2QyHZaGH/ScNbe0XiEUIkUKaPSlGCa0A=; b=aKVLIMBI4yGaxfx2okhNy+odBYomGP4HdAEocxUNp1W2e/hXC78taat0ESnfQpCe0y 59bs6/sa7KW6RYx8XG6p+mqRZNJJZIXgJ84gRmEMv86eua+W/HJUSL3ObBXvir15jxNC x9tuJLftl9P1BEGCD9qu4NiCx7dznEB1gd+arEmS1ioifrjKap0vdAoR/3p104ZVHN6t +xkCcpCkamcvruQAjnDOpnJ7rPSKIgv4A0OYnrN2YMor5UriWOBoDu8xEpvLtR+dXQ+s U1rQL25OrAf9vNLkVNOSDtW3bYHDlAyjgJB1uyiQZbKMHPrIz4jtIxul9iYOCo2iDM62 5bYw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=50TUYZdhxcE2QyHZaGH/ScNbe0XiEUIkUKaPSlGCa0A=; b=f8eL3+P7N4rS1yF7dOLeSk5xPJTEDAoKY/WOo9whfcYjQeuNrM5WKY8V/EFYxFcrvC owiK0MxLydP6gZIiuhH2kG/jAOrf3KhkhftEXGKD6XVATPZ2TQmI/0laefNeo8K3suP2 trZLKPu8oLsEMn4nnbnKF3yfuMqR9vN3T3WkAFRHkNco0On8cu+ckCmN9YUx7lu4pp6C Os+wy2h4ndQcxCiA8VddJnMKdr9e+T65IsK40I13BvlEyJH0+1RQj6BYRcospPJP0eUP a2YdtioEf2vEWV+sWnVOlwjMB3yzdU7emEED2ceymdcRi/yPCgK+8kj0YAflThgzbjU5 vPPg== X-Gm-Message-State: ACrzQf1QeviqiwDLLhBg/7Il3SDefWqIA6WVu038EUABVrQPutBaE0sH Y+Jsa+/eFOSqKmVd2iabb5LWXaIX5c4= X-Google-Smtp-Source: AMsMyM7vjhXNRu3X7hCUA5yqEpJk/OY2n7kBet4ZKwZN/fxFTt94rta4bsIc+QQdFl8EFS+mKgpNFw== X-Received: by 2002:a05:6402:40c2:b0:44f:963d:1ab4 with SMTP id z2-20020a05640240c200b0044f963d1ab4mr322608edb.319.1663255553229; Thu, 15 Sep 2022 08:25:53 -0700 (PDT) Received: from localhost.localdomain (dynamic-077-191-182-143.77.191.pool.telefonica.de. [77.191.182.143]) by smtp.gmail.com with ESMTPSA id 2-20020a170906210200b00730979f568fsm9297138ejt.150.2022.09.15.08.25.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Sep 2022 08:25:52 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Kevin Wolf , Hanna Reitz , qemu-block@nongnu.org, Bin Meng , qemu-ppc@nongnu.org, Bernhard Beschow Subject: [PATCH 02/11] hw/gpio/meson: Introduce dedicated config switch for hw/gpio/mpc8xxx Date: Thu, 15 Sep 2022 17:25:11 +0200 Message-Id: <20220915152520.21948-3-shentey@gmail.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220915152520.21948-1-shentey@gmail.com> References: <20220915152520.21948-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52b; envelope-from=shentey@gmail.com; helo=mail-ed1-x52b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Having a dedicated config switch makes dependency handling cleaner. Signed-off-by: Bernhard Beschow Reviewed-by: Bin Meng Reviewed-by: Philippe Mathieu-Daudé --- hw/gpio/Kconfig | 3 +++ hw/gpio/meson.build | 2 +- hw/ppc/Kconfig | 1 + 3 files changed, 5 insertions(+), 1 deletion(-) diff --git a/hw/gpio/Kconfig b/hw/gpio/Kconfig index f0e7405f6e..d2cf3accc8 100644 --- a/hw/gpio/Kconfig +++ b/hw/gpio/Kconfig @@ -8,6 +8,9 @@ config PL061 config GPIO_KEY bool +config GPIO_MPC8XXX + bool + config GPIO_PWR bool diff --git a/hw/gpio/meson.build b/hw/gpio/meson.build index 7bd6a57264..b726e6d27a 100644 --- a/hw/gpio/meson.build +++ b/hw/gpio/meson.build @@ -1,5 +1,5 @@ -softmmu_ss.add(when: 'CONFIG_E500', if_true: files('mpc8xxx.c')) softmmu_ss.add(when: 'CONFIG_GPIO_KEY', if_true: files('gpio_key.c')) +softmmu_ss.add(when: 'CONFIG_GPIO_MPC8XXX', if_true: files('mpc8xxx.c')) softmmu_ss.add(when: 'CONFIG_GPIO_PWR', if_true: files('gpio_pwr.c')) softmmu_ss.add(when: 'CONFIG_MAX7310', if_true: files('max7310.c')) softmmu_ss.add(when: 'CONFIG_PL061', if_true: files('pl061.c')) diff --git a/hw/ppc/Kconfig b/hw/ppc/Kconfig index 22a64745d4..791fe78a50 100644 --- a/hw/ppc/Kconfig +++ b/hw/ppc/Kconfig @@ -124,6 +124,7 @@ config E500 imply AT24C imply VIRTIO_PCI select ETSEC + select GPIO_MPC8XXX select OPENPIC select PLATFORM_BUS select PPCE500_PCI From patchwork Thu Sep 15 15:25:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 12977579 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DF48EC6FA89 for ; Thu, 15 Sep 2022 15:32:35 +0000 (UTC) Received: from localhost ([::1]:54314 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oYqqw-000133-PR for qemu-devel@archiver.kernel.org; Thu, 15 Sep 2022 11:32:34 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56610) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oYqkY-0007po-EX; Thu, 15 Sep 2022 11:25:59 -0400 Received: from mail-ed1-x536.google.com ([2a00:1450:4864:20::536]:36504) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1oYqkW-0007Fl-W0; Thu, 15 Sep 2022 11:25:58 -0400 Received: by mail-ed1-x536.google.com with SMTP id e18so27498132edj.3; Thu, 15 Sep 2022 08:25:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=sFdf1oPA62Q+TusNnPSBgdpUc9EHL+7pGgxHWwy/730=; b=Ckkw49d+MbYGhGIjebz6mAwWUxzvLsvR+xu4BqMOzYmz0SJniqf5aVzMc4uaM88eig hYtRyuWR/D89IwA1apgd352Ksstz47disXmxQs1FHG1WAMic6fCB4Jqjhod7QfDRylrf VccwggvsLfbRhdNyKpPNfjnBsXgHLMYBclnGQLXxcxae0X4a/khT5oX1Vz1h7Ag+3ez4 j5ubvda0ATKCGzTgQ9k96knd7ZUFeUJJHtRaphTdQJJSItFbNAD6sFEMp/Qq+zW0rCRj utaFKtTjUWP8EkcmGJjFn39PWNLEgHYW6zWjmn7Y8sTSmLf0tnfEeOD1IwlKstW0rHgg cmgA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=sFdf1oPA62Q+TusNnPSBgdpUc9EHL+7pGgxHWwy/730=; b=slZC64nxGoHg/gPW5jd8ieQf869OUpKwY1Xxt7NyAqrtv4ppXJN4WhumHB9KUwgtAc vGrUj8+npK93RQ4CMW1UolVClu1PFdeH1/SzuSFyuQ5qMoxRdK1uOxeuK+5aIsO7U5to snaTpIzCEW34CkVGkJRDGujv+Gyvd8XVN71hDSSA3Pbjlkj01CSU8zEaL0ogSBgA5kl+ 3HcyONCKGsRwvLZLdoSSwMvJZ4/1RDh3JYd7YXvqfuP3j3+zhytdEJcZJp3QZqXoFzu6 wO+ZwE9b27cssX6rlZg5l5O6hjvRWQ+eSSXNIZY7FzzsYiPGRqrlNbRg1cM9i4C+DO4C k3mg== X-Gm-Message-State: ACrzQf0a4SzQWGWOv5BhOJsUm6+zmiSIRUkYwYzLV4kkZnVwyuFLApsp YGHG6RipR8XKKD82vMuNFQ5mbG0Apkg= X-Google-Smtp-Source: AMsMyM6UK/8LZSGFTThl5ABlHynNlbsPe7RXpxqUAI6p4ZXtU7lLHiYgRSbrWgu+KEe3C6xi1crlZQ== X-Received: by 2002:a05:6402:440f:b0:435:2e63:aca9 with SMTP id y15-20020a056402440f00b004352e63aca9mr354035eda.162.1663255554666; Thu, 15 Sep 2022 08:25:54 -0700 (PDT) Received: from localhost.localdomain (dynamic-077-191-182-143.77.191.pool.telefonica.de. [77.191.182.143]) by smtp.gmail.com with ESMTPSA id 2-20020a170906210200b00730979f568fsm9297138ejt.150.2022.09.15.08.25.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Sep 2022 08:25:54 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Kevin Wolf , Hanna Reitz , qemu-block@nongnu.org, Bin Meng , qemu-ppc@nongnu.org, Bernhard Beschow Subject: [PATCH 03/11] docs/system/ppc/ppce500: Add heading for networking chapter Date: Thu, 15 Sep 2022 17:25:12 +0200 Message-Id: <20220915152520.21948-4-shentey@gmail.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220915152520.21948-1-shentey@gmail.com> References: <20220915152520.21948-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::536; envelope-from=shentey@gmail.com; helo=mail-ed1-x536.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The sudden change of topics is slightly confusing and makes the networking information less visible. So separate the networking chapter to improve comprehensibility. Signed-off-by: Bernhard Beschow Reviewed-by: Bin Meng Reviewed-by: Philippe Mathieu-Daudé --- docs/system/ppc/ppce500.rst | 3 +++ 1 file changed, 3 insertions(+) diff --git a/docs/system/ppc/ppce500.rst b/docs/system/ppc/ppce500.rst index 9beef39171..ba6bcb7314 100644 --- a/docs/system/ppc/ppce500.rst +++ b/docs/system/ppc/ppce500.rst @@ -146,6 +146,9 @@ You can specify a real world SoC device that QEMU has built-in support but all these SoCs are e500v2 based MPC85xx series, hence you cannot test anything built for P4080 (e500mc), P5020 (e5500) and T2080 (e6500). +Networking +---------- + By default a VirtIO standard PCI networking device is connected as an ethernet interface at PCI address 0.1.0, but we can switch that to an e1000 NIC by: From patchwork Thu Sep 15 15:25:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 12977578 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4BCB2ECAAA1 for ; Thu, 15 Sep 2022 15:32:24 +0000 (UTC) Received: from localhost ([::1]:54312 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oYqql-0000jU-Bn for qemu-devel@archiver.kernel.org; Thu, 15 Sep 2022 11:32:23 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56612) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oYqkZ-0007rY-Ej; Thu, 15 Sep 2022 11:25:59 -0400 Received: from mail-ed1-x532.google.com ([2a00:1450:4864:20::532]:41880) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1oYqkX-0007GG-SV; Thu, 15 Sep 2022 11:25:59 -0400 Received: by mail-ed1-x532.google.com with SMTP id z97so27457258ede.8; Thu, 15 Sep 2022 08:25:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=i4b49jUYGVkdhUrYn5lp3mVJKooGzbJRKK9oAzR+CRg=; b=QLANjqsq9xgLC2h7TLYuNQodtyHvgQX/EoGZr87PGcCDJF//4BqMEZukwLjnGgiGya 9KTzn38m85/8Z2P6RmDUw1NFeeFkfDNhxvp7HzNNsaWWS4ngCSa4b+Ux/gg96KQorPC7 xNmQFrbPnNcuDvN0XZY+qSjpeS87hCCOpuDbgvI3/l7G2yTysiQFJtMFPJRsXcD+UFU0 D4seUBTZjq66kDawHrOUpc4E5RuxkayxC/mFIl9Y3GGKKGgZN1KWE7J/akMsJ4NYBY5/ KYNm0cgY7pwAgpuHIT7/Vg5uvetPbsJH4s7E49QYwCtrF0mny9LObBoPv2Ph7AJjBvph 5koA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=i4b49jUYGVkdhUrYn5lp3mVJKooGzbJRKK9oAzR+CRg=; b=rtCzQ8lIq7OjkgTdivRQJZ/XfnpO4QQy+OAUb0g6wb4+/ienNP3hVV2uTN5oOkTwsB 15Au8tXvr99rqHsL+i9y6uU9hh/dT+SOVGSRzDzvlTFloKNfDjquCHRc038N6DXPQK3E 2zC4wKsGxAHWEqodea25Lq8du77qZqOCD9GTMmYIvSJtTZWSDrKKsHSSZ6qRW8pIHMfB 7vHxAF9KNGXtMa/DPEUxPQ88f8J43pG9I6a2q5vx44HDgW58yB+Zd5YC5AJrzKfa353U tzwql4y3CTyZrkgVYJCjbUvymLMdXerIvzw7pGCvjFWXH4eV5jMSGiRWvcSI+wQ0U6hA lsww== X-Gm-Message-State: ACrzQf1dgEz44mpSALqDcZ7sysf+FPqnsqWDP+n7H1jGtxZggOiDp9UJ h6Cqwh1lRmMs1wvt72Psz6wnApi9vRg= X-Google-Smtp-Source: AMsMyM7Z2oNH4qL3/5VZkF/eq1vFGc9i4Zso8FQnUYqG5OEv0LYX4hk32GMQMZ5rdf0MilZig/JYVg== X-Received: by 2002:a05:6402:51c7:b0:452:981:872a with SMTP id r7-20020a05640251c700b004520981872amr348713edd.388.1663255555581; Thu, 15 Sep 2022 08:25:55 -0700 (PDT) Received: from localhost.localdomain (dynamic-077-191-182-143.77.191.pool.telefonica.de. [77.191.182.143]) by smtp.gmail.com with ESMTPSA id 2-20020a170906210200b00730979f568fsm9297138ejt.150.2022.09.15.08.25.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Sep 2022 08:25:55 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Kevin Wolf , Hanna Reitz , qemu-block@nongnu.org, Bin Meng , qemu-ppc@nongnu.org, Bernhard Beschow Subject: [PATCH 04/11] hw/ppc/mpc8544ds: Add platform bus Date: Thu, 15 Sep 2022 17:25:13 +0200 Message-Id: <20220915152520.21948-5-shentey@gmail.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220915152520.21948-1-shentey@gmail.com> References: <20220915152520.21948-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::532; envelope-from=shentey@gmail.com; helo=mail-ed1-x532.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Models the real device more closely. Signed-off-by: Bernhard Beschow --- hw/ppc/mpc8544ds.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/hw/ppc/mpc8544ds.c b/hw/ppc/mpc8544ds.c index 81177505f0..cd6cd04bef 100644 --- a/hw/ppc/mpc8544ds.c +++ b/hw/ppc/mpc8544ds.c @@ -14,6 +14,7 @@ #include "sysemu/device_tree.h" #include "hw/ppc/openpic.h" #include "qemu/error-report.h" +#include "qemu/units.h" #include "cpu.h" static void mpc8544ds_fixup_devtree(void *fdt) @@ -45,6 +46,11 @@ static void e500plat_machine_class_init(ObjectClass *oc, void *data) pmc->pci_nr_slots = 2; pmc->fixup_devtree = mpc8544ds_fixup_devtree; pmc->mpic_version = OPENPIC_MODEL_FSL_MPIC_20; + pmc->has_platform_bus = true; + pmc->platform_bus_base = 0xEC000000ULL; + pmc->platform_bus_size = 128 * MiB; + pmc->platform_bus_first_irq = 5; + pmc->platform_bus_num_irqs = 10; pmc->ccsrbar_base = 0xE0000000ULL; pmc->pci_mmio_base = 0xC0000000ULL; pmc->pci_mmio_bus_base = 0xC0000000ULL; From patchwork Thu Sep 15 15:25:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 12977582 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 94B84C6FA89 for ; Thu, 15 Sep 2022 15:38:23 +0000 (UTC) Received: from localhost ([::1]:43766 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oYqwY-0007JW-9n for qemu-devel@archiver.kernel.org; Thu, 15 Sep 2022 11:38:22 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56614) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oYqka-0007ut-QQ; Thu, 15 Sep 2022 11:26:00 -0400 Received: from mail-ed1-x52d.google.com ([2a00:1450:4864:20::52d]:42778) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1oYqkY-0007Ht-Rn; Thu, 15 Sep 2022 11:26:00 -0400 Received: by mail-ed1-x52d.google.com with SMTP id q21so27489476edc.9; Thu, 15 Sep 2022 08:25:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=G+j3D6z4smsnshtw0WRqS3uLuJUbj35U3qDanfS/RVQ=; b=ecO+uk9zfvm1ZBpX8nhvxkR16wQZBp3vaV7yvGRi3MyfHHaBOE6U8hFJcjqUpP2LLO 1ZBU2y/QtovwlKyVrxbKLYVKdMv7wSd78ZeCJTslgVnELzd13wyol2LGEUuC/T8sX2FI WFc6pjm1YjuwLpAOgKQfqUFjAdbwZpuERDByDfqxxFf/si4EaVIcoVJy62kSqlIJu+oi Yq/cYRD4Uaoj4UPYKcKludS1oUyTeILwMbcHrqoMganIINGOGyNAanKcSC1QaWjiODyn 1/UoqmSLnF3IH+w+MZ9BxicyjxvLm5HY1KqRLQfpDo7H1CHBYRCsu4cLkJIGvsCooJrh 6eVA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=G+j3D6z4smsnshtw0WRqS3uLuJUbj35U3qDanfS/RVQ=; b=cXOl+YXYwWhVVeQMIRseMZRw92kc7Y6h1/BfGQNNQNi89ZnBbuZPPfCBE/K30zrfeE GR8OfMxXngbsOxCWL+nzvi67GAneRRuW5UWse5ingi/C9RTATiDBWGMsqm3MIEFVf0in PiszhXzcGNOW3ovICpcsd4xmFPYw7hxvuqNqCqXtaWMyQSHLyuPkv7QO41NSwxs6IdEf eaziKvMLSCg1x7eajOK0w+gcM7h3Lc/a13Cry4gdz3olKMd3o6HGzx4qBr9PcjqUz9v3 0m5zesi6dCfC9Jkko6lfEts+as3ZQ5AGu3EiwvAeAe3Ni4XJ5R0NU3C7hc3R88/7r4lj F+TQ== X-Gm-Message-State: ACrzQf1Cl2f3TaDZ4b08eEedpYabjmXz+ZMz799MpuvGgXGGErSY+Du4 xs2aehOkrdRX05ZSA706wlRVoDLVNGQ= X-Google-Smtp-Source: AMsMyM5TTqoo79OVQzDw6Aesq/LWxbZ8kd13kFg4NC1FObYPYXDz6Ee/jSzXT5hCvVPU9qXPErf+hw== X-Received: by 2002:a50:ee08:0:b0:44f:dc1:fc6b with SMTP id g8-20020a50ee08000000b0044f0dc1fc6bmr340805eds.15.1663255556692; Thu, 15 Sep 2022 08:25:56 -0700 (PDT) Received: from localhost.localdomain (dynamic-077-191-182-143.77.191.pool.telefonica.de. [77.191.182.143]) by smtp.gmail.com with ESMTPSA id 2-20020a170906210200b00730979f568fsm9297138ejt.150.2022.09.15.08.25.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Sep 2022 08:25:56 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Kevin Wolf , Hanna Reitz , qemu-block@nongnu.org, Bin Meng , qemu-ppc@nongnu.org, Bernhard Beschow Subject: [PATCH 05/11] hw/ppc/e500: Remove if statement which is now always true Date: Thu, 15 Sep 2022 17:25:14 +0200 Message-Id: <20220915152520.21948-6-shentey@gmail.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220915152520.21948-1-shentey@gmail.com> References: <20220915152520.21948-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52d; envelope-from=shentey@gmail.com; helo=mail-ed1-x52d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Now that the MPC8544DS board also has a platform bus, the if statement was always true. Signed-off-by: Bernhard Beschow Reviewed-by: Bin Meng Reviewed-by: Philippe Mathieu-Daudé --- hw/ppc/e500.c | 30 ++++++++++++++---------------- hw/ppc/e500.h | 1 - hw/ppc/e500plat.c | 1 - hw/ppc/mpc8544ds.c | 1 - 4 files changed, 14 insertions(+), 19 deletions(-) diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index 32495d0123..864b6f3d92 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -1007,25 +1007,23 @@ void ppce500_init(MachineState *machine) } /* Platform Bus Device */ - if (pmc->has_platform_bus) { - dev = qdev_new(TYPE_PLATFORM_BUS_DEVICE); - dev->id = g_strdup(TYPE_PLATFORM_BUS_DEVICE); - qdev_prop_set_uint32(dev, "num_irqs", pmc->platform_bus_num_irqs); - qdev_prop_set_uint32(dev, "mmio_size", pmc->platform_bus_size); - sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); - pms->pbus_dev = PLATFORM_BUS_DEVICE(dev); - - s = SYS_BUS_DEVICE(pms->pbus_dev); - for (i = 0; i < pmc->platform_bus_num_irqs; i++) { - int irqn = pmc->platform_bus_first_irq + i; - sysbus_connect_irq(s, i, qdev_get_gpio_in(mpicdev, irqn)); - } + dev = qdev_new(TYPE_PLATFORM_BUS_DEVICE); + dev->id = g_strdup(TYPE_PLATFORM_BUS_DEVICE); + qdev_prop_set_uint32(dev, "num_irqs", pmc->platform_bus_num_irqs); + qdev_prop_set_uint32(dev, "mmio_size", pmc->platform_bus_size); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); + pms->pbus_dev = PLATFORM_BUS_DEVICE(dev); - memory_region_add_subregion(address_space_mem, - pmc->platform_bus_base, - sysbus_mmio_get_region(s, 0)); + s = SYS_BUS_DEVICE(pms->pbus_dev); + for (i = 0; i < pmc->platform_bus_num_irqs; i++) { + int irqn = pmc->platform_bus_first_irq + i; + sysbus_connect_irq(s, i, qdev_get_gpio_in(mpicdev, irqn)); } + memory_region_add_subregion(address_space_mem, + pmc->platform_bus_base, + sysbus_mmio_get_region(s, 0)); + /* * Smart firmware defaults ahead! * diff --git a/hw/ppc/e500.h b/hw/ppc/e500.h index 1e5853b032..68f754ce50 100644 --- a/hw/ppc/e500.h +++ b/hw/ppc/e500.h @@ -27,7 +27,6 @@ struct PPCE500MachineClass { int mpic_version; bool has_mpc8xxx_gpio; - bool has_platform_bus; hwaddr platform_bus_base; hwaddr platform_bus_size; int platform_bus_first_irq; diff --git a/hw/ppc/e500plat.c b/hw/ppc/e500plat.c index fc911bbb7b..5bb1c603da 100644 --- a/hw/ppc/e500plat.c +++ b/hw/ppc/e500plat.c @@ -86,7 +86,6 @@ static void e500plat_machine_class_init(ObjectClass *oc, void *data) pmc->fixup_devtree = e500plat_fixup_devtree; pmc->mpic_version = OPENPIC_MODEL_FSL_MPIC_42; pmc->has_mpc8xxx_gpio = true; - pmc->has_platform_bus = true; pmc->platform_bus_base = 0xf00000000ULL; pmc->platform_bus_size = 128 * MiB; pmc->platform_bus_first_irq = 5; diff --git a/hw/ppc/mpc8544ds.c b/hw/ppc/mpc8544ds.c index cd6cd04bef..4ca696b56a 100644 --- a/hw/ppc/mpc8544ds.c +++ b/hw/ppc/mpc8544ds.c @@ -46,7 +46,6 @@ static void e500plat_machine_class_init(ObjectClass *oc, void *data) pmc->pci_nr_slots = 2; pmc->fixup_devtree = mpc8544ds_fixup_devtree; pmc->mpic_version = OPENPIC_MODEL_FSL_MPIC_20; - pmc->has_platform_bus = true; pmc->platform_bus_base = 0xEC000000ULL; pmc->platform_bus_size = 128 * MiB; pmc->platform_bus_first_irq = 5; From patchwork Thu Sep 15 15:25:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 12977576 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 545B2ECAAA1 for ; Thu, 15 Sep 2022 15:29:10 +0000 (UTC) Received: from localhost ([::1]:32886 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oYqnd-0004Dp-DV for qemu-devel@archiver.kernel.org; Thu, 15 Sep 2022 11:29:09 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56616) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oYqkc-0007yP-3V; Thu, 15 Sep 2022 11:26:03 -0400 Received: from mail-ed1-x529.google.com ([2a00:1450:4864:20::529]:33567) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1oYqka-0007JR-8f; Thu, 15 Sep 2022 11:26:01 -0400 Received: by mail-ed1-x529.google.com with SMTP id b35so27513521edf.0; Thu, 15 Sep 2022 08:25:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=trRT+7tjIVpvCqIzSqblXwJ9i2DPO9QCR+JSUJreV7c=; b=K4oU4Qc20J+L3cV5fzC1QeEWxRDMEBmtW7FkzNaq3TakM6ZaWiIBUiIJjQ/oEiiw/M 80WBhz1IYzJyFTJFpwZ64cB12cYPGSztpPGFi2JljSWvyBhcwaJvOfM6sOF2Uy7DMBKS P5xw0/d60pxHc+gB8PuQTxfbiLoOsnf7TQwtPt7yW+b18ZpWEjPAZNCzuQq9SKpMyJUB IcwNBEYyQvwhy4yr986iohn25tN5cBNLd3Av+KlqFSjWlIOwEOJPqpj3fDSFhHMi9EFq ottdEjORVqmKlqTPBe4I4ptdEehVXa9HmL8vN/DnZ1VVVEgEg6d4P7Z+vMiTwrkEGDcl 923g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=trRT+7tjIVpvCqIzSqblXwJ9i2DPO9QCR+JSUJreV7c=; b=g4qtyvHszHkXChlziR6bpX0F57qxVS/NH1bpul7k2yth2RmKXCWyy2ZmU/zT6kfGPG 0yFYPPQvtKYOAa3CpcYmCzLbmSPiFFpR035qsXzM+j+u/pG6QYIH3a0iSDtKTvxGwsIa Dqe6SUpNn//DVAEekQ3oYCDweaZY9JMfSwvgfGGYEP3aP24z5UAHHvFheL6MaV3BHjrR On2jFWHxbVknjoTV8ZGIdr09pdCCbUq1cB2SiBGkzWfrIXPR2yHza3ma8vIYan+unWDF eZUqs4naQ/B3JLmtsXzAR/S1K0fLw+wj8g+SQxw4cdT065bgIukKwsyla5CXDi+rm9bx Vo2g== X-Gm-Message-State: ACrzQf14DJPUqThmM1Y6HRAS1nfhbeoQ7l4xXmkaL4yTGnHu1OtSBRVd Svvw9N9b+6eS1UVj5zmz2QHofygxQss= X-Google-Smtp-Source: AMsMyM48W8lDQ1zLNF2SmkdnMWlaBFk9dk89XjI0n5NR4TBrxZHGeAvV+BNaNcHzQLGIXUtUPz01jw== X-Received: by 2002:a05:6402:1d54:b0:44e:a683:d041 with SMTP id dz20-20020a0564021d5400b0044ea683d041mr315912edb.411.1663255557976; Thu, 15 Sep 2022 08:25:57 -0700 (PDT) Received: from localhost.localdomain (dynamic-077-191-182-143.77.191.pool.telefonica.de. [77.191.182.143]) by smtp.gmail.com with ESMTPSA id 2-20020a170906210200b00730979f568fsm9297138ejt.150.2022.09.15.08.25.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Sep 2022 08:25:57 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Kevin Wolf , Hanna Reitz , qemu-block@nongnu.org, Bin Meng , qemu-ppc@nongnu.org, Bernhard Beschow Subject: [PATCH 06/11] hw/block/pflash_cfi01: Error out if device length isn't a power of two Date: Thu, 15 Sep 2022 17:25:15 +0200 Message-Id: <20220915152520.21948-7-shentey@gmail.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220915152520.21948-1-shentey@gmail.com> References: <20220915152520.21948-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::529; envelope-from=shentey@gmail.com; helo=mail-ed1-x529.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" According to the JEDEC standard the device length is communicated to an OS as an exponent (power of two). Signed-off-by: Bernhard Beschow Reviewed-by: Bin Meng --- hw/block/pflash_cfi01.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index 0cbc2fb4cb..8c9b3f518a 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -690,7 +690,7 @@ static const MemoryRegionOps pflash_cfi01_ops = { .endianness = DEVICE_NATIVE_ENDIAN, }; -static void pflash_cfi01_fill_cfi_table(PFlashCFI01 *pfl) +static void pflash_cfi01_fill_cfi_table(PFlashCFI01 *pfl, Error **errp) { uint64_t blocks_per_device, sector_len_per_device, device_len; int num_devices; @@ -708,6 +708,10 @@ static void pflash_cfi01_fill_cfi_table(PFlashCFI01 *pfl) sector_len_per_device = pfl->sector_len / num_devices; } device_len = sector_len_per_device * blocks_per_device; + if (ctpop64(device_len) != 1) { + error_setg(errp, "Device size must be a power of two."); + return; + } /* Hardcoded CFI table */ /* Standard "QRY" string */ @@ -865,7 +869,7 @@ static void pflash_cfi01_realize(DeviceState *dev, Error **errp) */ pfl->cmd = 0x00; pfl->status = 0x80; /* WSM ready */ - pflash_cfi01_fill_cfi_table(pfl); + pflash_cfi01_fill_cfi_table(pfl, errp); } static void pflash_cfi01_system_reset(DeviceState *dev) From patchwork Thu Sep 15 15:25:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 12977583 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2B8BDECAAA1 for ; Thu, 15 Sep 2022 15:38:47 +0000 (UTC) Received: from localhost ([::1]:41804 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oYqww-0008Gk-2X for qemu-devel@archiver.kernel.org; Thu, 15 Sep 2022 11:38:46 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37414) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oYqkg-0008Bq-8T; Thu, 15 Sep 2022 11:26:06 -0400 Received: from mail-ej1-x62c.google.com ([2a00:1450:4864:20::62c]:46918) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1oYqke-0007LP-A8; Thu, 15 Sep 2022 11:26:05 -0400 Received: by mail-ej1-x62c.google.com with SMTP id bj12so42886655ejb.13; Thu, 15 Sep 2022 08:26:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=z96/64N+G/WnLnhun69vxUjqijqvFp7jCOFVN/irSOM=; b=DhjUu2WAEAxvyFMOSlnHXWJwcxLLGaGWIY2RgB8W+CLxjVRflZRKCuH4WwEq00Ov73 Qadx7ved9R7J6n9nkqsbhbz3tN4HUNi1F7O4O41F3PBIRTsSpe8yn3mqZBgzezsGiUUt RrHRASRewEQA7xdaIXsSzjO6xAkW715Q5bEyqq8N+BOPUrQpTR9Fr0YMa2X2uyRBYCUr N+hV27Z3JBa0LywaY9drAJvTeT6qeaxLC+l+IdLl3VGUY/xA0CkvzGgEr8cxYCkejjjt CShERvPcld/IaBbRFViyVDLKyUeGUL9e4aLlUX56qjFhfHkwIY1+9zHMLuqezjOXgPP9 /Hlg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=z96/64N+G/WnLnhun69vxUjqijqvFp7jCOFVN/irSOM=; b=7cgRqU+QlkOPl+7cJcnYHk/yu9fTGFL2QRSXzQrtbNVCquEwr9DDvlmMfvMF7qe2zn UavvlNL0lmCeJVD3rbPQVAdhzB3pi0eWdJqdxlRv3VdO24teTshVldqiypJbTBH+rSB3 YyN26md3m36rUeIAf8pLdIki59+ttZ8UK94OZKpOV2bBAUTlRbjg0hakbHFRmT0MQhIO RXppv9f6m9j7wXi0Fhvhe/JYPXaKVInomGrn684L/7Oy9IdaiqHz1BTHLrJmKhV9LZRv InVir7pA8GMx/dHbw5tEap7aN7xa4M6QVtylP5F1083Se+zC8X9FLv40pYc56HjFVbXv v0Jw== X-Gm-Message-State: ACrzQf2NZBW6il/a39uWay19MWMFae+WTN29tx7+hjVITdvmgl/McNkA gXJ+lcAAO/0jVmeXJ8kNNlyZEkvR6Vk= X-Google-Smtp-Source: AMsMyM67QeKT6YuYJ3XxO7jFg43DNTafmx5LK3So15p2pngNHeZDqTZHOjasrJB7mHQUgrz+lGSNQw== X-Received: by 2002:a17:907:763b:b0:77b:c559:2bcb with SMTP id jy27-20020a170907763b00b0077bc5592bcbmr362342ejc.490.1663255561991; Thu, 15 Sep 2022 08:26:01 -0700 (PDT) Received: from localhost.localdomain (dynamic-077-191-182-143.77.191.pool.telefonica.de. [77.191.182.143]) by smtp.gmail.com with ESMTPSA id 2-20020a170906210200b00730979f568fsm9297138ejt.150.2022.09.15.08.25.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Sep 2022 08:26:01 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Kevin Wolf , Hanna Reitz , qemu-block@nongnu.org, Bin Meng , qemu-ppc@nongnu.org, Bernhard Beschow Subject: [PATCH 07/11] hw/ppc/e500: Implement pflash handling Date: Thu, 15 Sep 2022 17:25:16 +0200 Message-Id: <20220915152520.21948-8-shentey@gmail.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220915152520.21948-1-shentey@gmail.com> References: <20220915152520.21948-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62c; envelope-from=shentey@gmail.com; helo=mail-ej1-x62c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Allows e500 boards to have their root file system reside on flash using only builtin devices. Note that the flash memory area is only created when a -pflash argument is given, and that the size is determined by the given file. The idea is to put users into control. Signed-off-by: Bernhard Beschow --- docs/system/ppc/ppce500.rst | 12 +++++++++ hw/ppc/Kconfig | 1 + hw/ppc/e500.c | 54 +++++++++++++++++++++++++++++++++++++ 3 files changed, 67 insertions(+) diff --git a/docs/system/ppc/ppce500.rst b/docs/system/ppc/ppce500.rst index ba6bcb7314..c3f55c6f3d 100644 --- a/docs/system/ppc/ppce500.rst +++ b/docs/system/ppc/ppce500.rst @@ -119,6 +119,18 @@ To boot the 32-bit Linux kernel: -initrd /path/to/rootfs.cpio \ -append "root=/dev/ram" +Rather than using a root file system on ram disk, it is possible to have it on +emulated flash. Given an ext2 image whose size must be a power of two, it can +be used as follows: + +.. code-block:: bash + + $ qemu-system-ppc64 -M ppce500 -cpu e500mc -smp 4 -m 2G \ + -display none -serial stdio \ + -kernel vmlinux \ + -drive if=pflash,file=/path/to/rootfs.ext2,format=raw \ + -append "rootwait root=/dev/mtdblock0" + Running U-Boot -------------- diff --git a/hw/ppc/Kconfig b/hw/ppc/Kconfig index 791fe78a50..769a1ead1c 100644 --- a/hw/ppc/Kconfig +++ b/hw/ppc/Kconfig @@ -126,6 +126,7 @@ config E500 select ETSEC select GPIO_MPC8XXX select OPENPIC + select PFLASH_CFI01 select PLATFORM_BUS select PPCE500_PCI select SERIAL diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index 864b6f3d92..7843a4e04b 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -23,8 +23,10 @@ #include "e500-ccsr.h" #include "net/net.h" #include "qemu/config-file.h" +#include "hw/block/flash.h" #include "hw/char/serial.h" #include "hw/pci/pci.h" +#include "sysemu/block-backend-io.h" #include "sysemu/sysemu.h" #include "sysemu/kvm.h" #include "sysemu/reset.h" @@ -267,6 +269,34 @@ static void sysbus_device_create_devtree(SysBusDevice *sbdev, void *opaque) } } +static void create_devtree_flash(SysBusDevice *sbdev, + PlatformDevtreeData *data) +{ + char *name; + uint64_t num_blocks = object_property_get_uint(OBJECT(sbdev), + "num-blocks", + &error_fatal); + uint64_t sector_length = object_property_get_uint(OBJECT(sbdev), + "sector-length", + &error_fatal); + uint64_t bank_width = object_property_get_uint(OBJECT(sbdev), + "width", + &error_fatal); + hwaddr flashbase = 0; + hwaddr flashsize = num_blocks * sector_length; + void *fdt = data->fdt; + + name = g_strdup_printf("%s/nor@%" PRIx64, data->node, flashbase); + qemu_fdt_add_subnode(fdt, name); + qemu_fdt_setprop_cell(fdt, name, "#address-cells", 1); + qemu_fdt_setprop_cell(fdt, name, "#size-cells", 1); + qemu_fdt_setprop_string(fdt, name, "compatible", "cfi-flash"); + qemu_fdt_setprop_sized_cells(fdt, name, "reg", + 1, flashbase, 1, flashsize); + qemu_fdt_setprop_cell(fdt, name, "bank-width", bank_width); + g_free(name); +} + static void platform_bus_create_devtree(PPCE500MachineState *pms, void *fdt, const char *mpic) { @@ -276,6 +306,8 @@ static void platform_bus_create_devtree(PPCE500MachineState *pms, uint64_t addr = pmc->platform_bus_base; uint64_t size = pmc->platform_bus_size; int irq_start = pmc->platform_bus_first_irq; + SysBusDevice *sbdev; + bool ambiguous; /* Create a /platform node that we can put all devices into */ @@ -302,6 +334,13 @@ static void platform_bus_create_devtree(PPCE500MachineState *pms, /* Loop through all dynamic sysbus devices and create nodes for them */ foreach_dynamic_sysbus_device(sysbus_device_create_devtree, &data); + sbdev = SYS_BUS_DEVICE(object_resolve_path_type("", TYPE_PFLASH_CFI01, + &ambiguous)); + if (sbdev) { + assert(!ambiguous); + create_devtree_flash(sbdev, &data); + } + g_free(node); } @@ -856,6 +895,7 @@ void ppce500_init(MachineState *machine) unsigned int pci_irq_nrs[PCI_NUM_PINS] = {1, 2, 3, 4}; IrqLines *irqs; DeviceState *dev, *mpicdev; + DriveInfo *dinfo; CPUPPCState *firstenv = NULL; MemoryRegion *ccsr_addr_space; SysBusDevice *s; @@ -1024,6 +1064,20 @@ void ppce500_init(MachineState *machine) pmc->platform_bus_base, sysbus_mmio_get_region(s, 0)); + dinfo = drive_get(IF_PFLASH, 0, 0); + if (dinfo) { + BlockBackend *blk = blk_by_legacy_dinfo(dinfo); + BlockDriverState *bs = blk_bs(blk); + uint64_t size = bdrv_getlength(bs); + if (ctpop64(size) != 1) { + error_report("Size of pflash file must be a power of two."); + exit(1); + } + pflash_cfi01_register(pmc->platform_bus_base, "e500.flash", + size, blk, + 64 * KiB, 2, 0x89, 0x18, 0x0000, 0x0, 1); + } + /* * Smart firmware defaults ahead! * From patchwork Thu Sep 15 15:25:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 12977584 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 59754C6FA89 for ; Thu, 15 Sep 2022 15:41:30 +0000 (UTC) Received: from localhost ([::1]:54452 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oYqzZ-000362-A5 for qemu-devel@archiver.kernel.org; Thu, 15 Sep 2022 11:41:29 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37416) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oYqkh-0008GZ-Gj; Thu, 15 Sep 2022 11:26:07 -0400 Received: from mail-ed1-x536.google.com ([2a00:1450:4864:20::536]:36504) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1oYqke-0007Fl-IB; Thu, 15 Sep 2022 11:26:07 -0400 Received: by mail-ed1-x536.google.com with SMTP id e18so27498836edj.3; Thu, 15 Sep 2022 08:26:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=lC+nciPNvefso4Uey0coJ0dgRmlI5e5KX4arjIiF5Js=; b=IIst+g3TVX4DYFlbKFddL/vkxmvqUCwp0c8i87qoH45CuaVGF3cO4SE44UiMWSVJld +CboRiG5HqFBhj8gRBZAeSy/IPzSmraZ6ce4G1Z3zQlYNooTk69NLUHs5oGQaiX82DxT q+UsNlI7dBtVoQ2hatQPMe2X2w+D/4X0d03u8CWJ5IJegbLD2R5BuIBwoZEJKHO/hUzI 3XvqJRXgAzz4UfMHehNbLIvPNNUv2ESQ88ojfl++64EghBac1O7MZ4L5yPVLkQmE90IG 2wXqZMQkcmU7vu8w9sehi34v9yozfBsaUjW6gddo/pYNplbV8bDco68DdcZ0klG4PVJQ 4BFQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=lC+nciPNvefso4Uey0coJ0dgRmlI5e5KX4arjIiF5Js=; b=ItrQF7Y9EC00qBXqn4M1kofqU76rHjfAxPXwM7jsa454UyZuzYksok3zXQt53235a4 OXFDISv6VMlTK6cM5JYUsMrnaxZWoi1DCgbetTjubMhDPLEBKti3BgflseFVtWDG5NKh nIWuEXR8Pa02/hm5vUtKpizJLe1zBc66IAtAHE0S2YBcOe0sF/GOKIs4TeMusjTiFpu4 OAGgOdJbUWZc0I2Zm0Bf1PNtSTSXcolSGL74CMEInFkVla9rr70h5KjnFszNjqMKv1z8 hDohF53XDWhcCuQc31i8dbpatTIZ6a2o+BkJ+VLLPA4d9bF3qZQF39PD075+rF4CYtBK Jgzw== X-Gm-Message-State: ACrzQf3gEBso3pgI4v0jl+Yyr6MOX8cyz7DebFEOP50DFIFULfUBPNlP H1Qv3G2TtehxAYt2GtMg7V5BR6XV87c= X-Google-Smtp-Source: AMsMyM5VifQcLjYvRsvN22ZhJYCUjDF45q1Yc4NRfS852ygJn8Vrb8nVL2KxL2ZHrKcQi/jdMnCALg== X-Received: by 2002:a05:6402:1013:b0:448:dc53:752e with SMTP id c19-20020a056402101300b00448dc53752emr370718edu.30.1663255562959; Thu, 15 Sep 2022 08:26:02 -0700 (PDT) Received: from localhost.localdomain (dynamic-077-191-182-143.77.191.pool.telefonica.de. [77.191.182.143]) by smtp.gmail.com with ESMTPSA id 2-20020a170906210200b00730979f568fsm9297138ejt.150.2022.09.15.08.26.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Sep 2022 08:26:02 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Kevin Wolf , Hanna Reitz , qemu-block@nongnu.org, Bin Meng , qemu-ppc@nongnu.org, Bernhard Beschow Subject: [PATCH 08/11] hw/sd/sdhci-internal: Unexport ESDHC defines Date: Thu, 15 Sep 2022 17:25:17 +0200 Message-Id: <20220915152520.21948-9-shentey@gmail.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220915152520.21948-1-shentey@gmail.com> References: <20220915152520.21948-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::536; envelope-from=shentey@gmail.com; helo=mail-ed1-x536.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" These defines aren't used outside of sdhci.c, so can be defined there. Signed-off-by: Bernhard Beschow Reviewed-by: Bin Meng Reviewed-by: Philippe Mathieu-Daudé --- hw/sd/sdhci-internal.h | 20 -------------------- hw/sd/sdhci.c | 19 +++++++++++++++++++ 2 files changed, 19 insertions(+), 20 deletions(-) diff --git a/hw/sd/sdhci-internal.h b/hw/sd/sdhci-internal.h index e8c753d6d1..964570f8e8 100644 --- a/hw/sd/sdhci-internal.h +++ b/hw/sd/sdhci-internal.h @@ -288,26 +288,6 @@ enum { extern const VMStateDescription sdhci_vmstate; - -#define ESDHC_MIX_CTRL 0x48 - -#define ESDHC_VENDOR_SPEC 0xc0 -#define ESDHC_IMX_FRC_SDCLK_ON (1 << 8) - -#define ESDHC_DLL_CTRL 0x60 - -#define ESDHC_TUNING_CTRL 0xcc -#define ESDHC_TUNE_CTRL_STATUS 0x68 -#define ESDHC_WTMK_LVL 0x44 - -/* Undocumented register used by guests working around erratum ERR004536 */ -#define ESDHC_UNDOCUMENTED_REG27 0x6c - -#define ESDHC_CTRL_4BITBUS (0x1 << 1) -#define ESDHC_CTRL_8BITBUS (0x2 << 1) - -#define ESDHC_PRNSTS_SDSTB (1 << 3) - /* * Default SD/MMC host controller features information, which will be * presented in CAPABILITIES register of generic SD host controller at reset. diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 0e5e988927..6da5e2c781 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -1577,6 +1577,25 @@ static const TypeInfo sdhci_bus_info = { /* --- qdev i.MX eSDHC --- */ +#define ESDHC_MIX_CTRL 0x48 + +#define ESDHC_VENDOR_SPEC 0xc0 +#define ESDHC_IMX_FRC_SDCLK_ON (1 << 8) + +#define ESDHC_DLL_CTRL 0x60 + +#define ESDHC_TUNING_CTRL 0xcc +#define ESDHC_TUNE_CTRL_STATUS 0x68 +#define ESDHC_WTMK_LVL 0x44 + +/* Undocumented register used by guests working around erratum ERR004536 */ +#define ESDHC_UNDOCUMENTED_REG27 0x6c + +#define ESDHC_CTRL_4BITBUS (0x1 << 1) +#define ESDHC_CTRL_8BITBUS (0x2 << 1) + +#define ESDHC_PRNSTS_SDSTB (1 << 3) + static uint64_t usdhc_read(void *opaque, hwaddr offset, unsigned size) { SDHCIState *s = SYSBUS_SDHCI(opaque); From patchwork Thu Sep 15 15:25:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 12977585 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9F4B3C6FA89 for ; Thu, 15 Sep 2022 15:44:20 +0000 (UTC) Received: from localhost ([::1]:58908 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oYr2J-0005cp-Gr for qemu-devel@archiver.kernel.org; Thu, 15 Sep 2022 11:44:19 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37418) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oYqki-0008Jq-AG; Thu, 15 Sep 2022 11:26:08 -0400 Received: from mail-ej1-x631.google.com ([2a00:1450:4864:20::631]:46923) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1oYqkg-0007Lp-9f; Thu, 15 Sep 2022 11:26:07 -0400 Received: by mail-ej1-x631.google.com with SMTP id bj12so42886861ejb.13; Thu, 15 Sep 2022 08:26:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=4GXJGtF4gc7oDEAKUu6qf0IozYzFOQ6xbAVhEv/8NJg=; b=iVXJjkRvPsJQgMxaiFhEETcZbu3AT9+uqDxvdjbE5j6sKmKgakin6EaNyePBMFhoJ/ /DNEgY7Wxhq2CyeC8iAFfGtcqKmEuZp8QSGD+9+/ZjkmCtQFTQjIF5O8ghVqreZPbJtK vnlcyWk8cDXP7N4ZQpfbl13FIEVqgv7tFGQq+X2/0yUgvaKjubWK6F80V7fX+tiy6OXU vW9BdnAj9hGVJCAOx+M/qa5nYGKahUVDlFrqgQ+9QPpkxjmtC3KaphQn5uIZb9BN2VMD pvgdkYX6rGpTiiI6OLm1JNxdt1yDOyBnysdXP3JHWUGbwsJ0okbdFq+jyS93D+LQLX2n 4v1g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=4GXJGtF4gc7oDEAKUu6qf0IozYzFOQ6xbAVhEv/8NJg=; b=heCFOs9O39O6eh+2lsO5Je4cQOqRAa1PRGSwlofGDbfiDISoy1k20n/FWYGsWFIugJ G1XUFZfRslPkygah3MEDjYZmXKfZqlvutUHH1A+/up3B9k/6UTHZe+ci/akSt+uz7Hr3 qO1lTitnHcgpQdMdJPRfWPt+H8Fzzuvl5TiUTvZvRWaM2hQZVRV9u4TZEo+DsiJj/sZZ HPBraxMTFNckssJOJUPtW0MSiCtjHt3qCejsf8C8vCGp4OKbWClFaZTXKZycRuvgGueh jvJpvnIxe1MQDz8NdrQd5QYzoinK8D5XQw2SHM/1eDD3w5F4QdFMmEEAfgErjXH90c7o UTCw== X-Gm-Message-State: ACrzQf3qR4wdUiX9bBBq6Nhd8Bb3hQKNmT/AKV0cnEw8zKMYQ5jSPsZL FAr5wn1daCWSVQ6ZXjsdCmKrb9Op0Dk= X-Google-Smtp-Source: AMsMyM49BSmHuwEpOcmMdpdCS0rNiVo5zlwhLQYAXaHojoxVm5aLLpex2Ft63vv3aFgPu/cUAJhV9g== X-Received: by 2002:a17:907:2710:b0:773:dd39:6344 with SMTP id w16-20020a170907271000b00773dd396344mr341052ejk.411.1663255564070; Thu, 15 Sep 2022 08:26:04 -0700 (PDT) Received: from localhost.localdomain (dynamic-077-191-182-143.77.191.pool.telefonica.de. [77.191.182.143]) by smtp.gmail.com with ESMTPSA id 2-20020a170906210200b00730979f568fsm9297138ejt.150.2022.09.15.08.26.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Sep 2022 08:26:03 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Kevin Wolf , Hanna Reitz , qemu-block@nongnu.org, Bin Meng , qemu-ppc@nongnu.org, Bernhard Beschow Subject: [PATCH 09/11] hw/sd/sdhci: Rename ESDHC_* defines to USDHC_* Date: Thu, 15 Sep 2022 17:25:18 +0200 Message-Id: <20220915152520.21948-10-shentey@gmail.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220915152520.21948-1-shentey@gmail.com> References: <20220915152520.21948-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::631; envelope-from=shentey@gmail.com; helo=mail-ej1-x631.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The device model's functions start with "usdhc_", so rename the defines accordingly for consistency. Signed-off-by: Bernhard Beschow Reviewed-by: Bin Meng --- hw/sd/sdhci.c | 68 +++++++++++++++++++++++++-------------------------- 1 file changed, 34 insertions(+), 34 deletions(-) diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 6da5e2c781..7a5996caad 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -1577,24 +1577,24 @@ static const TypeInfo sdhci_bus_info = { /* --- qdev i.MX eSDHC --- */ -#define ESDHC_MIX_CTRL 0x48 +#define USDHC_MIX_CTRL 0x48 -#define ESDHC_VENDOR_SPEC 0xc0 -#define ESDHC_IMX_FRC_SDCLK_ON (1 << 8) +#define USDHC_VENDOR_SPEC 0xc0 +#define USDHC_IMX_FRC_SDCLK_ON (1 << 8) -#define ESDHC_DLL_CTRL 0x60 +#define USDHC_DLL_CTRL 0x60 -#define ESDHC_TUNING_CTRL 0xcc -#define ESDHC_TUNE_CTRL_STATUS 0x68 -#define ESDHC_WTMK_LVL 0x44 +#define USDHC_TUNING_CTRL 0xcc +#define USDHC_TUNE_CTRL_STATUS 0x68 +#define USDHC_WTMK_LVL 0x44 /* Undocumented register used by guests working around erratum ERR004536 */ -#define ESDHC_UNDOCUMENTED_REG27 0x6c +#define USDHC_UNDOCUMENTED_REG27 0x6c -#define ESDHC_CTRL_4BITBUS (0x1 << 1) -#define ESDHC_CTRL_8BITBUS (0x2 << 1) +#define USDHC_CTRL_4BITBUS (0x1 << 1) +#define USDHC_CTRL_8BITBUS (0x2 << 1) -#define ESDHC_PRNSTS_SDSTB (1 << 3) +#define USDHC_PRNSTS_SDSTB (1 << 3) static uint64_t usdhc_read(void *opaque, hwaddr offset, unsigned size) { @@ -1615,11 +1615,11 @@ static uint64_t usdhc_read(void *opaque, hwaddr offset, unsigned size) hostctl1 = SDHC_DMA_TYPE(s->hostctl1) << (8 - 3); if (s->hostctl1 & SDHC_CTRL_8BITBUS) { - hostctl1 |= ESDHC_CTRL_8BITBUS; + hostctl1 |= USDHC_CTRL_8BITBUS; } if (s->hostctl1 & SDHC_CTRL_4BITBUS) { - hostctl1 |= ESDHC_CTRL_4BITBUS; + hostctl1 |= USDHC_CTRL_4BITBUS; } ret = hostctl1; @@ -1630,21 +1630,21 @@ static uint64_t usdhc_read(void *opaque, hwaddr offset, unsigned size) case SDHC_PRNSTS: /* Add SDSTB (SD Clock Stable) bit to PRNSTS */ - ret = sdhci_read(opaque, offset, size) & ~ESDHC_PRNSTS_SDSTB; + ret = sdhci_read(opaque, offset, size) & ~USDHC_PRNSTS_SDSTB; if (s->clkcon & SDHC_CLOCK_INT_STABLE) { - ret |= ESDHC_PRNSTS_SDSTB; + ret |= USDHC_PRNSTS_SDSTB; } break; - case ESDHC_VENDOR_SPEC: + case USDHC_VENDOR_SPEC: ret = s->vendor_spec; break; - case ESDHC_DLL_CTRL: - case ESDHC_TUNE_CTRL_STATUS: - case ESDHC_UNDOCUMENTED_REG27: - case ESDHC_TUNING_CTRL: - case ESDHC_MIX_CTRL: - case ESDHC_WTMK_LVL: + case USDHC_DLL_CTRL: + case USDHC_TUNE_CTRL_STATUS: + case USDHC_UNDOCUMENTED_REG27: + case USDHC_TUNING_CTRL: + case USDHC_MIX_CTRL: + case USDHC_WTMK_LVL: ret = 0; break; } @@ -1660,18 +1660,18 @@ usdhc_write(void *opaque, hwaddr offset, uint64_t val, unsigned size) uint32_t value = (uint32_t)val; switch (offset) { - case ESDHC_DLL_CTRL: - case ESDHC_TUNE_CTRL_STATUS: - case ESDHC_UNDOCUMENTED_REG27: - case ESDHC_TUNING_CTRL: - case ESDHC_WTMK_LVL: + case USDHC_DLL_CTRL: + case USDHC_TUNE_CTRL_STATUS: + case USDHC_UNDOCUMENTED_REG27: + case USDHC_TUNING_CTRL: + case USDHC_WTMK_LVL: break; - case ESDHC_VENDOR_SPEC: + case USDHC_VENDOR_SPEC: s->vendor_spec = value; switch (s->vendor) { case SDHCI_VENDOR_IMX: - if (value & ESDHC_IMX_FRC_SDCLK_ON) { + if (value & USDHC_IMX_FRC_SDCLK_ON) { s->prnsts &= ~SDHC_IMX_CLOCK_GATE_OFF; } else { s->prnsts |= SDHC_IMX_CLOCK_GATE_OFF; @@ -1740,12 +1740,12 @@ usdhc_write(void *opaque, hwaddr offset, uint64_t val, unsigned size) * Second, split "Data Transfer Width" from bits 2 and 1 in to * bits 5 and 1 */ - if (value & ESDHC_CTRL_8BITBUS) { + if (value & USDHC_CTRL_8BITBUS) { hostctl1 |= SDHC_CTRL_8BITBUS; } - if (value & ESDHC_CTRL_4BITBUS) { - hostctl1 |= ESDHC_CTRL_4BITBUS; + if (value & USDHC_CTRL_4BITBUS) { + hostctl1 |= USDHC_CTRL_4BITBUS; } /* @@ -1768,11 +1768,11 @@ usdhc_write(void *opaque, hwaddr offset, uint64_t val, unsigned size) sdhci_write(opaque, offset, value, size); break; - case ESDHC_MIX_CTRL: + case USDHC_MIX_CTRL: /* * So, when SD/MMC stack in Linux tries to write to "Transfer * Mode Register", ESDHC i.MX quirk code will translate it - * into a write to ESDHC_MIX_CTRL, so we do the opposite in + * into a write to USDHC_MIX_CTRL, so we do the opposite in * order to get where we started * * Note that Auto CMD23 Enable bit is located in a wrong place From patchwork Thu Sep 15 15:25:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 12977580 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 70420C6FA8A for ; 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[77.191.182.143]) by smtp.gmail.com with ESMTPSA id 2-20020a170906210200b00730979f568fsm9297138ejt.150.2022.09.15.08.26.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Sep 2022 08:26:04 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Kevin Wolf , Hanna Reitz , qemu-block@nongnu.org, Bin Meng , qemu-ppc@nongnu.org, Bernhard Beschow Subject: [PATCH 10/11] hw/sd/sdhci: Implement Freescale eSDHC device model Date: Thu, 15 Sep 2022 17:25:19 +0200 Message-Id: <20220915152520.21948-11-shentey@gmail.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220915152520.21948-1-shentey@gmail.com> References: <20220915152520.21948-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::631; envelope-from=shentey@gmail.com; helo=mail-ej1-x631.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Will allow e500 boards to access SD cards using just their own devices. Signed-off-by: Bernhard Beschow --- hw/sd/sdhci.c | 147 +++++++++++++++++++++++++++++++++++++++++- include/hw/sd/sdhci.h | 3 + 2 files changed, 149 insertions(+), 1 deletion(-) diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 7a5996caad..09285ccfa1 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -1369,6 +1369,7 @@ void sdhci_initfn(SDHCIState *s) s->transfer_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, sdhci_data_transfer, s); s->io_ops = &sdhci_mmio_ops; + s->io_registers_map_size = SDHC_REGISTERS_MAP_SIZE; } void sdhci_uninitfn(SDHCIState *s) @@ -1392,7 +1393,7 @@ void sdhci_common_realize(SDHCIState *s, Error **errp) s->fifo_buffer = g_malloc0(s->buf_maxsz); memory_region_init_io(&s->iomem, OBJECT(s), s->io_ops, s, "sdhci", - SDHC_REGISTERS_MAP_SIZE); + s->io_registers_map_size); } void sdhci_common_unrealize(SDHCIState *s) @@ -1575,6 +1576,149 @@ static const TypeInfo sdhci_bus_info = { .class_init = sdhci_bus_class_init, }; +/* --- qdev Freescale eSDHC --- */ + +/* Host Controller Capabilities Register 2 */ +#define ESDHC_CAPABILITIES_1 0x114 + +/* Control Register for DMA transfer */ +#define ESDHC_DMA_SYSCTL 0x40c +#define ESDHC_PERIPHERAL_CLK_SEL 0x00080000 +#define ESDHC_FLUSH_ASYNC_FIFO 0x00040000 +#define ESDHC_DMA_SNOOP 0x00000040 + +#define ESDHC_REGISTERS_MAP_SIZE 0x410 + +static uint64_t esdhci_read(void *opaque, hwaddr offset, unsigned size) +{ + uint64_t ret; + + if (size != 4) { + qemu_log_mask(LOG_GUEST_ERROR, "ESDHC rd_%ub @0x%02" HWADDR_PRIx + " wrong size\n", size, offset); + return 0; + } + + if (offset & 0x3) { + qemu_log_mask(LOG_GUEST_ERROR, "ESDHC rd_%ub @0x%02" HWADDR_PRIx + " unaligned\n", size, offset); + return 0; + } + + switch (offset) { + case SDHC_SYSAD: + case SDHC_BLKSIZE: + case SDHC_ARGUMENT: + case SDHC_TRNMOD: + case SDHC_RSPREG0: + case SDHC_RSPREG1: + case SDHC_RSPREG2: + case SDHC_RSPREG3: + case SDHC_BDATA: + case SDHC_PRNSTS: + case SDHC_HOSTCTL: + case SDHC_CLKCON: + case SDHC_NORINTSTS: + case SDHC_NORINTSTSEN: + case SDHC_NORINTSIGEN: + case SDHC_ACMD12ERRSTS: + case SDHC_CAPAB: + case SDHC_SLOT_INT_STATUS: + ret = sdhci_read(opaque, offset, size); + break; + + case ESDHC_DMA_SYSCTL: + case 0x44: + ret = 0; + qemu_log_mask(LOG_UNIMP, "ESDHC rd_%ub @0x%02" HWADDR_PRIx + " not implemented\n", size, offset); + break; + + default: + ret = 0; + qemu_log_mask(LOG_GUEST_ERROR, "ESDHC rd_%ub @0x%02" HWADDR_PRIx + " unknown offset\n", size, offset); + break; + } + + return ret; +} + +static void esdhci_write(void *opaque, hwaddr offset, uint64_t val, + unsigned size) +{ + if (size != 4) { + qemu_log_mask(LOG_GUEST_ERROR, "ESDHC wr_%ub @0x%02" HWADDR_PRIx + " <- 0x%08lx wrong size\n", size, offset, val); + return; + } + + if (offset & 0x3) { + qemu_log_mask(LOG_GUEST_ERROR, "ESDHC wr_%ub @0x%02" HWADDR_PRIx + " <- 0x%08lx unaligned\n", size, offset, val); + return; + } + + switch (offset) { + case SDHC_SYSAD: + case SDHC_BLKSIZE: + case SDHC_ARGUMENT: + case SDHC_TRNMOD: + case SDHC_BDATA: + case SDHC_HOSTCTL: + case SDHC_CLKCON: + case SDHC_NORINTSTS: + case SDHC_NORINTSTSEN: + case SDHC_NORINTSIGEN: + case SDHC_FEAER: + sdhci_write(opaque, offset, val, size); + break; + + case ESDHC_DMA_SYSCTL: + case 0x44: + qemu_log_mask(LOG_UNIMP, "ESDHC wr_%ub @0x%02" HWADDR_PRIx " <- 0x%08lx " + "not implemented\n", size, offset, val); + break; + + default: + qemu_log_mask(LOG_GUEST_ERROR, "ESDHC wr_%ub @0x%02" HWADDR_PRIx + " <- 0x%08lx unknown offset\n", size, offset, val); + break; + } +} + +static const MemoryRegionOps esdhc_mmio_ops = { + .read = esdhci_read, + .write = esdhci_write, + .valid = { + .min_access_size = 1, + .max_access_size = 4, + .unaligned = false + }, + .endianness = DEVICE_BIG_ENDIAN, +}; + +static void esdhci_init(Object *obj) +{ + DeviceState *dev = DEVICE(obj); + SDHCIState *s = SYSBUS_SDHCI(obj); + + s->io_ops = &esdhc_mmio_ops; + s->io_registers_map_size = ESDHC_REGISTERS_MAP_SIZE; + + /* + * Compatible with: + * - SD Host Controller Specification Version 2.0 Part A2 + */ + qdev_prop_set_uint8(dev, "sd-spec-version", 2); +} + +static const TypeInfo esdhc_info = { + .name = TYPE_FSL_ESDHC, + .parent = TYPE_SYSBUS_SDHCI, + .instance_init = esdhci_init, +}; + /* --- qdev i.MX eSDHC --- */ #define USDHC_MIX_CTRL 0x48 @@ -1907,6 +2051,7 @@ static void sdhci_register_types(void) { type_register_static(&sdhci_sysbus_info); type_register_static(&sdhci_bus_info); + type_register_static(&esdhc_info); type_register_static(&imx_usdhc_info); type_register_static(&sdhci_s3c_info); } diff --git a/include/hw/sd/sdhci.h b/include/hw/sd/sdhci.h index 01a64c5442..5b32e83eee 100644 --- a/include/hw/sd/sdhci.h +++ b/include/hw/sd/sdhci.h @@ -45,6 +45,7 @@ struct SDHCIState { AddressSpace *dma_as; MemoryRegion *dma_mr; const MemoryRegionOps *io_ops; + uint64_t io_registers_map_size; QEMUTimer *insert_timer; /* timer for 'changing' sd card. */ QEMUTimer *transfer_timer; @@ -122,6 +123,8 @@ DECLARE_INSTANCE_CHECKER(SDHCIState, PCI_SDHCI, DECLARE_INSTANCE_CHECKER(SDHCIState, SYSBUS_SDHCI, TYPE_SYSBUS_SDHCI) +#define TYPE_FSL_ESDHC "fsl-esdhc" + #define TYPE_IMX_USDHC "imx-usdhc" #define TYPE_S3C_SDHCI "s3c-sdhci" From patchwork Thu Sep 15 15:25:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 12977581 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D1673ECAAA1 for ; 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[77.191.182.143]) by smtp.gmail.com with ESMTPSA id 2-20020a170906210200b00730979f568fsm9297138ejt.150.2022.09.15.08.26.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Sep 2022 08:26:06 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Kevin Wolf , Hanna Reitz , qemu-block@nongnu.org, Bin Meng , qemu-ppc@nongnu.org, Bernhard Beschow Subject: [PATCH 11/11] hw/ppc/e500: Add Freescale eSDHC to e500 boards Date: Thu, 15 Sep 2022 17:25:20 +0200 Message-Id: <20220915152520.21948-12-shentey@gmail.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220915152520.21948-1-shentey@gmail.com> References: <20220915152520.21948-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52d; envelope-from=shentey@gmail.com; helo=mail-ed1-x52d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Adds missing functionality to emulated e500 SOCs which increases the chance of given "real" firmware images to access SD cards. Signed-off-by: Bernhard Beschow --- docs/system/ppc/ppce500.rst | 13 +++++++++++++ hw/ppc/Kconfig | 1 + hw/ppc/e500.c | 32 ++++++++++++++++++++++++++++++++ 3 files changed, 46 insertions(+) diff --git a/docs/system/ppc/ppce500.rst b/docs/system/ppc/ppce500.rst index c3f55c6f3d..50b199c8f3 100644 --- a/docs/system/ppc/ppce500.rst +++ b/docs/system/ppc/ppce500.rst @@ -19,6 +19,7 @@ The ``ppce500`` machine supports the following devices: * Power-off functionality via one GPIO pin * 1 Freescale MPC8xxx PCI host controller * VirtIO devices via PCI bus +* 1 Freescale Enhanced Secure Digital Host controller (eSDHC) * 1 Freescale Enhanced Triple Speed Ethernet controller (eTSEC) Hardware configuration information @@ -131,6 +132,18 @@ be used as follows: -drive if=pflash,file=/path/to/rootfs.ext2,format=raw \ -append "rootwait root=/dev/mtdblock0" +Alternatively, the root file system can also reside on an emulated SD card +whose size must again be a power of two: + +.. code-block:: bash + + $ qemu-system-ppc64 -M ppce500 -cpu e500mc -smp 4 -m 2G \ + -display none -serial stdio \ + -kernel vmlinux \ + -device sd-card,drive=mydrive \ + -drive id=mydrive,if=none,file=/path/to/rootfs.ext2,format=raw \ + -append "rootwait root=/dev/mmcblk0" + Running U-Boot -------------- diff --git a/hw/ppc/Kconfig b/hw/ppc/Kconfig index 769a1ead1c..6e31f568ba 100644 --- a/hw/ppc/Kconfig +++ b/hw/ppc/Kconfig @@ -129,6 +129,7 @@ config E500 select PFLASH_CFI01 select PLATFORM_BUS select PPCE500_PCI + select SDHCI select SERIAL select MPC_I2C select FDT_PPC diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index 7843a4e04b..87a03fd4a9 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -48,6 +48,7 @@ #include "hw/net/fsl_etsec/etsec.h" #include "hw/i2c/i2c.h" #include "hw/irq.h" +#include "hw/sd/sdhci.h" #define EPAPR_MAGIC (0x45504150) #define DTC_LOAD_PAD 0x1800000 @@ -66,11 +67,14 @@ #define MPC8544_SERIAL1_REGS_OFFSET 0x4600ULL #define MPC8544_PCI_REGS_OFFSET 0x8000ULL #define MPC8544_PCI_REGS_SIZE 0x1000ULL +#define MPC85XX_ESDHC_REGS_OFFSET 0x2e000ULL +#define MPC85XX_ESDHC_REGS_SIZE 0x1000ULL #define MPC8544_UTIL_OFFSET 0xe0000ULL #define MPC8XXX_GPIO_OFFSET 0x000FF000ULL #define MPC8544_I2C_REGS_OFFSET 0x3000ULL #define MPC8XXX_GPIO_IRQ 47 #define MPC8544_I2C_IRQ 43 +#define MPC85XX_ESDHC_IRQ 72 #define RTC_REGS_OFFSET 0x68 #define PLATFORM_CLK_FREQ_HZ (400 * 1000 * 1000) @@ -203,6 +207,25 @@ static void dt_i2c_create(void *fdt, const char *soc, const char *mpic, g_free(i2c); } +static void dt_sdhc_create(void *fdt, const char *parent, const char *mpic) +{ + hwaddr mmio = MPC85XX_ESDHC_REGS_OFFSET; + hwaddr size = MPC85XX_ESDHC_REGS_SIZE; + int irq = MPC85XX_ESDHC_IRQ; + char *name; + + name = g_strdup_printf("%s/sdhc@%" PRIx64, parent, mmio); + qemu_fdt_add_subnode(fdt, name); + /* qemu_fdt_setprop_cells(fdt, name, "voltage-ranges", 3300, 3300); */ + qemu_fdt_setprop_cells(fdt, name, "clock-frequency", 167000000); + qemu_fdt_setprop(fdt, name, "sdhci,auto-cmd12", NULL, 0); + qemu_fdt_setprop_phandle(fdt, name, "interrupt-parent", mpic); + qemu_fdt_setprop_cells(fdt, name, "bus-width", 4); + qemu_fdt_setprop_cells(fdt, name, "interrupts", irq, 0x2); + qemu_fdt_setprop_cells(fdt, name, "reg", mmio, size); + qemu_fdt_setprop_string(fdt, name, "compatible", "fsl,esdhc"); + g_free(name); +} typedef struct PlatformDevtreeData { void *fdt; @@ -556,6 +579,8 @@ static int ppce500_load_device_tree(PPCE500MachineState *pms, dt_rtc_create(fdt, "i2c", "rtc"); + /* sdhc */ + dt_sdhc_create(fdt, soc, mpic); gutil = g_strdup_printf("%s/global-utilities@%llx", soc, MPC8544_UTIL_OFFSET); @@ -996,6 +1021,13 @@ void ppce500_init(MachineState *machine) i2c_slave_create_simple(i2c, "ds1338", RTC_REGS_OFFSET); + /* eSDHC */ + dev = qdev_new(TYPE_FSL_ESDHC); + s = SYS_BUS_DEVICE(dev); + sysbus_realize_and_unref(s, &error_fatal); + sysbus_mmio_map(s, 0, pmc->ccsrbar_base + MPC85XX_ESDHC_REGS_OFFSET); + sysbus_connect_irq(s, 0, qdev_get_gpio_in(mpicdev, MPC85XX_ESDHC_IRQ)); + /* General Utility device */ dev = qdev_new("mpc8544-guts"); s = SYS_BUS_DEVICE(dev);