From patchwork Fri Sep 16 20:00:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 12978828 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5C035C6FA86 for ; Fri, 16 Sep 2022 20:11:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230287AbiIPULq (ORCPT ); Fri, 16 Sep 2022 16:11:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42038 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230249AbiIPULp (ORCPT ); Fri, 16 Sep 2022 16:11:45 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E742DAC279; Fri, 16 Sep 2022 13:11:44 -0700 (PDT) Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 28GHj5Wo015663; Fri, 16 Sep 2022 20:11:40 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=MnCtvurojOKWqoJGxPx1Ps1jn61rPnLaggpC/sspea4=; b=XgNq1qILXfGtcG9oMD+wpHR0kB8JluDHzBffB4M0BDICE9jmmdQ5Z3i9Z7bdTktk5TPA 5wp8nYp9r8WO+TutaO0p3OLPrg4gO86rrtaLSajHh602Oopn1rXdk1iRlsu16GbRgJD5 n+PMMnYLj+3kTsi/tU9kTMyB8Jbnd2HR8WHYNNWXXDNurR6SvOjEhHcrKRiVMye2coZc K+NnHZ1tD6N0aGVcBshc9xidkEVf8zHd+LVKbbPALlirECDr1rhYsj8C6IBOjjPX1YNx BWkBjb91wLXn7n4kiWTuPA1YKGES12q0pzmcbBkR2bNSikOe+Gh2eOVebn7VMTXVwnfU 9Q== Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3jm93acv7y-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 16 Sep 2022 20:11:40 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 28GK0Z1Q017193 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 16 Sep 2022 20:00:35 GMT Received: from core-thresher1.qualcomm.com (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Fri, 16 Sep 2022 13:00:34 -0700 From: Bjorn Andersson To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov CC: Rob Herring , Krzysztof Kozlowski , Stephen Boyd , Kuogee Hsieh , Sankeerth Billakanti , , , , , Subject: [PATCH v2 1/7] dt-bindings: msm/dp: Add SDM845 and SC8280XP compatibles Date: Fri, 16 Sep 2022 13:00:22 -0700 Message-ID: <20220916200028.25009-2-quic_bjorande@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220916200028.25009-1-quic_bjorande@quicinc.com> References: <20220916200028.25009-1-quic_bjorande@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: CzHPQfmVCo2m1iDUWP9NWy9RIlp5LCv6 X-Proofpoint-ORIG-GUID: CzHPQfmVCo2m1iDUWP9NWy9RIlp5LCv6 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-16_12,2022-09-16_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 clxscore=1015 spamscore=0 priorityscore=1501 impostorscore=0 mlxscore=0 phishscore=0 mlxlogscore=829 bulkscore=0 lowpriorityscore=0 suspectscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2209130000 definitions=main-2209160144 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bjorn Andersson Add compatibles for the DisplayPort and Embedded DisplayPort blocks in Qualcomm SDM845 and SC8280XP platforms. Signed-off-by: Bjorn Andersson Signed-off-by: Bjorn Andersson Acked-by: Krzysztof Kozlowski \ --- .../devicetree/bindings/display/msm/dp-controller.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml index f2515af8256f..a1dc3a13e1cf 100644 --- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml +++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml @@ -21,6 +21,9 @@ properties: - qcom,sc7280-edp - qcom,sc8180x-dp - qcom,sc8180x-edp + - qcom,sc8280xp-dp + - qcom,sc8280xp-edp + - qcom,sdm845-dp - qcom,sm8350-dp reg: From patchwork Fri Sep 16 20:00:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 12978824 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B3336C6FA8B for ; Fri, 16 Sep 2022 20:00:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229771AbiIPUAs (ORCPT ); Fri, 16 Sep 2022 16:00:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55744 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229515AbiIPUAn (ORCPT ); Fri, 16 Sep 2022 16:00:43 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CB0B379634; Fri, 16 Sep 2022 13:00:41 -0700 (PDT) Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 28GJm8qS013452; Fri, 16 Sep 2022 20:00:36 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=hWZ9jntpaOvM7/1sCNwN3AuAcy5qp9/mh/BRgZjz1Io=; b=lEqdZE8AP1Zmqp4B3M6Q6ptJUR+TceqS/2bW4jBKSNjm2niLiKebYpURVzSX+Z9lu6eq 5mZ5c+3/+CdEmox9s3FlKZlO3FSz9DvjtHnJsJSGif4JeLgaq0bt/QrsVaugezTkDfvy qjIKv1SYbvzHE14zyaKA7N1taQIunpzwZsck1vtaMxtisYq9mLbpLDcKZ7L5ClDBo4PP X9+PoKkTZz+fnvRHcBAFMKzdJQ0gvAT5zoAKw2rw+++aVdtY9lsO13TZPgPZq6ZSK0WK UkHyS0/P9ZU/gW3cRB1bTmMs7gfZDXFGxRRo8eBm4kHnUUn5WnG9dGhO1dIyJm8LSHMM VA== Received: from nalasppmta04.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3jmymc82d2-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 16 Sep 2022 20:00:36 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 28GK0ZB5029461 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 16 Sep 2022 20:00:35 GMT Received: from core-thresher1.qualcomm.com (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Fri, 16 Sep 2022 13:00:35 -0700 From: Bjorn Andersson To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov CC: Rob Herring , Krzysztof Kozlowski , Stephen Boyd , Kuogee Hsieh , Sankeerth Billakanti , , , , , Subject: [PATCH v2 2/7] drm/msm/dp: Stop using DP id as index in desc Date: Fri, 16 Sep 2022 13:00:23 -0700 Message-ID: <20220916200028.25009-3-quic_bjorande@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220916200028.25009-1-quic_bjorande@quicinc.com> References: <20220916200028.25009-1-quic_bjorande@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: is4-wwUPFWlYgfuwTsRatFBzTiYCxZ7w X-Proofpoint-ORIG-GUID: is4-wwUPFWlYgfuwTsRatFBzTiYCxZ7w X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-16_12,2022-09-16_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 malwarescore=0 spamscore=0 impostorscore=0 mlxscore=0 adultscore=0 mlxlogscore=999 clxscore=1011 bulkscore=0 lowpriorityscore=0 phishscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2209130000 definitions=main-2209160144 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bjorn Andersson In the SC8280XP platform there are two identical MDSS instances, each with the same set of DisplayPort instances, at different addresses. By not relying on the index to define the instance id it's possible to describe them both in the same table and hence have a single compatible. While at it, flatten the cfg/desc structure so that the match data is just an array of descs. Signed-off-by: Bjorn Andersson Signed-off-by: Bjorn Andersson --- drivers/gpu/drm/msm/dp/dp_display.c | 72 ++++++++++------------------- 1 file changed, 25 insertions(+), 47 deletions(-) diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c index bfd0aeff3f0d..2d9bbc335786 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.c +++ b/drivers/gpu/drm/msm/dp/dp_display.c @@ -122,61 +122,41 @@ struct dp_display_private { struct msm_dp_desc { phys_addr_t io_start; + unsigned int id; unsigned int connector_type; bool wide_bus_en; }; -struct msm_dp_config { - const struct msm_dp_desc *descs; - size_t num_descs; -}; - static const struct msm_dp_desc sc7180_dp_descs[] = { - [MSM_DP_CONTROLLER_0] = { .io_start = 0x0ae90000, .connector_type = DRM_MODE_CONNECTOR_DisplayPort }, -}; - -static const struct msm_dp_config sc7180_dp_cfg = { - .descs = sc7180_dp_descs, - .num_descs = ARRAY_SIZE(sc7180_dp_descs), + { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .connector_type = DRM_MODE_CONNECTOR_DisplayPort }, + {} }; static const struct msm_dp_desc sc7280_dp_descs[] = { - [MSM_DP_CONTROLLER_0] = { .io_start = 0x0ae90000, .connector_type = DRM_MODE_CONNECTOR_DisplayPort, .wide_bus_en = true }, - [MSM_DP_CONTROLLER_1] = { .io_start = 0x0aea0000, .connector_type = DRM_MODE_CONNECTOR_eDP, .wide_bus_en = true }, -}; - -static const struct msm_dp_config sc7280_dp_cfg = { - .descs = sc7280_dp_descs, - .num_descs = ARRAY_SIZE(sc7280_dp_descs), + { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .connector_type = DRM_MODE_CONNECTOR_DisplayPort, .wide_bus_en = true }, + { .io_start = 0x0aea0000, .id = MSM_DP_CONTROLLER_1, .connector_type = DRM_MODE_CONNECTOR_eDP, .wide_bus_en = true }, + {} }; static const struct msm_dp_desc sc8180x_dp_descs[] = { - [MSM_DP_CONTROLLER_0] = { .io_start = 0x0ae90000, .connector_type = DRM_MODE_CONNECTOR_DisplayPort }, - [MSM_DP_CONTROLLER_1] = { .io_start = 0x0ae98000, .connector_type = DRM_MODE_CONNECTOR_DisplayPort }, - [MSM_DP_CONTROLLER_2] = { .io_start = 0x0ae9a000, .connector_type = DRM_MODE_CONNECTOR_eDP }, -}; - -static const struct msm_dp_config sc8180x_dp_cfg = { - .descs = sc8180x_dp_descs, - .num_descs = ARRAY_SIZE(sc8180x_dp_descs), + { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .connector_type = DRM_MODE_CONNECTOR_DisplayPort }, + { .io_start = 0x0ae98000, .id = MSM_DP_CONTROLLER_1, .connector_type = DRM_MODE_CONNECTOR_DisplayPort }, + { .io_start = 0x0ae9a000, .id = MSM_DP_CONTROLLER_2, .connector_type = DRM_MODE_CONNECTOR_eDP }, + {} }; static const struct msm_dp_desc sm8350_dp_descs[] = { - [MSM_DP_CONTROLLER_0] = { .io_start = 0x0ae90000, .connector_type = DRM_MODE_CONNECTOR_DisplayPort }, -}; - -static const struct msm_dp_config sm8350_dp_cfg = { - .descs = sm8350_dp_descs, - .num_descs = ARRAY_SIZE(sm8350_dp_descs), + { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .connector_type = DRM_MODE_CONNECTOR_DisplayPort }, + {} }; static const struct of_device_id dp_dt_match[] = { - { .compatible = "qcom,sc7180-dp", .data = &sc7180_dp_cfg }, - { .compatible = "qcom,sc7280-dp", .data = &sc7280_dp_cfg }, - { .compatible = "qcom,sc7280-edp", .data = &sc7280_dp_cfg }, - { .compatible = "qcom,sc8180x-dp", .data = &sc8180x_dp_cfg }, - { .compatible = "qcom,sc8180x-edp", .data = &sc8180x_dp_cfg }, - { .compatible = "qcom,sm8350-dp", .data = &sm8350_dp_cfg }, + { .compatible = "qcom,sc7180-dp", .data = &sc7180_dp_descs }, + { .compatible = "qcom,sc7280-dp", .data = &sc7280_dp_descs }, + { .compatible = "qcom,sc7280-edp", .data = &sc7280_dp_descs }, + { .compatible = "qcom,sc8180x-dp", .data = &sc8180x_dp_descs }, + { .compatible = "qcom,sc8180x-edp", .data = &sc8180x_dp_descs }, + { .compatible = "qcom,sm8350-dp", .data = &sm8350_dp_descs }, {} }; @@ -1262,10 +1242,9 @@ int dp_display_request_irq(struct msm_dp *dp_display) return 0; } -static const struct msm_dp_desc *dp_display_get_desc(struct platform_device *pdev, - unsigned int *id) +static const struct msm_dp_desc *dp_display_get_desc(struct platform_device *pdev) { - const struct msm_dp_config *cfg = of_device_get_match_data(&pdev->dev); + const struct msm_dp_desc *descs = of_device_get_match_data(&pdev->dev); struct resource *res; int i; @@ -1273,11 +1252,9 @@ static const struct msm_dp_desc *dp_display_get_desc(struct platform_device *pde if (!res) return NULL; - for (i = 0; i < cfg->num_descs; i++) { - if (cfg->descs[i].io_start == res->start) { - *id = i; - return &cfg->descs[i]; - } + for (i = 0; i < descs[i].io_start; i++) { + if (descs[i].io_start == res->start) + return &descs[i]; } dev_err(&pdev->dev, "unknown displayport instance\n"); @@ -1299,12 +1276,13 @@ static int dp_display_probe(struct platform_device *pdev) if (!dp) return -ENOMEM; - desc = dp_display_get_desc(pdev, &dp->id); + desc = dp_display_get_desc(pdev); if (!desc) return -EINVAL; dp->pdev = pdev; dp->name = "drm_dp"; + dp->id = desc->id; dp->dp_display.connector_type = desc->connector_type; dp->wide_bus_en = desc->wide_bus_en; dp->dp_display.is_edp = From patchwork Fri Sep 16 20:00:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 12978823 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7997CECAAA1 for ; Fri, 16 Sep 2022 20:00:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229532AbiIPUAq (ORCPT ); Fri, 16 Sep 2022 16:00:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55742 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229533AbiIPUAn (ORCPT ); Fri, 16 Sep 2022 16:00:43 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A150278BDB; Fri, 16 Sep 2022 13:00:41 -0700 (PDT) Received: from pps.filterd (m0279867.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 28GG31LA019646; Fri, 16 Sep 2022 20:00:36 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=wNneWqw5kmYTG2v9xUzi08KnewBa7WdbGJzuS3QbdQs=; b=fcKRbenz6dNfJsJUIxm1U4iV24PIUujul/5zlSAZlur/19aV4UpQc2p5Vvz6Pof5d1YF WsxKIuBQz5mHBCA2x5prHHSSIxmQTuttJEE8C7ktFpIK//aK/FPIGFd4SJ3NlPJOJJUA vdwwehz4pYhf8Tr0anNrGsouYyJyRNH0ryI5rEorCqbkJcZvpk/nprB5A1IVVjQwfpJ1 wV+uNYf93t6VdRm8n6xqTmah6EwvJLhSWjWVbAu/KWUdIs4zsNRSwpxjH7+5Ze4BbUJR 83jauooyiMe74Mbm3+I4etFUDf+333tMSQGWUNjNwKRehqr2Zd4GvXemFw6Xy8dOM5cI 5g== Received: from nalasppmta04.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3jm9qcvmtp-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 16 Sep 2022 20:00:36 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 28GK0aSe029464 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 16 Sep 2022 20:00:36 GMT Received: from core-thresher1.qualcomm.com (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Fri, 16 Sep 2022 13:00:35 -0700 From: Bjorn Andersson To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov CC: Rob Herring , Krzysztof Kozlowski , Stephen Boyd , Kuogee Hsieh , Sankeerth Billakanti , , , , , Subject: [PATCH v2 3/7] drm/msm/dp: Add DP and EDP compatibles for SC8280XP Date: Fri, 16 Sep 2022 13:00:24 -0700 Message-ID: <20220916200028.25009-4-quic_bjorande@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220916200028.25009-1-quic_bjorande@quicinc.com> References: <20220916200028.25009-1-quic_bjorande@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: q7KfY2EVURQLfTCctTEwGo9YLTEYnzbz X-Proofpoint-ORIG-GUID: q7KfY2EVURQLfTCctTEwGo9YLTEYnzbz X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-16_12,2022-09-16_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 suspectscore=0 priorityscore=1501 adultscore=0 impostorscore=0 mlxscore=0 mlxlogscore=999 spamscore=0 phishscore=0 lowpriorityscore=0 clxscore=1015 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2209130000 definitions=main-2209160144 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bjorn Andersson The SC8280XP platform has four DisplayPort controllers, per MDSS instance, all with widebus support. The first two are defined to be DisplayPort only, while the latter pair (of each instance) can be either DisplayPort or Embedded DisplayPort. The two sets are tied to the possible compatibels. Signed-off-by: Bjorn Andersson Reviewed-by: Dmitry Baryshkov Signed-off-by: Bjorn Andersson --- drivers/gpu/drm/msm/dp/dp_display.c | 22 ++++++++++++++++++++++ drivers/gpu/drm/msm/msm_drv.h | 1 + 2 files changed, 23 insertions(+) diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c index 2d9bbc335786..e4a83c2cd972 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.c +++ b/drivers/gpu/drm/msm/dp/dp_display.c @@ -145,6 +145,26 @@ static const struct msm_dp_desc sc8180x_dp_descs[] = { {} }; +static const struct msm_dp_desc sc8280xp_dp_descs[] = { + { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .connector_type = DRM_MODE_CONNECTOR_DisplayPort, .wide_bus_en = true }, + { .io_start = 0x0ae98000, .id = MSM_DP_CONTROLLER_1, .connector_type = DRM_MODE_CONNECTOR_DisplayPort, .wide_bus_en = true }, + { .io_start = 0x0ae9a000, .id = MSM_DP_CONTROLLER_2, .connector_type = DRM_MODE_CONNECTOR_DisplayPort, .wide_bus_en = true }, + { .io_start = 0x0aea0000, .id = MSM_DP_CONTROLLER_3, .connector_type = DRM_MODE_CONNECTOR_DisplayPort, .wide_bus_en = true }, + { .io_start = 0x22090000, .id = MSM_DP_CONTROLLER_0, .connector_type = DRM_MODE_CONNECTOR_DisplayPort, .wide_bus_en = true }, + { .io_start = 0x22098000, .id = MSM_DP_CONTROLLER_1, .connector_type = DRM_MODE_CONNECTOR_DisplayPort, .wide_bus_en = true }, + { .io_start = 0x2209a000, .id = MSM_DP_CONTROLLER_2, .connector_type = DRM_MODE_CONNECTOR_DisplayPort, .wide_bus_en = true }, + { .io_start = 0x220a0000, .id = MSM_DP_CONTROLLER_3, .connector_type = DRM_MODE_CONNECTOR_DisplayPort, .wide_bus_en = true }, + {} +}; + +static const struct msm_dp_desc sc8280xp_edp_descs[] = { + { .io_start = 0x0ae9a000, .id = MSM_DP_CONTROLLER_2, .connector_type = DRM_MODE_CONNECTOR_eDP, .wide_bus_en = true }, + { .io_start = 0x0aea0000, .id = MSM_DP_CONTROLLER_3, .connector_type = DRM_MODE_CONNECTOR_eDP, .wide_bus_en = true }, + { .io_start = 0x2209a000, .id = MSM_DP_CONTROLLER_2, .connector_type = DRM_MODE_CONNECTOR_eDP, .wide_bus_en = true }, + { .io_start = 0x220a0000, .id = MSM_DP_CONTROLLER_3, .connector_type = DRM_MODE_CONNECTOR_eDP, .wide_bus_en = true }, + {} +}; + static const struct msm_dp_desc sm8350_dp_descs[] = { { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .connector_type = DRM_MODE_CONNECTOR_DisplayPort }, {} @@ -156,6 +176,8 @@ static const struct of_device_id dp_dt_match[] = { { .compatible = "qcom,sc7280-edp", .data = &sc7280_dp_descs }, { .compatible = "qcom,sc8180x-dp", .data = &sc8180x_dp_descs }, { .compatible = "qcom,sc8180x-edp", .data = &sc8180x_dp_descs }, + { .compatible = "qcom,sc8280xp-dp", .data = &sc8280xp_dp_descs }, + { .compatible = "qcom,sc8280xp-edp", .data = &sc8280xp_edp_descs }, { .compatible = "qcom,sm8350-dp", .data = &sm8350_dp_descs }, {} }; diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h index b2ea262296a4..2dd342e49de6 100644 --- a/drivers/gpu/drm/msm/msm_drv.h +++ b/drivers/gpu/drm/msm/msm_drv.h @@ -61,6 +61,7 @@ enum msm_dp_controller { MSM_DP_CONTROLLER_0, MSM_DP_CONTROLLER_1, MSM_DP_CONTROLLER_2, + MSM_DP_CONTROLLER_3, MSM_DP_CONTROLLER_COUNT, }; From patchwork Fri Sep 16 20:00:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 12978825 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6DF2EECAAA1 for ; Fri, 16 Sep 2022 20:06:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229997AbiIPUGI (ORCPT ); Fri, 16 Sep 2022 16:06:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34216 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229515AbiIPUGG (ORCPT ); Fri, 16 Sep 2022 16:06:06 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E8E2A8A7CF; Fri, 16 Sep 2022 13:06:05 -0700 (PDT) Received: from pps.filterd (m0279867.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 28GG41EI024057; Fri, 16 Sep 2022 20:05:38 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=XXD8n3D9fgxgqc8QaXvD8PSgSjLxdQPUp3aflF7BnGM=; b=IqyXoX6hHpPETIu564JtiSRBtzX2+xeYOZdJdpivd8zn7F87b04/O274AYyDBDYlymgm 2XGi8BzsA2Al+w0EClw6ENcokTl1u4Mw0Zk1wz5Ly0oPWglgdumEWGAIhh99tPAzcDCe VAuqpc+f/TJ6Ban5dyLJQghxYLscq5KEW6y2hMu3OqBDgj8k7vNxi9YFDzUM2ab+4NCk 3WldOy/n6QrTlS/0bdBVqW7ZwXTvRl1Gm8Ra54FVhl6LZmEdEFXQqXJytR2IBKTcw7yi smp5Mnj1RIeGCdywqEU8Q4UfQYG7IKx5lrBKSMwNuVSqDQjP4H4B//morfAwGilA74y2 sg== Received: from nalasppmta02.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3jm9qcvp5m-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 16 Sep 2022 20:05:37 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 28GK0aRa018955 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 16 Sep 2022 20:00:36 GMT Received: from core-thresher1.qualcomm.com (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Fri, 16 Sep 2022 13:00:36 -0700 From: Bjorn Andersson To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov CC: Rob Herring , Krzysztof Kozlowski , Stephen Boyd , Kuogee Hsieh , Sankeerth Billakanti , , , , , Subject: [PATCH v2 4/7] drm/msm/dp: Add SDM845 DisplayPort instance Date: Fri, 16 Sep 2022 13:00:25 -0700 Message-ID: <20220916200028.25009-5-quic_bjorande@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220916200028.25009-1-quic_bjorande@quicinc.com> References: <20220916200028.25009-1-quic_bjorande@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: lBNw-P4ZwNAN_KITbET50G5P1R-3Jrur X-Proofpoint-ORIG-GUID: lBNw-P4ZwNAN_KITbET50G5P1R-3Jrur X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-16_12,2022-09-16_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 suspectscore=0 priorityscore=1501 adultscore=0 impostorscore=0 mlxscore=0 mlxlogscore=999 spamscore=0 phishscore=0 lowpriorityscore=0 clxscore=1015 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2209130000 definitions=main-2209160144 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bjorn Andersson The Qualcomm SDM845 platform has a single DisplayPort controller, with the same design as SC7180, so add support for this by reusing the SC7180 definition. Signed-off-by: Bjorn Andersson Reviewed-by: Dmitry Baryshkov Signed-off-by: Bjorn Andersson --- drivers/gpu/drm/msm/dp/dp_display.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c index e4a83c2cd972..699f28f2251e 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.c +++ b/drivers/gpu/drm/msm/dp/dp_display.c @@ -178,6 +178,7 @@ static const struct of_device_id dp_dt_match[] = { { .compatible = "qcom,sc8180x-edp", .data = &sc8180x_dp_descs }, { .compatible = "qcom,sc8280xp-dp", .data = &sc8280xp_dp_descs }, { .compatible = "qcom,sc8280xp-edp", .data = &sc8280xp_edp_descs }, + { .compatible = "qcom,sdm845-dp", .data = &sc7180_dp_descs }, { .compatible = "qcom,sm8350-dp", .data = &sm8350_dp_descs }, {} }; From patchwork Fri Sep 16 20:00:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 12978827 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6614DECAAD8 for ; Fri, 16 Sep 2022 20:11:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230082AbiIPULW (ORCPT ); Fri, 16 Sep 2022 16:11:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41632 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229794AbiIPULU (ORCPT ); Fri, 16 Sep 2022 16:11:20 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 12CDA2BFE; Fri, 16 Sep 2022 13:11:20 -0700 (PDT) Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 28GG3dTd002186; Fri, 16 Sep 2022 20:11:15 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=Sn9BnKHGg3BDZ9Mr+NMcSywdQxJIRp9frbHS+w0FENA=; b=JU+qxLImG4g/TTVDnGHpjDCoU/MNthoin1GdZp47YvvNolH/um6sYTD4sD19FUiQz81P S+bwkd7Tn1BrvAdeX8SUdJ5A66CHc9Bq0HudjPxkfIUTzuY5b31pzEhmNg7TMx85jnc2 ZyqIW7ngPhDTAZBTY2UICH9ltZbdostCTq/+Gp85fMu1JoTYoyptwIZv0stommcAU11O /0A80tvSSt2U1uOswGI05RvNt8Gtp4m4sn3mSdqSkkQEaicFC7OztDP1e5lwBamaDWT4 7NfzGDh5gJynxUHwgsjCApJRkicsNHFlcUwCxB086SinFo1uFIVYT1D5+SpCT7dzNa4v 9g== Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3jm93acv6y-3 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 16 Sep 2022 20:11:15 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 28GK0bSw013962 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 16 Sep 2022 20:00:37 GMT Received: from core-thresher1.qualcomm.com (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Fri, 16 Sep 2022 13:00:36 -0700 From: Bjorn Andersson To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov CC: Rob Herring , Krzysztof Kozlowski , Stephen Boyd , Kuogee Hsieh , Sankeerth Billakanti , , , , , Subject: [PATCH v2 5/7] drm/msm/dp: Implement hpd_notify() Date: Fri, 16 Sep 2022 13:00:26 -0700 Message-ID: <20220916200028.25009-6-quic_bjorande@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220916200028.25009-1-quic_bjorande@quicinc.com> References: <20220916200028.25009-1-quic_bjorande@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: nmC6opvOtpM0b8Cr0LhW4zVydhRKyqYV X-Proofpoint-ORIG-GUID: nmC6opvOtpM0b8Cr0LhW4zVydhRKyqYV X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-16_12,2022-09-16_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 clxscore=1015 spamscore=0 priorityscore=1501 impostorscore=0 mlxscore=0 phishscore=0 mlxlogscore=924 bulkscore=0 lowpriorityscore=0 suspectscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2209130000 definitions=main-2209160144 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bjorn Andersson The DisplayPort controller's hot-plug mechanism is based on pinmuxing a physical signal no a GPIO pin into the controller. This is not always possible, either because there aren't dedicated GPIOs available or because the hot-plug signal is a virtual notification, in cases such as USB Type-C. For these cases, by implementing the hpd_notify() callback for the DisplayPort controller's drm_bridge, a downstream drm_bridge (next_bridge) can be used to track and signal the connection status changes. This makes it possible to use downstream drm_bridges such as display-connector or any virtual mechanism, as long as they are implemented as a drm_bridge. Signed-off-by: Bjorn Andersson [bjorn: Drop connector->fwnode assignment and dev from struct msm_dp] Signed-off-by: Bjorn Andersson --- drivers/gpu/drm/msm/dp/dp_display.c | 22 ++++++++++++++++++++++ drivers/gpu/drm/msm/dp/dp_drm.c | 1 + drivers/gpu/drm/msm/dp/dp_drm.h | 2 ++ 3 files changed, 25 insertions(+) diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c index 699f28f2251e..a4563a0753b0 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.c +++ b/drivers/gpu/drm/msm/dp/dp_display.c @@ -1765,3 +1765,25 @@ void dp_bridge_mode_set(struct drm_bridge *drm_bridge, dp_display->dp_mode.h_active_low = !!(dp_display->dp_mode.drm_mode.flags & DRM_MODE_FLAG_NHSYNC); } + +void dp_bridge_hpd_notify(struct drm_bridge *bridge, + enum drm_connector_status status) +{ + struct msm_dp_bridge *dp_bridge = to_dp_bridge(bridge); + struct msm_dp *dp_display = dp_bridge->dp_display; + struct dp_display_private *dp = container_of(dp_display, struct dp_display_private, dp_display); + + /* Without next_bridge interrupts are handled by the DP core directly */ + if (!dp_display->next_bridge) + return; + + if (!dp->core_initialized) { + drm_dbg_dp(dp->drm_dev, "not initialized\n"); + return; + } + + if (!dp_display->is_connected && status == connector_status_connected) + dp_add_event(dp, EV_HPD_PLUG_INT, 0, 0); + else if (dp_display->is_connected && status == connector_status_disconnected) + dp_add_event(dp, EV_HPD_UNPLUG_INT, 0, 0); +} diff --git a/drivers/gpu/drm/msm/dp/dp_drm.c b/drivers/gpu/drm/msm/dp/dp_drm.c index 6df25f7662e7..1a02ec029fdd 100644 --- a/drivers/gpu/drm/msm/dp/dp_drm.c +++ b/drivers/gpu/drm/msm/dp/dp_drm.c @@ -68,6 +68,7 @@ static const struct drm_bridge_funcs dp_bridge_ops = { .mode_valid = dp_bridge_mode_valid, .get_modes = dp_bridge_get_modes, .detect = dp_bridge_detect, + .hpd_notify = dp_bridge_hpd_notify, }; struct drm_bridge *dp_bridge_init(struct msm_dp *dp_display, struct drm_device *dev, diff --git a/drivers/gpu/drm/msm/dp/dp_drm.h b/drivers/gpu/drm/msm/dp/dp_drm.h index 82035dbb0578..79e6b2cf2d25 100644 --- a/drivers/gpu/drm/msm/dp/dp_drm.h +++ b/drivers/gpu/drm/msm/dp/dp_drm.h @@ -32,5 +32,7 @@ enum drm_mode_status dp_bridge_mode_valid(struct drm_bridge *bridge, void dp_bridge_mode_set(struct drm_bridge *drm_bridge, const struct drm_display_mode *mode, const struct drm_display_mode *adjusted_mode); +void dp_bridge_hpd_notify(struct drm_bridge *bridge, + enum drm_connector_status status); #endif /* _DP_DRM_H_ */ From patchwork Fri Sep 16 20:00:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 12978826 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E2A89C6FA8B for ; Fri, 16 Sep 2022 20:06:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230033AbiIPUGI (ORCPT ); Fri, 16 Sep 2022 16:06:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34244 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229838AbiIPUGH (ORCPT ); Fri, 16 Sep 2022 16:06:07 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6B5DF8E9A5; Fri, 16 Sep 2022 13:06:06 -0700 (PDT) Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 28GG3df9002133; Fri, 16 Sep 2022 20:05:39 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=C8IvKu/twCfW31WbmCdPlT6GhReOR2rwN4RWNrYeKeA=; b=k8PAt6S2h65hjc7RiKPTDTv6ANLmpdQNOicSP6sRb6SZntVEe1c3vXXxDPuDM2CfKax2 WLVWldfwew5obL1pK4ae/t8q6CFXcrLBq9oaMRkDUpruMwwjL8IRgICQt5TQem16Anfs LDQAa/lw4DSHQnicX2LzxORlja9VcwPpyXOl4XvV1XPaWYbZYfRrIczWYgTN94Lo9iw2 1W0OTibTdkliFs7tyWu3g2mO168t19w6kJfbsRpitjZ+eWGF7saqUpo2ACArR/XLdp0s b9kRctwBSA2t++RR54k6ELHqvuCFjfg0PmtNS9Xr/VPimKupiBcFsz58u6KJVuaNf0WK Fg== Received: from nalasppmta05.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3jm93acu7y-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 16 Sep 2022 20:05:38 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 28GK0bUc031495 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 16 Sep 2022 20:00:37 GMT Received: from core-thresher1.qualcomm.com (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Fri, 16 Sep 2022 13:00:37 -0700 From: Bjorn Andersson To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov CC: Rob Herring , Krzysztof Kozlowski , Stephen Boyd , Kuogee Hsieh , Sankeerth Billakanti , , , , , Subject: [PATCH v2 6/7] drm/msm/dp: Don't enable HPD interrupts for edp Date: Fri, 16 Sep 2022 13:00:27 -0700 Message-ID: <20220916200028.25009-7-quic_bjorande@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220916200028.25009-1-quic_bjorande@quicinc.com> References: <20220916200028.25009-1-quic_bjorande@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 9JiHGTZE75r_qhRBfINJErED3JnpeWQX X-Proofpoint-ORIG-GUID: 9JiHGTZE75r_qhRBfINJErED3JnpeWQX X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-16_12,2022-09-16_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 clxscore=1015 spamscore=0 priorityscore=1501 impostorscore=0 mlxscore=0 phishscore=0 mlxlogscore=873 bulkscore=0 lowpriorityscore=0 suspectscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2209130000 definitions=main-2209160144 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bjorn Andersson Most instances where HPD interrupts are masked and unmasked are guareded by the presence of an EDP panel being connected, but not all. Extend this to cover the last few places, as HPD interrupt handling is not used for the EDP case. Signed-off-by: Bjorn Andersson Reviewed-by: Dmitry Baryshkov Signed-off-by: Bjorn Andersson --- drivers/gpu/drm/msm/dp/dp_display.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c index a4563a0753b0..3d365950de0f 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.c +++ b/drivers/gpu/drm/msm/dp/dp_display.c @@ -610,8 +610,10 @@ static int dp_hpd_plug_handle(struct dp_display_private *dp, u32 data) } /* enable HDP irq_hpd/replug interrupt */ - dp_catalog_hpd_config_intr(dp->catalog, - DP_DP_IRQ_HPD_INT_MASK | DP_DP_HPD_REPLUG_INT_MASK, true); + if (!dp->dp_display.is_edp) + dp_catalog_hpd_config_intr(dp->catalog, + DP_DP_IRQ_HPD_INT_MASK | DP_DP_HPD_REPLUG_INT_MASK, + true); drm_dbg_dp(dp->drm_dev, "After, type=%d hpd_state=%d\n", dp->dp_display.connector_type, state); @@ -651,8 +653,10 @@ static int dp_hpd_unplug_handle(struct dp_display_private *dp, u32 data) dp->dp_display.connector_type, state); /* disable irq_hpd/replug interrupts */ - dp_catalog_hpd_config_intr(dp->catalog, - DP_DP_IRQ_HPD_INT_MASK | DP_DP_HPD_REPLUG_INT_MASK, false); + if (!dp->dp_display.is_edp) + dp_catalog_hpd_config_intr(dp->catalog, + DP_DP_IRQ_HPD_INT_MASK | DP_DP_HPD_REPLUG_INT_MASK, + false); /* unplugged, no more irq_hpd handle */ dp_del_event(dp, EV_IRQ_HPD_INT); @@ -678,7 +682,8 @@ static int dp_hpd_unplug_handle(struct dp_display_private *dp, u32 data) } /* disable HPD plug interrupts */ - dp_catalog_hpd_config_intr(dp->catalog, DP_DP_HPD_PLUG_INT_MASK, false); + if (!dp->dp_display.is_edp) + dp_catalog_hpd_config_intr(dp->catalog, DP_DP_HPD_PLUG_INT_MASK, false); /* * We don't need separate work for disconnect as From patchwork Fri Sep 16 20:00:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 12978830 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 209CBECAAA1 for ; Fri, 16 Sep 2022 20:12:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229484AbiIPUMC (ORCPT ); Fri, 16 Sep 2022 16:12:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42062 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230303AbiIPULq (ORCPT ); Fri, 16 Sep 2022 16:11:46 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 98822ABD5D; Fri, 16 Sep 2022 13:11:45 -0700 (PDT) Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 28GG33s1008348; Fri, 16 Sep 2022 20:11:41 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=yEhxiL9xhufW1uFcqHvps7gpZ1SYtCuD6yFj9S/r3ck=; b=Ne72rEBbl+2+hEQMZoA8UtNfjQ3Y8KKOxNfuq12nnhNNA5EDj+AENYa4WflrAyvxcU8q 4+cUEJVlWBwGDv6Pwbg3W5yMCbPXQpl32cX3WoFwFK6O+a3LavOdGP6eYtLdriyfcdde kkuAvJYpnrXnQhzQ61Iq445b8htfMFUbnTHDdk/97b+HHWoFBQMQvY41TTDoM6SBHKu8 iSd28WhduiycVEyCqL+l+n7KRteC78k3rspuajI2mF8ywi8JRCxCJX+FwCTGvoBg5hwT 5rsuwYpX4ZcmJN/K8pvsoGeC4DCt7fgg1RPHb77j7w4HPBlSkUIrH9SLl4gb8ts6HvzB gQ== Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3jm8xmvyk8-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 16 Sep 2022 20:11:41 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 28GK0cOY017207 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 16 Sep 2022 20:00:38 GMT Received: from core-thresher1.qualcomm.com (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Fri, 16 Sep 2022 13:00:37 -0700 From: Bjorn Andersson To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov CC: Rob Herring , Krzysztof Kozlowski , Stephen Boyd , Kuogee Hsieh , Sankeerth Billakanti , , , , , Subject: [PATCH v2 7/7] drm/msm/dp: HPD handling relates to next_bridge Date: Fri, 16 Sep 2022 13:00:28 -0700 Message-ID: <20220916200028.25009-8-quic_bjorande@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220916200028.25009-1-quic_bjorande@quicinc.com> References: <20220916200028.25009-1-quic_bjorande@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: x9t_qC-s89WkV3QAgqbpLJU3F8bghkJg X-Proofpoint-ORIG-GUID: x9t_qC-s89WkV3QAgqbpLJU3F8bghkJg X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-16_12,2022-09-16_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 bulkscore=0 suspectscore=0 phishscore=0 malwarescore=0 lowpriorityscore=0 mlxlogscore=999 priorityscore=1501 clxscore=1015 impostorscore=0 spamscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2209130000 definitions=main-2209160144 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bjorn Andersson The DisplayPort controller's internal HPD interrupt handling is used for cases where the HPD signal is connected to a GPIO which is pinmuxed into the DisplayPort controller. Most of the logic for enabling and disabling the HPD-related interrupts is conditioned on the presence of an EDP panel, but more generically designs that has a downstream drm_bridge (next_bridge) could use this to handle the HPD interrupts, instead of the internal mechanism. So replace the current is_edp-based guards with a check for the presence of next_bridge. Signed-off-by: Bjorn Andersson Signed-off-by: Bjorn Andersson --- drivers/gpu/drm/msm/dp/dp_display.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c index 3d365950de0f..224ae3aa07c4 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.c +++ b/drivers/gpu/drm/msm/dp/dp_display.c @@ -610,7 +610,7 @@ static int dp_hpd_plug_handle(struct dp_display_private *dp, u32 data) } /* enable HDP irq_hpd/replug interrupt */ - if (!dp->dp_display.is_edp) + if (!dp->dp_display.next_bridge) dp_catalog_hpd_config_intr(dp->catalog, DP_DP_IRQ_HPD_INT_MASK | DP_DP_HPD_REPLUG_INT_MASK, true); @@ -653,7 +653,7 @@ static int dp_hpd_unplug_handle(struct dp_display_private *dp, u32 data) dp->dp_display.connector_type, state); /* disable irq_hpd/replug interrupts */ - if (!dp->dp_display.is_edp) + if (!dp->dp_display.next_bridge) dp_catalog_hpd_config_intr(dp->catalog, DP_DP_IRQ_HPD_INT_MASK | DP_DP_HPD_REPLUG_INT_MASK, false); @@ -682,7 +682,7 @@ static int dp_hpd_unplug_handle(struct dp_display_private *dp, u32 data) } /* disable HPD plug interrupts */ - if (!dp->dp_display.is_edp) + if (!dp->dp_display.next_bridge) dp_catalog_hpd_config_intr(dp->catalog, DP_DP_HPD_PLUG_INT_MASK, false); /* @@ -701,7 +701,7 @@ static int dp_hpd_unplug_handle(struct dp_display_private *dp, u32 data) dp_display_handle_plugged_change(&dp->dp_display, false); /* enable HDP plug interrupt to prepare for next plugin */ - if (!dp->dp_display.is_edp) + if (!dp->dp_display.next_bridge) dp_catalog_hpd_config_intr(dp->catalog, DP_DP_HPD_PLUG_INT_MASK, true); drm_dbg_dp(dp->drm_dev, "After, type=%d hpd_state=%d\n", @@ -1086,8 +1086,8 @@ static void dp_display_config_hpd(struct dp_display_private *dp) dp_display_host_init(dp); dp_catalog_ctrl_hpd_config(dp->catalog); - /* Enable plug and unplug interrupts only for external DisplayPort */ - if (!dp->dp_display.is_edp) + /* Enable plug and unplug interrupts only if not handled by next_bridge */ + if (!dp->dp_display.next_bridge) dp_catalog_hpd_config_intr(dp->catalog, DP_DP_HPD_PLUG_INT_MASK | DP_DP_HPD_UNPLUG_INT_MASK, @@ -1379,8 +1379,7 @@ static int dp_pm_resume(struct device *dev) dp_catalog_ctrl_hpd_config(dp->catalog); - - if (!dp->dp_display.is_edp) + if (!dp->dp_display.next_bridge) dp_catalog_hpd_config_intr(dp->catalog, DP_DP_HPD_PLUG_INT_MASK | DP_DP_HPD_UNPLUG_INT_MASK,