From patchwork Mon Sep 19 09:44:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Zeng Heng X-Patchwork-Id: 12979843 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 02033C54EE9 for ; Mon, 19 Sep 2022 09:38:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=raTwV3Kty0NtKwGqd8+MRJoTRdw63PlCTDd+l4Sb/CU=; b=QAgNH2XolSYWY5 s3bEiHMqS/3+BFa5x/4RYnioyxOvSCtw2wq97dpFpWXmd7D4spYSw7mjh/0BXZnGBtxgH1MG5c0i2 FvlEfNa/lMct50wtzh4caE8DH47qnj3cvVucQcEmH55jMRxYAUuqiTE7fnSBNAwrGsIEKfFg8AAmw 83fLq+MflLNJFdem2g4KVxbamZ1JxbKCNltFH4Ih47nutrbRuX4Yz6/RQZeb9m+gvCpl4BOZ3AFpz 8Mq2Yex/5EeZUAywUT0Cn/WU88KccW5udrbQ46Zav61L+mG0YbZHw5Kwn9kYkhiTh/aSwXcCfLwqk 7lQMsQ3dhM1+3BTGpS4A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oaDDm-00Aqca-2U; Mon, 19 Sep 2022 09:37:46 +0000 Received: from szxga02-in.huawei.com ([45.249.212.188]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oaDDU-00AqOZ-B4 for linux-riscv@lists.infradead.org; Mon, 19 Sep 2022 09:37:36 +0000 Received: from dggpemm500022.china.huawei.com (unknown [172.30.72.57]) by szxga02-in.huawei.com (SkyGuard) with ESMTP id 4MWKHG3ppPzmV5h; Mon, 19 Sep 2022 17:33:30 +0800 (CST) Received: from huawei.com (10.175.103.91) by dggpemm500022.china.huawei.com (7.185.36.162) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.31; Mon, 19 Sep 2022 17:37:22 +0800 From: Zeng Heng To: , , , CC: , Subject: [PATCH -next] =?utf-8?q?riscv=3A_errata=3A_fix_=E2=80=98riscv=5Fcbo?= =?utf-8?q?m=5Fblock=5Fsize=E2=80=99_variable_undeclared?= Date: Mon, 19 Sep 2022 17:44:25 +0800 Message-ID: <20220919094426.860040-1-zengheng4@huawei.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Originating-IP: [10.175.103.91] X-ClientProxiedBy: dggems705-chm.china.huawei.com (10.3.19.182) To dggpemm500022.china.huawei.com (7.185.36.162) X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220919_023729_347368_729B5A59 X-CRM114-Status: UNSURE ( 8.99 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org arch/riscv/errata/thead/errata.c: In function ‘errata_probe_cmo’: arch/riscv/errata/thead/errata.c:40:2: error: ‘riscv_cbom_block_size’ undeclared (first use in this function); did you mean ‘riscv_init_cbom_blocksize’? 40 | riscv_cbom_block_size = L1_CACHE_BYTES; | ^~~~~~~~~~~~~~~~~~~~~ | riscv_init_cbom_blocksize 'riscv_cbom_block_size' variable should be declared without the limitation whether CONFIG_RISCV_ISA_ZICBOM is enabled or not. Signed-off-by: Zeng Heng --- arch/riscv/include/asm/cacheflush.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/riscv/include/asm/cacheflush.h b/arch/riscv/include/asm/cacheflush.h index a89c005b4bbf..7ec600a71634 100644 --- a/arch/riscv/include/asm/cacheflush.h +++ b/arch/riscv/include/asm/cacheflush.h @@ -42,8 +42,8 @@ void flush_icache_mm(struct mm_struct *mm, bool local); #endif /* CONFIG_SMP */ -#ifdef CONFIG_RISCV_ISA_ZICBOM extern unsigned int riscv_cbom_block_size; +#ifdef CONFIG_RISCV_ISA_ZICBOM void riscv_init_cbom_blocksize(void); #else static inline void riscv_init_cbom_blocksize(void) { }