From patchwork Tue Sep 20 09:12:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wei Chen X-Patchwork-Id: 12981725 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 62ACDC6FA82 for ; Tue, 20 Sep 2022 09:13:03 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.409247.652226 (Exim 4.92) (envelope-from ) id 1oaZJE-0003rV-1S; Tue, 20 Sep 2022 09:12:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 409247.652226; Tue, 20 Sep 2022 09:12:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1oaZJD-0003rO-Uc; Tue, 20 Sep 2022 09:12:51 +0000 Received: by outflank-mailman (input) for mailman id 409247; Tue, 20 Sep 2022 09:12:50 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1oaZJC-0003bf-MF for xen-devel@lists.xenproject.org; Tue, 20 Sep 2022 09:12:50 +0000 Received: from EUR03-AM7-obe.outbound.protection.outlook.com (mail-am7eur03on2040.outbound.protection.outlook.com [40.107.105.40]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 655539cd-38c4-11ed-bad8-01ff208a15ba; Tue, 20 Sep 2022 11:12:48 +0200 (CEST) Received: from DU2PR04CA0185.eurprd04.prod.outlook.com (2603:10a6:10:28d::10) by PA4PR08MB7433.eurprd08.prod.outlook.com (2603:10a6:102:2a4::17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5632.21; Tue, 20 Sep 2022 09:12:46 +0000 Received: from DBAEUR03FT055.eop-EUR03.prod.protection.outlook.com (2603:10a6:10:28d:cafe::ea) by DU2PR04CA0185.outlook.office365.com (2603:10a6:10:28d::10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5632.21 via Frontend Transport; Tue, 20 Sep 2022 09:12:46 +0000 Received: from 64aa7808-outbound-1.mta.getcheckrecipient.com (63.35.35.123) by DBAEUR03FT055.mail.protection.outlook.com (100.127.142.171) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5632.12 via Frontend Transport; Tue, 20 Sep 2022 09:12:46 +0000 Received: ("Tessian outbound ee41cdb23966:v124"); Tue, 20 Sep 2022 09:12:46 +0000 Received: from 244930ccd1a4.1 by 64aa7808-outbound-1.mta.getcheckrecipient.com id 1835DC30-937D-46C0-9630-9D41BD00306B.1; Tue, 20 Sep 2022 09:12:39 +0000 Received: from EUR01-HE1-obe.outbound.protection.outlook.com by 64aa7808-outbound-1.mta.getcheckrecipient.com with ESMTPS id 244930ccd1a4.1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384); Tue, 20 Sep 2022 09:12:39 +0000 Received: from FR0P281CA0114.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10:a8::16) by AS8PR08MB6424.eurprd08.prod.outlook.com (2603:10a6:20b:33e::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5632.21; Tue, 20 Sep 2022 09:12:36 +0000 Received: from VE1EUR03FT052.eop-EUR03.prod.protection.outlook.com (2603:10a6:d10:a8:cafe::99) by FR0P281CA0114.outlook.office365.com (2603:10a6:d10:a8::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5654.14 via Frontend Transport; Tue, 20 Sep 2022 09:12:35 +0000 Received: from nebula.arm.com (40.67.248.234) by VE1EUR03FT052.mail.protection.outlook.com (10.152.19.173) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.5632.12 via Frontend Transport; Tue, 20 Sep 2022 09:12:35 +0000 Received: from AZ-NEU-EX01.Emea.Arm.com (10.251.26.4) by AZ-NEU-EX04.Arm.com (10.251.24.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.2507.9; Tue, 20 Sep 2022 09:12:33 +0000 Received: from AZ-NEU-EX04.Arm.com (10.251.24.32) by AZ-NEU-EX01.Emea.Arm.com (10.251.26.4) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.9; Tue, 20 Sep 2022 09:12:33 +0000 Received: from ais-wip-ds.shanghai.arm.com (10.169.190.86) by mail.arm.com (10.251.24.32) with Microsoft SMTP Server id 15.1.2507.9 via Frontend Transport; Tue, 20 Sep 2022 09:12:31 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 655539cd-38c4-11ed-bad8-01ff208a15ba ARC-Seal: i=2; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=pass; b=IrTAPHQcAd5CQ4FF1illZ61LXDueAK0qmS2pulzx8B5dJy5jROR6pvYNkb0U1GZfIxBYrfmlKpEHvP/bpl/XVI+J+qkewwQBNntOpP7cVma6bq5ieGavoTliadmzAWhOxgqODBvfT7E9iRZ+YqgBMaffhTSd2wWZesqVDTm/lm7ud610AvIMhKeUGt42uPfYSqLPnKHBt9VGo+l2kN7WfyiruJC0GRRWONTLe3Y7+/Ergz+EE2QTyaodUiXAI2azG2teQF3quPxO2E7A9Rt6JU05iCPWVy6QktZB8XXDBuyHQHWAN0Uh31MM1vywpotAMOIf0EFkxCUwThyoEDyccw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=0t10+tfC/hnKAURkjOBssSzDdn/WYZUVAtw/3h0wBe4=; b=A2ssQBg8p4QZZfYcMRnwlHnG7V0Ra0OV05ANs5RMuUBrxIdzI81O+fJ+LqcUPFGmbJ1/1uZeYLordES4x4iAWNPU0idjwRCbEzuK0GUX3m89FYoQXHPstpymQ7A3Ab/G1pPqq3ROAtPmY1aTNl1ZxmVvDaYWCnIem1VURQTqsDUsaiEwpJnWXD1bx2dj673GbwCGR/a2xersWLLpTX33gp/9Kis/ImZEm+mct5uD2PcyANq6G69F/PIhqARGcCzmR/T4OK6E6CoZFsxPaiD+/7mPCoYoJ3APYf7q6jzMER1ZB8PtyAhC82W3+urHKQg0jb6ow1YEBHZyr+Wk3POCmg== ARC-Authentication-Results: i=2; mx.microsoft.com 1; spf=pass (sender ip is 63.35.35.123) smtp.rcpttodomain=lists.xenproject.org smtp.mailfrom=arm.com; dmarc=pass (p=none sp=none pct=100) action=none header.from=arm.com; dkim=pass (signature was verified) header.d=armh.onmicrosoft.com; arc=pass (0 oda=1 ltdi=1 spf=[1,1,smtp.mailfrom=arm.com] dmarc=[1,1,header.from=arm.com]) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=0t10+tfC/hnKAURkjOBssSzDdn/WYZUVAtw/3h0wBe4=; b=eSF1N13cvz5qYGEKqJHvdvYHo8ca8VSSU3k0DsQKUye5q6xWO2qO1RdC3Dvdylh3NXO/nUYaRGvOd9/YOZn1XK/P40LIw/BYELaRcieZ0RrP1BwU6Fjx4UqX+pQG4mRrO7hjXmwwe/aTMh5v8bmKwGW9BQL7ZtkVT044MmFMZm4= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 63.35.35.123) smtp.mailfrom=arm.com; dkim=pass (signature was verified) header.d=armh.onmicrosoft.com;dmarc=pass action=none header.from=arm.com; Received-SPF: Pass (protection.outlook.com: domain of arm.com designates 63.35.35.123 as permitted sender) receiver=protection.outlook.com; client-ip=63.35.35.123; helo=64aa7808-outbound-1.mta.getcheckrecipient.com; pr=C X-CheckRecipientChecked: true X-CR-MTA-CID: 9d62e5de3abef816 X-CR-MTA-TID: 64aa7808 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=j8+XAe3ip8R/yaxBVnGM3VJL03TcQ0aAnjCNZ3sMZ4GqLCSwHA08Uh9CJZ6pQvmIMj0ZWEYS36j2OED5FVwtaXcWpYtGxdGEyHPTkPuqRLf0azOjmlhdKKBg85NiysfYAj1HfPbGlEkpGiOx/6k46VjO5MPlc8v/mVSd8xDExQbeFmx7e3cNTg8DxPvK7xQZMiIPTF13i9/oGZLwwciMd8u0zusxOwCg1/LuL8fYFCFb0+10hND989T0n1UdF+5Um9bP5RmBJXbpeHh+N+6egr3o/FQk0Fgf69rOJ1759Ty8S2pfv4DUfVujIfZ19+hj2ZO/nWviz+UNk4xNmb0y/A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=0t10+tfC/hnKAURkjOBssSzDdn/WYZUVAtw/3h0wBe4=; b=ij/CWHRwkXE9OhA1ZVFlgx/97KfFyAHSyP+MQ6/Y0fEVfgzRELJ7gU1Wpw1EwW6cX9YENbJPODJFkM93aFnmuIW+bTtt9nA3B2AAbjdoHPk0pab9olqRRPYo0QO4sEQgQtQfuVaQuaLYzWatQh2g/cxS2RzhRCKrOld2QreQ1HjKfwGXEm267KFxO+RudCDWjQM/vlhFBeSwtocwQGsXfY857HTy0CWqchlpqVmZaFBx41N2d8T4IGBnBarnloj+tTsucxxfOhg9sQYjtPpXGU66tigSlZEGNLJEdK3f5W1MPI8GQ9v5YXbTQlg8O2K+W8T22tXKvLEJVh+YEmn1yA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 40.67.248.234) smtp.rcpttodomain=lists.xenproject.org smtp.mailfrom=arm.com; dmarc=pass (p=none sp=none pct=100) action=none header.from=arm.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=0t10+tfC/hnKAURkjOBssSzDdn/WYZUVAtw/3h0wBe4=; b=eSF1N13cvz5qYGEKqJHvdvYHo8ca8VSSU3k0DsQKUye5q6xWO2qO1RdC3Dvdylh3NXO/nUYaRGvOd9/YOZn1XK/P40LIw/BYELaRcieZ0RrP1BwU6Fjx4UqX+pQG4mRrO7hjXmwwe/aTMh5v8bmKwGW9BQL7ZtkVT044MmFMZm4= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 40.67.248.234) smtp.mailfrom=arm.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=arm.com; Received-SPF: Pass (protection.outlook.com: domain of arm.com designates 40.67.248.234 as permitted sender) receiver=protection.outlook.com; client-ip=40.67.248.234; helo=nebula.arm.com; pr=C From: Wei Chen To: CC: , Wei Chen , Jan Beulich , Andrew Cooper , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Wei Liu Subject: [PATCH v5 1/6] xen/x86: Provide helpers for common code to access acpi_numa Date: Tue, 20 Sep 2022 17:12:13 +0800 Message-ID: <20220920091218.1208658-2-wei.chen@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220920091218.1208658-1-wei.chen@arm.com> References: <20220920091218.1208658-1-wei.chen@arm.com> MIME-Version: 1.0 X-EOPAttributedMessage: 1 X-MS-TrafficTypeDiagnostic: VE1EUR03FT052:EE_|AS8PR08MB6424:EE_|DBAEUR03FT055:EE_|PA4PR08MB7433:EE_ X-MS-Office365-Filtering-Correlation-Id: 52c8de36-b277-49f4-5e2e-08da9ae84844 x-checkrecipientrouted: true NoDisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; X-Microsoft-Antispam-Message-Info-Original: 0RXJik4DxR/GELlw+dHTzcnYwuDU21h7UOR+juU0dq7K6cEZGixFJbNnGgKdgsKTaw0+E+r68AEP6+erF2FTDAt4cvyyV8u1p4rDR4JBXIdZo36xD/x3Gcbsj6FTulhrY1VB2tfB3wh9JUmhl2WvHm7ge8G//mq/nFZF3g29JemjIgoW2QfKUCEOL27RBYDOy1NN65tBDiIBPS8LIocrCArxq6phDg3IugCJEwvbw27fD3Jcy7BwPzAXI0Pf6Z5MlKkIpP6or7HKGpKkHso+sXd7YLu5IhH8pONbZjBbjjPsJOOniLbbr9s4g59YgI5UIcuImRzyQnHsM9h1YA+3Fx0VFVBlD/7j9QSELQkfri/vvmRdKR+HwKLlYLVq5V4+gFVMp2rBYP32mEC3XwYOKvNDVgoVqRNjOQN7gn37oE1CevjXyXz1lbulwg8Pn0MPZy79ysPX4MME8ONcGKrVHnCWuG9mpb7DDX1YTBtE4x69MbHo5oIp/LExef7Z9L2wGDeZj4tiSomNyIx7T8B7tfgxn9TCV8Vh+y0KlccLKvX0lAfdKf3b0nECF2H0uZJC0YvwGYfq/3mI7alvxISHiQK4icgUfbcvNCtst1fhlzEzHRNZp2lWCQvL008M41eyIEmLcFcmyi3FqkjTselVBOHRMuAainASeLzZ5LmBoP08QmTBiXJhMMguycVvPt792D3mSM0jnL7tPG4qEkuvlTlQvDpIuBc0IIBvfYf727cZcBnEHmbJ9pHQE0+JzCgnoOUBFMBUdJDbEo0BFi8BzcTtPodQhG2pFvsZZVlbe0RsfZsqxwF+9gjvMlQToZzK X-Forefront-Antispam-Report-Untrusted: CIP:40.67.248.234;CTRY:IE;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:nebula.arm.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(376002)(396003)(346002)(39860400002)(136003)(451199015)(46966006)(36840700001)(40470700004)(40480700001)(2906002)(44832011)(36756003)(54906003)(316002)(426003)(36860700001)(8676002)(47076005)(82740400003)(4326008)(5660300002)(82310400005)(70206006)(70586007)(6916009)(8936002)(86362001)(336012)(1076003)(186003)(81166007)(478600001)(2616005)(26005)(356005)(41300700001)(6666004)(83380400001)(40460700003)(7696005)(36900700001);DIR:OUT;SFP:1101; X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR08MB6424 X-MS-Exchange-Transport-CrossTenantHeadersStripped: DBAEUR03FT055.eop-EUR03.prod.protection.outlook.com X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id-Prvs: 8d1aca7f-1415-4bbc-8e9d-08da9ae841e0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: lqbwGxiKHcxYISfWYnPKvuBEgbxCqiILS1oiLxXXyEEi8VlHYEtnQbClWhRNDT9eW6OlAi5lPrTY21rZhYSZbkDJzpZHU29z1ZKLtHCtpPlAu0xmCsdUTSD3Z7ixhKclIrgCofSkoNncktUgVAhjXgO4oTRjSxKfzBpg4fhiSeK/AZdFQpCqXjGPB+/y2dPspoJPc7BZ7hfCuDbhy1iKqRmo1UJfhdY5MdO9KWqmXzDNFvRS3VyRRarLzIB5XVQHA0a9MNetk05diuuxnqelm4vS2Clk/0FwebBwmdqyMiifrBrtHCY/uzkOIA5ZToM175Z/ZwBTNiooDsUfOeSNt7hfUVoTE7fT17e92xK1n0b68nl1ZIl9fcmbatof5XrGyVCEkpSVaHUTgTqkod7hw5Hgmvn9rcSPJgTsHW3KI2zbc8IL7WhSbum25mQpKnimuFiLucSSe/GLQHYMwDOWaXaZn4uqP28ZSDLSPxfPWYtlgmBQMkmvkiGnxU1CqVA3Pw+1p9MltOKw2XmimQyZpYBbB3fYRl0sQjqcMYtaGZPTPGkY3B7E6p+dKWI6KiXVz6ApdMY7DLkKjTaoE/shf0XYvVD1ieGV+13wApi3JHAwmdsFR8JTBnpvudpnFNVGj2yxjq9S4za8dQC2R0gKcfZrNCM8GYRSsieqqAobYgs6KKGUYQ3prCta0DeJPA6x/9eVVKkwOqX4g8bOkOJ2U8VMmH044HYhJDElE1pC2JzqUXZ9iMnGp7BVeHI4KHwtxhHvY9O8DdEaF6BAKGbgwQ== X-Forefront-Antispam-Report: CIP:63.35.35.123;CTRY:IE;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:64aa7808-outbound-1.mta.getcheckrecipient.com;PTR:ec2-63-35-35-123.eu-west-1.compute.amazonaws.com;CAT:NONE;SFS:(13230022)(4636009)(346002)(39860400002)(376002)(396003)(136003)(451199015)(40470700004)(36840700001)(46966006)(6666004)(44832011)(2906002)(5660300002)(8936002)(86362001)(4326008)(70206006)(40480700001)(8676002)(70586007)(81166007)(6916009)(54906003)(316002)(82310400005)(478600001)(336012)(47076005)(1076003)(41300700001)(40460700003)(7696005)(36756003)(82740400003)(186003)(426003)(83380400001)(26005)(2616005)(36860700001);DIR:OUT;SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Sep 2022 09:12:46.1720 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 52c8de36-b277-49f4-5e2e-08da9ae84844 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DBAEUR03FT055.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PA4PR08MB7433 acpi_numa is a specific NUMA switch for ACPI NUMA implementation. Other NUMA implementation may not need this switch. But this switch is not only used by ACPI code, it is also used directly in some general NUMA logic code. So far this hasn't caused any problem because Xen only has x86 implementing ACPI NUMA, but now Arm is implementing device tree based NUMA. Accesssing acpi_numa directly in some functions will be a block of reusing NUMA common code. It is also difficult for us to replace it with a new generic switch, because it is hard to prove that the new switch states can guarantee the original code will work correctly. So in this patch, we provide two helpers for common code to update and get states of acpi_numa. And other new NUMA implementations just need to provide the same helpers for common code. In this case, the generic NUMA logic code can be reused by all NUMA implementations. Signed-off-by: Wei Chen --- v4 -> v5: 1. Use arch_numa_broken instead of arch_numa_disabled for acpi_numa < 0 check. Because arch_numa_disabled might include acpi_numa < 0 (init failed) and acpi_numa == 0 (no data or data no init) cases. v3 -> v4: 1. Drop parameter from arch_numa_disabled, the parameter will be introduced in later patch where use it. 2. Drop unnecessary "else" from arch_numa_setup, and fix its indentation. v2 -> v3: 1. Drop enumeration of numa status. 2. Use helpers to get/update acpi_numa. 3. Insert spaces among parameters of strncmp in numa_setup. v1 -> v2: 1. Remove fw_numa. 2. Use enumeration to replace numa_off and acpi_numa. 3. Correct return value of srat_disabled. 4. Introduce numa_enabled_with_firmware. --- xen/arch/x86/include/asm/numa.h | 5 +++-- xen/arch/x86/numa.c | 38 ++++++++++++++++++++++----------- 2 files changed, 28 insertions(+), 15 deletions(-) diff --git a/xen/arch/x86/include/asm/numa.h b/xen/arch/x86/include/asm/numa.h index c32ccffde3..529efadf93 100644 --- a/xen/arch/x86/include/asm/numa.h +++ b/xen/arch/x86/include/asm/numa.h @@ -32,8 +32,9 @@ extern void numa_add_cpu(int cpu); extern void numa_init_array(void); extern bool numa_off; - -extern int srat_disabled(void); +extern int arch_numa_setup(const char *opt); +extern bool arch_numa_broken(void); +extern bool srat_disabled(void); extern void numa_set_node(int cpu, nodeid_t node); extern nodeid_t setup_node(unsigned int pxm); extern void srat_detect_node(int cpu); diff --git a/xen/arch/x86/numa.c b/xen/arch/x86/numa.c index 627ae8aa95..1ab37b9c19 100644 --- a/xen/arch/x86/numa.c +++ b/xen/arch/x86/numa.c @@ -50,9 +50,28 @@ nodemask_t __read_mostly node_online_map = { { [0] = 1UL } }; bool numa_off; s8 acpi_numa = 0; -int srat_disabled(void) +int __init arch_numa_setup(const char *opt) { - return numa_off || acpi_numa < 0; +#ifdef CONFIG_ACPI_NUMA + if ( !strncmp(opt, "noacpi", 6) ) + { + numa_off = false; + acpi_numa = -1; + return 0; + } +#endif + + return -EINVAL; +} + +bool arch_numa_broken(void) +{ + return acpi_numa < 0; +} + +bool srat_disabled(void) +{ + return numa_off || arch_numa_broken(); } /* @@ -291,28 +310,21 @@ void numa_set_node(int cpu, nodeid_t node) /* [numa=off] */ static int __init cf_check numa_setup(const char *opt) { - if ( !strncmp(opt,"off",3) ) + if ( !strncmp(opt, "off", 3) ) numa_off = true; - else if ( !strncmp(opt,"on",2) ) + else if ( !strncmp(opt, "on", 2) ) numa_off = false; #ifdef CONFIG_NUMA_EMU else if ( !strncmp(opt, "fake=", 5) ) { numa_off = false; - numa_fake = simple_strtoul(opt+5,NULL,0); + numa_fake = simple_strtoul(opt + 5, NULL, 0); if ( numa_fake >= MAX_NUMNODES ) numa_fake = MAX_NUMNODES; } -#endif -#ifdef CONFIG_ACPI_NUMA - else if ( !strncmp(opt,"noacpi",6) ) - { - numa_off = false; - acpi_numa = -1; - } #endif else - return -EINVAL; + return arch_numa_setup(opt); return 0; } From patchwork Tue Sep 20 09:12:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wei Chen X-Patchwork-Id: 12981728 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 06B07C6FA82 for ; Tue, 20 Sep 2022 09:13:06 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.409248.652237 (Exim 4.92) (envelope-from ) id 1oaZJJ-0004Al-BG; Tue, 20 Sep 2022 09:12:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 409248.652237; Tue, 20 Sep 2022 09:12:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1oaZJJ-0004Aa-6c; Tue, 20 Sep 2022 09:12:57 +0000 Received: by outflank-mailman (input) for mailman id 409248; Tue, 20 Sep 2022 09:12:56 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1oaZJH-0003bf-Kc for xen-devel@lists.xenproject.org; Tue, 20 Sep 2022 09:12:56 +0000 Received: from EUR04-VI1-obe.outbound.protection.outlook.com (mail-eopbgr80071.outbound.protection.outlook.com [40.107.8.71]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 68200bdd-38c4-11ed-bad8-01ff208a15ba; Tue, 20 Sep 2022 11:12:53 +0200 (CEST) Received: from AS9PR06CA0463.eurprd06.prod.outlook.com (2603:10a6:20b:49a::14) by DBBPR08MB6202.eurprd08.prod.outlook.com (2603:10a6:10:209::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5632.21; Tue, 20 Sep 2022 09:12:49 +0000 Received: from AM7EUR03FT030.eop-EUR03.prod.protection.outlook.com (2603:10a6:20b:49a:cafe::a) by AS9PR06CA0463.outlook.office365.com (2603:10a6:20b:49a::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5632.21 via Frontend Transport; Tue, 20 Sep 2022 09:12:49 +0000 Received: from 64aa7808-outbound-1.mta.getcheckrecipient.com (63.35.35.123) by AM7EUR03FT030.mail.protection.outlook.com (100.127.140.180) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5632.12 via Frontend Transport; Tue, 20 Sep 2022 09:12:49 +0000 Received: ("Tessian outbound 88978e6d60db:v124"); Tue, 20 Sep 2022 09:12:49 +0000 Received: from 4f26d7b3c6dd.1 by 64aa7808-outbound-1.mta.getcheckrecipient.com id ABBB8001-29BB-4FE5-8F44-555F8579C02B.1; Tue, 20 Sep 2022 09:12:42 +0000 Received: from EUR04-HE1-obe.outbound.protection.outlook.com by 64aa7808-outbound-1.mta.getcheckrecipient.com with ESMTPS id 4f26d7b3c6dd.1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384); Tue, 20 Sep 2022 09:12:42 +0000 Received: from FR0P281CA0098.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10:a9::8) by DU0PR08MB8640.eurprd08.prod.outlook.com (2603:10a6:10:400::17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5632.18; Tue, 20 Sep 2022 09:12:39 +0000 Received: from VE1EUR03FT016.eop-EUR03.prod.protection.outlook.com (2603:10a6:d10:a9:cafe::ef) by FR0P281CA0098.outlook.office365.com (2603:10a6:d10:a9::8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5654.14 via Frontend Transport; Tue, 20 Sep 2022 09:12:39 +0000 Received: from nebula.arm.com (40.67.248.234) by VE1EUR03FT016.mail.protection.outlook.com (10.152.18.115) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.5632.12 via Frontend Transport; Tue, 20 Sep 2022 09:12:38 +0000 Received: from AZ-NEU-EX01.Emea.Arm.com (10.251.26.4) by AZ-NEU-EX03.Arm.com (10.251.24.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.2507.9; Tue, 20 Sep 2022 09:12:37 +0000 Received: from AZ-NEU-EX04.Arm.com (10.251.24.32) by AZ-NEU-EX01.Emea.Arm.com (10.251.26.4) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.9; Tue, 20 Sep 2022 09:12:36 +0000 Received: from ais-wip-ds.shanghai.arm.com (10.169.190.86) by mail.arm.com (10.251.24.32) with Microsoft SMTP Server id 15.1.2507.9 via Frontend Transport; Tue, 20 Sep 2022 09:12:33 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 68200bdd-38c4-11ed-bad8-01ff208a15ba ARC-Seal: i=2; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=pass; b=WikNt3T2D+1c8HGdKuuF+lmtDrzW9iJUduWjkz8KIPExHtkA3fmMj5eZOBA4Kd1dCzniWyC/Gaz1jZP99m7udPIZJOPorkPkoWcg/LqskDR+IUkI5CtJrXNUWAVABXum4kFAFuLZmtEhTfEnwZjRsiCPZLLc/kI16wlsauWc2amZ02s597yhYnWYMpMAHpQI9q5JgmFE3r1fZhbV+0cmWojDsNjBztwXVGGfWCHUk3QvJ34AeeZGMajo1HIwlGhidBJzn2c1sfBNOS5uYs2QJRyUQQtFRJsR/3SAzpAqHdWb9QT0ameA2WuWotCqVIs1+XVaP1Lp5uzqIAWfygbMfQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=Y2r/TOMmMEno0c/Cxr26T3Lnpm0ZYT9VB9tKKopDfkc=; b=lNxjOeBrpikCkU2L9mots4Y1cx+xIIxL35Mq6ZjVvh0Kecs2UxhVAafBHyqxvo/pqU9Ym/68Pz5tOVuXmlJ0OmM6tdrgS0SKlcmGnSFLSA/iOMs8m4d2cuvmgvhjxnrC5w+FY/JO6AqOwCRgFjCurau8YR62BdTAmbNN9jtglSd38k92aHM0KXp9imU6+FopFEVCwNFXsRRV+NJnReZfulIFs3xNNWTMn1KB1htU+8xH8vyl9slrlEdxxC/zYTy4rRJBdR/g4N2dBvAwMX00IErz7oBgXtHuSYQ4G7/ml2/s9slgjFmD0ImNu4IbqxOnam3++Ngrs9+uij1oBlzRZw== ARC-Authentication-Results: i=2; mx.microsoft.com 1; spf=pass (sender ip is 63.35.35.123) smtp.rcpttodomain=lists.xenproject.org smtp.mailfrom=arm.com; dmarc=pass (p=none sp=none pct=100) action=none header.from=arm.com; dkim=pass (signature was verified) header.d=armh.onmicrosoft.com; arc=pass (0 oda=1 ltdi=1 spf=[1,1,smtp.mailfrom=arm.com] dmarc=[1,1,header.from=arm.com]) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=Y2r/TOMmMEno0c/Cxr26T3Lnpm0ZYT9VB9tKKopDfkc=; b=PFfNwME/EePSHDeHjiWngMG+GT9r+cpOjIPXu7RuckYYdtn0SbcLjAdpmFHR5ScDZH6iTCmaFc3566e3fyK9li2blSgY2SKXHdxCGwDFn18f2HpX4pMByLkrkr7X9JlvraMGu6gRVOMgR8LRmZjEDbDOhlywtuMyJnTNDWFkJnk= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 63.35.35.123) smtp.mailfrom=arm.com; dkim=pass (signature was verified) header.d=armh.onmicrosoft.com;dmarc=pass action=none header.from=arm.com; Received-SPF: Pass (protection.outlook.com: domain of arm.com designates 63.35.35.123 as permitted sender) receiver=protection.outlook.com; client-ip=63.35.35.123; helo=64aa7808-outbound-1.mta.getcheckrecipient.com; pr=C X-CheckRecipientChecked: true X-CR-MTA-CID: f0105f0c541f1eeb X-CR-MTA-TID: 64aa7808 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=LbJkBl5J9J98rNa/KPnZIzg4TBaSH6MoIKxzWaKDpqsXJdkq4UIn0FlSf1A9Y9OyuKLNQ24H/btnFNsKriStktTVGw8PhsF5wXclunKYItSNgzRQIFjkTPCW2T0b0eskfUyvxnT/gKaCqsDY1NIiqVFPMIaEFG9qUomrfj8vsbrWZ4S+H9APMxw43Gld2viKBTASrxALcqwLUDWyaAnNpooC25EISXv2u5DLToXzTyLBVcOh0SKl0sW+bpV+ma7kHstWrRFSS0DlvPZD7sfnpzwLrTdYgZ7N3gLPSuhWlstFpHHyTyx47egmuqPTEw+icvuI8v+agWsiQa4Q3hu3XQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=Y2r/TOMmMEno0c/Cxr26T3Lnpm0ZYT9VB9tKKopDfkc=; b=CZZ4BvgIp4CpjLpx4a58VZuVXJoWLl0+tv+tMIYUFkH6Uh84oCyzpAEH0iYGpfMMInjX8zHP5MgAYij8aChshYilixW5zcpQ79aQ3rb65RgiBC394wBaMo5XYi4e5SFSzWVpUuwkNVamqRGsK0OTkrWn/hCIQFuvuigAA6pH5udb/2fwQBmJzMf9H6LXqASajfEtqveS0xo6Vz3EBpYFgxEcQWYfO1Z6yOoQyjHrUaNaGcVvr6lZ+9DlnXzTA01s+siHmfSnoXKUM2bmll00v3DUmETzvkOHfYFq00EDcTxNuosIXU9xcEBbLBwEe6zGIfgQVF8TcTRMt+VAXc8IzA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 40.67.248.234) smtp.rcpttodomain=lists.xenproject.org smtp.mailfrom=arm.com; dmarc=pass (p=none sp=none pct=100) action=none header.from=arm.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=Y2r/TOMmMEno0c/Cxr26T3Lnpm0ZYT9VB9tKKopDfkc=; b=PFfNwME/EePSHDeHjiWngMG+GT9r+cpOjIPXu7RuckYYdtn0SbcLjAdpmFHR5ScDZH6iTCmaFc3566e3fyK9li2blSgY2SKXHdxCGwDFn18f2HpX4pMByLkrkr7X9JlvraMGu6gRVOMgR8LRmZjEDbDOhlywtuMyJnTNDWFkJnk= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 40.67.248.234) smtp.mailfrom=arm.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=arm.com; Received-SPF: Pass (protection.outlook.com: domain of arm.com designates 40.67.248.234 as permitted sender) receiver=protection.outlook.com; client-ip=40.67.248.234; helo=nebula.arm.com; pr=C From: Wei Chen To: CC: , Wei Chen , Jan Beulich , Andrew Cooper , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Wei Liu , George Dunlap , Julien Grall , Stefano Stabellini Subject: [PATCH v5 2/6] xen/x86: move generically usable NUMA code from x86 to common Date: Tue, 20 Sep 2022 17:12:14 +0800 Message-ID: <20220920091218.1208658-3-wei.chen@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220920091218.1208658-1-wei.chen@arm.com> References: <20220920091218.1208658-1-wei.chen@arm.com> MIME-Version: 1.0 X-EOPAttributedMessage: 1 X-MS-TrafficTypeDiagnostic: VE1EUR03FT016:EE_|DU0PR08MB8640:EE_|AM7EUR03FT030:EE_|DBBPR08MB6202:EE_ X-MS-Office365-Filtering-Correlation-Id: 0b7b261f-3faa-4888-7d82-08da9ae84a3c x-checkrecipientrouted: true NoDisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; X-Microsoft-Antispam-Message-Info-Original: 9TVz0ldV5jwnOX5ZXjIUf6sfc6f7wPZIIXCUMGnr7W1klig85P20HuUy/RUwjexkdhO7/zBAciiDmocPF9zCFXhfvIViEPtSh65TxmoKOIGqDU+3X/wjtqlfyqa1mts9sSLlCxyWfPOIjvclZxvWZTPZBphNGZGa9c5bZfh4N7Lytn2J3t2orKxl3s2a5sQ2xpPgxjiz30sddmxy+UpNT2KK0ST/KYVIktP/ukxyy9DVFKYSIi5uxS0VC5P/QCY8RMHyYZBYKE84AuSr7PphuZPW9mWL2TfXgQS8wRvIDbwrkw6kLUzfod7Bb/dDa49DXPVduNjiOhoU9ZoVGuw0dLR0Yz8PHV+j8VPidGVieELl/itbwvO+HTRP/VD58iUCa+rgNMeEynNVliZIj4J6yjw/Wza8KN+LX8FJkegRhRKhkdhBR8aXob9fGv8HJmvJxEtja8GPTvLzypysU3N+xXZa49R3bcuemqLGdMYOoyt2jCGrV+QtxZ6X4TKYeqfL1nqy29JzuAwtM8aQSKsOww5pWh43NVCYY1tGZ5I2RoiYRtM8Z/iyRUw6YwOkg3rYzur9Mf2N56af4zdbi1WLJolJ61UHOdxr5kSjDB1SmOILIziBTwvfP4uuF9d3F0QFnv6a0L8+2n5jFFTcJdu7a/6AbeEBs4VAA+SuQeIExVfrJV3Y2x15ibQr7eZbIKYgGpYtgmgdMtxwZygxnVG0ASH+62R0xFX0YWYhg42Y948acPkh0s5Ao5bg3+5U6KpSQB4b4YGgLDVYHn2dGKXeJHGjYqfFF32rBcJLgeQ6qVso+TF63SnHtlIqnpS6Apxx3oBHuHdTxsS0jTF2Y9PncQ== X-Forefront-Antispam-Report-Untrusted: CIP:40.67.248.234;CTRY:IE;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:nebula.arm.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(376002)(396003)(136003)(39860400002)(346002)(451199015)(46966006)(40470700004)(36840700001)(186003)(336012)(1076003)(2616005)(426003)(356005)(6916009)(316002)(478600001)(82740400003)(5660300002)(54906003)(86362001)(40460700003)(36756003)(40480700001)(81166007)(82310400005)(6666004)(26005)(7696005)(83380400001)(41300700001)(36860700001)(47076005)(4326008)(30864003)(70206006)(8676002)(2906002)(8936002)(70586007)(44832011)(21314003)(36900700001);DIR:OUT;SFP:1101; X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU0PR08MB8640 X-MS-Exchange-Transport-CrossTenantHeadersStripped: AM7EUR03FT030.eop-EUR03.prod.protection.outlook.com X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id-Prvs: 0236ca6f-382c-43e3-3dfc-08da9ae843dc X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: tzgUdJETwuROY2xjZkjAQFTsbwlHiJEG0ZfOPsVFomE2XKWd38CT0fmUBIS8N9UVm8b9zfFpXqCIRMi+CRnmbDCX9zkc5UK2uNGD2nfTMnRxoFll07UAiuBwi5gKrpA+3d1rai5DLyJJk4oYymiZA42yej6+yzWPiv1gTmliVtpCi+TQ6aSM/GhMbgp7iWnkzNZ9F9d+HHAcGOwiJYnq1uqv8dYH80mA0BrvrpVK7FQitPjl0qjdHlfIPVy/vYZdzK/MCg916YejuqlQctU9hNmq4/TaJPcOVy4yT0x5b57uYCs1Wb7GPMEvdTmLWDRwvwii3UkkpY0OxZBq74PVZHw2tVbhMgcTOaKlgM2VHVspb0dJT6syaOd0Rggb4DS3wkb6ux5pu+dD/71tQvxh9716oim7MqdMeL0S2s5DRUBy8B+OoyTAyyf0JaICLyz9fm2q/+cd1zz1pcPYN47+mcjtxnncv+WkTjYBKPLyUAuqbuwJocQTZPsxAavQCVpxbkRGrs/fPs5kSpTnZ/vbyMoaSvjbNnkPjh+rFcgT12ndeOINmwwbQJsw5wrfGUOGJoT0Id99Yf8Kz9VkEwqxQp0etMbTH8MED82cHSQkd1vRAXykd/ng7VJ0ZgYhj2l0xITdKMQiqTfbtXb1+jDygAMPOHC+LzBS5mCml/AvUD3xdN2X43RAqGmHJJhlOB+n7nWYs1zJAN0VtamvELO93tdw3nC4zZPzdTgSk0F7E8zSVWmuzR6Ik6E+7McnBsnIarkqPKqjFPeCI8tiEBU4NC3wDVqLrrEhWteK2C7L5m4= X-Forefront-Antispam-Report: CIP:63.35.35.123;CTRY:IE;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:64aa7808-outbound-1.mta.getcheckrecipient.com;PTR:ec2-63-35-35-123.eu-west-1.compute.amazonaws.com;CAT:NONE;SFS:(13230022)(4636009)(346002)(136003)(39860400002)(376002)(396003)(451199015)(40470700004)(36840700001)(46966006)(36860700001)(30864003)(44832011)(82740400003)(6666004)(47076005)(426003)(336012)(41300700001)(8936002)(54906003)(107886003)(2616005)(8676002)(1076003)(2906002)(36756003)(83380400001)(82310400005)(70206006)(70586007)(4326008)(316002)(6916009)(26005)(5660300002)(40460700003)(478600001)(7696005)(186003)(40480700001)(81166007)(86362001)(21314003);DIR:OUT;SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Sep 2022 09:12:49.4289 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0b7b261f-3faa-4888-7d82-08da9ae84a3c X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM7EUR03FT030.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DBBPR08MB6202 There are some codes in x86/numa.c can be shared by common architectures to implememnt NUMA support. Just like some variables and functions to check and store NUMA memory map. And some variables and functions to do NUMA initialization. In this patch, we move them to common/numa.c and xen/numa.h and use the CONFIG_NUMA to gate them for non-NUMA supported architectures. As the target header file is Xen-style, so we trim some spaces and replace tabs for the codes that has been moved to xen/numa.h at the same time. As acpi_scan_nodes has been used in a common function, it doesn't make sense to use acpi_xxx in common code, so we rename it to numa_scan_nodes in this patch too. After that if we still use CONFIG_ACPI_NUMA in to gate numa_scan_nodes in numa_initmem_init, that doesn't make sense. As CONFIG_NUMA will be selected by CONFIG_ACPI_NUMA for x86. So, we replace CONFIG_ACPI_NUMA by CONFIG_NUMA to gate numa_scan_nodes. As arch_numa_disabled has been implememnted for ACPI NUMA, we can rename srat_disabled to numa_disabled and move it to common code as well. Signed-off-by: Wei Chen --- v4 -> v5: 1. Use nodeid_t instead of uint8_t for memnodemap. 2. Restore to use typeof(*memnodemap) for _memnodemap, this will avoid the further adjustments for _memnodemap's type. 3. Use __ro_after_init for numa_off. 4. Use pointer-to-const for proper function parameters. 5. Use unsigned int for variables that are not realy used for node ID. 6. Fix code comments code-style and adjust the length. 7. Fix code-styles. 8. Rename numa_scan_nodes to numa_process_nodes. 9. Use a plain "int ret" to record compute_hash_shift return value. v3 -> v4: 1. Restore compute_hash_shift's return value to int. 2. Remove unnecessary parentheses for macros. 3. Use unsigned int for proper variables. 4. Fix some code-style. v2 -> v3: 1. Remove acpi.h from common/numa.c. 2. Rename acpi_scan_nodes to numa_scan_nodes. 3. Replace u8 by uint8_t for memnodemap. 4. Use unsigned int for memnode_shift and adjust related functions (compute_hash_shift, populate_memnodemap) to use correct types for return values or parameters. 5. Use nodeid_t for nodeid and node numbers. 6. Use __read_mostly and __ro_after_init for appropriate variables. 7. Adjust the __read_mostly and __initdata location for some variables. 8. convert from plain int to unsigned for cpuid and other proper variables. 9. Use __attribute_pure__ instead of __attribute__((pure)). 10. Replace CONFIG_ACPI_NUMA by CONFIG_NUMA in numa_initmem_init. 11. Add const for some functions' parameters. 12. Move srat_disabled to common code with new name numa_disabled. 13. Fix some spaces code-style for numa_emulation. 14. Change from int to unsigned int for numa_fake. v1 -> v2: 1. New patch in v2. --- xen/arch/x86/include/asm/acpi.h | 1 - xen/arch/x86/include/asm/numa.h | 57 +--- xen/arch/x86/include/asm/setup.h | 1 - xen/arch/x86/numa.c | 430 +---------------------------- xen/arch/x86/smpboot.c | 2 +- xen/arch/x86/srat.c | 10 +- xen/common/Makefile | 1 + xen/common/numa.c | 460 +++++++++++++++++++++++++++++++ xen/include/xen/numa.h | 67 +++++ 9 files changed, 536 insertions(+), 493 deletions(-) create mode 100644 xen/common/numa.c diff --git a/xen/arch/x86/include/asm/acpi.h b/xen/arch/x86/include/asm/acpi.h index 9a9cc4c240..5c2dd5da2d 100644 --- a/xen/arch/x86/include/asm/acpi.h +++ b/xen/arch/x86/include/asm/acpi.h @@ -102,7 +102,6 @@ extern unsigned long acpi_wakeup_address; #define ARCH_HAS_POWER_INIT 1 extern s8 acpi_numa; -extern int acpi_scan_nodes(u64 start, u64 end); #define NR_NODE_MEMBLKS (MAX_NUMNODES*2) extern struct acpi_sleep_info acpi_sinfo; diff --git a/xen/arch/x86/include/asm/numa.h b/xen/arch/x86/include/asm/numa.h index 529efadf93..6c87942d43 100644 --- a/xen/arch/x86/include/asm/numa.h +++ b/xen/arch/x86/include/asm/numa.h @@ -9,72 +9,17 @@ typedef u8 nodeid_t; extern int srat_rev; -extern nodeid_t cpu_to_node[NR_CPUS]; -extern cpumask_t node_to_cpumask[]; - -#define cpu_to_node(cpu) (cpu_to_node[cpu]) -#define parent_node(node) (node) -#define node_to_first_cpu(node) (__ffs(node_to_cpumask[node])) -#define node_to_cpumask(node) (node_to_cpumask[node]) - -struct node { - paddr_t start, end; -}; - -extern int compute_hash_shift(struct node *nodes, int numnodes, - nodeid_t *nodeids); extern nodeid_t pxm_to_node(unsigned int pxm); #define ZONE_ALIGN (1UL << (MAX_ORDER+PAGE_SHIFT)) -#define VIRTUAL_BUG_ON(x) -extern void numa_add_cpu(int cpu); -extern void numa_init_array(void); -extern bool numa_off; - -extern int arch_numa_setup(const char *opt); -extern bool arch_numa_broken(void); -extern bool srat_disabled(void); -extern void numa_set_node(int cpu, nodeid_t node); +extern bool numa_disabled(void); extern nodeid_t setup_node(unsigned int pxm); extern void srat_detect_node(int cpu); -extern void setup_node_bootmem(nodeid_t nodeid, paddr_t start, paddr_t end); extern nodeid_t apicid_to_node[]; extern void init_cpu_to_node(void); -static inline void clear_node_cpumask(int cpu) -{ - cpumask_clear_cpu(cpu, &node_to_cpumask[cpu_to_node(cpu)]); -} - -/* Simple perfect hash to map pdx to node numbers */ -extern int memnode_shift; -extern unsigned long memnodemapsize; -extern u8 *memnodemap; - -struct node_data { - unsigned long node_start_pfn; - unsigned long node_spanned_pages; -}; - -extern struct node_data node_data[]; - -static inline __attribute__((pure)) nodeid_t phys_to_nid(paddr_t addr) -{ - nodeid_t nid; - VIRTUAL_BUG_ON((paddr_to_pdx(addr) >> memnode_shift) >= memnodemapsize); - nid = memnodemap[paddr_to_pdx(addr) >> memnode_shift]; - VIRTUAL_BUG_ON(nid >= MAX_NUMNODES || !node_data[nid]); - return nid; -} - -#define NODE_DATA(nid) (&(node_data[nid])) - -#define node_start_pfn(nid) (NODE_DATA(nid)->node_start_pfn) -#define node_spanned_pages(nid) (NODE_DATA(nid)->node_spanned_pages) -#define node_end_pfn(nid) (NODE_DATA(nid)->node_start_pfn + \ - NODE_DATA(nid)->node_spanned_pages) #define arch_want_default_dmazone() (num_online_nodes() > 1) extern int valid_numa_range(paddr_t start, paddr_t end, nodeid_t node); diff --git a/xen/arch/x86/include/asm/setup.h b/xen/arch/x86/include/asm/setup.h index 21037b7f31..ae470ea12f 100644 --- a/xen/arch/x86/include/asm/setup.h +++ b/xen/arch/x86/include/asm/setup.h @@ -20,7 +20,6 @@ void early_time_init(void); void set_nr_cpu_ids(unsigned int max_cpus); -void numa_initmem_init(unsigned long start_pfn, unsigned long end_pfn); void arch_init_memory(void); void subarch_init_memory(void); diff --git a/xen/arch/x86/numa.c b/xen/arch/x86/numa.c index 1ab37b9c19..21efb1b1b3 100644 --- a/xen/arch/x86/numa.c +++ b/xen/arch/x86/numa.c @@ -4,20 +4,11 @@ * Adapted for Xen: Ryan Harper */ -#include -#include #include -#include +#include #include #include -#include -#include -#include -#include -#include #include -#include -#include #ifndef Dprintk #define Dprintk(x...) @@ -26,28 +17,13 @@ /* from proto.h */ #define round_up(x,y) ((((x)+(y))-1) & (~((y)-1))) -struct node_data node_data[MAX_NUMNODES]; - -/* Mapping from pdx to node id */ -int memnode_shift; -static typeof(*memnodemap) _memnodemap[64]; -unsigned long memnodemapsize; -u8 *memnodemap; - -nodeid_t cpu_to_node[NR_CPUS] __read_mostly = { - [0 ... NR_CPUS-1] = NUMA_NO_NODE -}; /* * Keep BIOS's CPU2node information, should not be used for memory allocaion */ nodeid_t apicid_to_node[MAX_LOCAL_APIC] = { [0 ... MAX_LOCAL_APIC-1] = NUMA_NO_NODE }; -cpumask_t node_to_cpumask[MAX_NUMNODES] __read_mostly; -nodemask_t __read_mostly node_online_map = { { [0] = 1UL } }; - -bool numa_off; s8 acpi_numa = 0; int __init arch_numa_setup(const char *opt) @@ -69,267 +45,6 @@ bool arch_numa_broken(void) return acpi_numa < 0; } -bool srat_disabled(void) -{ - return numa_off || arch_numa_broken(); -} - -/* - * Given a shift value, try to populate memnodemap[] - * Returns : - * 1 if OK - * 0 if memnodmap[] too small (of shift too small) - * -1 if node overlap or lost ram (shift too big) - */ -static int __init populate_memnodemap(const struct node *nodes, - int numnodes, int shift, nodeid_t *nodeids) -{ - unsigned long spdx, epdx; - int i, res = -1; - - memset(memnodemap, NUMA_NO_NODE, memnodemapsize * sizeof(*memnodemap)); - for ( i = 0; i < numnodes; i++ ) - { - spdx = paddr_to_pdx(nodes[i].start); - epdx = paddr_to_pdx(nodes[i].end - 1) + 1; - if ( spdx >= epdx ) - continue; - if ( (epdx >> shift) >= memnodemapsize ) - return 0; - do { - if ( memnodemap[spdx >> shift] != NUMA_NO_NODE ) - return -1; - - if ( !nodeids ) - memnodemap[spdx >> shift] = i; - else - memnodemap[spdx >> shift] = nodeids[i]; - - spdx += (1UL << shift); - } while ( spdx < epdx ); - res = 1; - } - - return res; -} - -static int __init allocate_cachealigned_memnodemap(void) -{ - unsigned long size = PFN_UP(memnodemapsize * sizeof(*memnodemap)); - unsigned long mfn = mfn_x(alloc_boot_pages(size, 1)); - - memnodemap = mfn_to_virt(mfn); - mfn <<= PAGE_SHIFT; - size <<= PAGE_SHIFT; - printk(KERN_DEBUG "NUMA: Allocated memnodemap from %lx - %lx\n", - mfn, mfn + size); - memnodemapsize = size / sizeof(*memnodemap); - - return 0; -} - -/* - * The LSB of all start and end addresses in the node map is the value of the - * maximum possible shift. - */ -static int __init extract_lsb_from_nodes(const struct node *nodes, - int numnodes) -{ - int i, nodes_used = 0; - unsigned long spdx, epdx; - unsigned long bitfield = 0, memtop = 0; - - for ( i = 0; i < numnodes; i++ ) - { - spdx = paddr_to_pdx(nodes[i].start); - epdx = paddr_to_pdx(nodes[i].end - 1) + 1; - if ( spdx >= epdx ) - continue; - bitfield |= spdx; - nodes_used++; - if ( epdx > memtop ) - memtop = epdx; - } - if ( nodes_used <= 1 ) - i = BITS_PER_LONG - 1; - else - i = find_first_bit(&bitfield, sizeof(unsigned long)*8); - memnodemapsize = (memtop >> i) + 1; - return i; -} - -int __init compute_hash_shift(struct node *nodes, int numnodes, - nodeid_t *nodeids) -{ - int shift; - - shift = extract_lsb_from_nodes(nodes, numnodes); - if ( memnodemapsize <= ARRAY_SIZE(_memnodemap) ) - memnodemap = _memnodemap; - else if ( allocate_cachealigned_memnodemap() ) - return -1; - printk(KERN_DEBUG "NUMA: Using %d for the hash shift.\n", shift); - - if ( populate_memnodemap(nodes, numnodes, shift, nodeids) != 1 ) - { - printk(KERN_INFO "Your memory is not aligned you need to " - "rebuild your hypervisor with a bigger NODEMAPSIZE " - "shift=%d\n", shift); - return -1; - } - - return shift; -} -/* initialize NODE_DATA given nodeid and start/end */ -void __init setup_node_bootmem(nodeid_t nodeid, paddr_t start, paddr_t end) -{ - unsigned long start_pfn = paddr_to_pfn(start); - unsigned long end_pfn = paddr_to_pfn(end); - - NODE_DATA(nodeid)->node_start_pfn = start_pfn; - NODE_DATA(nodeid)->node_spanned_pages = end_pfn - start_pfn; - - node_set_online(nodeid); -} - -void __init numa_init_array(void) -{ - int rr, i; - - /* There are unfortunately some poorly designed mainboards around - that only connect memory to a single CPU. This breaks the 1:1 cpu->node - mapping. To avoid this fill in the mapping for all possible - CPUs, as the number of CPUs is not known yet. - We round robin the existing nodes. */ - rr = first_node(node_online_map); - for ( i = 0; i < nr_cpu_ids; i++ ) - { - if ( cpu_to_node[i] != NUMA_NO_NODE ) - continue; - numa_set_node(i, rr); - rr = cycle_node(rr, node_online_map); - } -} - -#ifdef CONFIG_NUMA_EMU -static int numa_fake __initdata = 0; - -/* Numa emulation */ -static int __init numa_emulation(unsigned long start_pfn, - unsigned long end_pfn) -{ - int i; - struct node nodes[MAX_NUMNODES]; - uint64_t sz = pfn_to_paddr(end_pfn - start_pfn) / numa_fake; - - /* Kludge needed for the hash function */ - if ( hweight64(sz) > 1 ) - { - u64 x = 1; - while ( (x << 1) < sz ) - x <<= 1; - if ( x < sz/2 ) - printk(KERN_ERR "Numa emulation unbalanced. Complain to maintainer\n"); - sz = x; - } - - memset(&nodes,0,sizeof(nodes)); - for ( i = 0; i < numa_fake; i++ ) - { - nodes[i].start = pfn_to_paddr(start_pfn) + i * sz; - if ( i == numa_fake - 1 ) - sz = pfn_to_paddr(end_pfn) - nodes[i].start; - nodes[i].end = nodes[i].start + sz; - printk(KERN_INFO "Faking node %d at %"PRIx64"-%"PRIx64" (%"PRIu64"MB)\n", - i, - nodes[i].start, nodes[i].end, - (nodes[i].end - nodes[i].start) >> 20); - node_set_online(i); - } - memnode_shift = compute_hash_shift(nodes, numa_fake, NULL); - if ( memnode_shift < 0 ) - { - memnode_shift = 0; - printk(KERN_ERR "No NUMA hash function found. Emulation disabled.\n"); - return -1; - } - for_each_online_node ( i ) - setup_node_bootmem(i, nodes[i].start, nodes[i].end); - numa_init_array(); - - return 0; -} -#endif - -void __init numa_initmem_init(unsigned long start_pfn, unsigned long end_pfn) -{ - int i; - paddr_t start = pfn_to_paddr(start_pfn); - paddr_t end = pfn_to_paddr(end_pfn); - -#ifdef CONFIG_NUMA_EMU - if ( numa_fake && !numa_emulation(start_pfn, end_pfn) ) - return; -#endif - -#ifdef CONFIG_ACPI_NUMA - if ( !numa_off && !acpi_scan_nodes(start, end) ) - return; -#endif - - printk(KERN_INFO "%s\n", - numa_off ? "NUMA turned off" : "No NUMA configuration found"); - - printk(KERN_INFO "Faking a node at %"PRIpaddr"-%"PRIpaddr"\n", - start, end); - /* setup dummy node covering all memory */ - memnode_shift = BITS_PER_LONG - 1; - memnodemap = _memnodemap; - /* Dummy node only uses 1 slot in reality */ - memnodemap[0] = 0; - memnodemapsize = 1; - - nodes_clear(node_online_map); - node_set_online(0); - for ( i = 0; i < nr_cpu_ids; i++ ) - numa_set_node(i, 0); - cpumask_copy(&node_to_cpumask[0], cpumask_of(0)); - setup_node_bootmem(0, start, end); -} - -void numa_add_cpu(int cpu) -{ - cpumask_set_cpu(cpu, &node_to_cpumask[cpu_to_node(cpu)]); -} - -void numa_set_node(int cpu, nodeid_t node) -{ - cpu_to_node[cpu] = node; -} - -/* [numa=off] */ -static int __init cf_check numa_setup(const char *opt) -{ - if ( !strncmp(opt, "off", 3) ) - numa_off = true; - else if ( !strncmp(opt, "on", 2) ) - numa_off = false; -#ifdef CONFIG_NUMA_EMU - else if ( !strncmp(opt, "fake=", 5) ) - { - numa_off = false; - numa_fake = simple_strtoul(opt + 5, NULL, 0); - if ( numa_fake >= MAX_NUMNODES ) - numa_fake = MAX_NUMNODES; - } -#endif - else - return arch_numa_setup(opt); - - return 0; -} -custom_param("numa", numa_setup); - /* * Setup early cpu_to_node. * @@ -378,146 +93,3 @@ unsigned int __init arch_get_dma_bitsize(void) flsl(node_start_pfn(node) + node_spanned_pages(node) / 4 - 1) + PAGE_SHIFT, 32); } - -static void cf_check dump_numa(unsigned char key) -{ - s_time_t now = NOW(); - unsigned int i, j, n; - struct domain *d; - struct page_info *page; - unsigned int page_num_node[MAX_NUMNODES]; - const struct vnuma_info *vnuma; - - printk("'%c' pressed -> dumping numa info (now = %"PRI_stime")\n", key, - now); - - for_each_online_node ( i ) - { - paddr_t pa = pfn_to_paddr(node_start_pfn(i) + 1); - - printk("NODE%u start->%lu size->%lu free->%lu\n", - i, node_start_pfn(i), node_spanned_pages(i), - avail_node_heap_pages(i)); - /* sanity check phys_to_nid() */ - if ( phys_to_nid(pa) != i ) - printk("phys_to_nid(%"PRIpaddr") -> %d should be %u\n", - pa, phys_to_nid(pa), i); - } - - j = cpumask_first(&cpu_online_map); - n = 0; - for_each_online_cpu ( i ) - { - if ( i != j + n || cpu_to_node[j] != cpu_to_node[i] ) - { - if ( n > 1 ) - printk("CPU%u...%u -> NODE%d\n", j, j + n - 1, cpu_to_node[j]); - else - printk("CPU%u -> NODE%d\n", j, cpu_to_node[j]); - j = i; - n = 1; - } - else - ++n; - } - if ( n > 1 ) - printk("CPU%u...%u -> NODE%d\n", j, j + n - 1, cpu_to_node[j]); - else - printk("CPU%u -> NODE%d\n", j, cpu_to_node[j]); - - rcu_read_lock(&domlist_read_lock); - - printk("Memory location of each domain:\n"); - for_each_domain ( d ) - { - process_pending_softirqs(); - - printk("Domain %u (total: %u):\n", d->domain_id, domain_tot_pages(d)); - - for_each_online_node ( i ) - page_num_node[i] = 0; - - spin_lock(&d->page_alloc_lock); - page_list_for_each(page, &d->page_list) - { - i = phys_to_nid(page_to_maddr(page)); - page_num_node[i]++; - } - spin_unlock(&d->page_alloc_lock); - - for_each_online_node ( i ) - printk(" Node %u: %u\n", i, page_num_node[i]); - - if ( !read_trylock(&d->vnuma_rwlock) ) - continue; - - if ( !d->vnuma ) - { - read_unlock(&d->vnuma_rwlock); - continue; - } - - vnuma = d->vnuma; - printk(" %u vnodes, %u vcpus, guest physical layout:\n", - vnuma->nr_vnodes, d->max_vcpus); - for ( i = 0; i < vnuma->nr_vnodes; i++ ) - { - unsigned int start_cpu = ~0U; - - if ( vnuma->vnode_to_pnode[i] == NUMA_NO_NODE ) - printk(" %3u: pnode ???,", i); - else - printk(" %3u: pnode %3u,", i, vnuma->vnode_to_pnode[i]); - - printk(" vcpus "); - - for ( j = 0; j < d->max_vcpus; j++ ) - { - if ( !(j & 0x3f) ) - process_pending_softirqs(); - - if ( vnuma->vcpu_to_vnode[j] == i ) - { - if ( start_cpu == ~0U ) - { - printk("%d", j); - start_cpu = j; - } - } - else if ( start_cpu != ~0U ) - { - if ( j - 1 != start_cpu ) - printk("-%d ", j - 1); - else - printk(" "); - start_cpu = ~0U; - } - } - - if ( start_cpu != ~0U && start_cpu != j - 1 ) - printk("-%d", j - 1); - - printk("\n"); - - for ( j = 0; j < vnuma->nr_vmemranges; j++ ) - { - if ( vnuma->vmemrange[j].nid == i ) - printk(" %016"PRIx64" - %016"PRIx64"\n", - vnuma->vmemrange[j].start, - vnuma->vmemrange[j].end); - } - } - - read_unlock(&d->vnuma_rwlock); - } - - rcu_read_unlock(&domlist_read_lock); -} - -static int __init cf_check register_numa_trigger(void) -{ - register_keyhandler('u', dump_numa, "dump NUMA info", 1); - return 0; -} -__initcall(register_numa_trigger); - diff --git a/xen/arch/x86/smpboot.c b/xen/arch/x86/smpboot.c index b46fd9ab18..9df08e9366 100644 --- a/xen/arch/x86/smpboot.c +++ b/xen/arch/x86/smpboot.c @@ -1350,7 +1350,7 @@ int cpu_add(uint32_t apic_id, uint32_t acpi_id, uint32_t pxm) x86_acpiid_to_apicid[acpi_id] = apic_id; - if ( !srat_disabled() ) + if ( !numa_disabled() ) { nodeid_t node = setup_node(pxm); diff --git a/xen/arch/x86/srat.c b/xen/arch/x86/srat.c index b62a152911..0d4f7cccb9 100644 --- a/xen/arch/x86/srat.c +++ b/xen/arch/x86/srat.c @@ -238,7 +238,7 @@ acpi_numa_x2apic_affinity_init(const struct acpi_srat_x2apic_cpu_affinity *pa) unsigned pxm; nodeid_t node; - if (srat_disabled()) + if (numa_disabled()) return; if (pa->header.length < sizeof(struct acpi_srat_x2apic_cpu_affinity)) { bad_srat(); @@ -274,7 +274,7 @@ acpi_numa_processor_affinity_init(const struct acpi_srat_cpu_affinity *pa) unsigned pxm; nodeid_t node; - if (srat_disabled()) + if (numa_disabled()) return; if (pa->header.length != sizeof(struct acpi_srat_cpu_affinity)) { bad_srat(); @@ -313,7 +313,7 @@ acpi_numa_memory_affinity_init(const struct acpi_srat_mem_affinity *ma) nodeid_t node; unsigned int i; - if (srat_disabled()) + if (numa_disabled()) return; if (ma->header.length != sizeof(struct acpi_srat_mem_affinity)) { bad_srat(); @@ -519,8 +519,8 @@ void __init srat_parse_regions(paddr_t addr) pfn_pdx_hole_setup(mask >> PAGE_SHIFT); } -/* Use the information discovered above to actually set up the nodes. */ -int __init acpi_scan_nodes(paddr_t start, paddr_t end) +/* Use discovered information to actually set up the nodes. */ +int __init numa_process_nodes(paddr_t start, paddr_t end) { int i; nodemask_t all_nodes_parsed; diff --git a/xen/common/Makefile b/xen/common/Makefile index 3baf83d527..9a3a12b12d 100644 --- a/xen/common/Makefile +++ b/xen/common/Makefile @@ -26,6 +26,7 @@ obj-$(CONFIG_MEM_ACCESS) += mem_access.o obj-y += memory.o obj-y += multicall.o obj-y += notifier.o +obj-$(CONFIG_NUMA) += numa.o obj-y += page_alloc.o obj-$(CONFIG_HAS_PDX) += pdx.o obj-$(CONFIG_PERF_COUNTERS) += perfc.o diff --git a/xen/common/numa.c b/xen/common/numa.c new file mode 100644 index 0000000000..83f4c8cc94 --- /dev/null +++ b/xen/common/numa.c @@ -0,0 +1,460 @@ +/* + * Generic VM initialization for NUMA setups. + * Copyright 2002,2003 Andi Kleen, SuSE Labs. + * Adapted for Xen: Ryan Harper + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +struct node_data __ro_after_init node_data[MAX_NUMNODES]; + +/* Mapping from pdx to node id */ +unsigned int __ro_after_init memnode_shift; +unsigned long __ro_after_init memnodemapsize; +nodeid_t *__ro_after_init memnodemap; +static typeof(*memnodemap) __ro_after_init _memnodemap[64]; + +nodeid_t __read_mostly cpu_to_node[NR_CPUS] = { + [0 ... NR_CPUS-1] = NUMA_NO_NODE +}; + +cpumask_t __read_mostly node_to_cpumask[MAX_NUMNODES]; + +nodemask_t __read_mostly node_online_map = { { [0] = 1UL } }; + +bool __ro_after_init numa_off; + +bool numa_disabled(void) +{ + return numa_off || arch_numa_broken(); +} + +/* + * Given a shift value, try to populate memnodemap[] + * Returns : + * 1 if OK + * 0 if memnodmap[] too small (of shift too small) + * -1 if node overlap or lost ram (shift too big) + */ +static int __init populate_memnodemap(const struct node *nodes, + unsigned int numnodes, unsigned int shift, + const nodeid_t *nodeids) +{ + unsigned long spdx, epdx; + unsigned int i; + int res = -1; + + memset(memnodemap, NUMA_NO_NODE, memnodemapsize * sizeof(*memnodemap)); + + for ( i = 0; i < numnodes; i++ ) + { + spdx = paddr_to_pdx(nodes[i].start); + epdx = paddr_to_pdx(nodes[i].end - 1) + 1; + + if ( spdx >= epdx ) + continue; + + if ( (epdx >> shift) >= memnodemapsize ) + return 0; + + do { + if ( memnodemap[spdx >> shift] != NUMA_NO_NODE ) + return -1; + + if ( !nodeids ) + memnodemap[spdx >> shift] = i; + else + memnodemap[spdx >> shift] = nodeids[i]; + + spdx += (1UL << shift); + } while ( spdx < epdx ); + + res = 1; + } + + return res; +} + +static int __init allocate_cachealigned_memnodemap(void) +{ + unsigned long size = PFN_UP(memnodemapsize * sizeof(*memnodemap)); + unsigned long mfn = mfn_x(alloc_boot_pages(size, 1)); + + memnodemap = mfn_to_virt(mfn); + mfn <<= PAGE_SHIFT; + size <<= PAGE_SHIFT; + printk(KERN_DEBUG "NUMA: Allocated memnodemap from %lx - %lx\n", + mfn, mfn + size); + memnodemapsize = size / sizeof(*memnodemap); + + return 0; +} + +/* + * The LSB of all start and end addresses in the node map is the value of the + * maximum possible shift. + */ +static unsigned int __init extract_lsb_from_nodes(const struct node *nodes, + nodeid_t numnodes) +{ + unsigned int i, nodes_used = 0; + unsigned long spdx, epdx; + unsigned long bitfield = 0, memtop = 0; + + for ( i = 0; i < numnodes; i++ ) + { + spdx = paddr_to_pdx(nodes[i].start); + epdx = paddr_to_pdx(nodes[i].end - 1) + 1; + + if ( spdx >= epdx ) + continue; + + bitfield |= spdx; + nodes_used++; + if ( epdx > memtop ) + memtop = epdx; + } + + if ( nodes_used <= 1 ) + i = BITS_PER_LONG - 1; + else + i = find_first_bit(&bitfield, sizeof(unsigned long) * 8); + + memnodemapsize = (memtop >> i) + 1; + + return i; +} + +int __init compute_hash_shift(const struct node *nodes, + unsigned int numnodes, const nodeid_t *nodeids) +{ + unsigned int shift = extract_lsb_from_nodes(nodes, numnodes); + + if ( memnodemapsize <= ARRAY_SIZE(_memnodemap) ) + memnodemap = _memnodemap; + else if ( allocate_cachealigned_memnodemap() ) + return -1; + + printk(KERN_DEBUG "NUMA: Using %u for the hash shift\n", shift); + + if ( populate_memnodemap(nodes, numnodes, shift, nodeids) != 1 ) + { + printk(KERN_INFO "Your memory is not aligned you need to " + "rebuild your hypervisor with a bigger NODEMAPSIZE " + "shift=%u\n", shift); + return -1; + } + + return shift; +} + +/* Initialize NODE_DATA given nodeid and start/end */ +void __init setup_node_bootmem(nodeid_t nodeid, paddr_t start, paddr_t end) +{ + unsigned long start_pfn = paddr_to_pfn(start); + unsigned long end_pfn = paddr_to_pfn(end); + + NODE_DATA(nodeid)->node_start_pfn = start_pfn; + NODE_DATA(nodeid)->node_spanned_pages = end_pfn - start_pfn; + + node_set_online(nodeid); +} + +void __init numa_init_array(void) +{ + unsigned int i; + nodeid_t rr; + + /* + * There are unfortunately some poorly designed mainboards + * around that only connect memory to a single CPU. This + * breaks the 1:1 cpu->node mapping. To avoid this fill in + * the mapping for all possible CPUs, as the number of CPUs + * is not known yet. We round robin the existing nodes. + */ + rr = first_node(node_online_map); + for ( i = 0; i < nr_cpu_ids; i++ ) + { + if ( cpu_to_node[i] != NUMA_NO_NODE ) + continue; + numa_set_node(i, rr); + rr = cycle_node(rr, node_online_map); + } +} + +#ifdef CONFIG_NUMA_EMU +static unsigned int __initdata numa_fake; + +/* Numa emulation */ +static int __init numa_emulation(unsigned long start_pfn, + unsigned long end_pfn) +{ + int ret; + unsigned int i; + struct node nodes[MAX_NUMNODES]; + uint64_t sz = pfn_to_paddr(end_pfn - start_pfn) / numa_fake; + + /* Kludge needed for the hash function */ + if ( hweight64(sz) > 1 ) + { + uint64_t x = 1; + + while ( (x << 1) < sz ) + x <<= 1; + if ( x < sz / 2 ) + printk(KERN_ERR "Numa emulation unbalanced. Complain to maintainer\n"); + sz = x; + } + + memset(&nodes, 0, sizeof(nodes)); + for ( i = 0; i < numa_fake; i++ ) + { + nodes[i].start = pfn_to_paddr(start_pfn) + i * sz; + + if ( i == numa_fake - 1 ) + sz = pfn_to_paddr(end_pfn) - nodes[i].start; + + nodes[i].end = nodes[i].start + sz; + printk(KERN_INFO "Faking node %u at %"PRIx64"-%"PRIx64" (%"PRIu64"MB)\n", + i, nodes[i].start, nodes[i].end, + (nodes[i].end - nodes[i].start) >> 20); + node_set_online(i); + } + + ret = compute_hash_shift(nodes, numa_fake, NULL); + if ( ret < 0 ) + { + printk(KERN_ERR "No NUMA hash function found. Emulation disabled.\n"); + return -1; + } + memnode_shift = ret; + + for_each_online_node ( i ) + setup_node_bootmem(i, nodes[i].start, nodes[i].end); + + numa_init_array(); + + return 0; +} +#endif + +void __init numa_initmem_init(unsigned long start_pfn, unsigned long end_pfn) +{ + unsigned int i; + paddr_t start = pfn_to_paddr(start_pfn); + paddr_t end = pfn_to_paddr(end_pfn); + +#ifdef CONFIG_NUMA_EMU + if ( numa_fake && !numa_emulation(start_pfn, end_pfn) ) + return; +#endif + +#ifdef CONFIG_NUMA + if ( !numa_off && !numa_process_nodes(start, end) ) + return; +#endif + + printk(KERN_INFO "%s\n", + numa_off ? "NUMA turned off" : "No NUMA configuration found"); + + printk(KERN_INFO "Faking a node at %"PRIpaddr"-%"PRIpaddr"\n", + start, end); + + /* Setup dummy node covering all memory */ + memnode_shift = BITS_PER_LONG - 1; + memnodemap = _memnodemap; + + /* Dummy node only uses 1 slot in reality */ + memnodemap[0] = 0; + memnodemapsize = 1; + + nodes_clear(node_online_map); + node_set_online(0); + for ( i = 0; i < nr_cpu_ids; i++ ) + numa_set_node(i, 0); + + cpumask_copy(&node_to_cpumask[0], cpumask_of(0)); + setup_node_bootmem(0, start, end); +} + +void numa_add_cpu(unsigned int cpu) +{ + cpumask_set_cpu(cpu, &node_to_cpumask[cpu_to_node(cpu)]); +} + +void numa_set_node(unsigned int cpu, nodeid_t node) +{ + cpu_to_node[cpu] = node; +} + +/* [numa=off] */ +static int __init cf_check numa_setup(const char *opt) +{ + if ( !strncmp(opt, "off", 3) ) + numa_off = true; + else if ( !strncmp(opt, "on", 2) ) + numa_off = false; +#ifdef CONFIG_NUMA_EMU + else if ( !strncmp(opt, "fake=", 5) ) + { + numa_off = false; + numa_fake = simple_strtoul(opt + 5, NULL, 0); + if ( numa_fake >= MAX_NUMNODES ) + numa_fake = MAX_NUMNODES; + } +#endif + else + return arch_numa_setup(opt); + + return 0; +} +custom_param("numa", numa_setup); + +static void cf_check dump_numa(unsigned char key) +{ + s_time_t now = NOW(); + unsigned int i, j, n; + struct domain *d; + const struct page_info *page; + unsigned int page_num_node[MAX_NUMNODES]; + const struct vnuma_info *vnuma; + + printk("'%c' pressed -> dumping numa info (now = %"PRI_stime")\n", key, + now); + + for_each_online_node ( i ) + { + paddr_t pa = pfn_to_paddr(node_start_pfn(i) + 1); + + printk("NODE%u start->%lu size->%lu free->%lu\n", + i, node_start_pfn(i), node_spanned_pages(i), + avail_node_heap_pages(i)); + /* Sanity check phys_to_nid() */ + if ( phys_to_nid(pa) != i ) + printk("phys_to_nid(%"PRIpaddr") -> %d should be %u\n", + pa, phys_to_nid(pa), i); + } + + j = cpumask_first(&cpu_online_map); + n = 0; + for_each_online_cpu ( i ) + { + if ( i != j + n || cpu_to_node[j] != cpu_to_node[i] ) + { + if ( n > 1 ) + printk("CPU%u...%u -> NODE%d\n", j, j + n - 1, cpu_to_node[j]); + else + printk("CPU%u -> NODE%d\n", j, cpu_to_node[j]); + j = i; + n = 1; + } + else + ++n; + } + if ( n > 1 ) + printk("CPU%u...%u -> NODE%d\n", j, j + n - 1, cpu_to_node[j]); + else + printk("CPU%u -> NODE%d\n", j, cpu_to_node[j]); + + rcu_read_lock(&domlist_read_lock); + + printk("Memory location of each domain:\n"); + for_each_domain ( d ) + { + process_pending_softirqs(); + + printk("Domain %u (total: %u):\n", d->domain_id, domain_tot_pages(d)); + + for_each_online_node ( i ) + page_num_node[i] = 0; + + spin_lock(&d->page_alloc_lock); + page_list_for_each ( page, &d->page_list ) + { + i = phys_to_nid(page_to_maddr(page)); + page_num_node[i]++; + } + spin_unlock(&d->page_alloc_lock); + + for_each_online_node ( i ) + printk(" Node %u: %u\n", i, page_num_node[i]); + + if ( !read_trylock(&d->vnuma_rwlock) ) + continue; + + if ( !d->vnuma ) + { + read_unlock(&d->vnuma_rwlock); + continue; + } + + vnuma = d->vnuma; + printk(" %u vnodes, %u vcpus, guest physical layout:\n", + vnuma->nr_vnodes, d->max_vcpus); + for ( i = 0; i < vnuma->nr_vnodes; i++ ) + { + unsigned int start_cpu = ~0U; + + if ( vnuma->vnode_to_pnode[i] == NUMA_NO_NODE ) + printk(" %3u: pnode ???,", i); + else + printk(" %3u: pnode %3u,", i, vnuma->vnode_to_pnode[i]); + + printk(" vcpus "); + + for ( j = 0; j < d->max_vcpus; j++ ) + { + if ( !(j & 0x3f) ) + process_pending_softirqs(); + + if ( vnuma->vcpu_to_vnode[j] == i ) + { + if ( start_cpu == ~0U ) + { + printk("%d", j); + start_cpu = j; + } + } + else if ( start_cpu != ~0U ) + { + if ( j - 1 != start_cpu ) + printk("-%d ", j - 1); + else + printk(" "); + start_cpu = ~0U; + } + } + + if ( start_cpu != ~0U && start_cpu != j - 1 ) + printk("-%d", j - 1); + + printk("\n"); + + for ( j = 0; j < vnuma->nr_vmemranges; j++ ) + { + if ( vnuma->vmemrange[j].nid == i ) + printk(" %016"PRIx64" - %016"PRIx64"\n", + vnuma->vmemrange[j].start, + vnuma->vmemrange[j].end); + } + } + + read_unlock(&d->vnuma_rwlock); + } + + rcu_read_unlock(&domlist_read_lock); +} + +static int __init cf_check register_numa_trigger(void) +{ + register_keyhandler('u', dump_numa, "dump NUMA info", 1); + return 0; +} +__initcall(register_numa_trigger); diff --git a/xen/include/xen/numa.h b/xen/include/xen/numa.h index 7aef1a88dc..d799078a7a 100644 --- a/xen/include/xen/numa.h +++ b/xen/include/xen/numa.h @@ -18,4 +18,71 @@ (((d)->vcpu != NULL && (d)->vcpu[0] != NULL) \ ? vcpu_to_node((d)->vcpu[0]) : NUMA_NO_NODE) +/* The following content can be used when NUMA feature is enabled */ +#ifdef CONFIG_NUMA + +extern nodeid_t cpu_to_node[NR_CPUS]; +extern cpumask_t node_to_cpumask[]; + +#define cpu_to_node(cpu) cpu_to_node[cpu] +#define parent_node(node) (node) +#define node_to_first_cpu(node) __ffs(node_to_cpumask[node]) +#define node_to_cpumask(node) node_to_cpumask[node] + +struct node { + paddr_t start, end; +}; + +extern int compute_hash_shift(const struct node *nodes, + unsigned int numnodes, const nodeid_t *nodeids); + +#define VIRTUAL_BUG_ON(x) + +extern bool numa_off; + +extern void numa_add_cpu(unsigned int cpu); +extern void numa_init_array(void); +extern void numa_set_node(unsigned int cpu, nodeid_t node); +extern void numa_initmem_init(unsigned long start_pfn, unsigned long end_pfn); +extern int numa_process_nodes(paddr_t start, paddr_t end); + +extern int arch_numa_setup(const char *opt); +extern bool arch_numa_broken(void); +extern void setup_node_bootmem(nodeid_t nodeid, paddr_t start, paddr_t end); + +static inline void clear_node_cpumask(unsigned int cpu) +{ + cpumask_clear_cpu(cpu, &node_to_cpumask[cpu_to_node(cpu)]); +} + +/* Simple perfect hash to map pdx to node numbers */ +extern unsigned int memnode_shift; +extern unsigned long memnodemapsize; +extern uint8_t *memnodemap; + +struct node_data { + unsigned long node_start_pfn; + unsigned long node_spanned_pages; +}; + +extern struct node_data node_data[]; + +static inline nodeid_t __attribute_pure__ phys_to_nid(paddr_t addr) +{ + nodeid_t nid; + VIRTUAL_BUG_ON((paddr_to_pdx(addr) >> memnode_shift) >= memnodemapsize); + nid = memnodemap[paddr_to_pdx(addr) >> memnode_shift]; + VIRTUAL_BUG_ON(nid >= MAX_NUMNODES || !node_data[nid]); + return nid; +} + +#define NODE_DATA(nid) (&node_data[nid]) + +#define node_start_pfn(nid) (NODE_DATA(nid)->node_start_pfn) +#define node_spanned_pages(nid) (NODE_DATA(nid)->node_spanned_pages) +#define node_end_pfn(nid) (NODE_DATA(nid)->node_start_pfn + \ + NODE_DATA(nid)->node_spanned_pages) + +#endif + #endif /* _XEN_NUMA_H */ From patchwork Tue Sep 20 09:12:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wei Chen X-Patchwork-Id: 12981735 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DBFF0C54EE9 for ; Tue, 20 Sep 2022 09:17:05 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.409299.652292 (Exim 4.92) (envelope-from ) id 1oaZNB-0007yD-Dd; Tue, 20 Sep 2022 09:16:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 409299.652292; Tue, 20 Sep 2022 09:16:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1oaZNB-0007y6-AQ; Tue, 20 Sep 2022 09:16:57 +0000 Received: by outflank-mailman (input) for mailman id 409299; Tue, 20 Sep 2022 09:16:56 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1oaZNA-0007y0-8j for xen-devel@lists.xenproject.org; Tue, 20 Sep 2022 09:16:56 +0000 Received: from EUR03-AM7-obe.outbound.protection.outlook.com (mail-am7eur03on2069.outbound.protection.outlook.com [40.107.105.69]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id f83c3283-38c4-11ed-9647-05401a9f4f97; Tue, 20 Sep 2022 11:16:55 +0200 (CEST) Received: from AM6P195CA0017.EURP195.PROD.OUTLOOK.COM (2603:10a6:209:81::30) by DBAPR08MB5624.eurprd08.prod.outlook.com (2603:10a6:10:1a8::10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5632.21; Tue, 20 Sep 2022 09:16:53 +0000 Received: from AM7EUR03FT064.eop-EUR03.prod.protection.outlook.com (2603:10a6:209:81:cafe::a4) by AM6P195CA0017.outlook.office365.com (2603:10a6:209:81::30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5632.12 via Frontend Transport; Tue, 20 Sep 2022 09:16:52 +0000 Received: from 64aa7808-outbound-1.mta.getcheckrecipient.com (63.35.35.123) by AM7EUR03FT064.mail.protection.outlook.com (100.127.140.127) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5632.12 via Frontend Transport; Tue, 20 Sep 2022 09:16:52 +0000 Received: ("Tessian outbound fc2405f9ecaf:v124"); Tue, 20 Sep 2022 09:16:52 +0000 Received: from 3d823101a763.1 by 64aa7808-outbound-1.mta.getcheckrecipient.com id 795B08DD-2084-45BB-BA64-C40C6B644DC0.1; Tue, 20 Sep 2022 09:12:52 +0000 Received: from EUR01-HE1-obe.outbound.protection.outlook.com by 64aa7808-outbound-1.mta.getcheckrecipient.com with ESMTPS id 3d823101a763.1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384); Tue, 20 Sep 2022 09:12:52 +0000 Received: from AS9PR06CA0707.eurprd06.prod.outlook.com (2603:10a6:20b:49f::27) by AM9PR08MB6690.eurprd08.prod.outlook.com (2603:10a6:20b:301::15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5654.14; Tue, 20 Sep 2022 09:12:42 +0000 Received: from VE1EUR03FT042.eop-EUR03.prod.protection.outlook.com (2603:10a6:20b:49f:cafe::90) by AS9PR06CA0707.outlook.office365.com (2603:10a6:20b:49f::27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5632.21 via Frontend Transport; Tue, 20 Sep 2022 09:12:42 +0000 Received: from nebula.arm.com (40.67.248.234) by VE1EUR03FT042.mail.protection.outlook.com (10.152.19.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.5632.12 via Frontend Transport; Tue, 20 Sep 2022 09:12:42 +0000 Received: from AZ-NEU-EX04.Arm.com (10.251.24.32) by AZ-NEU-EX04.Arm.com (10.251.24.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.9; Tue, 20 Sep 2022 09:12:40 +0000 Received: from ais-wip-ds.shanghai.arm.com (10.169.190.86) by mail.arm.com (10.251.24.32) with Microsoft SMTP Server id 15.1.2507.9 via Frontend Transport; Tue, 20 Sep 2022 09:12:37 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: f83c3283-38c4-11ed-9647-05401a9f4f97 ARC-Seal: i=2; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=pass; b=BWDAU5TPAaLR9ckzUs8/2uEfcEVyzKNColu2wBP12zM5WsQ1PyeVCnG2hap671iAttrDlLnjlT8Uo2gN74M6pfpni+pn/Mg79G9xzfJkbHbGhD5tMz1C1VIbqixL7VWAHQE3pQ1/WOa3AMWdGjO4C1L43BEK+fWGlNe5pDFzkl4Gg9zrXRhHfUsWWTvV9iARSnJT3VrhSA76ueL05DvL4G2wL6dyrl128G/xuSGTOVgN3Gg64n3359X6IrQUliCnr7Z/tLZ1318ErfPUa0+b6PyV5x9MnOfWqoq3JV5NoOjus1pH8ubPSuGpBFuv6lkxVFkzvjyiyA9FiB/te0xccg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=6DaMcTmBvEOAxWIqm3dcdE2xbuzXaoqO5YyicuQ8bxo=; b=lVhhatIQ1pS/vlGAiqGqjXwc0W2LuR21yV6T1VuEyAaAcOd9UKx57x7NPiwM5w2rHYe+IsC17EsZzDf0877SIFwlzj2xIHvobFZP5u3MNkaa6uqusPhG0Sw0fNYfURHzCBpg8rYynCLqRxm7ZjPaQeVSaMmE1LkCaMddOk53Sn3uUD4OHuY34TfdKA/vwb1WGA8MDVjHHSmNS2kGhOGCZmKHNcDs1UrKzSaSkg2XmJ8ChbCVPm56ZVVKcxT4/TyNCLmCFq8la8tJLPnnx0uFas3y+rrTMlgrf6u7Lj3yze3o/vDV7af3g14P8mP35eD2woUpn77cvh9oKH9/Pi5gYg== ARC-Authentication-Results: i=2; mx.microsoft.com 1; spf=pass (sender ip is 63.35.35.123) smtp.rcpttodomain=lists.xenproject.org smtp.mailfrom=arm.com; dmarc=pass (p=none sp=none pct=100) action=none header.from=arm.com; dkim=pass (signature was verified) header.d=armh.onmicrosoft.com; arc=pass (0 oda=1 ltdi=1 spf=[1,1,smtp.mailfrom=arm.com] dmarc=[1,1,header.from=arm.com]) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=6DaMcTmBvEOAxWIqm3dcdE2xbuzXaoqO5YyicuQ8bxo=; b=RgM9cX+dC++EhRTik8CCsp8kT5sR6iFlOPjuHz7b5htyA8YGV0ejelljonRflGqwk5g8cXQXk34zV35Ps4F89ZP6pt5N4lX/UX6Bf4aHWDfnk8VzSsRGHcqnjaaPd5VY4x033PP6uLUL55Vc64DygZxhP0o0Qj3rj5fOnxRCY60= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 63.35.35.123) smtp.mailfrom=arm.com; dkim=pass (signature was verified) header.d=armh.onmicrosoft.com;dmarc=pass action=none header.from=arm.com; Received-SPF: Pass (protection.outlook.com: domain of arm.com designates 63.35.35.123 as permitted sender) receiver=protection.outlook.com; client-ip=63.35.35.123; helo=64aa7808-outbound-1.mta.getcheckrecipient.com; pr=C X-CheckRecipientChecked: true X-CR-MTA-CID: 43dca8f344d9e2cc X-CR-MTA-TID: 64aa7808 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=U+PXDO/VoelDCejfWvdYh4TLXYHsd499FQPMA5h/kJ/blJQVRgEOxw4vyzM+mSyFLc0cYKUFXwoiIKx1Yd2VTpM/Pf8LdtnAkFTSKCo2GYm2dbqswCr5nHZVi66zYLLU1ZQMnjNeBHPiHgpb4J0WGSPBCcce/O0DVUiB1J3iUM7jOmk6H26neCNGkERZHjOmLJpgRKw42ms6vqUz8vsjUqMcuQibgbCPuB6zgBacy5++SWR7VUKr6hjDmWZWxglqcuBTTPITHwal8KscV3Ds6oekcj69kFr9TN0Pe48ZDrRKAIUtwQeE4shovT6gw+uS4fCJv87vIPGwd9SaKhhJjg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=6DaMcTmBvEOAxWIqm3dcdE2xbuzXaoqO5YyicuQ8bxo=; b=mcC8ZpByX19NgcnV/wUJjo/QbODtUleRpVdAvJX12RjQeO912gxB0takxSER9K3AlCuPFevdIK3anKnszsxgvHNm1aQ4gGEusyf0iwFplEB0W+9xmovxfyiBH6RGOdJfGBBmg+GPkzjNz9aT9u4x57UhQIkl/rg3uQkTbvmfHQErWCL78LVvx7WlRh4ncnF06QmDo3dACYYwP2b8R3zI825Dceqh67fHfJv+68giTDtiSuoMs9YPVBHCUoTyj0G+hEDHE0GzlCNATayzhHC2ah5NNvqjMNxcIRZs7X1hfrF1gsyaA/cQdizdaYse/ii2cGr+n/F3Qklzs8p8uWZb2A== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 40.67.248.234) smtp.rcpttodomain=lists.xenproject.org smtp.mailfrom=arm.com; dmarc=pass (p=none sp=none pct=100) action=none header.from=arm.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=6DaMcTmBvEOAxWIqm3dcdE2xbuzXaoqO5YyicuQ8bxo=; b=RgM9cX+dC++EhRTik8CCsp8kT5sR6iFlOPjuHz7b5htyA8YGV0ejelljonRflGqwk5g8cXQXk34zV35Ps4F89ZP6pt5N4lX/UX6Bf4aHWDfnk8VzSsRGHcqnjaaPd5VY4x033PP6uLUL55Vc64DygZxhP0o0Qj3rj5fOnxRCY60= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 40.67.248.234) smtp.mailfrom=arm.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=arm.com; Received-SPF: Pass (protection.outlook.com: domain of arm.com designates 40.67.248.234 as permitted sender) receiver=protection.outlook.com; client-ip=40.67.248.234; helo=nebula.arm.com; pr=C From: Wei Chen To: CC: , Wei Chen , Andrew Cooper , George Dunlap , "Jan Beulich" , Julien Grall , "Stefano Stabellini" , Wei Liu , Jiamei Xie Subject: [PATCH v5 3/6] xen/x86: Use ASSERT instead of VIRTUAL_BUG_ON for phys_to_nid Date: Tue, 20 Sep 2022 17:12:15 +0800 Message-ID: <20220920091218.1208658-4-wei.chen@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220920091218.1208658-1-wei.chen@arm.com> References: <20220920091218.1208658-1-wei.chen@arm.com> MIME-Version: 1.0 X-EOPAttributedMessage: 1 X-MS-TrafficTypeDiagnostic: VE1EUR03FT042:EE_|AM9PR08MB6690:EE_|AM7EUR03FT064:EE_|DBAPR08MB5624:EE_ X-MS-Office365-Filtering-Correlation-Id: 0250bd80-b067-4514-5b25-08da9ae8db34 x-checkrecipientrouted: true NoDisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; X-Microsoft-Antispam-Message-Info-Original: Y9EZAEsKIQfzJUOjncMeIrXgQbWXVU/pUEYrOGF/xUk1qQxG6HaxbAPdcvu77xtfLIwP/iuLBK/zomtmTQfmkaBHlwCn/LBDI6eGgiFBDO890cxvzryTA/Ora0Mfu5RzEUKwaL1wzTHw46P2Jk/nj+doLnfr2XXcwrPoKKeZ/Si/gyrt+fjnnOwsVgRmnZfG1QBKKQOL1opUlAz9lCrjJvs1mfC0pmlIquV1k2xmn13qmTQoD+9TvjnCKtfwcCixE8pxKLBd1dgGqE5jYPHqgVMZ/zsqjL2L9dzW73xXSeVdR/O0KJWskwTjzrghu6ClS8eW380+fAQRQseLzKdsl7iWrrp0Helb2G318pX62RrRyz6oZGJubJFPPZE+bSLUXm6tjq7cIZIa/YGpH6T7iuoT/x8K2vnEaAqQ6MZTuLeaxZkjzUy2RpbumWwPDl6RRpuzMkxEpQx901wu/eYOyoZrccBA8hc8xoygE2Sdx/HcEFhxfpnm+a5iERjqwRcg6KtsEsiqO9mOHmRsSPmrDposQXUEyi1A+4laDtugwIicPV9ow0R/grfK7yOedJPBzVaCI6kpGIzL57JEtg8n3gnxnuv+S3mp4aMpj9zeZP0JAynKQoR+IQ2x+0bgSFxXAvtSPVj8742zh/nvTKtQpdlaLxT8Us10q9RlSmyyq7I3y2eZ2ziDen0HyEAbZBTmyBdUgNUUeAMBHriIcqfAOvQL+OW4FKcdlJuNEiK4+Wf0qM4MvsNG9PatCkPga6PFsUViejOULD0ik06Cqq8e1Mo51qL6rap+7wJdbDFRFnrU3qk/j2+wXD4smTAuLwBV X-Forefront-Antispam-Report-Untrusted: CIP:40.67.248.234;CTRY:IE;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:nebula.arm.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(39860400002)(346002)(396003)(136003)(376002)(451199015)(36840700001)(40470700004)(46966006)(40480700001)(36860700001)(82740400003)(8676002)(86362001)(81166007)(356005)(70586007)(4326008)(70206006)(41300700001)(54906003)(40460700003)(6916009)(82310400005)(316002)(5660300002)(8936002)(44832011)(336012)(2906002)(1076003)(186003)(426003)(47076005)(2616005)(83380400001)(478600001)(26005)(6666004)(36756003)(7696005)(36900700001);DIR:OUT;SFP:1101; X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9PR08MB6690 X-MS-Exchange-Transport-CrossTenantHeadersStripped: AM7EUR03FT064.eop-EUR03.prod.protection.outlook.com X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id-Prvs: 0d087843-b9d5-4b1d-2290-08da9ae845ff X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: fjCpt7xoU3gBwfrQzJodfd/aFl1yx5Qy7rIDIOg4aG94UvKU2MIzUr6mptYxZlpVmbSpWjQsYLh0H/1cjFXUV0Qk8FFBC/hQJSgM1SZqSpHM+zs9dNRdLXcOltrITvUhVlJGYZy5RoNzdN8xo3He6XrLXa2jGQl4BFcHiyJJf68CHIzqRnnLdpGIsTCmSMP2sUnagZx7+GlA9bXTskgHZbWahDI0fcEb8ULZeDmEy4rmGD+5b+vnvPPkmdtwEhoVclTJs+AqFmrbbHncegGGUoOSE89GmF5FxVGbQkkQW9UbFKesigaJKtORhpOUf78RE7b4dyi8XiO9VGyIUB+2xKo/0uBdxghRWtcmF6fEOQd5vncVtfTENMTTdBJySXoQ2Ou38/5WlIu7xtELRipRGq1FwGDq9buFvIjHAR0G0HI4P/E0rU5V5PiFKsze9Uh4MVKzUEqbayN5RbNefkVuNOMVhJRfCCMEao/6gMXRqMfVzVEVBtBgKCVwc7KztxszYuXpslT5YlPHuSmzggLk+jyI3QfGo8YbibmwnbYW9d5FWld2Wxu1dlpx4QxZgwHk4958sq8c7l9TAB4zaXEwbclkJXif8s5SsBxgaiuddsN//ItwpaDOn/h7zNwZU4xZmGqWXBMI79ufymrgg78nqqqJe/obFWNftkRm9X+1kD8EYrmHOZy5FlAhQSRbPWn5UFv3keaK9oGDS9gTUanZqjMuy0u4petx9xvImdLA9NbKfLiB1ojkYk9Hfx0IFr3RCsr9wUJlcg982WePoR9T5w== X-Forefront-Antispam-Report: CIP:63.35.35.123;CTRY:IE;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:64aa7808-outbound-1.mta.getcheckrecipient.com;PTR:ec2-63-35-35-123.eu-west-1.compute.amazonaws.com;CAT:NONE;SFS:(13230022)(4636009)(346002)(396003)(136003)(376002)(39860400002)(451199015)(40470700004)(46966006)(36840700001)(26005)(82740400003)(81166007)(40480700001)(6666004)(36860700001)(8676002)(4326008)(44832011)(54906003)(2906002)(2616005)(41300700001)(82310400005)(7696005)(186003)(47076005)(5660300002)(36756003)(478600001)(86362001)(8936002)(426003)(336012)(70206006)(70586007)(6916009)(83380400001)(1076003)(40460700003)(316002);DIR:OUT;SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Sep 2022 09:16:52.6453 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0250bd80-b067-4514-5b25-08da9ae8db34 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM7EUR03FT064.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DBAPR08MB5624 VIRTUAL_BUG_ON is an empty macro used in phys_to_nid. This results in two lines of error-checking code in phys_to_nid that is not actually working and causing two compilation errors: 1. error: "MAX_NUMNODES" undeclared (first use in this function). This is because in the common header file, "MAX_NUMNODES" is defined after the common header file includes the ARCH header file, where phys_to_nid has attempted to use "MAX_NUMNODES". This error was resolved after we moved the phys_to_nid from x86 ARCH header file to common header file. 2. error: wrong type argument to unary exclamation mark. This is because, the error-checking code contains !node_data[nid]. But node_data is a data structure variable, it's not a pointer. So, in this patch, we use ASSERT instead of VIRTUAL_BUG_ON to enable the two lines of error-checking code. And fix the left compilation errors by replacing !node_data[nid] to !node_data[nid].node_spanned_pages. Although NUMA allows one node can only have CPUs but without any memory. And node with 0 bytes of memory might have an entry in memnodemap[] theoretically. But that doesn't mean phys_to_nid can find any valid address from a node with 0 bytes memory. Signed-off-by: Wei Chen Tested-by: Jiamei Xie Acked-by: Jan Beulich --- v4 -> v5: 1. No change. v3 -> v4: 1. No change. v2 -> v3: 1. Remove unnecessary change items in history. 2. Add Acked-by. v1 -> v2: 1. Use ASSERT to replace VIRTUAL_BUG_ON in phys_to_nid. 2. Adjust the conditional express for ASSERT. 3. Refine the justification of using !node_data[nid].node_spanned_pages. --- xen/include/xen/numa.h | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/xen/include/xen/numa.h b/xen/include/xen/numa.h index d799078a7a..538b283d95 100644 --- a/xen/include/xen/numa.h +++ b/xen/include/xen/numa.h @@ -36,8 +36,6 @@ struct node { extern int compute_hash_shift(const struct node *nodes, unsigned int numnodes, const nodeid_t *nodeids); -#define VIRTUAL_BUG_ON(x) - extern bool numa_off; extern void numa_add_cpu(unsigned int cpu); @@ -70,9 +68,9 @@ extern struct node_data node_data[]; static inline nodeid_t __attribute_pure__ phys_to_nid(paddr_t addr) { nodeid_t nid; - VIRTUAL_BUG_ON((paddr_to_pdx(addr) >> memnode_shift) >= memnodemapsize); + ASSERT((paddr_to_pdx(addr) >> memnode_shift) < memnodemapsize); nid = memnodemap[paddr_to_pdx(addr) >> memnode_shift]; - VIRTUAL_BUG_ON(nid >= MAX_NUMNODES || !node_data[nid]); + ASSERT(nid < MAX_NUMNODES && node_data[nid].node_spanned_pages); return nid; } From patchwork Tue Sep 20 09:12:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wei Chen X-Patchwork-Id: 12981727 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F2739C54EE9 for ; Tue, 20 Sep 2022 09:13:06 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.409249.652248 (Exim 4.92) (envelope-from ) id 1oaZJL-0004Tk-NF; Tue, 20 Sep 2022 09:12:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 409249.652248; Tue, 20 Sep 2022 09:12:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1oaZJL-0004Td-Jv; Tue, 20 Sep 2022 09:12:59 +0000 Received: by outflank-mailman (input) for mailman id 409249; Tue, 20 Sep 2022 09:12:58 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1oaZJJ-0003bZ-Vs for xen-devel@lists.xenproject.org; Tue, 20 Sep 2022 09:12:58 +0000 Received: from EUR04-DB3-obe.outbound.protection.outlook.com (mail-eopbgr60049.outbound.protection.outlook.com [40.107.6.49]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 6a368fe5-38c4-11ed-9647-05401a9f4f97; Tue, 20 Sep 2022 11:12:57 +0200 (CEST) Received: from AS9PR06CA0456.eurprd06.prod.outlook.com (2603:10a6:20b:49a::11) by AS2PR08MB8310.eurprd08.prod.outlook.com (2603:10a6:20b:555::8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5632.16; Tue, 20 Sep 2022 09:12:54 +0000 Received: from AM7EUR03FT030.eop-EUR03.prod.protection.outlook.com (2603:10a6:20b:49a:cafe::5a) by AS9PR06CA0456.outlook.office365.com (2603:10a6:20b:49a::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5632.21 via Frontend Transport; Tue, 20 Sep 2022 09:12:54 +0000 Received: from 64aa7808-outbound-1.mta.getcheckrecipient.com (63.35.35.123) by AM7EUR03FT030.mail.protection.outlook.com (100.127.140.180) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5632.12 via Frontend Transport; Tue, 20 Sep 2022 09:12:54 +0000 Received: ("Tessian outbound 88978e6d60db:v124"); Tue, 20 Sep 2022 09:12:54 +0000 Received: from 6d011e1fd59d.1 by 64aa7808-outbound-1.mta.getcheckrecipient.com id 91E0E803-15F5-4B8D-8110-3CB6643F3017.1; Tue, 20 Sep 2022 09:12:47 +0000 Received: from EUR05-DB8-obe.outbound.protection.outlook.com by 64aa7808-outbound-1.mta.getcheckrecipient.com with ESMTPS id 6d011e1fd59d.1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384); Tue, 20 Sep 2022 09:12:47 +0000 Received: from FR3P281CA0107.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10:a3::17) by AM7PR08MB5528.eurprd08.prod.outlook.com (2603:10a6:20b:dd::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5632.21; Tue, 20 Sep 2022 09:12:45 +0000 Received: from VE1EUR03FT012.eop-EUR03.prod.protection.outlook.com (2603:10a6:d10:a3:cafe::12) by FR3P281CA0107.outlook.office365.com (2603:10a6:d10:a3::17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5654.14 via Frontend Transport; Tue, 20 Sep 2022 09:12:45 +0000 Received: from nebula.arm.com (40.67.248.234) by VE1EUR03FT012.mail.protection.outlook.com (10.152.18.211) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.5632.12 via Frontend Transport; Tue, 20 Sep 2022 09:12:45 +0000 Received: from AZ-NEU-EX04.Arm.com (10.251.24.32) by AZ-NEU-EX04.Arm.com (10.251.24.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.9; Tue, 20 Sep 2022 09:12:43 +0000 Received: from ais-wip-ds.shanghai.arm.com (10.169.190.86) by mail.arm.com (10.251.24.32) with Microsoft SMTP Server id 15.1.2507.9 via Frontend Transport; Tue, 20 Sep 2022 09:12:41 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 6a368fe5-38c4-11ed-9647-05401a9f4f97 ARC-Seal: i=2; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=pass; b=guKK/ohUM3x19f7hSMWC+RPepCAvA+tJMcnR9AHCCHu26CcH5vGW4C2Fgt8T03aL5XIB87GAw6ZOjv2SuhJzphUZ8GDDAmi07LfuuWpPkhRs3Z28zP+UOj7ms78YiSeUFSzh0GpsCJyF5ZkjAxi1wPiEDM2edfcQ7v4wD7rdAv/crNNcCnQHW6EtBgREpuJ0GRugugCpM4xt/Rc4j70wA4t4xvh2ppjlf3mqsBr6GdNPFE4o/JRV8vQBbzrQFopirNl10s10cgsGdCfXRECwpDh+P8MXYtHTBOyFzRI+fgeFn4ijmjnjfmLYZ52XDH6iJWH5ZxqCPAp4qXNcqkHj9Q== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=JApE89GTHtWh+1dMIVWR6H3QB3coBzTIxLdWe7grbWM=; b=nN8K+Od/nx+mmdfIkXl8J+mDRxaW5jWksrNT/Vo3awrpo3dcySXm1JL8rymmdVtkGU7X8D375vz0Swmf9BP+OGdNYrPmUekvbzhXG0b+tNtvrLpzSx1QgtsHr4T3vw66zmqy55BJehv1C26sqO2g48PYKezokijqas54+mRJOSqcJa8TIfqlHCGd5BHbb4eGe8lSPksqGZPLAgj6pwYcwq0l7a+tG+qODjgyQSRn/o+sUvvToDMbVf9RYJ+l8Go7uvMLjUxEMrGkTAQigXG+6vbQ3FrI2/zsPq/LPAEQrt89bVrr1/JWODPvJKhgje9I7tLxNitzMPzy4XGfyy/jxQ== ARC-Authentication-Results: i=2; mx.microsoft.com 1; spf=pass (sender ip is 63.35.35.123) smtp.rcpttodomain=lists.xenproject.org smtp.mailfrom=arm.com; dmarc=pass (p=none sp=none pct=100) action=none header.from=arm.com; dkim=pass (signature was verified) header.d=armh.onmicrosoft.com; arc=pass (0 oda=1 ltdi=1 spf=[1,1,smtp.mailfrom=arm.com] dmarc=[1,1,header.from=arm.com]) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=JApE89GTHtWh+1dMIVWR6H3QB3coBzTIxLdWe7grbWM=; b=H+KGwsWGpZkoFfradaN6Wkm/8r/On98Tl4yLFYeomJJXjjJwJxWvHW/cyTK2D1jTGrYEgY6OdDqf+brdCeYJk/WcvNzqtnJRv6o7/T3d7ZUpCxNiPMKjyHDq99Um9gZUaDjTluAX0Hh3sAdg30vb//xvIbqLokvsOozGUTLc900= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 63.35.35.123) smtp.mailfrom=arm.com; dkim=pass (signature was verified) header.d=armh.onmicrosoft.com;dmarc=pass action=none header.from=arm.com; Received-SPF: Pass (protection.outlook.com: domain of arm.com designates 63.35.35.123 as permitted sender) receiver=protection.outlook.com; client-ip=63.35.35.123; helo=64aa7808-outbound-1.mta.getcheckrecipient.com; pr=C X-CheckRecipientChecked: true X-CR-MTA-CID: aa4b101283b19735 X-CR-MTA-TID: 64aa7808 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=N1OFLWjAlrPZ+NBOzbvg2fTQAx/LS5XDwOAmzX1P7PqEwqLEJTtOtm45UgdKpFl148JQKSpzDxoSMgz2+2HgAKRrTvmZap9J8ecjKb+XeHMsJndaZRWNCDZTe75BlIw5IEMZ3YLRS0f04FNIZdLHOT0LGzjL5Icu4IjewboXfXj//2dQdWTePIyUMnILNPFdTqHHjbIDobherrqxyw4kZ9KycaYuw4Oe9bX36oTIpmbd1Cp26RNTr2Dll3LbSCQO8C371XeH4pIyKpL3Qetx23RMyFBYzrEYxePic120B2FsOQdqv85LDU7HlmxYW1jE96+LCEtiO1FVksenSGVVpQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=JApE89GTHtWh+1dMIVWR6H3QB3coBzTIxLdWe7grbWM=; b=iNYO0qwRQlpOseLKWNca3lMyw6SJqN6iI1Q75yZTK00P41W186dyvFHcuztA4Rwgum42BdJMQyk/0nA0t4uB+HAoAFk4a0JlAcq+oqab09gZk5jIF5RhJMZKa8jwimviR/uxRRO2oYsTsdp3/g26yKCt2vALLNJRNK3YrKo1V0dUj1kJqq72g29SXmbvxzlVBJjmkUhMpHaSEMg1q9u8yTM6yYiUZ4NIdFiMFbIiMxQp+d+ZUJOrfH52zaJkOrcLclbwJqmqHxvlLwMdcIpf8mOzR1RAwRDASZR4W8yOa+9BfdEFQEm2TgtjvG2t63inEja9+EdsjghMQcnlOQkPxA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 40.67.248.234) smtp.rcpttodomain=lists.xenproject.org smtp.mailfrom=arm.com; dmarc=pass (p=none sp=none pct=100) action=none header.from=arm.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=JApE89GTHtWh+1dMIVWR6H3QB3coBzTIxLdWe7grbWM=; b=H+KGwsWGpZkoFfradaN6Wkm/8r/On98Tl4yLFYeomJJXjjJwJxWvHW/cyTK2D1jTGrYEgY6OdDqf+brdCeYJk/WcvNzqtnJRv6o7/T3d7ZUpCxNiPMKjyHDq99Um9gZUaDjTluAX0Hh3sAdg30vb//xvIbqLokvsOozGUTLc900= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 40.67.248.234) smtp.mailfrom=arm.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=arm.com; Received-SPF: Pass (protection.outlook.com: domain of arm.com designates 40.67.248.234 as permitted sender) receiver=protection.outlook.com; client-ip=40.67.248.234; helo=nebula.arm.com; pr=C From: Wei Chen To: CC: , Wei Chen , Jan Beulich , Andrew Cooper , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Wei Liu , George Dunlap , Julien Grall , Stefano Stabellini Subject: [PATCH v5 4/6] xen/x86: use arch_get_ram_range to get information from E820 map Date: Tue, 20 Sep 2022 17:12:16 +0800 Message-ID: <20220920091218.1208658-5-wei.chen@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220920091218.1208658-1-wei.chen@arm.com> References: <20220920091218.1208658-1-wei.chen@arm.com> MIME-Version: 1.0 X-EOPAttributedMessage: 1 X-MS-TrafficTypeDiagnostic: VE1EUR03FT012:EE_|AM7PR08MB5528:EE_|AM7EUR03FT030:EE_|AS2PR08MB8310:EE_ X-MS-Office365-Filtering-Correlation-Id: f1666468-01fa-42a4-236a-08da9ae84d3c x-checkrecipientrouted: true NoDisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; X-Microsoft-Antispam-Message-Info-Original: MyIAm9fK9dQtPIJ47s4xFQ3VJ+zkSNhTf9EHCa97/T6lLoXTutJHXOL6tSdJs3kcz4fBJ5L3j4wfwNzHTHitdEzk94brp4ERiMPPbikZEH1Ph6YYDtUu4cG98QXfFKZ9LJ5YQsB3G7Kw35Cl6J88ndGuwOTPjJK0JxkGsm/vooYziCq/j9txqRlko4daWRTOKS+KXeq0oCudcOWHphLaagFRAnPSGvAMEWSW1ZmSVMQgHeqzSykkI0VXNlk5a8IEmHwkmsLaMcqoi7R2AKvmqO7VkMzNG+nl/TjAQnnoz7C2Q2VJqEHUipS53GyGvtwghkcaCjFrLwsiT0dtOphqBHad29y9rcAiNhLRTgrkiuxFhNVeZ7qGnV8fZAqYXGPVC+b3dfAas3uAgxjv2kF8XPQKQhLjt+/mOX6rFUTAt3fQL4W/v8WlO3ryrN6HebyTHTvC9V9XcvX2kaRZtyj8/Tf7I3Z7NnLWqMNm7zYCeduKn+B/U2DvgMOaWB/Su32cwCl7bUrVN5iQCqO6hlxzSpUxeeEtFPTnvUwCoWadT9z3SIXIPrwEtAsvzb2dxk8yFMwPG9XjGJ/fE8D7BTi22JD5Vd4RxUMNywjk4xRr4/YOPEjl/BCvgocB4WxAtir1Ozje4ha8sGF4C2u1nFdWYH+CPgt/EX9/UfmE7xMeB/JSk4EMlpiR0PxHAmYiHavU7bVwsb7BBME/9VrDiu1+Add+TkReGlcIllgtech9XSEtIksqgNVJaCxcmBFEuZrKb7bx5II7jQGSvnT3PCOtUHQaLgd4RbqxPUSdJOe7QPP1dpii4EjSFZM/wdwMDzar X-Forefront-Antispam-Report-Untrusted: CIP:40.67.248.234;CTRY:IE;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:nebula.arm.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(346002)(396003)(39860400002)(376002)(136003)(451199015)(36840700001)(46966006)(40470700004)(44832011)(40480700001)(82310400005)(36756003)(2906002)(54906003)(316002)(426003)(36860700001)(47076005)(8676002)(82740400003)(4326008)(5660300002)(70206006)(70586007)(6916009)(8936002)(86362001)(336012)(1076003)(186003)(478600001)(2616005)(356005)(81166007)(26005)(41300700001)(6666004)(83380400001)(40460700003)(7696005)(36900700001);DIR:OUT;SFP:1101; X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM7PR08MB5528 X-MS-Exchange-Transport-CrossTenantHeadersStripped: AM7EUR03FT030.eop-EUR03.prod.protection.outlook.com X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id-Prvs: 9ed78981-4bce-4eb7-b399-08da9ae847ce X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: cgTVOb9QrxPjEq5P9DYtexRF0sylt6rmEdwdeU91goS68oA4kS+rlMZL1vKAoT6zqG9tnIZlpiK8EpeRThJr3PXf5c+b/Fg3LTOBdw7cV5B8cJlyLiqOo3R5/55G5Fw2aPMtjkuRBlSDFqc8OQN0ZZtbTc/p5Z/zaR5P1GXEsmCDn+vJmy7crid1ciaPKGtlO6pETullUJ/vrHlyle1CWipH1DRnTD4e/uCW4B+Lw/WVXBACflvzl/NZ5sF79jByd+ZYB2JRvRBb+DZLS3uLVRUgWhe7BD04COpU4kyXJ4EEpoAF2fiSX78JY9Aifwr64B1GpkZ6tUXfGdbQhZu5hv4E+bn6z7kU9vZ2XV0BPckMXlt91fQlcG+0anTq41DKzlQ5ZcgzQc4dq9yJpTgZj4wLMHAOK1DN7WNEHpqyYJZtvAlh9OHPyWDrvYwlHeZk1Y19Y0u6/RTvXvQEdMUa2mU+inHCHWkKOJxh5O5e1hKbGpZ1kKTKd++iHHbwDZN1AmSu8wcnoKXWmXAg8RONcB89jgo7QUfqZy8/3CccDwVjmthVm2RZ/WENH5jAR69vFRHDIaNpzozF0deOMtJ6jVEqMDnmL3zTuOMyCPvyEEtCOl66mqVqDjFTAMDsfqTcrbu3HwMGh/t1JmR/HjqVuNgid7r5P2M9JN8xQbKOmYh4Klywj/zahZxsH+0wdWdPfT0rsVEYAjxahXg1e9SXBDB5+frO9eq1kX7mYgYT8eXdpgDoDAphEuGYkAiP3WNEohJE+HMQTttqF3DkqKj1Tg== X-Forefront-Antispam-Report: CIP:63.35.35.123;CTRY:IE;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:64aa7808-outbound-1.mta.getcheckrecipient.com;PTR:ec2-63-35-35-123.eu-west-1.compute.amazonaws.com;CAT:NONE;SFS:(13230022)(4636009)(39860400002)(136003)(376002)(346002)(396003)(451199015)(40470700004)(36840700001)(46966006)(40480700001)(336012)(4326008)(316002)(5660300002)(83380400001)(36756003)(54906003)(81166007)(6916009)(8676002)(7696005)(86362001)(82740400003)(70586007)(70206006)(41300700001)(2906002)(36860700001)(6666004)(82310400005)(186003)(478600001)(107886003)(1076003)(8936002)(2616005)(40460700003)(44832011)(47076005)(26005)(426003);DIR:OUT;SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Sep 2022 09:12:54.4754 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f1666468-01fa-42a4-236a-08da9ae84d3c X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM7EUR03FT030.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS2PR08MB8310 The sanity check of nodes_cover_memory is also a requirement of other architectures that support NUMA. But now, the code of nodes_cover_memory is tied to the x86 E820. In this case, we introduce arch_get_ram_range to decouple architecture specific memory map from this function. This means, other architectures like Arm can also use it to check its node and memory coverage from bootmem info. Depends arch_get_ram_range, we make nodes_cover_memory become architecture independent. We also use neutral words to replace SRAT and E820 in the print message of this function. This will to make the massage seems more common. As arch_get_ram_range use unsigned int for index, we also adjust the index in nodes_cover_memory from int to unsigned int. Signed-off-by: Wei Chen Reviewed-by: Jan Beulich --- v4 -> v5: 1. Add Rb. 2. Adjust the code comments. v3 -> v4: 1. Move function comment to header file. 2. Use bool for found, and add a new "err" for the return value of arch_get_ram_range. 3. Use -ENODATA instead of -EINVAL for non-RAM type ranges. v2 -> v3: 1. Rename arch_get_memory_map to arch_get_ram_range. 2. Use -ENOENT instead of -ENODEV to indicate end of memory map. 3. Add description to code comment that arch_get_ram_range returns RAM range in [start, end) format. v1 -> v2: 1. Use arch_get_memory_map to replace arch_get_memory_bank_range and arch_get_memory_bank_number. 2. Remove the !start || !end check, because caller guarantee these two pointers will not be NULL. --- xen/arch/x86/numa.c | 15 +++++++++++++++ xen/arch/x86/srat.c | 30 ++++++++++++++++++------------ xen/include/xen/numa.h | 13 +++++++++++++ 3 files changed, 46 insertions(+), 12 deletions(-) diff --git a/xen/arch/x86/numa.c b/xen/arch/x86/numa.c index 21efb1b1b3..6cf5c323af 100644 --- a/xen/arch/x86/numa.c +++ b/xen/arch/x86/numa.c @@ -9,6 +9,7 @@ #include #include #include +#include #ifndef Dprintk #define Dprintk(x...) @@ -93,3 +94,17 @@ unsigned int __init arch_get_dma_bitsize(void) flsl(node_start_pfn(node) + node_spanned_pages(node) / 4 - 1) + PAGE_SHIFT, 32); } + +int __init arch_get_ram_range(unsigned int idx, paddr_t *start, paddr_t *end) +{ + if ( idx >= e820.nr_map ) + return -ENOENT; + + if ( e820.map[idx].type != E820_RAM ) + return -ENODATA; + + *start = e820.map[idx].addr; + *end = *start + e820.map[idx].size; + + return 0; +} diff --git a/xen/arch/x86/srat.c b/xen/arch/x86/srat.c index 0d4f7cccb9..1603c415fd 100644 --- a/xen/arch/x86/srat.c +++ b/xen/arch/x86/srat.c @@ -428,37 +428,43 @@ acpi_numa_memory_affinity_init(const struct acpi_srat_mem_affinity *ma) Make sure the PXMs cover all memory. */ static int __init nodes_cover_memory(void) { - int i; + unsigned int i; - for (i = 0; i < e820.nr_map; i++) { - int j, found; + for (i = 0; ; i++) { + int err; + unsigned int j; + bool found; paddr_t start, end; - if (e820.map[i].type != E820_RAM) { - continue; - } + /* Try to loop memory map from index 0 to end to get RAM ranges. */ + err = arch_get_ram_range(i, &start, &end); - start = e820.map[i].addr; - end = e820.map[i].addr + e820.map[i].size; + /* Reached the end of the memory map? */ + if (err == -ENOENT) + break; + + /* Skip non-RAM entries. */ + if (err) + continue; do { - found = 0; + found = false; for_each_node_mask(j, memory_nodes_parsed) if (start < nodes[j].end && end > nodes[j].start) { if (start >= nodes[j].start) { start = nodes[j].end; - found = 1; + found = true; } if (end <= nodes[j].end) { end = nodes[j].start; - found = 1; + found = true; } } } while (found && start < end); if (start < end) { - printk(KERN_ERR "SRAT: No PXM for e820 range: " + printk(KERN_ERR "NUMA: No NODE for RAM range: " "[%"PRIpaddr", %"PRIpaddr"]\n", start, end - 1); return 0; } diff --git a/xen/include/xen/numa.h b/xen/include/xen/numa.h index 538b283d95..5c7abdb050 100644 --- a/xen/include/xen/numa.h +++ b/xen/include/xen/numa.h @@ -81,6 +81,19 @@ static inline nodeid_t __attribute_pure__ phys_to_nid(paddr_t addr) #define node_end_pfn(nid) (NODE_DATA(nid)->node_start_pfn + \ NODE_DATA(nid)->node_spanned_pages) +/* + * This function provides the ability for caller to get one RAM entry + * from architectural memory map by index. + * + * This function will return zero if it can return a proper RAM entry. + * Otherwise it will return -ENOENT for out of scope index, or other + * error codes, e.g. return -ENODATA for non-RAM type memory entry. + * + * Note: the range is exclusive at the end, e.g. [*start, *end). + */ +extern int arch_get_ram_range(unsigned int idx, + paddr_t *start, paddr_t *end); + #endif #endif /* _XEN_NUMA_H */ From patchwork Tue Sep 20 09:12:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Wei Chen X-Patchwork-Id: 12981730 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id ADE91C6FA82 for ; Tue, 20 Sep 2022 09:13:18 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.409251.652260 (Exim 4.92) (envelope-from ) id 1oaZJS-0004uy-4J; Tue, 20 Sep 2022 09:13:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 409251.652260; Tue, 20 Sep 2022 09:13:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1oaZJR-0004ua-TG; Tue, 20 Sep 2022 09:13:05 +0000 Received: by outflank-mailman (input) for mailman id 409251; Tue, 20 Sep 2022 09:13:05 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1oaZJQ-0003bZ-Nj for xen-devel@lists.xenproject.org; Tue, 20 Sep 2022 09:13:05 +0000 Received: from EUR05-AM6-obe.outbound.protection.outlook.com (mail-am6eur05on2084.outbound.protection.outlook.com [40.107.22.84]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 6dc82d88-38c4-11ed-9647-05401a9f4f97; Tue, 20 Sep 2022 11:13:02 +0200 (CEST) Received: from AM5PR0201CA0022.eurprd02.prod.outlook.com (2603:10a6:203:3d::32) by PA4PR08MB6080.eurprd08.prod.outlook.com (2603:10a6:102:ec::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5632.21; Tue, 20 Sep 2022 09:12:59 +0000 Received: from AM7EUR03FT012.eop-EUR03.prod.protection.outlook.com (2603:10a6:203:3d:cafe::dd) by AM5PR0201CA0022.outlook.office365.com (2603:10a6:203:3d::32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5632.21 via Frontend Transport; Tue, 20 Sep 2022 09:12:59 +0000 Received: from 64aa7808-outbound-1.mta.getcheckrecipient.com (63.35.35.123) by AM7EUR03FT012.mail.protection.outlook.com (100.127.141.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5632.12 via Frontend Transport; Tue, 20 Sep 2022 09:12:59 +0000 Received: ("Tessian outbound e2c58cd9a6bb:v124"); Tue, 20 Sep 2022 09:12:59 +0000 Received: from 86f48fc60ca1.1 by 64aa7808-outbound-1.mta.getcheckrecipient.com id 98B58C8C-9476-46E4-A7F6-04BA9459D56F.1; Tue, 20 Sep 2022 09:12:51 +0000 Received: from EUR03-DBA-obe.outbound.protection.outlook.com by 64aa7808-outbound-1.mta.getcheckrecipient.com with ESMTPS id 86f48fc60ca1.1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384); Tue, 20 Sep 2022 09:12:51 +0000 Received: from AS4PR09CA0020.eurprd09.prod.outlook.com (2603:10a6:20b:5d4::7) by AS1PR08MB7513.eurprd08.prod.outlook.com (2603:10a6:20b:480::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5632.19; Tue, 20 Sep 2022 09:12:49 +0000 Received: from VE1EUR03FT006.eop-EUR03.prod.protection.outlook.com (2603:10a6:20b:5d4:cafe::c6) by AS4PR09CA0020.outlook.office365.com (2603:10a6:20b:5d4::7) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5632.15 via Frontend Transport; Tue, 20 Sep 2022 09:12:49 +0000 Received: from nebula.arm.com (40.67.248.234) by VE1EUR03FT006.mail.protection.outlook.com (10.152.18.116) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.5632.12 via Frontend Transport; Tue, 20 Sep 2022 09:12:48 +0000 Received: from AZ-NEU-EX04.Arm.com (10.251.24.32) by AZ-NEU-EX04.Arm.com (10.251.24.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.9; Tue, 20 Sep 2022 09:12:47 +0000 Received: from ais-wip-ds.shanghai.arm.com (10.169.190.86) by mail.arm.com (10.251.24.32) with Microsoft SMTP Server id 15.1.2507.9 via Frontend Transport; Tue, 20 Sep 2022 09:12:44 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 6dc82d88-38c4-11ed-9647-05401a9f4f97 ARC-Seal: i=2; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=pass; b=nq4YxcUPvqC9L9lbtC/sFjbC+8P/iYDAyDoq2vySjP19EL73YDQT0roWnMSPA8tMuup9lYNipAHx9Kik3OlIgXcnDWNDLBQtqjAxeWtNtcFklWZyJPBnTQ0Aq05Js+K+GDVBrBj8U0vZ6pwXuJzbrNCT9DPGXfYdrg3Mwhuke3DUYKioj0CO1t3VEdA4we8pX4POxlfEUi2OUavHh9LtntqIHYBVqh55xmm8xf4UD5KedU5kiecB1dbUCd76lpUkbnuLTPHwrVF+63setSRCSwZkEdfPPIa8jNqntFt2zn9+iJwJuX/9y7EbcrSEIoTIyv5Zy+iqDhBRJHaSIrPXrg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=QJ9ttdNAWIlD5SlMp8AY0fSp90/hwL0jgfa+S1mSp7c=; b=cZjwldeEkNIycaXgJ6qQu5gdOndwqHotPJqLBdr9X9ZmtsMOjuaWhC43Bh/DyqxKcvm0+K1cOFFCb+DOz0oVj/PReznpiYdtaRXdrLI3zZ3tkS+HXWGA1coeJ7BwfUbvajUK1SKI8vDyUGv9Oc1IPI1e2ri/QwsGSN+7q0BSRvTSZ/gAQIKP2dA96hOXwozeJB7+m/BfZrRYNoAtXA+M+24jmaQakI4W+9On8xNXJ66aulMw+PQv4L3iHG5qgNnyUoYh5GzMsh+Brxc3WrMKd1hruZmvPnTP6kYI0xY7vbZF01gdF1t6jSbSgRmQYn1j3hVD4TKyUbmnFiJTOqan1A== ARC-Authentication-Results: i=2; mx.microsoft.com 1; spf=pass (sender ip is 63.35.35.123) smtp.rcpttodomain=lists.xenproject.org smtp.mailfrom=arm.com; dmarc=pass (p=none sp=none pct=100) action=none header.from=arm.com; dkim=pass (signature was verified) header.d=armh.onmicrosoft.com; arc=pass (0 oda=1 ltdi=1 spf=[1,1,smtp.mailfrom=arm.com] dmarc=[1,1,header.from=arm.com]) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=QJ9ttdNAWIlD5SlMp8AY0fSp90/hwL0jgfa+S1mSp7c=; b=H/CPQ9jGZ2Rwg7FDJIHJWII6jJwIFCWx0kYqVdFmXYFD1FErfSUR/dHEmR02XWCvv4K4BSmD9UzIEVaklOQUiJ8rai/ocNZOLpM3Q0X69zAhovglw7kovH/TBasKJ4sJBk49XDZgr7X7Aje5mbufmQezem+bPDk/VawnQdS+hYk= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 63.35.35.123) smtp.mailfrom=arm.com; dkim=pass (signature was verified) header.d=armh.onmicrosoft.com;dmarc=pass action=none header.from=arm.com; Received-SPF: Pass (protection.outlook.com: domain of arm.com designates 63.35.35.123 as permitted sender) receiver=protection.outlook.com; client-ip=63.35.35.123; helo=64aa7808-outbound-1.mta.getcheckrecipient.com; pr=C X-CheckRecipientChecked: true X-CR-MTA-CID: 232754b9b07e5599 X-CR-MTA-TID: 64aa7808 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=OObadKc35yJg0Q7VxTahQvRDmflQlrDPE/wmQVsqWEmTXcFmjn4rv25Qo3sYmMKlgK7Gm4zJ2wzzNExiI03CxBfzFNcOH+caD0kQnZ8+vhdt/JIO0W/m6/EylrJVvQkg7dpYRoTWkBCmdQA3x+CPjvD2Onxj21Sf2S1gnOkrS94QfBFl64PAFrOKO6eCFcttBBRUFkH8jIo7nMViEF480Id5wM1bsxGsLSj6kiC7ZfJ77K6lI2WxHTuQiRbrj04vafAjhU0ZOP2VywynEE0cS+qEJfDJro8BU+6ZF4RsAh/qLnoPqUG+nCNmsHtQEtYcZ491QnjhpKbULAJUsVYX4A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=QJ9ttdNAWIlD5SlMp8AY0fSp90/hwL0jgfa+S1mSp7c=; b=E/j/B+T1r3347Hc9Yc9hDedFxGo6FtYfUJFbHmJrpfEqf1ZsmGSpkP0JwDxC67LkeH0Fc1oeGgGuXbLZ+Soe6YZKoszqVpjhxOPNg7wTIOcb9zvpQ1dm9Faj4VJtoxvd9oCzEXX2M29xBBxdag6K4DPj5T5NOLCqBCdNsg3wgFHTEmVIpYF71RU03trNjjHxPtZCp9hAYBAo5GrXmFkwdSGgC6PFm2sDrD4kWFZzxSqgC5y3+BI5U7hJZ5uaMcJ3LAzUdC12VHQhf/YtqyKJ7uF/oOg7tGl+RLFJIu1Jf4qXPb8RdqRNQCu3XedR5Ifu2ZSsYm4JunnfwkNFl9168w== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 40.67.248.234) smtp.rcpttodomain=lists.xenproject.org smtp.mailfrom=arm.com; dmarc=pass (p=none sp=none pct=100) action=none header.from=arm.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=QJ9ttdNAWIlD5SlMp8AY0fSp90/hwL0jgfa+S1mSp7c=; b=H/CPQ9jGZ2Rwg7FDJIHJWII6jJwIFCWx0kYqVdFmXYFD1FErfSUR/dHEmR02XWCvv4K4BSmD9UzIEVaklOQUiJ8rai/ocNZOLpM3Q0X69zAhovglw7kovH/TBasKJ4sJBk49XDZgr7X7Aje5mbufmQezem+bPDk/VawnQdS+hYk= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 40.67.248.234) smtp.mailfrom=arm.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=arm.com; Received-SPF: Pass (protection.outlook.com: domain of arm.com designates 40.67.248.234 as permitted sender) receiver=protection.outlook.com; client-ip=40.67.248.234; helo=nebula.arm.com; pr=C From: Wei Chen To: CC: , Wei Chen , Jan Beulich , Andrew Cooper , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Wei Liu , George Dunlap , Julien Grall , Stefano Stabellini Subject: [PATCH v5 5/6] xen/x86: move NUMA scan nodes codes from x86 to common Date: Tue, 20 Sep 2022 17:12:17 +0800 Message-ID: <20220920091218.1208658-6-wei.chen@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220920091218.1208658-1-wei.chen@arm.com> References: <20220920091218.1208658-1-wei.chen@arm.com> MIME-Version: 1.0 X-EOPAttributedMessage: 1 X-MS-TrafficTypeDiagnostic: VE1EUR03FT006:EE_|AS1PR08MB7513:EE_|AM7EUR03FT012:EE_|PA4PR08MB6080:EE_ X-MS-Office365-Filtering-Correlation-Id: 496dd1d4-4cbe-4335-46b3-08da9ae85015 x-checkrecipientrouted: true NoDisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; X-Microsoft-Antispam-Message-Info-Original: chqDDM2I4nuKLvQgEpw2qyP2gj5Oyt4hYq7dEhMd+SqLrDz6TJvlZxADoFsD4nKuj0RO4LZwnguy04dChzsVN6dxZyVLOTwYxwcTtnh980Ghy1QzcQl+jJpvzfoPIqIFkIfjSO5GNAPYjAWemHovAS4DWD/hMJtebVMhCK3fCMHE/Re0KuD2bmyO0d1w0Cdd9hcaVyyCN92zsCfCMl9cK6+NlGz/DH3uhPi84TCDQ6Gz3BEYw4dKGI/V9LnnWknWg85OAuOtDy6AIjsFrnQhq2SbE+epOCZka3xVjw5L9K3Kw2Rs3JIy4qLwLc9yqZIv3ETO6NmwLqi/jGX2hLdykOERM/oOLt4V71a1aAIkQZa9NYrASZMt+3Xo3+l4ZahH+6yHrrVOdcMtDko3uUlwIxZjCEkMk7hhYCdXuteUKjVR5VyApDfkZUz2JUQFTL7nd6hR+fK24ymMeOnjl9ATuhofeLEuQfM19qnhIG9jJUk70YJWzvyUCXwv7PGMtqkrgqS4pdiisFBT5JEmYsOGRF6XNLiM2jqkdk725zHLybQPhcj/8UMjX1+lBSvjVLtl4I6LYvA6F9xFDuEWZyF7cbkrSadU00Hl27PvV2RoRi7sEAO9haJc13Gd62sUSZRmyUBzsTs6X5RxpBxwhlqmerDde1NV479wGBxt4JyzduU6K6MBapaAaoJF4PcLhGykX5MekuAL5B9myRK+b0WhUPinc4baSpVFgBFLriQ8eoNL9jUOny0MoOvOHsPbeFFg32QyhteQ+GJ/VCiVNR5/+MlkDSYHmwzUjepps+9K6sRqUb/lOwTEPAB0o9qGpVM1 X-Forefront-Antispam-Report-Untrusted: CIP:40.67.248.234;CTRY:IE;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:nebula.arm.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(396003)(39860400002)(376002)(136003)(346002)(451199015)(40470700004)(46966006)(36840700001)(26005)(7696005)(2616005)(81166007)(30864003)(2906002)(82310400005)(478600001)(5660300002)(356005)(36860700001)(40460700003)(82740400003)(36756003)(86362001)(44832011)(426003)(336012)(1076003)(186003)(6666004)(47076005)(40480700001)(41300700001)(83380400001)(4326008)(70586007)(8936002)(6916009)(54906003)(70206006)(8676002)(316002)(36900700001);DIR:OUT;SFP:1101; X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS1PR08MB7513 X-MS-Exchange-Transport-CrossTenantHeadersStripped: AM7EUR03FT012.eop-EUR03.prod.protection.outlook.com X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id-Prvs: e2d9a43b-be2a-4a3c-f497-08da9ae849fa X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: JXP6B562PzOfzq6tHeXbngaUlhGfc034gDSrPQuPkT8oNxzEOFxlKtoW1thN9kXaHC5X7YX/KakJmbCbf+MP9nZQgxnq3uXxctGy7/luCJ5JxR5Oq8xNZnlE5klLnnsCchIfGrG6YZbJDmCK8GfGgkm1Lx/5eTLB7wnQvons0apKeeavI81XUiB9vvO0PIMMkSadev2P8I0n2Wfu2zkkbFJbJ+QRLBBRuL3uqrUXhZO/oXwPRlO2BXaaK8XMjW1fy/Pr7NMI4cRd8TP7WWR33O0wfdLc7NLWxFbX2vlqFD2i6mWoJULRcVoo9dDO0ar+nURuOMTQsZHyF7WM0u0Q2Ua0DFsU10UBQHmzuKQ2nQztsaNRZwLTFGhNtduyIpkpTPNNG1L3uSi8YWcynYaSePFSlXWoaH5Qouzzkja+MQ3c8s95IMslBZ8BD/Gyd0XlF0Ouvhd1q/TBCA7d0qdEeFqCnfeAApzsqyU/PpKlcgswGG5G1uT5hCJvHNWat7WU8CuQ66OEEfHYkVUKdOlrqTxJpZTOIg3g8ppog+92N2++PwE9JhIs4QN5wOjYo1bDenj8GtJ9U0q3T4q13V3DYrSrvQGE/ic2zq4i90PTc/GnGTdn3n0Pxd7NyITkVhSWWHP4upuQiXDKmZU0TWRrqp5A8hyJ1zo1RTsphJa8y6c/WZQCI+ULktfyctgJO3WYU9DTU96iQQQ5UBilhv/uym7BxFgMvYFVAmNdvUF6It5Q7Kuzzwe1jDLg9bx5NIjUt/QPPPx+aU9I4RxzBEUHRw== X-Forefront-Antispam-Report: CIP:63.35.35.123;CTRY:IE;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:64aa7808-outbound-1.mta.getcheckrecipient.com;PTR:ec2-63-35-35-123.eu-west-1.compute.amazonaws.com;CAT:NONE;SFS:(13230022)(4636009)(136003)(376002)(346002)(39860400002)(396003)(451199015)(46966006)(36840700001)(40470700004)(6916009)(54906003)(336012)(83380400001)(426003)(81166007)(86362001)(2906002)(316002)(478600001)(36756003)(26005)(40480700001)(107886003)(7696005)(6666004)(36860700001)(41300700001)(1076003)(2616005)(186003)(47076005)(40460700003)(82310400005)(82740400003)(5660300002)(4326008)(44832011)(8936002)(70586007)(8676002)(30864003)(70206006);DIR:OUT;SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Sep 2022 09:12:59.2227 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 496dd1d4-4cbe-4335-46b3-08da9ae85015 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM7EUR03FT012.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PA4PR08MB6080 x86 has implemented a set of codes to scan NUMA nodes. These codes will parse NUMA memory and processor information from ACPI SRAT table. But except some ACPI specific codes, most of the scan codes like memory blocks validation, node memory range updates and some sanity check can be reused by other NUMA implementation. So in this patch, we move some variables and related functions for NUMA memory and processor to common as library. At the same time, numa_set_processor_nodes_parsed has been introduced for ACPI specific code to update processor parsing results. With this helper, we can reuse most of NUMA memory affinity init code from ACPI. As bad_srat and node_to_pxm functions have been used in common code to do architectural fallback and node to architectural node info translation. But it doesn't make sense to reuse the functions names in common code, we have rename them to neutral names as well. PXM is an ACPI specific item, we can't use it in common code directly. As an alternative, we extend the parameters of numa_update_node_memblks. The caller can pass the PXM as print messages' prefix or as architectural node id. And we introduced a CONFIG_HAS_NUMA_NODE_FWID to prevent print the mapping between node id and architectural node id for those architectures do not have architectural node id. In this case, we do not need to retain a lot of per-arch code but still can print architectural log messages for different NUMA implementations. mem_hotplug also has been accessing by common code, except x86, other architectures like Arm will also want to implement memory hotplug in future. We export mem_hotplug to common will not bring any harm for Arm and we also can reduce some per-arch helpers to access mem_hotplug. As asm/acpi.h has been removed from common/numa.c, we have to move NR_NODE_MEMBLKS from asm/acpi.h to xen/numa.h in this patch as well. Signed-off-by: Wei Chen --- v4 -> v5: 1. Introduce arch_numa_disabled for acpi_numa <= 0 in this patch. 2. Remove the paramter init_as_disable of arch_numa_disabled. 3. Fix typo "expandsion". 4. Add const to proper varibales. 5. Fix Indentation for l1tf_safe_maddr. 6. Remove double blank lines. 7. Add a space between for_each_node_mask and '('. Add a space page_list_for_each and '('. 8. Use bool for nodes_cover_memory return value. 9. Use a plain "int ret" to record compute_hash_shift return value. 10. Add a blank line before the function's main "return". 11. Add new Kconfig option HAS_NUMA_NODE_FWID to common/Kconfig. v3 -> v4: 1. Use bool as return value for functions that only return 0/1 or 0/-EINVAL. 2. Move mem_hotplug to a proper place in mm.h 3. Remove useless "size" in numa_scan_nodes. 4. Use unsigned int or const for proper variables. 5. Fix code-style. 6. Add init_as_disable as arch_numa_disabled parameter. 7. Add CONFIG_HAS_NUMA_NODE_FWID to gate print the mapping between node id and architectural node id (fw node id). v2 -> v3: 1. Add __ro_after_init to proper variables. 2. Rename bad_srat to numa_fw_bad. 3. Rename node_to_pxm to numa_node_to_arch_nid. 4. Merge patch#7 and #8 into this patch. 5. Correct int to unsigned int in proper places. 6. Move NR_NODE_MEMBLKS from x86/acpi.h to common/numa.h 7. Drop helpers to access mem_hotplug, we export mem_hotplug from x86/mm.c to common/page_alloc.c v1 -> v2: 1. Add code comment for numa_update_node_memblks to explain: Assumes all memory regions belonging to a single node are in one chunk. Holes between them will be included in the node. 2. Merge this single patch instead of serval patches to move x86 SRAT code to common. 3. Export node_to_pxm to keep pxm information in NUMA scan nodes error messages. 4. Change the code style to target file's Xen code-style. 5. Adjust some __init and __initdata for some functions and variables. 6. Merge two patches into this patch: 1. replace CONFIG_ACPI_NUMA by CONFIG_NUMA. 2. replace "SRAT" texts. 7. Turn numa_scan_nodes to static. --- xen/arch/x86/include/asm/acpi.h | 1 - xen/arch/x86/include/asm/mm.h | 2 - xen/arch/x86/include/asm/numa.h | 3 +- xen/arch/x86/mm.c | 2 - xen/arch/x86/numa.c | 5 + xen/arch/x86/srat.c | 311 +++--------------------------- xen/common/Kconfig | 3 + xen/common/numa.c | 322 +++++++++++++++++++++++++++++++- xen/common/page_alloc.c | 2 + xen/drivers/acpi/Kconfig | 1 + xen/include/xen/mm.h | 2 + xen/include/xen/numa.h | 11 +- 12 files changed, 368 insertions(+), 297 deletions(-) diff --git a/xen/arch/x86/include/asm/acpi.h b/xen/arch/x86/include/asm/acpi.h index 5c2dd5da2d..c453450a74 100644 --- a/xen/arch/x86/include/asm/acpi.h +++ b/xen/arch/x86/include/asm/acpi.h @@ -102,7 +102,6 @@ extern unsigned long acpi_wakeup_address; #define ARCH_HAS_POWER_INIT 1 extern s8 acpi_numa; -#define NR_NODE_MEMBLKS (MAX_NUMNODES*2) extern struct acpi_sleep_info acpi_sinfo; #define acpi_video_flags bootsym(video_flags) diff --git a/xen/arch/x86/include/asm/mm.h b/xen/arch/x86/include/asm/mm.h index 0fc826de46..95ff71a83a 100644 --- a/xen/arch/x86/include/asm/mm.h +++ b/xen/arch/x86/include/asm/mm.h @@ -474,8 +474,6 @@ static inline int get_page_and_type(struct page_info *page, ASSERT(((_p)->count_info & PGC_count_mask) != 0); \ ASSERT(page_get_owner(_p) == (_d)) -extern paddr_t mem_hotplug; - /****************************************************************************** * With shadow pagetables, the different kinds of address start * to get get confusing. diff --git a/xen/arch/x86/include/asm/numa.h b/xen/arch/x86/include/asm/numa.h index 6c87942d43..2ca3475271 100644 --- a/xen/arch/x86/include/asm/numa.h +++ b/xen/arch/x86/include/asm/numa.h @@ -10,6 +10,7 @@ typedef u8 nodeid_t; extern int srat_rev; extern nodeid_t pxm_to_node(unsigned int pxm); +extern unsigned int numa_node_to_arch_nid(nodeid_t n); #define ZONE_ALIGN (1UL << (MAX_ORDER+PAGE_SHIFT)) @@ -22,8 +23,6 @@ extern void init_cpu_to_node(void); #define arch_want_default_dmazone() (num_online_nodes() > 1) -extern int valid_numa_range(paddr_t start, paddr_t end, nodeid_t node); - void srat_parse_regions(paddr_t addr); extern u8 __node_distance(nodeid_t a, nodeid_t b); unsigned int arch_get_dma_bitsize(void); diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c index db1817b691..68f9989e1f 100644 --- a/xen/arch/x86/mm.c +++ b/xen/arch/x86/mm.c @@ -157,8 +157,6 @@ l1_pgentry_t __section(".bss.page_aligned") __aligned(PAGE_SIZE) l1_pgentry_t __section(".bss.page_aligned") __aligned(PAGE_SIZE) l1_fixmap_x[L1_PAGETABLE_ENTRIES]; -paddr_t __read_mostly mem_hotplug; - /* Frame table size in pages. */ unsigned long max_page; unsigned long total_pages; diff --git a/xen/arch/x86/numa.c b/xen/arch/x86/numa.c index 6cf5c323af..d4448fc333 100644 --- a/xen/arch/x86/numa.c +++ b/xen/arch/x86/numa.c @@ -46,6 +46,11 @@ bool arch_numa_broken(void) return acpi_numa < 0; } +bool arch_numa_disabled(void) +{ + return acpi_numa <= 0; +} + /* * Setup early cpu_to_node. * diff --git a/xen/arch/x86/srat.c b/xen/arch/x86/srat.c index 1603c415fd..26bf898d0b 100644 --- a/xen/arch/x86/srat.c +++ b/xen/arch/x86/srat.c @@ -24,10 +24,6 @@ static struct acpi_table_slit *__read_mostly acpi_slit; -static nodemask_t memory_nodes_parsed __initdata; -static nodemask_t processor_nodes_parsed __initdata; -static struct node nodes[MAX_NUMNODES] __initdata; - struct pxm2node { unsigned pxm; nodeid_t node; @@ -35,19 +31,6 @@ struct pxm2node { static struct pxm2node __read_mostly pxm2node[MAX_NUMNODES] = { [0 ... MAX_NUMNODES - 1] = {.node = NUMA_NO_NODE} }; -static unsigned node_to_pxm(nodeid_t n); - -static int num_node_memblks; -static struct node node_memblk_range[NR_NODE_MEMBLKS]; -static nodeid_t memblk_nodeid[NR_NODE_MEMBLKS]; -static __initdata DECLARE_BITMAP(memblk_hotplug, NR_NODE_MEMBLKS); - -enum conflicts { - NO_CONFLICT, - OVERLAP, - INTERLEAVE, -}; - static inline bool node_found(unsigned idx, unsigned pxm) { return ((pxm2node[idx].pxm == pxm) && @@ -110,78 +93,7 @@ nodeid_t setup_node(unsigned pxm) return node; } -int valid_numa_range(paddr_t start, paddr_t end, nodeid_t node) -{ - int i; - - for (i = 0; i < num_node_memblks; i++) { - struct node *nd = &node_memblk_range[i]; - - if (nd->start <= start && nd->end >= end && - memblk_nodeid[i] == node) - return 1; - } - - return 0; -} - -static -enum conflicts __init conflicting_memblks(nodeid_t nid, paddr_t start, - paddr_t end, paddr_t nd_start, - paddr_t nd_end, unsigned int *mblkid) -{ - unsigned int i; - - /* - * Scan all recorded nodes' memory blocks to check conflicts: - * Overlap or interleave. - */ - for (i = 0; i < num_node_memblks; i++) { - struct node *nd = &node_memblk_range[i]; - - *mblkid = i; - - /* Skip 0 bytes node memory block. */ - if (nd->start == nd->end) - continue; - /* - * Use memblk range to check memblk overlaps, include the - * self-overlap case. As nd's range is non-empty, the special - * case "nd->end == end && nd->start == start" also can be covered. - */ - if (nd->end > start && nd->start < end) - return OVERLAP; - - /* - * Use node memory range to check whether new range contains - * memory from other nodes - interleave check. We just need - * to check full contains situation. Because overlaps have - * been checked above. - */ - if (nid != memblk_nodeid[i] && - nd->start >= nd_start && nd->end <= nd_end) - return INTERLEAVE; - } - - return NO_CONFLICT; -} - -static __init void cutoff_node(int i, paddr_t start, paddr_t end) -{ - struct node *nd = &nodes[i]; - if (nd->start < start) { - nd->start = start; - if (nd->end < nd->start) - nd->start = nd->end; - } - if (nd->end > end) { - nd->end = end; - if (nd->start > nd->end) - nd->start = nd->end; - } -} - -static __init void bad_srat(void) +void __init numa_fw_bad(void) { int i; printk(KERN_ERR "SRAT: SRAT not used.\n"); @@ -241,7 +153,7 @@ acpi_numa_x2apic_affinity_init(const struct acpi_srat_x2apic_cpu_affinity *pa) if (numa_disabled()) return; if (pa->header.length < sizeof(struct acpi_srat_x2apic_cpu_affinity)) { - bad_srat(); + numa_fw_bad(); return; } if (!(pa->flags & ACPI_SRAT_CPU_ENABLED)) @@ -254,12 +166,12 @@ acpi_numa_x2apic_affinity_init(const struct acpi_srat_x2apic_cpu_affinity *pa) pxm = pa->proximity_domain; node = setup_node(pxm); if (node == NUMA_NO_NODE) { - bad_srat(); + numa_fw_bad(); return; } apicid_to_node[pa->apic_id] = node; - node_set(node, processor_nodes_parsed); + numa_set_processor_nodes_parsed(node); acpi_numa = 1; if (opt_acpi_verbose) @@ -277,7 +189,7 @@ acpi_numa_processor_affinity_init(const struct acpi_srat_cpu_affinity *pa) if (numa_disabled()) return; if (pa->header.length != sizeof(struct acpi_srat_cpu_affinity)) { - bad_srat(); + numa_fw_bad(); return; } if (!(pa->flags & ACPI_SRAT_CPU_ENABLED)) @@ -290,11 +202,11 @@ acpi_numa_processor_affinity_init(const struct acpi_srat_cpu_affinity *pa) } node = setup_node(pxm); if (node == NUMA_NO_NODE) { - bad_srat(); + numa_fw_bad(); return; } apicid_to_node[pa->apic_id] = node; - node_set(node, processor_nodes_parsed); + numa_set_processor_nodes_parsed(node); acpi_numa = 1; if (opt_acpi_verbose) @@ -306,32 +218,27 @@ acpi_numa_processor_affinity_init(const struct acpi_srat_cpu_affinity *pa) void __init acpi_numa_memory_affinity_init(const struct acpi_srat_mem_affinity *ma) { - struct node *nd; - paddr_t nd_start, nd_end; - paddr_t start, end; unsigned pxm; nodeid_t node; - unsigned int i; if (numa_disabled()) return; if (ma->header.length != sizeof(struct acpi_srat_mem_affinity)) { - bad_srat(); + numa_fw_bad(); return; } if (!(ma->flags & ACPI_SRAT_MEM_ENABLED)) return; - start = ma->base_address; - end = start + ma->length; /* Supplement the heuristics in l1tf_calculations(). */ - l1tf_safe_maddr = max(l1tf_safe_maddr, ROUNDUP(end, PAGE_SIZE)); + l1tf_safe_maddr = max(l1tf_safe_maddr, + ROUNDUP(ma->base_address + ma->length, + PAGE_SIZE)); - if (num_node_memblks >= NR_NODE_MEMBLKS) - { + if (!numa_memblks_available()) { dprintk(XENLOG_WARNING, - "Too many numa entry, try bigger NR_NODE_MEMBLKS \n"); - bad_srat(); + "Too many numa entries, try bigger NR_NODE_MEMBLKS!\n"); + numa_fw_bad(); return; } @@ -340,136 +247,14 @@ acpi_numa_memory_affinity_init(const struct acpi_srat_mem_affinity *ma) pxm &= 0xff; node = setup_node(pxm); if (node == NUMA_NO_NODE) { - bad_srat(); + numa_fw_bad(); return; } - /* - * For the node that already has some memory blocks, we will - * expand the node memory range temporarily to check memory - * interleaves with other nodes. We will not use this node - * temp memory range to check overlaps, because it will mask - * the overlaps in same node. - * - * Node with 0 bytes memory doesn't need this expandsion. - */ - nd_start = start; - nd_end = end; - nd = &nodes[node]; - if (nd->start != nd->end) { - if (nd_start > nd->start) - nd_start = nd->start; - - if (nd_end < nd->end) - nd_end = nd->end; - } - - /* It is fine to add this area to the nodes data it will be used later*/ - switch (conflicting_memblks(node, start, end, nd_start, nd_end, &i)) { - case OVERLAP: - if (memblk_nodeid[i] == node) { - bool mismatch = !(ma->flags & - ACPI_SRAT_MEM_HOT_PLUGGABLE) != - !test_bit(i, memblk_hotplug); - - printk("%sSRAT: PXM %u [%"PRIpaddr", %"PRIpaddr"] overlaps with itself [%"PRIpaddr", %"PRIpaddr"]\n", - mismatch ? KERN_ERR : KERN_WARNING, pxm, start, - end - 1, node_memblk_range[i].start, - node_memblk_range[i].end - 1); - if (mismatch) { - bad_srat(); - return; - } - break; - } - - printk(KERN_ERR - "SRAT: PXM %u [%"PRIpaddr", %"PRIpaddr"] overlaps with PXM %u [%"PRIpaddr", %"PRIpaddr"]\n", - pxm, start, end - 1, node_to_pxm(memblk_nodeid[i]), - node_memblk_range[i].start, - node_memblk_range[i].end - 1); - bad_srat(); - return; - - case INTERLEAVE: - printk(KERN_ERR - "SRAT： PXM %u: [%"PRIpaddr", %"PRIpaddr"] interleaves with PXM %u memblk [%"PRIpaddr", %"PRIpaddr"]\n", - pxm, nd_start, nd_end - 1, node_to_pxm(memblk_nodeid[i]), - node_memblk_range[i].start, node_memblk_range[i].end - 1); - bad_srat(); - return; - - case NO_CONFLICT: - break; - } - - if (!(ma->flags & ACPI_SRAT_MEM_HOT_PLUGGABLE)) { - node_set(node, memory_nodes_parsed); - nd->start = nd_start; - nd->end = nd_end; - } - - printk(KERN_INFO "SRAT: Node %u PXM %u [%"PRIpaddr", %"PRIpaddr"]%s\n", - node, pxm, start, end - 1, - ma->flags & ACPI_SRAT_MEM_HOT_PLUGGABLE ? " (hotplug)" : ""); - - node_memblk_range[num_node_memblks].start = start; - node_memblk_range[num_node_memblks].end = end; - memblk_nodeid[num_node_memblks] = node; - if (ma->flags & ACPI_SRAT_MEM_HOT_PLUGGABLE) { - __set_bit(num_node_memblks, memblk_hotplug); - if (end > mem_hotplug) - mem_hotplug = end; - } - num_node_memblks++; -} - -/* Sanity check to catch more bad SRATs (they are amazingly common). - Make sure the PXMs cover all memory. */ -static int __init nodes_cover_memory(void) -{ - unsigned int i; - - for (i = 0; ; i++) { - int err; - unsigned int j; - bool found; - paddr_t start, end; - - /* Try to loop memory map from index 0 to end to get RAM ranges. */ - err = arch_get_ram_range(i, &start, &end); - - /* Reached the end of the memory map? */ - if (err == -ENOENT) - break; - - /* Skip non-RAM entries. */ - if (err) - continue; - - do { - found = false; - for_each_node_mask(j, memory_nodes_parsed) - if (start < nodes[j].end - && end > nodes[j].start) { - if (start >= nodes[j].start) { - start = nodes[j].end; - found = true; - } - if (end <= nodes[j].end) { - end = nodes[j].start; - found = true; - } - } - } while (found && start < end); - - if (start < end) { - printk(KERN_ERR "NUMA: No NODE for RAM range: " - "[%"PRIpaddr", %"PRIpaddr"]\n", start, end - 1); - return 0; - } - } - return 1; + if (!numa_update_node_memblks(node, pxm, ma->base_address, + ma->length, "PXM", + ma->flags & ACPI_SRAT_MEM_HOT_PLUGGABLE)) + numa_fw_bad(); } void __init acpi_numa_arch_fixup(void) {} @@ -525,59 +310,9 @@ void __init srat_parse_regions(paddr_t addr) pfn_pdx_hole_setup(mask >> PAGE_SHIFT); } -/* Use discovered information to actually set up the nodes. */ -int __init numa_process_nodes(paddr_t start, paddr_t end) -{ - int i; - nodemask_t all_nodes_parsed; - - /* First clean up the node list */ - for (i = 0; i < MAX_NUMNODES; i++) - cutoff_node(i, start, end); - - if (acpi_numa <= 0) - return -1; - - if (!nodes_cover_memory()) { - bad_srat(); - return -1; - } - - memnode_shift = compute_hash_shift(node_memblk_range, num_node_memblks, - memblk_nodeid); - - if (memnode_shift < 0) { - printk(KERN_ERR - "SRAT: No NUMA node hash function found. Contact maintainer\n"); - bad_srat(); - return -1; - } - - nodes_or(all_nodes_parsed, memory_nodes_parsed, processor_nodes_parsed); - - /* Finally register nodes */ - for_each_node_mask(i, all_nodes_parsed) - { - uint64_t size = nodes[i].end - nodes[i].start; - - if ( size == 0 ) - printk(KERN_INFO "SRAT: node %u has no memory\n", i); - - setup_node_bootmem(i, nodes[i].start, nodes[i].end); - } - for (i = 0; i < nr_cpu_ids; i++) { - if (cpu_to_node[i] == NUMA_NO_NODE) - continue; - if (!nodemask_test(cpu_to_node[i], &processor_nodes_parsed)) - numa_set_node(i, NUMA_NO_NODE); - } - numa_init_array(); - return 0; -} - -static unsigned node_to_pxm(nodeid_t n) +unsigned int numa_node_to_arch_nid(nodeid_t n) { - unsigned i; + unsigned int i; if ((n < ARRAY_SIZE(pxm2node)) && (pxm2node[n].node == n)) return pxm2node[n].pxm; @@ -594,8 +329,8 @@ u8 __node_distance(nodeid_t a, nodeid_t b) if (!acpi_slit) return a == b ? 10 : 20; - index = acpi_slit->locality_count * node_to_pxm(a); - slit_val = acpi_slit->entry[index + node_to_pxm(b)]; + index = acpi_slit->locality_count * numa_node_to_arch_nid(a); + slit_val = acpi_slit->entry[index + numa_node_to_arch_nid(b)]; /* ACPI defines 0xff as an unreachable node and 0-9 are undefined */ if ((slit_val == 0xff) || (slit_val <= 9)) diff --git a/xen/common/Kconfig b/xen/common/Kconfig index f1ea3199c8..d20129959c 100644 --- a/xen/common/Kconfig +++ b/xen/common/Kconfig @@ -49,6 +49,9 @@ config HAS_IOPORTS config HAS_KEXEC bool +config HAS_NUMA_NODE_FWID + bool + config HAS_PDX bool diff --git a/xen/common/numa.c b/xen/common/numa.c index 83f4c8cc94..5d9e1989c4 100644 --- a/xen/common/numa.c +++ b/xen/common/numa.c @@ -13,6 +13,21 @@ #include #include +static nodemask_t __initdata processor_nodes_parsed; +static nodemask_t __initdata memory_nodes_parsed; +static struct node __initdata nodes[MAX_NUMNODES]; + +static unsigned int __ro_after_init num_node_memblks; +static struct node __ro_after_init node_memblk_range[NR_NODE_MEMBLKS]; +static nodeid_t __ro_after_init memblk_nodeid[NR_NODE_MEMBLKS]; +static __initdata DECLARE_BITMAP(memblk_hotplug, NR_NODE_MEMBLKS); + +enum conflicts { + NO_CONFLICT, + OVERLAP, + INTERLEAVE, +}; + struct node_data __ro_after_init node_data[MAX_NUMNODES]; /* Mapping from pdx to node id */ @@ -36,6 +51,311 @@ bool numa_disabled(void) return numa_off || arch_numa_broken(); } +void __init numa_set_processor_nodes_parsed(nodeid_t node) +{ + node_set(node, processor_nodes_parsed); +} + +bool valid_numa_range(paddr_t start, paddr_t end, nodeid_t node) +{ + unsigned int i; + + for ( i = 0; i < num_node_memblks; i++ ) + { + const struct node *nd = &node_memblk_range[i]; + + if ( nd->start <= start && nd->end >= end && + memblk_nodeid[i] == node ) + return true; + } + + return false; +} + +static enum conflicts __init conflicting_memblks( + nodeid_t nid, paddr_t start, paddr_t end, paddr_t nd_start, + paddr_t nd_end, unsigned int *mblkid) +{ + unsigned int i; + + /* + * Scan all recorded nodes' memory blocks to check conflicts: + * Overlap or interleave. + */ + for ( i = 0; i < num_node_memblks; i++ ) + { + const struct node *nd = &node_memblk_range[i]; + + *mblkid = i; + + /* Skip 0 bytes node memory block. */ + if ( nd->start == nd->end ) + continue; + /* + * Use memblk range to check memblk overlaps, include the + * self-overlap case. As nd's range is non-empty, the special + * case "nd->end == end && nd->start == start" also can be covered. + */ + if ( nd->end > start && nd->start < end ) + return OVERLAP; + + /* + * Use node memory range to check whether new range contains + * memory from other nodes - interleave check. We just need + * to check full contains situation. Because overlaps have + * been checked above. + */ + if ( nid != memblk_nodeid[i] && + nd->start >= nd_start && nd->end <= nd_end ) + return INTERLEAVE; + } + + return NO_CONFLICT; +} + +static void __init cutoff_node(nodeid_t i, paddr_t start, paddr_t end) +{ + struct node *nd = &nodes[i]; + + if ( nd->start < start ) + { + nd->start = start; + if ( nd->end < nd->start ) + nd->start = nd->end; + } + + if ( nd->end > end ) + { + nd->end = end; + if ( nd->start > nd->end ) + nd->start = nd->end; + } +} + +bool __init numa_memblks_available(void) +{ + return num_node_memblks < NR_NODE_MEMBLKS; +} + +/* + * This function will be called by NUMA memory affinity initialization to + * update NUMA node's memory range. In this function, we assume all memory + * regions belonging to a single node are in one chunk. Holes (or MMIO + * ranges) between them will be included in the node. + * + * So in numa_update_node_memblks, if there are multiple banks for each + * node, start and end are stretched to cover the holes between them, and + * it works as long as memory banks of different NUMA nodes don't interleave. + */ +bool __init numa_update_node_memblks(nodeid_t node, unsigned int arch_nid, + paddr_t start, paddr_t size, + const char *prefix, + bool hotplug) +{ + unsigned int i; + paddr_t end = start + size; + paddr_t nd_start = start; + paddr_t nd_end = end; + struct node *nd = &nodes[node]; + + /* + * For the node that already has some memory blocks, we will + * expand the node memory range temporarily to check memory + * interleaves with other nodes. We will not use this node + * temp memory range to check overlaps, because it will mask + * the overlaps in same node. + * + * Node with 0 bytes memory doesn't need this expansion. + */ + if ( nd->start != nd->end ) + { + if ( nd_start > nd->start ) + nd_start = nd->start; + + if ( nd_end < nd->end ) + nd_end = nd->end; + } + + /* It is fine to add this area to the nodes data it will be used later */ + switch ( conflicting_memblks(node, start, end, nd_start, nd_end, &i) ) + { + case OVERLAP: + if ( memblk_nodeid[i] == node ) + { + bool mismatch = !hotplug != !test_bit(i, memblk_hotplug); + + printk("%sNUMA: %s %u [%"PRIpaddr", %"PRIpaddr"] overlaps with itself [%"PRIpaddr", %"PRIpaddr"]\n", + mismatch ? KERN_ERR : KERN_WARNING, prefix, + arch_nid, start, end - 1, + node_memblk_range[i].start, node_memblk_range[i].end - 1); + if ( mismatch ) + return false; + break; + } + + printk(KERN_ERR + "NUMA: %s %u [%"PRIpaddr", %"PRIpaddr"] overlaps with %s %u [%"PRIpaddr", %"PRIpaddr"]\n", + prefix, arch_nid, start, end - 1, prefix, + numa_node_to_arch_nid(memblk_nodeid[i]), + node_memblk_range[i].start, node_memblk_range[i].end - 1); + return false; + + case INTERLEAVE: + printk(KERN_ERR + "NUMA： %s %u: [%"PRIpaddr", %"PRIpaddr"] interleaves with %s %u memblk [%"PRIpaddr", %"PRIpaddr"]\n", + prefix, arch_nid, nd_start, nd_end - 1, + prefix, numa_node_to_arch_nid(memblk_nodeid[i]), + node_memblk_range[i].start, node_memblk_range[i].end - 1); + return false; + + case NO_CONFLICT: + break; + } + + if ( !hotplug ) + { + node_set(node, memory_nodes_parsed); + nd->start = nd_start; + nd->end = nd_end; + } + + +#ifdef CONFIG_HAS_NUMA_NODE_FWID + printk(KERN_INFO "NUMA: Node %u %s %u [%"PRIpaddr", %"PRIpaddr"]%s\n", + node, prefix, arch_nid, start, end - 1, + hotplug ? " (hotplug)" : ""); +#else + printk(KERN_INFO "NUMA: Node %u [%"PRIpaddr", %"PRIpaddr"]%s\n", + node, start, end - 1, hotplug ? " (hotplug)" : ""); +#endif + + node_memblk_range[num_node_memblks].start = start; + node_memblk_range[num_node_memblks].end = end; + memblk_nodeid[num_node_memblks] = node; + if ( hotplug ) + { + __set_bit(num_node_memblks, memblk_hotplug); + if ( end > mem_hotplug ) + mem_hotplug = end; + } + num_node_memblks++; + + return true; +} + +/* + * Sanity check to catch more bad SRATs (they are amazingly common). + * Make sure the PXMs cover all memory. + */ +static bool __init nodes_cover_memory(void) +{ + unsigned int i; + + for ( i = 0; ; i++ ) + { + int err; + bool found; + unsigned int j; + paddr_t start, end; + + /* Try to loop memory map from index 0 to end to get RAM ranges. */ + err = arch_get_ram_range(i, &start, &end); + + /* Reached the end of the memory map? */ + if ( err == -ENOENT ) + break; + + /* Skip non-RAM entries. */ + if ( err ) + continue; + + do { + found = false; + for_each_node_mask ( j, memory_nodes_parsed ) + if ( start < nodes[j].end + && end > nodes[j].start ) + { + if ( start >= nodes[j].start ) + { + start = nodes[j].end; + found = true; + } + + if ( end <= nodes[j].end ) + { + end = nodes[j].start; + found = true; + } + } + } while ( found && start < end ); + + if ( start < end ) + { + printk(KERN_ERR "NUMA: No node for RAM range: " + "[%"PRIpaddr", %"PRIpaddr"]\n", start, end - 1); + return false; + } + } + + return true; +} + +/* Use discovered information to actually set up the nodes. */ +static bool __init numa_process_nodes(paddr_t start, paddr_t end) +{ + int ret; + unsigned int i; + nodemask_t all_nodes_parsed; + + /* First clean up the node list */ + for ( i = 0; i < MAX_NUMNODES; i++ ) + cutoff_node(i, start, end); + + /* When numa is on and has data, we can start to process numa nodes. */ + if ( arch_numa_disabled() ) + return false; + + if ( !nodes_cover_memory() ) + { + numa_fw_bad(); + return false; + } + + ret = compute_hash_shift(node_memblk_range, num_node_memblks, + memblk_nodeid); + if ( ret < 0 ) + { + printk(KERN_ERR + "NUMA: No NUMA node hash function found. Contact maintainer\n"); + numa_fw_bad(); + return false; + } + memnode_shift = ret; + + nodes_or(all_nodes_parsed, memory_nodes_parsed, processor_nodes_parsed); + + /* Finally register nodes */ + for_each_node_mask ( i, all_nodes_parsed ) + { + if ( nodes[i].end == nodes[i].start ) + printk(KERN_INFO "NUMA: node %u has no memory\n", i); + + setup_node_bootmem(i, nodes[i].start, nodes[i].end); + } + + for ( i = 0; i < nr_cpu_ids; i++ ) + { + if ( cpu_to_node[i] == NUMA_NO_NODE ) + continue; + if ( !nodemask_test(cpu_to_node[i], &processor_nodes_parsed) ) + numa_set_node(i, NUMA_NO_NODE); + } + + numa_init_array(); + + return true; +} + /* * Given a shift value, try to populate memnodemap[] * Returns : @@ -257,7 +577,7 @@ void __init numa_initmem_init(unsigned long start_pfn, unsigned long end_pfn) #endif #ifdef CONFIG_NUMA - if ( !numa_off && !numa_process_nodes(start, end) ) + if ( !numa_off && numa_process_nodes(start, end) ) return; #endif diff --git a/xen/common/page_alloc.c b/xen/common/page_alloc.c index 62afb07bc6..80447a341d 100644 --- a/xen/common/page_alloc.c +++ b/xen/common/page_alloc.c @@ -159,6 +159,8 @@ #define PGT_TYPE_INFO_INITIALIZER 0 #endif +paddr_t __read_mostly mem_hotplug; + /* * Comma-separated list of hexadecimal page numbers containing bad bytes. * e.g. 'badpage=0x3f45,0x8a321'. diff --git a/xen/drivers/acpi/Kconfig b/xen/drivers/acpi/Kconfig index e3f3d8f4b1..6f33d1ad57 100644 --- a/xen/drivers/acpi/Kconfig +++ b/xen/drivers/acpi/Kconfig @@ -7,4 +7,5 @@ config ACPI_LEGACY_TABLES_LOOKUP config ACPI_NUMA bool + select HAS_NUMA_NODE_FWID select NUMA diff --git a/xen/include/xen/mm.h b/xen/include/xen/mm.h index a925028ab3..9d14aed74b 100644 --- a/xen/include/xen/mm.h +++ b/xen/include/xen/mm.h @@ -147,6 +147,8 @@ int assign_page( /* Dump info to serial console */ void arch_dump_shared_mem_info(void); +extern paddr_t mem_hotplug; + /* * Extra fault info types which are used to further describe * the source of an access violation. diff --git a/xen/include/xen/numa.h b/xen/include/xen/numa.h index 5c7abdb050..a87cdc45b4 100644 --- a/xen/include/xen/numa.h +++ b/xen/include/xen/numa.h @@ -11,6 +11,7 @@ #define NUMA_NO_DISTANCE 0xFF #define MAX_NUMNODES (1 << NODES_SHIFT) +#define NR_NODE_MEMBLKS (MAX_NUMNODES * 2) #define vcpu_to_node(v) (cpu_to_node((v)->processor)) @@ -42,10 +43,11 @@ extern void numa_add_cpu(unsigned int cpu); extern void numa_init_array(void); extern void numa_set_node(unsigned int cpu, nodeid_t node); extern void numa_initmem_init(unsigned long start_pfn, unsigned long end_pfn); -extern int numa_process_nodes(paddr_t start, paddr_t end); +extern void numa_fw_bad(void); extern int arch_numa_setup(const char *opt); extern bool arch_numa_broken(void); +extern bool arch_numa_disabled(void); extern void setup_node_bootmem(nodeid_t nodeid, paddr_t start, paddr_t end); static inline void clear_node_cpumask(unsigned int cpu) @@ -93,6 +95,13 @@ static inline nodeid_t __attribute_pure__ phys_to_nid(paddr_t addr) */ extern int arch_get_ram_range(unsigned int idx, paddr_t *start, paddr_t *end); +extern bool valid_numa_range(paddr_t start, paddr_t end, nodeid_t node); +extern bool numa_memblks_available(void); +extern bool numa_update_node_memblks(nodeid_t node, unsigned int arch_nid, + paddr_t start, paddr_t size, + const char *prefix, + bool hotplug); +extern void numa_set_processor_nodes_parsed(nodeid_t node); #endif From patchwork Tue Sep 20 09:12:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wei Chen X-Patchwork-Id: 12981729 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 896ADECAAD8 for ; Tue, 20 Sep 2022 09:13:16 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.409253.652270 (Exim 4.92) (envelope-from ) id 1oaZJV-0005Nr-Cv; Tue, 20 Sep 2022 09:13:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 409253.652270; Tue, 20 Sep 2022 09:13:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1oaZJV-0005Nh-98; Tue, 20 Sep 2022 09:13:09 +0000 Received: by outflank-mailman (input) for mailman id 409253; Tue, 20 Sep 2022 09:13:08 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1oaZJU-0003bZ-05 for xen-devel@lists.xenproject.org; Tue, 20 Sep 2022 09:13:08 +0000 Received: from EUR02-VE1-obe.outbound.protection.outlook.com (mail-eopbgr20058.outbound.protection.outlook.com [40.107.2.58]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 703d27ef-38c4-11ed-9647-05401a9f4f97; Tue, 20 Sep 2022 11:13:07 +0200 (CEST) Received: from AS8P189CA0017.EURP189.PROD.OUTLOOK.COM (2603:10a6:20b:31f::12) by AS4PR08MB8118.eurprd08.prod.outlook.com (2603:10a6:20b:58a::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5632.21; Tue, 20 Sep 2022 09:13:05 +0000 Received: from AM7EUR03FT047.eop-EUR03.prod.protection.outlook.com (2603:10a6:20b:31f:cafe::8c) by AS8P189CA0017.outlook.office365.com (2603:10a6:20b:31f::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5632.21 via Frontend Transport; Tue, 20 Sep 2022 09:13:05 +0000 Received: from 64aa7808-outbound-1.mta.getcheckrecipient.com (63.35.35.123) by AM7EUR03FT047.mail.protection.outlook.com (100.127.140.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5632.12 via Frontend Transport; Tue, 20 Sep 2022 09:13:04 +0000 Received: ("Tessian outbound 3c27ae03f5ec:v124"); Tue, 20 Sep 2022 09:13:04 +0000 Received: from 9b23682e8610.1 by 64aa7808-outbound-1.mta.getcheckrecipient.com id 2C12A616-0F5E-4193-8A50-022FD27B38D1.1; Tue, 20 Sep 2022 09:12:58 +0000 Received: from EUR04-HE1-obe.outbound.protection.outlook.com by 64aa7808-outbound-1.mta.getcheckrecipient.com with ESMTPS id 9b23682e8610.1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384); Tue, 20 Sep 2022 09:12:58 +0000 Received: from FR3P281CA0154.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10:a2::7) by DU0PR08MB9439.eurprd08.prod.outlook.com (2603:10a6:10:42d::10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5632.21; Tue, 20 Sep 2022 09:12:54 +0000 Received: from VE1EUR03FT028.eop-EUR03.prod.protection.outlook.com (2603:10a6:d10:a2:cafe::12) by FR3P281CA0154.outlook.office365.com (2603:10a6:d10:a2::7) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5654.14 via Frontend Transport; Tue, 20 Sep 2022 09:12:54 +0000 Received: from nebula.arm.com (40.67.248.234) by VE1EUR03FT028.mail.protection.outlook.com (10.152.18.88) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.5632.12 via Frontend Transport; Tue, 20 Sep 2022 09:12:53 +0000 Received: from AZ-NEU-EX04.Arm.com (10.251.24.32) by AZ-NEU-EX04.Arm.com (10.251.24.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.9; Tue, 20 Sep 2022 09:12:50 +0000 Received: from ais-wip-ds.shanghai.arm.com (10.169.190.86) by mail.arm.com (10.251.24.32) with Microsoft SMTP Server id 15.1.2507.9 via Frontend Transport; Tue, 20 Sep 2022 09:12:47 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 703d27ef-38c4-11ed-9647-05401a9f4f97 ARC-Seal: i=2; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=pass; b=BNAqS+oVdu6cKeoZSlV0ev5QJJPBOOzuuYtfg/iAIXORGv4Caxl0qzeUpBWqL5X+QuYFJHsscj7iE6aMbSvaqsVtZ1I3FEs7AM9vICPASp+ddOeVTO2rTxhtqglYORCHhJcJ2uXDfsDwCGZa1Wfp1A7yTva65EMZ6UR5TeiELtqjtEWAvByNilCzrjlxNicPKs0jV70ZIJUIjBj6qTjFFawL4SUIkDJ9P1QTb1eqU5FEnShqYhgwjrWzR2Ppi1VIzK6IaPzaNo6NjbOzVsV8h5bamDATMstrdYUMlXIvus8ennpySrsMEj98EXvTmebOjuKT1CZD2jMLbZfrRNs4Mg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=XFQSEiC1wVF3SghW0Tlnd8Ag25n68oQY6R+gL/4gByY=; b=lFU8WavDFj7DZPhiOBdIoEnZqRDHyM00lJDROrZT0wKIv/dAEpr+SwhItINLS/c9QjcLbgJHtgh/XwzloJi+9gQbQvi5bl/oCRfoSykd5zJeTLqMMYDaOn9e7pnQmovUuNzUWIxqYWRsSySHjMlmYPotQVlEAa97MtdCedFUyg9Gi8t9LXf+DD+7A5e00LnePLoWRAtVopTQpkTzZ5CRxXf/3MrA7s4dL7qGKk7AIchHW1AQMkffsx/Aoh9ZMMfgdRDJwqpNLw2uFQELZ5BBROW8hBbF9RIOWAGbFcGuFXHEjnUM3cr0a3mPrtbu0i3FfVAu66BTJEC4VLQnuzkC8A== ARC-Authentication-Results: i=2; mx.microsoft.com 1; spf=pass (sender ip is 63.35.35.123) smtp.rcpttodomain=lists.xenproject.org smtp.mailfrom=arm.com; dmarc=pass (p=none sp=none pct=100) action=none header.from=arm.com; dkim=pass (signature was verified) header.d=armh.onmicrosoft.com; arc=pass (0 oda=1 ltdi=1 spf=[1,1,smtp.mailfrom=arm.com] dmarc=[1,1,header.from=arm.com]) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=XFQSEiC1wVF3SghW0Tlnd8Ag25n68oQY6R+gL/4gByY=; b=f9CjWTpSqa1JJoD1N8w8Pw8tJw3p+GTXZWczW1UjKo48HiJikHvyfzjR4YAklu+18Pc0iAY8GiyZ8skDUgD88uaLPC1XJxaHMV1SfKVUA76993T9I5UFaReqFtwxhh+PAaf0n7Jgxcit53VXku2Zl9qtXRoMqZDqF8j8ReJY1ew= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 63.35.35.123) smtp.mailfrom=arm.com; dkim=pass (signature was verified) header.d=armh.onmicrosoft.com;dmarc=pass action=none header.from=arm.com; Received-SPF: Pass (protection.outlook.com: domain of arm.com designates 63.35.35.123 as permitted sender) receiver=protection.outlook.com; client-ip=63.35.35.123; helo=64aa7808-outbound-1.mta.getcheckrecipient.com; pr=C X-CheckRecipientChecked: true X-CR-MTA-CID: 0269bc582c795a1c X-CR-MTA-TID: 64aa7808 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=SFuMSDp0e4D0vJVbEaW/Bj9Nun2dIXHsz8bOeNQ5qX1KlBCWi57+zSfZLVLvH+iFCYgZQUbmdMzjc5ji3ceCTuuIHnxfl6gi2y+p67MlA2yEaFXpkduskRCWCC84RnfqsSm24j7SCRCd25Y/wZkId98/7CnP0KI17kSJbeix5IXfIPnDviajeDKChKe+xQKmcXK5UKeePWe/sW+eRqVNenBk5j7cVjKDokXeXx0Smjr+obDkYbuRRgmfzVsRkZjhbGNv6Hsu6+E+EkjdtMfjpD5Vuw0Dew5R4P1+z18KVZiIA6tuE7II2NXVH0mbuuv3D5qOYieuMYprv9jZLGt9Qw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=XFQSEiC1wVF3SghW0Tlnd8Ag25n68oQY6R+gL/4gByY=; b=ThRUpxkIZfzjMmehywjqtyiJGo+Y7B84n1n++CeSOx0jfHQw0XiQyCkeA+n4/HazMKv8WSEe/S2kUG7xTvENVp21it1sjsZaojsUQfSg2GuBjRPgztcg27GPRYjr9kEx7KbEb5jroH0/VQ3ttHb1YkMwzRYHT6ARin+OXmP/0dJS3EQwRBazpxxkoxcUJ0yU6ts3a6Zt7R6azMqYk0x3dG4AMLh2UQ6zuuIRhZ3pNmPrFZOBl4UPo0S+Y3XG1LPAmNI+1U7kGpw9oA45GHmxKZgl33HFcKWSN9VcKQLONR1MQTeA8uShZBF9E+Js7Y2dlefKov+Vq/5zcVCY+/47AA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 40.67.248.234) smtp.rcpttodomain=lists.xenproject.org smtp.mailfrom=arm.com; dmarc=pass (p=none sp=none pct=100) action=none header.from=arm.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=XFQSEiC1wVF3SghW0Tlnd8Ag25n68oQY6R+gL/4gByY=; b=f9CjWTpSqa1JJoD1N8w8Pw8tJw3p+GTXZWczW1UjKo48HiJikHvyfzjR4YAklu+18Pc0iAY8GiyZ8skDUgD88uaLPC1XJxaHMV1SfKVUA76993T9I5UFaReqFtwxhh+PAaf0n7Jgxcit53VXku2Zl9qtXRoMqZDqF8j8ReJY1ew= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 40.67.248.234) smtp.mailfrom=arm.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=arm.com; Received-SPF: Pass (protection.outlook.com: domain of arm.com designates 40.67.248.234 as permitted sender) receiver=protection.outlook.com; client-ip=40.67.248.234; helo=nebula.arm.com; pr=C From: Wei Chen To: CC: , Wei Chen , Andrew Cooper , George Dunlap , "Jan Beulich" , Julien Grall , "Stefano Stabellini" , Wei Liu , =?utf-8?q?Roger_Pau_Monn=C3=A9?= Subject: [PATCH v5 6/6] xen: introduce a Kconfig option to configure NUMA nodes number Date: Tue, 20 Sep 2022 17:12:18 +0800 Message-ID: <20220920091218.1208658-7-wei.chen@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220920091218.1208658-1-wei.chen@arm.com> References: <20220920091218.1208658-1-wei.chen@arm.com> MIME-Version: 1.0 X-EOPAttributedMessage: 1 X-MS-TrafficTypeDiagnostic: VE1EUR03FT028:EE_|DU0PR08MB9439:EE_|AM7EUR03FT047:EE_|AS4PR08MB8118:EE_ X-MS-Office365-Filtering-Correlation-Id: 2212cf38-3720-46a0-b347-08da9ae85324 x-checkrecipientrouted: true NoDisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; X-Microsoft-Antispam-Message-Info-Original: urH7mDjAbkrn4EL4iEgbWWoPyvPsknma3r3jsqIuZM4k7OAnMvPT/cYnqec1OHsxdZgNlNglVtu53nR4WR/pH45MtcsLzMh/DlAmhvIfvrUkDjgAKDmrH2ZsP+WtxFN4BJzWn//c3b0kACjmINBtFrC3uNPKe60MFpmsyiQhpufhjNOSEGIL+O42uIzqLAYoNtDvr9x8czwBZXy92vboTspNe2u5pDm7aPpkWbCNIDZVgqO4UAxuO19n2tYlM5Rg4KBS55F0G5gJdqd78CJY3q+2dlA0fIiizvnBVU0hV0dOGtGfNGFAiyU3LoRzRpHPqfnMNCJJR7EdXVdSFFWTh867kxt959zcxKwMQ7sVrovDtaFYWgFnFkg7SfXV88r3k+2uAqdGCmLQtloO7yLitIc1GqA72HouqV7nn399jMkmCzZBz4w/Bl9+PR9cRqWXg8kxc4LYKWM+IOVSWm0T/aoB6Al+Hcu8VL99RgKBQZmaNJ+nxFnlvXugv3QYt7A+vsd/4Ehm/lSS6tplrx6AQDAVz2fcLlg4uJZ0vxjUJitos0jKHgjiZtwl67drYuQZ9BtpxmMAvMoxpxEDyXMQ99Ak7/xK30n87gEasGfXEfCtrx57H7oEpb0ws7cNnpFu5gdCNmRyPNgqTq1/B4Oy8YCclhXAWQd1d8moDieRpJXdR1wGj9l1IDeL8CpEqUT9+mYgD6CUEZ5vtlX/pglHwNaoX8t/G7v1cjgqLlnxuFtfKnJZphI2RZx1ivqRw/kft2yz1kkQzalhgpoWXnOa+BGaxAAT1jVByI5Qun9fXLw= X-Forefront-Antispam-Report-Untrusted: CIP:40.67.248.234;CTRY:IE;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:nebula.arm.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(396003)(39860400002)(346002)(136003)(376002)(451199015)(36840700001)(40470700004)(46966006)(1076003)(5660300002)(40460700003)(336012)(82310400005)(2616005)(186003)(316002)(44832011)(47076005)(54906003)(6916009)(356005)(8936002)(86362001)(26005)(40480700001)(4326008)(7696005)(36756003)(2906002)(36860700001)(82740400003)(478600001)(426003)(83380400001)(70206006)(8676002)(70586007)(41300700001)(6666004)(81166007)(36900700001);DIR:OUT;SFP:1101; X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU0PR08MB9439 X-MS-Exchange-Transport-CrossTenantHeadersStripped: AM7EUR03FT047.eop-EUR03.prod.protection.outlook.com X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id-Prvs: 166e9532-e357-4c16-e3a4-08da9ae84d28 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: d/q6MHh2HoE0qNw7J+F5cedxpbNMcuAPvqoyshO8DK3FJQ65g+MSDgg1ZNwcYhDh12eeWsvtQalV7I7FTElvrgFYoKkgMM4rfUklFTU5YbkgAvcMc8I+vM50R+BTyU2yHVjObBEkvZlLAXOSLK2txWBPsHz8Um68/OtNC4y/JX5IEjgtBYbLe9zi4DqNrxQYn5jF24Mt2nIL3zsJfgNz/1o7ftsQG6FAtkfRgBnKDiISQ1l6b25PEzZWh1SqFiS+MIMJPQ7nn1PbBECI0kf+YSrmSoHsag3YJ0kijnUJIVm3BlAxPcRXJzCRk8f2Oz4TIimJhDIgbSCDIFmtCcSywsjNms5CkcbpGqACNozo04p8NIx6R8Oy1TcG/7is+10S6quJ3DdVaGIKS+Jj+1QxZ+LcCEX4Tmeln/i54E1PcUpmLi+pnZGD5UfiNqsidq0rQqUMY3y8SXcqMtQR2nthDDlGF85lf1OeYAPVJJKCigY5HnfPcGM0jtFqWuy1eiQHbQmU6WKK+2bamYnGhLahnmiyvYh1cQaToL9p0/EqN3PyCt6CVfL/hfAgeWFV/tHMu2OIs3A+c/07QEg+G0yFBpHjBrZRORr7ryeG7uQVPZos5tZea1gYtklQ7dfFEhTAA1lUlEy6kBQbIQbSn38nnXi3g3jU1gAd1yb5EG7+Ilp9ecPje4wVpKTuNSj+ROg2lHLEcpZ9nzaOzRr+dxK+hWF4cw39ysFJWs0MNy0w0FtBFb/oiMqxEsOb5EojpvMsKDhNxtABI1EQlpFbGcm0Sw== X-Forefront-Antispam-Report: CIP:63.35.35.123;CTRY:IE;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:64aa7808-outbound-1.mta.getcheckrecipient.com;PTR:ec2-63-35-35-123.eu-west-1.compute.amazonaws.com;CAT:NONE;SFS:(13230022)(4636009)(396003)(136003)(39860400002)(346002)(376002)(451199015)(36840700001)(46966006)(40470700004)(36756003)(81166007)(86362001)(82740400003)(336012)(47076005)(426003)(83380400001)(44832011)(5660300002)(8936002)(2906002)(186003)(2616005)(36860700001)(107886003)(7696005)(1076003)(40460700003)(6666004)(26005)(70206006)(41300700001)(316002)(8676002)(4326008)(70586007)(40480700001)(82310400005)(54906003)(6916009)(478600001);DIR:OUT;SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Sep 2022 09:13:04.3725 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2212cf38-3720-46a0-b347-08da9ae85324 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM7EUR03FT047.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS4PR08MB8118 Currently the maximum number of NUMA nodes is a hardcoded value. This provides little flexibility unless changing the code. Introduce a new Kconfig option to change the maximum number of NUMA nodes conveniently. Also considering that not all architectures support NUMA, this Kconfig option is only visible on NUMA enabled architectures. Architectures not supporting NUMA still use 1 for MAX_NUMNODES. As NODES_SHIFT is currently unused, we're taking this opportunity to remove it. Signed-off-by: Wei Chen Acked-by: Jan Beulich --- v4 -> v5: 1. No change. v3 -> v4: 1. Update the commit log to follow Jan's suggestion. 2. Add Ack-by. v2 -> v3: 1. Fix indent. 2. Use 2-64 for node range. v1 -> v2: 1. Add NODES_SHIFT remove message in commit log 2. Change NR_NUMA_NODES upper bound from 4095 to 255. --- xen/arch/Kconfig | 11 +++++++++++ xen/arch/x86/include/asm/numa.h | 2 -- xen/include/xen/numa.h | 11 ++++++----- 3 files changed, 17 insertions(+), 7 deletions(-) diff --git a/xen/arch/Kconfig b/xen/arch/Kconfig index f16eb0df43..7028f7b74f 100644 --- a/xen/arch/Kconfig +++ b/xen/arch/Kconfig @@ -17,3 +17,14 @@ config NR_CPUS For CPU cores which support Simultaneous Multi-Threading or similar technologies, this the number of logical threads which Xen will support. + +config NR_NUMA_NODES + int "Maximum number of NUMA nodes supported" + range 2 64 + default "64" + depends on NUMA + help + Controls the build-time size of various arrays and bitmaps + associated with multiple-nodes management. It is the upper bound of + the number of NUMA nodes that the scheduler, memory allocation and + other NUMA-aware components can handle. diff --git a/xen/arch/x86/include/asm/numa.h b/xen/arch/x86/include/asm/numa.h index 2ca3475271..7866afa408 100644 --- a/xen/arch/x86/include/asm/numa.h +++ b/xen/arch/x86/include/asm/numa.h @@ -3,8 +3,6 @@ #include -#define NODES_SHIFT 6 - typedef u8 nodeid_t; extern int srat_rev; diff --git a/xen/include/xen/numa.h b/xen/include/xen/numa.h index a87cdc45b4..cabe8571b3 100644 --- a/xen/include/xen/numa.h +++ b/xen/include/xen/numa.h @@ -3,14 +3,15 @@ #include -#ifndef NODES_SHIFT -#define NODES_SHIFT 0 -#endif - #define NUMA_NO_NODE 0xFF #define NUMA_NO_DISTANCE 0xFF -#define MAX_NUMNODES (1 << NODES_SHIFT) +#ifdef CONFIG_NR_NUMA_NODES +#define MAX_NUMNODES CONFIG_NR_NUMA_NODES +#else +#define MAX_NUMNODES 1 +#endif + #define NR_NODE_MEMBLKS (MAX_NUMNODES * 2) #define vcpu_to_node(v) (cpu_to_node((v)->processor))