From patchwork Tue Sep 20 11:15:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 12981925 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D2023ECAAD8 for ; Tue, 20 Sep 2022 11:16:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230164AbiITLQC (ORCPT ); Tue, 20 Sep 2022 07:16:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60728 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229590AbiITLQB (ORCPT ); Tue, 20 Sep 2022 07:16:01 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0494E6FA0D; Tue, 20 Sep 2022 04:16:00 -0700 (PDT) Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 28KB0HWW007387; Tue, 20 Sep 2022 11:15:52 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : mime-version : content-type; s=qcppdkim1; bh=PoTT7rLq6kWSImDHRaFEIjlxRKHBE/QY5rFUGCmFcJE=; b=iK6mbhJC6B8azSydtKZrC+pjNnSbANnvEhHSqk+Kt2+FKMnMZwp2s1TZRCKh06y+5WcT G3B6+wiHycTAzMLPa2+1JUVjW85oQ/4jAlyN5X3BPm+vcqvFuQlnVazKbeXAx/mdX5e7 zoc+gEe/Gf3kONVdtxL5raLralihPL/HBYsrmEbuYZo3+WYiv0Pe7yPIeO0+0Agx4U+o xJW4ie/0Ups7MuK/NyNo+GI6NJELY2FKMon4pUMtlh8XNgpGRFQ7vRPUdPFOKS7Xaaax Wxvvu5I/wjVLw9m7Mo5lPAda221jQsAiTcup23mq03oingOQop6fQIue5HNSKMmMiL3C sQ== Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3jq4r09gu8-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 20 Sep 2022 11:15:52 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 28KBFoGa008280 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 20 Sep 2022 11:15:51 GMT Received: from blr-ubuntu-173.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Tue, 20 Sep 2022 04:15:46 -0700 From: Rajendra Nayak To: , , , , , CC: , , , , , , , Rajendra Nayak Subject: [PATCH v3 1/3] clk: qcom: gdsc: Fix the handling of PWRSTS_RET support Date: Tue, 20 Sep 2022 16:45:15 +0530 Message-ID: <20220920111517.10407-1-quic_rjendra@quicinc.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: y3Z4wARIr89kpMBMlGB9IJ1aZcXN44b0 X-Proofpoint-GUID: y3Z4wARIr89kpMBMlGB9IJ1aZcXN44b0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-20_03,2022-09-16_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 mlxlogscore=999 malwarescore=0 suspectscore=0 spamscore=0 lowpriorityscore=0 clxscore=1011 impostorscore=0 mlxscore=0 bulkscore=0 priorityscore=1501 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2209130000 definitions=main-2209200068 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org GDSCs cannot be transitioned into a Retention state in SW. When either the RETAIN_MEM bit, or both the RETAIN_MEM and RETAIN_PERIPH bits are set, and the GDSC is left ON, the HW takes care of retaining the memory/logic for the domain when the parent domain transitions to power collapse/power off state. On some platforms where the parent domains lowest power state itself is Retention, just leaving the GDSC in ON (without any RETAIN_MEM/RETAIN_PERIPH bits being set) will also transition it to Retention. The existing logic handling the PWRSTS_RET seems to set the RETAIN_MEM/RETAIN_PERIPH bits if the cxcs offsets are specified but then explicitly turns the GDSC OFF as part of _gdsc_disable(). Fix that by leaving the GDSC in ON state. Signed-off-by: Rajendra Nayak Cc: AngeloGioacchino Del Regno --- v3: Updated changelog There are a few existing users of PWRSTS_RET and I am not sure if they would be impacted with this change 1. mdss_gdsc in mmcc-msm8974.c, I am expecting that the gdsc is actually transitioning to OFF and might be left ON as part of this change, atleast till we hit system wide low power state. If we really leak more power because of this change, the right thing to do would be to update .pwrsts for mdss_gdsc to PWRSTS_OFF_ON instead of PWRSTS_RET_ON I dont have a msm8974 hardware, so if anyone who has can report any issues I can take a look further on how to fix it. 2. gpu_gx_gdsc in gpucc-msm8998.c and gpu_gx_gdsc in gpucc-sdm660.c Both of these seem to add support for 3 power state OFF, RET and ON, however I dont see any logic in gdsc driver to handle 3 different power states. So I am expecting that these are infact just transitioning between ON and OFF and RET state is never really used. The ideal fix for them would be to just update their resp. .pwrsts to PWRSTS_OFF_ON only. drivers/clk/qcom/gdsc.c | 10 ++++++++++ drivers/clk/qcom/gdsc.h | 5 +++++ 2 files changed, 15 insertions(+) diff --git a/drivers/clk/qcom/gdsc.c b/drivers/clk/qcom/gdsc.c index d3244006c661..ccf63771e852 100644 --- a/drivers/clk/qcom/gdsc.c +++ b/drivers/clk/qcom/gdsc.c @@ -368,6 +368,16 @@ static int _gdsc_disable(struct gdsc *sc) if (sc->pwrsts & PWRSTS_OFF) gdsc_clear_mem_on(sc); + /* + * If the GDSC supports only a Retention state, apart from ON, + * leave it in ON state. + * There is no SW control to transition the GDSC into + * Retention state. This happens in HW when the parent + * domain goes down to a Low power state + */ + if (sc->pwrsts == PWRSTS_RET_ON) + return 0; + ret = gdsc_toggle_logic(sc, GDSC_OFF); if (ret) return ret; diff --git a/drivers/clk/qcom/gdsc.h b/drivers/clk/qcom/gdsc.h index 5de48c9439b2..981a12c8502d 100644 --- a/drivers/clk/qcom/gdsc.h +++ b/drivers/clk/qcom/gdsc.h @@ -49,6 +49,11 @@ struct gdsc { const u8 pwrsts; /* Powerdomain allowable state bitfields */ #define PWRSTS_OFF BIT(0) +/* + * There is no SW control to transition a GDSC into + * PWRSTS_RET. This happens in HW when the parent + * domain goes down to a low power state + */ #define PWRSTS_RET BIT(1) #define PWRSTS_ON BIT(2) #define PWRSTS_OFF_ON (PWRSTS_OFF | PWRSTS_ON) From patchwork Tue Sep 20 11:15:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 12981926 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4CCCBECAAD8 for ; Tue, 20 Sep 2022 11:16:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230369AbiITLQL (ORCPT ); Tue, 20 Sep 2022 07:16:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60800 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230368AbiITLQK (ORCPT ); Tue, 20 Sep 2022 07:16:10 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6C92970E4C; Tue, 20 Sep 2022 04:16:09 -0700 (PDT) Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 28K80hH4012600; Tue, 20 Sep 2022 11:15:56 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=f9bQ2Pub38kjwx86yF3O38oDOzoP4fBrS6r2luF9pNU=; b=C1NrOjHxBAdVB1K88iRB4R3gsa7H7tF3/BLY7kFCox9/mIZe0B6lg923tO3Ru2dIM1O7 sHZbS+UMwOAgHR+shHiLfVAYUXpn5pSd9W+wO6gi2N00FnaRwVmsEjFbgmrjWTFCokP/ jThlXFEGGUECIFAagIWzI6wRpCOR9y9yPRzsn3mOhx3BGk3sQj5u4OMFKdgmPSdhrDCa inyM91Z2zSZmJpfbHRHb6P4icnw2APLVyai7JBVOAFYZ8SfKijEy4/x8/nN2iWUQ4Yn5 YK5ovgyoSTz8tisPGObibtKFk+uqRSi8fZnb01ZKUAk2CW6dOox33p0UVvd7iwNjr7lD FQ== Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3jq04y2b3w-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 20 Sep 2022 11:15:56 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 28KBFtUc007692 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 20 Sep 2022 11:15:55 GMT Received: from blr-ubuntu-173.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Tue, 20 Sep 2022 04:15:51 -0700 From: Rajendra Nayak To: , , , , , CC: , , , , , , , Rajendra Nayak Subject: [PATCH v3 2/3] clk: qcom: gcc-sc7180: Update the .pwrsts for usb gdsc Date: Tue, 20 Sep 2022 16:45:16 +0530 Message-ID: <20220920111517.10407-2-quic_rjendra@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220920111517.10407-1-quic_rjendra@quicinc.com> References: <20220920111517.10407-1-quic_rjendra@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: oYEWFkkhh4t9-3gxBRm_w6PPpDxX1NZM X-Proofpoint-GUID: oYEWFkkhh4t9-3gxBRm_w6PPpDxX1NZM X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-20_03,2022-09-16_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 priorityscore=1501 spamscore=0 clxscore=1015 mlxscore=0 malwarescore=0 bulkscore=0 phishscore=0 impostorscore=0 mlxlogscore=980 adultscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2209130000 definitions=main-2209200068 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The USB controller on sc7180 does not retain the state when the system goes into low power state and the GDSC is turned off. This results in the controller reinitializing and re-enumerating all the connected devices (resulting in additional delay while coming out of suspend) Fix this by updating the .pwrsts for the USB GDSC so it only transitions to retention state in low power. Since sc7180 only supports cx (parent of usb gdsc) Retention, there are no cxcs offsets mentioned in order to support the Retention state. Signed-off-by: Rajendra Nayak --- v3: Updated the changelog drivers/clk/qcom/gcc-sc7180.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/qcom/gcc-sc7180.c b/drivers/clk/qcom/gcc-sc7180.c index c2ea09945c47..2d3980251e78 100644 --- a/drivers/clk/qcom/gcc-sc7180.c +++ b/drivers/clk/qcom/gcc-sc7180.c @@ -2224,7 +2224,7 @@ static struct gdsc usb30_prim_gdsc = { .pd = { .name = "usb30_prim_gdsc", }, - .pwrsts = PWRSTS_OFF_ON, + .pwrsts = PWRSTS_RET_ON, }; static struct gdsc hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc = { From patchwork Tue Sep 20 11:15:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 12981927 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7B625C6FA91 for ; Tue, 20 Sep 2022 11:16:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230307AbiITLQM (ORCPT ); Tue, 20 Sep 2022 07:16:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60788 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230326AbiITLQJ (ORCPT ); Tue, 20 Sep 2022 07:16:09 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6B20A6EF34; Tue, 20 Sep 2022 04:16:08 -0700 (PDT) Received: from pps.filterd (m0279869.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 28KB0ugJ014528; Tue, 20 Sep 2022 11:16:01 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=/C5oc3Ip0QsKalQGmVuCjzmYfgs14mBBhCoMl2zwOQI=; b=DyUnFvo5hRHSI6yn3JG2Xf8smg/YxkTmmEt15UW/ZznSzqR2bQtfECRcrR17Am0N6hGA Tqg2+tJz9alcQErZP00ay3q0k4kamKrnxdYZXeNwUEGv5ZBpe9cm1Av8kxHihFvSlHT+ xMXdGnfjrdEAat+QHaFUqJFpwjXeHPuMn9V15vYuw8td+9egcKMG+iyb6TBovTadHJxu B5Yorf0q/JNVDbDC5x9IlSijuLV2+BS1Bvw8eQBl4HLW7Bfu5FpPR0QcmY6L156gqAxL +0SwR839KvzUElY8CHhh1bolcSBLYjyCsVxFLYQ3pu7cgiWWYRCBCSaPpHX3dLa//evO 1A== Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3jptw337fa-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 20 Sep 2022 11:16:01 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 28KBFx92008302 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 20 Sep 2022 11:15:59 GMT Received: from blr-ubuntu-173.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Tue, 20 Sep 2022 04:15:55 -0700 From: Rajendra Nayak To: , , , , , CC: , , , , , , , Rajendra Nayak Subject: [PATCH v3 3/3] clk: qcom: gcc-sc7280: Update the .pwrsts for usb gdscs Date: Tue, 20 Sep 2022 16:45:17 +0530 Message-ID: <20220920111517.10407-3-quic_rjendra@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220920111517.10407-1-quic_rjendra@quicinc.com> References: <20220920111517.10407-1-quic_rjendra@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: yxBpGv8ms_Tkx3F4TxLR-J04abdrvie4 X-Proofpoint-GUID: yxBpGv8ms_Tkx3F4TxLR-J04abdrvie4 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-20_03,2022-09-16_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 clxscore=1015 impostorscore=0 phishscore=0 adultscore=0 mlxscore=0 bulkscore=0 malwarescore=0 priorityscore=1501 suspectscore=0 spamscore=0 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2209130000 definitions=main-2209200068 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The USB controllers on sc7280 do not retain the state when the system goes into low power state and the GDSCs are turned off. This results in the controllers reinitializing and re-enumerating all the connected devices (resulting in additional delay while coming out of suspend) Fix this by updating the .pwrsts for the USB GDSCs so they only transition to retention state in low power. Since sc7280 only supports cx (parent of usb gdscs) Retention, there are no cxcs offsets mentioned in order to support the Retention state. Signed-off-by: Rajendra Nayak Reviewed-by: Matthias Kaehlcke Tested-by: Matthias Kaehlcke --- v3: Updated the changelog drivers/clk/qcom/gcc-sc7280.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/qcom/gcc-sc7280.c b/drivers/clk/qcom/gcc-sc7280.c index 7ff64d4d5920..7b6e5a86c11f 100644 --- a/drivers/clk/qcom/gcc-sc7280.c +++ b/drivers/clk/qcom/gcc-sc7280.c @@ -3126,7 +3126,7 @@ static struct gdsc gcc_usb30_prim_gdsc = { .pd = { .name = "gcc_usb30_prim_gdsc", }, - .pwrsts = PWRSTS_OFF_ON, + .pwrsts = PWRSTS_RET_ON, .flags = VOTABLE, }; @@ -3135,7 +3135,7 @@ static struct gdsc gcc_usb30_sec_gdsc = { .pd = { .name = "gcc_usb30_sec_gdsc", }, - .pwrsts = PWRSTS_OFF_ON, + .pwrsts = PWRSTS_RET_ON, .flags = VOTABLE, };