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[109.15.145.210]) by smtp.googlemail.com with ESMTPSA id u3-20020a5d4683000000b00225239d9265sm242056wrq.74.2022.09.20.08.03.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Sep 2022 08:03:50 -0700 (PDT) From: Amjad Ouled-Ameur Date: Tue, 20 Sep 2022 17:03:48 +0200 Subject: [PATCH v5 1/4] dt-bindings: thermal: mediatek: add binding documentation for MT8365 SoC MIME-Version: 1.0 Message-Id: <20220920-i350-thermal-up-v5-1-123bc852d199@baylibre.com> References: <20220920-i350-thermal-up-v5-0-123bc852d199@baylibre.com> In-Reply-To: <20220920-i350-thermal-up-v5-0-123bc852d199@baylibre.com> To: Amit Kucheria , Rob Herring , Zhang Rui , Daniel Lezcano , "Rafael J. Wysocki" , Krzysztof Kozlowski Cc: Fabien Parent , Hsin-Yi Wang , Markus Schneider-Pargmann , linux-pm@vger.kernel.org, AngeloGioacchino Del Regno , Matthias Brugger , Michael Kao , Amjad Ouled-Ameur , Rob Herring , linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-Mailer: b4 0.10.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1663686228; l=1160; i=aouledameur@baylibre.com; s=20220920; h=from:subject:message-id; bh=Ub01dL5lJO3HNAW69Ya4ycDE389//wyHtwywY+gaBdc=; b=74IdXWfel2MH3YMf/5GSvjnaUPFZaWOdAfv1u1EwWpISTYhcQ2znV5BZFo+6oRG+qqDuslWg7tTs 7M5ta8gcAZgPrbqwIfS95/tp8jcOcwL48HVgbtTrQygMBOSnE613 X-Developer-Key: i=aouledameur@baylibre.com; a=ed25519; pk=HgYWawSL4qLGPx+RzJ+Cuu+V8Pi/KQnDDm1wjWPMOFE= Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Fabien Parent Add the binding documentation for the thermal support on MT8365 SoC. Signed-off-by: Fabien Parent Signed-off-by: Amjad Ouled-Ameur Reviewed-by: Matthias Brugger Reviewed-by: AngeloGioacchino Del Regno Acked-by: Rob Herring diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt index 5c7e7bdd029a..ba4ebffeade4 100644 --- a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt @@ -14,6 +14,7 @@ Required properties: - "mediatek,mt2712-thermal" : For MT2712 family of SoCs - "mediatek,mt7622-thermal" : For MT7622 SoC - "mediatek,mt8183-thermal" : For MT8183 family of SoCs + - "mediatek,mt8365-thermal" : For MT8365 family of SoCs - "mediatek,mt8516-thermal", "mediatek,mt2701-thermal : For MT8516 family of SoCs - reg: Address range of the thermal controller - interrupts: IRQ for the thermal controller From patchwork Tue Sep 20 15:03:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amjad Ouled-Ameur X-Patchwork-Id: 12982329 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 852AEC6FA91 for ; Tue, 20 Sep 2022 15:04:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231250AbiITPD6 (ORCPT ); Tue, 20 Sep 2022 11:03:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40044 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231439AbiITPDz (ORCPT ); Tue, 20 Sep 2022 11:03:55 -0400 Received: from mail-wm1-x330.google.com (mail-wm1-x330.google.com [IPv6:2a00:1450:4864:20::330]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BABB23B94C for ; Tue, 20 Sep 2022 08:03:53 -0700 (PDT) Received: by mail-wm1-x330.google.com with SMTP id e10-20020a05600c4e4a00b003b4eff4ab2cso1378846wmq.4 for ; Tue, 20 Sep 2022 08:03:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date; bh=TmGNn02GgjwItsyH3XavnEsHEt3aT4LQ32MW9ssWl/I=; b=2F0yiM/OgzF4Ed7A5+WPvE7Mk1nzN1Iilg59ccLi7J73+lybZivFjlO3Ll5UIxSnxr n7RS1IA6Hr050B4gC1QLs6XV3Mz3BA3f8z8nfqiJFw72iDOujNjc20MTUUvyxD++HHJt VXKqtKlf/7XaMor2XknMhXTi6u0gMulhVdrofvY6mBCdvs+naTmea49V8tGFDkhQ6apP mN2Yrm8kSCTRgCxCM9WRqqLl2PDj2ZfxpP5jJJ+ks4kllQhhpA5p3KDAo1FX6YMmJTqE mOnGI5EbKnowqU0NCoM70yjtJKEc/G07WP4YvkhkZaOK7f693MBX/sSYohYU/pPNq3tb F8HA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date; bh=TmGNn02GgjwItsyH3XavnEsHEt3aT4LQ32MW9ssWl/I=; b=jfY3bGyTsQ8k+FUQU2GZvgCjKFJ48P2DWKJ1pYTgEfSilxXHCLPG7nwW6k8Tb1uDa3 5PBzYE7HzjdhVwZh8saxZAoHFNx8WuWrTUFs4/ayweRV9UbY4xKj+WlSKwi5WvFFJPDH 0bcmUmSMUoZOKW/BdE0P3tuFTR2mg2zbbd33Ef3lHXeQhpLEZL91+32LEYueRJXTssoT y2lHx+LYU5s5BspyeNhfxVDJlSqco8F3olLKtti9VwCar/gl75XFQ/lnO18Xui2GGIm8 KZBfxPNowPDo4+5jLr+LkWWPzCng3MEBupwVoio1dvDS2rRLdiT0LBVEpBYe1IorR5RB 4XmA== X-Gm-Message-State: ACrzQf2PTKyStQDF9zq3TMzPl8WRtuLiS4Itw35QOj2QhcJjV1E7R/7M 7dJAIb48lf/Wb6gBa1KXRv+Ygg== X-Google-Smtp-Source: AMsMyM4xTO6waY4g42gGq+iBbRpilZuIgppAQBmwNVrkXXSLy+/oePmPpSG/eXaojWrHeXW7Hhknqg== X-Received: by 2002:a05:600c:a09:b0:3a6:8900:c651 with SMTP id z9-20020a05600c0a0900b003a68900c651mr2786317wmp.145.1663686232198; Tue, 20 Sep 2022 08:03:52 -0700 (PDT) Received: from [127.0.1.1] (210.145.15.109.rev.sfr.net. [109.15.145.210]) by smtp.googlemail.com with ESMTPSA id u3-20020a5d4683000000b00225239d9265sm242056wrq.74.2022.09.20.08.03.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Sep 2022 08:03:51 -0700 (PDT) From: Amjad Ouled-Ameur Date: Tue, 20 Sep 2022 17:03:49 +0200 Subject: [PATCH v5 2/4] thermal: mediatek: control buffer enablement tweaks MIME-Version: 1.0 Message-Id: <20220920-i350-thermal-up-v5-2-123bc852d199@baylibre.com> References: <20220920-i350-thermal-up-v5-0-123bc852d199@baylibre.com> In-Reply-To: <20220920-i350-thermal-up-v5-0-123bc852d199@baylibre.com> To: Amit Kucheria , Rob Herring , Zhang Rui , Daniel Lezcano , "Rafael J. Wysocki" , Krzysztof Kozlowski Cc: Fabien Parent , Hsin-Yi Wang , Markus Schneider-Pargmann , linux-pm@vger.kernel.org, AngeloGioacchino Del Regno , Matthias Brugger , Michael Kao , Amjad Ouled-Ameur , Rob Herring , linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-Mailer: b4 0.10.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1663686228; l=2347; i=aouledameur@baylibre.com; s=20220920; h=from:subject:message-id; bh=5q/fW4mpAQQZom7YMno2r4M6vJl67k0unrSVbaUfEJ8=; b=XlVTEXZVb137T29c44XMQm5WKed4jWjkqD0vT/9S8XW0ASP1lOEMbQT3VbT6aqgiabILmrb4jfbe PuxqMiI2Dm2YL6lh8uL1289P7KUrvFJ/Gw6bDdoCvJikuGYoVNVy X-Developer-Key: i=aouledameur@baylibre.com; a=ed25519; pk=HgYWawSL4qLGPx+RzJ+Cuu+V8Pi/KQnDDm1wjWPMOFE= Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Markus Schneider-Pargmann Add logic in order to be able to turn on the control buffer on MT8365. This change now allows to have control buffer support for MTK_THERMAL_V1, and it allows to define the register offset, and mask used to enable it. Signed-off-by: Markus Schneider-Pargmann Signed-off-by: Fabien Parent Signed-off-by: Amjad Ouled-Ameur Reviewed-by: AngeloGioacchino Del Regno diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c index 8440692e3890..d8ddceb75372 100644 --- a/drivers/thermal/mtk_thermal.c +++ b/drivers/thermal/mtk_thermal.c @@ -271,6 +271,9 @@ struct mtk_thermal_data { bool need_switch_bank; struct thermal_bank_cfg bank_data[MAX_NUM_ZONES]; enum mtk_thermal_version version; + u32 apmixed_buffer_ctl_reg; + u32 apmixed_buffer_ctl_mask; + u32 apmixed_buffer_ctl_set; }; struct mtk_thermal { @@ -514,6 +517,9 @@ static const struct mtk_thermal_data mt7622_thermal_data = { .adcpnp = mt7622_adcpnp, .sensor_mux_values = mt7622_mux_values, .version = MTK_THERMAL_V2, + .apmixed_buffer_ctl_reg = APMIXED_SYS_TS_CON1, + .apmixed_buffer_ctl_mask = GENMASK(31, 6) | BIT(3), + .apmixed_buffer_ctl_set = BIT(0), }; /* @@ -963,14 +969,18 @@ static const struct of_device_id mtk_thermal_of_match[] = { }; MODULE_DEVICE_TABLE(of, mtk_thermal_of_match); -static void mtk_thermal_turn_on_buffer(void __iomem *apmixed_base) +static void mtk_thermal_turn_on_buffer(struct mtk_thermal *mt, + void __iomem *apmixed_base) { - int tmp; + u32 tmp; + + if (!mt->conf->apmixed_buffer_ctl_reg) + return; - tmp = readl(apmixed_base + APMIXED_SYS_TS_CON1); - tmp &= ~(0x37); - tmp |= 0x1; - writel(tmp, apmixed_base + APMIXED_SYS_TS_CON1); + tmp = readl(apmixed_base + mt->conf->apmixed_buffer_ctl_reg); + tmp &= mt->conf->apmixed_buffer_ctl_mask; + tmp |= mt->conf->apmixed_buffer_ctl_set; + writel(tmp, apmixed_base + mt->conf->apmixed_buffer_ctl_reg); udelay(200); } @@ -1070,8 +1080,9 @@ static int mtk_thermal_probe(struct platform_device *pdev) goto err_disable_clk_auxadc; } + mtk_thermal_turn_on_buffer(mt, apmixed_base); + if (mt->conf->version == MTK_THERMAL_V2) { - mtk_thermal_turn_on_buffer(apmixed_base); mtk_thermal_release_periodic_ts(mt, auxadc_base); } From patchwork Tue Sep 20 15:03:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amjad Ouled-Ameur X-Patchwork-Id: 12982330 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 52122C6FA90 for ; Tue, 20 Sep 2022 15:04:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230333AbiITPD7 (ORCPT ); Tue, 20 Sep 2022 11:03:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40048 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231441AbiITPDz (ORCPT ); Tue, 20 Sep 2022 11:03:55 -0400 Received: from mail-wr1-x42c.google.com (mail-wr1-x42c.google.com [IPv6:2a00:1450:4864:20::42c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 95AC736DC0 for ; Tue, 20 Sep 2022 08:03:54 -0700 (PDT) Received: by mail-wr1-x42c.google.com with SMTP id n10so4700214wrw.12 for ; Tue, 20 Sep 2022 08:03:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date; bh=7fvVxbhAYZ7geA2TrniCTojxhYIL1wsypbBZ+bEyH5k=; b=0C6Ek8hY6ktdcuRYIZZVPgzk2HmL2zkjdSA4AA4SnCHgsos1Sn9xXF/8jZ7k6Tvoot o9JexYUc1qzLVQYT6K138kxNy47Z+AC7K//hkCVHPH6FBw01G20LIxsCOSby5vo1DBaZ ySeTUaPwHtslahcJndNwfTTbLz0ydz2dJ/51CgHy9Fo3VMrv8nG+V6+iNYP+L9qgEp8M auCWjlSpFa8I3bNJnqXDLf1oB/1nsXX2MdESA0NTlSpYxfPzLaWqph2L6rRuO/r9Cmj8 UgJphyUJ5SBgvFGKhHpMHRzY5Stw6mUjyl+N/vq8py88DOJsUEEPaHQC9P824iny7fyv LNrw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date; bh=7fvVxbhAYZ7geA2TrniCTojxhYIL1wsypbBZ+bEyH5k=; b=AQKnFsVjGmGbEGPvIejQLe+gpoisRrSuDcB6qAPEuRiBpGrbFpREROzHVnYNbs30/t /FDlGSAeiiSPdBkY//s+WZNTYGvuERvAuNaiHTIhna1OTLUqN/1xfTTSNS3yP0x1PmN9 QOfx14RyGgpH8vUkdQNYkAVaATX8/hEHGOF2qAFkUD5l8/ROF44cWhkZtqrTKBTDCxpy /SGBtf6mCbjN8hV86YCOTfGRm99kyB822IU1d5bGOnoOPQr3VEt1Jhab/ZpbX3rKZX21 07wVMdzTms8l4JI1cgpewi8Dcz5gnQM63yyCxfhXAAjKpfRRncEOYSaJzkcupDexwgcP /GMA== X-Gm-Message-State: ACrzQf0XkwOOSU5hEBZLUEC1nk4KnaE0pNwmLC3bBvYo1KjYXfhOe1oV 3uPdAOsbR7KDO6MgD9LxcFD2Ng== X-Google-Smtp-Source: AMsMyM6xOPCpx11/H1SUUJlsXshwGblLd61g9dZ9XU0V7KAI69HrOZKOPKCuWrYrWJoQB9oyCwfXfw== X-Received: by 2002:a05:6000:1ac7:b0:22a:906d:3577 with SMTP id i7-20020a0560001ac700b0022a906d3577mr14951482wry.33.1663686233220; Tue, 20 Sep 2022 08:03:53 -0700 (PDT) Received: from [127.0.1.1] (210.145.15.109.rev.sfr.net. [109.15.145.210]) by smtp.googlemail.com with ESMTPSA id u3-20020a5d4683000000b00225239d9265sm242056wrq.74.2022.09.20.08.03.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Sep 2022 08:03:52 -0700 (PDT) From: Amjad Ouled-Ameur Date: Tue, 20 Sep 2022 17:03:50 +0200 Subject: [PATCH v5 3/4] thermal: mediatek: add support for MT8365 SoC MIME-Version: 1.0 Message-Id: <20220920-i350-thermal-up-v5-3-123bc852d199@baylibre.com> References: <20220920-i350-thermal-up-v5-0-123bc852d199@baylibre.com> In-Reply-To: <20220920-i350-thermal-up-v5-0-123bc852d199@baylibre.com> To: Amit Kucheria , Rob Herring , Zhang Rui , Daniel Lezcano , "Rafael J. Wysocki" , Krzysztof Kozlowski Cc: Fabien Parent , Hsin-Yi Wang , Markus Schneider-Pargmann , linux-pm@vger.kernel.org, AngeloGioacchino Del Regno , Matthias Brugger , Michael Kao , Amjad Ouled-Ameur , Rob Herring , linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-Mailer: b4 0.10.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1663686228; l=4000; i=aouledameur@baylibre.com; s=20220920; h=from:subject:message-id; bh=eVZqssHa1FkQT25LvRdPA/FO390Vm6rtd7qvKHJXswg=; b=oLX5iNEqzkN15jnXT0IP6zYUCEIMuPk4gxtg06iKIX+clW57z6GnnCXS4vUbP+MOU2AS0FlNtCcQ LKfAn8DfBQn/zT3fb05jtLtSPnKIifemyG3dmGnwh5cbTcaMTzHO X-Developer-Key: i=aouledameur@baylibre.com; a=ed25519; pk=HgYWawSL4qLGPx+RzJ+Cuu+V8Pi/KQnDDm1wjWPMOFE= Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Fabien Parent MT8365 is similar to the other SoCs supported by the driver. It has only one bank and 3 actual sensors that can be multiplexed. There is another one sensor that does not have usable data. Signed-off-by: Fabien Parent Signed-off-by: Amjad Ouled-Ameur Reviewed-by: AngeloGioacchino Del Regno diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c index d8ddceb75372..3a5df1440822 100644 --- a/drivers/thermal/mtk_thermal.c +++ b/drivers/thermal/mtk_thermal.c @@ -31,6 +31,7 @@ #define AUXADC_CON2_V 0x010 #define AUXADC_DATA(channel) (0x14 + (channel) * 4) +#define APMIXED_SYS_TS_CON0 0x600 #define APMIXED_SYS_TS_CON1 0x604 /* Thermal Controller Registers */ @@ -245,6 +246,17 @@ enum mtk_thermal_version { /* The calibration coefficient of sensor */ #define MT8183_CALIBRATION 153 +/* MT8365 */ +#define MT8365_TEMP_AUXADC_CHANNEL 11 +#define MT8365_CALIBRATION 164 +#define MT8365_NUM_CONTROLLER 1 +#define MT8365_NUM_BANKS 1 +#define MT8365_NUM_SENSORS 3 +#define MT8365_NUM_SENSORS_PER_ZONE 3 +#define MT8365_TS1 0 +#define MT8365_TS2 1 +#define MT8365_TS3 2 + struct mtk_thermal; struct thermal_bank_cfg { @@ -389,6 +401,24 @@ static const int mt7622_mux_values[MT7622_NUM_SENSORS] = { 0, }; static const int mt7622_vts_index[MT7622_NUM_SENSORS] = { VTS1 }; static const int mt7622_tc_offset[MT7622_NUM_CONTROLLER] = { 0x0, }; +/* MT8365 thermal sensor data */ +static const int mt8365_bank_data[MT8365_NUM_SENSORS] = { + MT8365_TS1, MT8365_TS2, MT8365_TS3 +}; + +static const int mt8365_msr[MT8365_NUM_SENSORS_PER_ZONE] = { + TEMP_MSR0, TEMP_MSR1, TEMP_MSR2 +}; + +static const int mt8365_adcpnp[MT8365_NUM_SENSORS_PER_ZONE] = { + TEMP_ADCPNP0, TEMP_ADCPNP1, TEMP_ADCPNP2 +}; + +static const int mt8365_mux_values[MT8365_NUM_SENSORS] = { 0, 1, 2 }; +static const int mt8365_tc_offset[MT8365_NUM_CONTROLLER] = { 0 }; + +static const int mt8365_vts_index[MT8365_NUM_SENSORS] = { VTS1, VTS2, VTS3 }; + /* * The MT8173 thermal controller has four banks. Each bank can read up to * four temperature sensors simultaneously. The MT8173 has a total of 5 @@ -463,6 +493,40 @@ static const struct mtk_thermal_data mt2701_thermal_data = { .version = MTK_THERMAL_V1, }; +/* + * The MT8365 thermal controller has one bank, which can read up to + * four temperature sensors simultaneously. The MT8365 has a total of 3 + * temperature sensors. + * + * The thermal core only gets the maximum temperature of this one bank, + * so the bank concept wouldn't be necessary here. However, the SVS (Smart + * Voltage Scaling) unit makes its decisions based on the same bank + * data. + */ +static const struct mtk_thermal_data mt8365_thermal_data = { + .auxadc_channel = MT8365_TEMP_AUXADC_CHANNEL, + .num_banks = MT8365_NUM_BANKS, + .num_sensors = MT8365_NUM_SENSORS, + .vts_index = mt8365_vts_index, + .cali_val = MT8365_CALIBRATION, + .num_controller = MT8365_NUM_CONTROLLER, + .controller_offset = mt8365_tc_offset, + .need_switch_bank = false, + .bank_data = { + { + .num_sensors = MT8365_NUM_SENSORS, + .sensors = mt8365_bank_data + }, + }, + .msr = mt8365_msr, + .adcpnp = mt8365_adcpnp, + .sensor_mux_values = mt8365_mux_values, + .version = MTK_THERMAL_V1, + .apmixed_buffer_ctl_reg = APMIXED_SYS_TS_CON0, + .apmixed_buffer_ctl_mask = (u32) ~GENMASK(29, 28), + .apmixed_buffer_ctl_set = 0, +}; + /* * The MT2712 thermal controller has one bank, which can read up to * four temperature sensors simultaneously. The MT2712 has a total of 4 @@ -964,6 +1028,10 @@ static const struct of_device_id mtk_thermal_of_match[] = { { .compatible = "mediatek,mt8183-thermal", .data = (void *)&mt8183_thermal_data, + }, + { + .compatible = "mediatek,mt8365-thermal", + .data = (void *)&mt8365_thermal_data, }, { }, }; From patchwork Tue Sep 20 15:03:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amjad Ouled-Ameur X-Patchwork-Id: 12982331 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7C39AC6FA92 for ; Tue, 20 Sep 2022 15:04:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231269AbiITPEB (ORCPT ); Tue, 20 Sep 2022 11:04:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40098 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231468AbiITPD5 (ORCPT ); Tue, 20 Sep 2022 11:03:57 -0400 Received: from mail-wr1-x433.google.com (mail-wr1-x433.google.com [IPv6:2a00:1450:4864:20::433]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 109FC386A6 for ; Tue, 20 Sep 2022 08:03:56 -0700 (PDT) Received: by mail-wr1-x433.google.com with SMTP id g3so4701909wrq.13 for ; Tue, 20 Sep 2022 08:03:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date; bh=lgeGpTBAYoR2IF4IQP47VjInSDUdDHryBKm4+oxNgzo=; b=AwC13zQZ7kpIyEMDTyYtYKqbjeLAubqIrtdYOPfa/uOpnkkYa76Y6RtVfeAAlN/RBH sCyaomhU6F9DV37buweMO6Aw2qK5fsGJDwFR13qkaxxCdC5xqPG94t1lQmuPqI8lnmQn hlYTi7j9LyTiBwjbJ/k07izpQ+PI6w2oGpoKBa9JMt//Mc2dowHh98L5JiQkqjd0OnrG za3xPPPbS+j7n8SobpIdcq6H0m5LBKre9FPpie4aiUbaTOate1rtgKGBSmza5QIdAQ4s m0I3Er5LJgfj3TxKApCDk1qREv6rQZ/rrOZ4V1cNuGA4U3UifcyIkJvKWengp0cHlWzq tghQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date; bh=lgeGpTBAYoR2IF4IQP47VjInSDUdDHryBKm4+oxNgzo=; b=TUfkwjdqHRPuDIIMugmj8z/T6XxaPqywKzH1Ywich2ezXFDjYmRS4LAk8/SYqV2+eQ eJlke/WXxYydWmxyJa29H3ApEL2ewRXsmFFh6qATHN/UfELJRqgeEvejpAZJrrjOevQZ SEU+FDpWtWU4gEtcFuXcENA10IVciXP2sUDe7HF6fGCLq4JV/ztK27Kk4OKGkEAnB2+m 0AfbIPdZRh1RYpOQK7hVkec+KW0w599Fe8cRfIsB3XsPXbth3RtDzoKZjvGeJMJc+NAI Ro9bYzAWP5+2OVq8aZShnAsIzQ3nFn/kKHudPTbZRBrG/OKpiJiyA3cSSda2l8w8hFyL HIDg== X-Gm-Message-State: ACrzQf0fH+Qy15zp5yW4tqVuS3YlGFR6DCtHBmV7W2QfnOkjGe/bIHsI MxbObTC95EsgoxurFpvwpOHDbw== X-Google-Smtp-Source: AMsMyM7Se7NW9TRk/0csWrLvSYf0SPYJQHiZVddFEksgD1KIkNLhxiJM/2UQYS3BzgORDTemXsFUaw== X-Received: by 2002:a05:6000:69d:b0:22a:fa56:86b9 with SMTP id bo29-20020a056000069d00b0022afa5686b9mr7899787wrb.193.1663686234509; Tue, 20 Sep 2022 08:03:54 -0700 (PDT) Received: from [127.0.1.1] (210.145.15.109.rev.sfr.net. [109.15.145.210]) by smtp.googlemail.com with ESMTPSA id u3-20020a5d4683000000b00225239d9265sm242056wrq.74.2022.09.20.08.03.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Sep 2022 08:03:53 -0700 (PDT) From: Amjad Ouled-Ameur Date: Tue, 20 Sep 2022 17:03:51 +0200 Subject: [PATCH v5 4/4] thermal: mediatek: add another get_temp ops for thermal sensors MIME-Version: 1.0 Message-Id: <20220920-i350-thermal-up-v5-4-123bc852d199@baylibre.com> References: <20220920-i350-thermal-up-v5-0-123bc852d199@baylibre.com> In-Reply-To: <20220920-i350-thermal-up-v5-0-123bc852d199@baylibre.com> To: Amit Kucheria , Rob Herring , Zhang Rui , Daniel Lezcano , "Rafael J. Wysocki" , Krzysztof Kozlowski Cc: Fabien Parent , Hsin-Yi Wang , Markus Schneider-Pargmann , linux-pm@vger.kernel.org, AngeloGioacchino Del Regno , Matthias Brugger , Michael Kao , Amjad Ouled-Ameur , Rob Herring , linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-Mailer: b4 0.10.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1663686228; l=5826; i=aouledameur@baylibre.com; s=20220920; h=from:subject:message-id; bh=fxjNU673oWyI9k55hJ8TJXejNRUhPRMZg1dfJg2fwYI=; b=/WAqzQvGkGzuEAKGTCj1zS0PVtjbWepDWLrysKd1rXCGSExs2zPyqTrv5WTmGzILLsZ2JwGXYouB tcIfHt4sBfp0clrszepUhqZ6eMsfkxVgJ6IL1P+CP3BMOzDaiRXx X-Developer-Key: i=aouledameur@baylibre.com; a=ed25519; pk=HgYWawSL4qLGPx+RzJ+Cuu+V8Pi/KQnDDm1wjWPMOFE= Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Provide thermal zone to read thermal sensor in the SoC. We can read all the thermal sensors value in the SoC by the node /sys/class/thermal/ In mtk_thermal_bank_temperature, return -EAGAIN instead of -EACCESS on the first read of sensor that often are bogus values. This can avoid following warning on boot: thermal thermal_zone6: failed to read out thermal zone (-13) Signed-off-by: Michael Kao Signed-off-by: Hsin-Yi Wang Signed-off-by: Amjad Ouled-Ameur Reviewed-by: AngeloGioacchino Del Regno diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c index 3a5df1440822..311ad611fdab 100644 --- a/drivers/thermal/mtk_thermal.c +++ b/drivers/thermal/mtk_thermal.c @@ -259,6 +259,11 @@ enum mtk_thermal_version { struct mtk_thermal; +struct mtk_thermal_zone { + struct mtk_thermal *mt; + int id; +}; + struct thermal_bank_cfg { unsigned int num_sensors; const int *sensors; @@ -307,6 +312,8 @@ struct mtk_thermal { const struct mtk_thermal_data *conf; struct mtk_thermal_bank banks[MAX_NUM_ZONES]; + + int (*raw_to_mcelsius)(struct mtk_thermal *mt, int sensno, s32 raw); }; /* MT8183 thermal sensor data */ @@ -709,6 +716,29 @@ static void mtk_thermal_put_bank(struct mtk_thermal_bank *bank) mutex_unlock(&mt->lock); } +static int _get_sensor_temp(struct mtk_thermal *mt, int id) +{ + u32 raw; + int temp; + + const struct mtk_thermal_data *conf = mt->conf; + + raw = readl(mt->thermal_base + conf->msr[id]); + + temp = mt->raw_to_mcelsius(mt, id, raw); + + /* + * The first read of a sensor often contains very high bogus + * temperature value. Filter these out so that the system does + * not immediately shut down. + */ + + if (temp > 200000) + return -EAGAIN; + else + return temp; +} + /** * mtk_thermal_bank_temperature - get the temperature of a bank * @bank: The bank @@ -721,26 +751,9 @@ static int mtk_thermal_bank_temperature(struct mtk_thermal_bank *bank) struct mtk_thermal *mt = bank->mt; const struct mtk_thermal_data *conf = mt->conf; int i, temp = INT_MIN, max = INT_MIN; - u32 raw; for (i = 0; i < conf->bank_data[bank->id].num_sensors; i++) { - raw = readl(mt->thermal_base + conf->msr[i]); - - if (mt->conf->version == MTK_THERMAL_V1) { - temp = raw_to_mcelsius_v1( - mt, conf->bank_data[bank->id].sensors[i], raw); - } else { - temp = raw_to_mcelsius_v2( - mt, conf->bank_data[bank->id].sensors[i], raw); - } - - /* - * The first read of a sensor often contains very high bogus - * temperature value. Filter these out so that the system does - * not immediately shut down. - */ - if (temp > 200000) - temp = 0; + temp = _get_sensor_temp(mt, i); if (temp > max) max = temp; @@ -749,9 +762,10 @@ static int mtk_thermal_bank_temperature(struct mtk_thermal_bank *bank) return max; } -static int mtk_read_temp(struct thermal_zone_device *tz, int *temperature) +static int mtk_read_temp(struct thermal_zone_device *tzdev, int *temperature) { - struct mtk_thermal *mt = tz->devdata; + struct mtk_thermal_zone *tz = tzdev->devdata; + struct mtk_thermal *mt = tz->mt; int i; int tempmax = INT_MIN; @@ -770,10 +784,28 @@ static int mtk_read_temp(struct thermal_zone_device *tz, int *temperature) return 0; } +static int mtk_read_sensor_temp(struct thermal_zone_device *tzdev, int *temperature) +{ + struct mtk_thermal_zone *tz = tzdev->devdata; + struct mtk_thermal *mt = tz->mt; + int id = tz->id - 1; + + if (id < 0) + return -EACCES; + + *temperature = _get_sensor_temp(mt, id); + + return 0; +} + static const struct thermal_zone_device_ops mtk_thermal_ops = { .get_temp = mtk_read_temp, }; +static const struct thermal_zone_device_ops mtk_thermal_sensor_ops = { + .get_temp = mtk_read_sensor_temp, +}; + static void mtk_thermal_init_bank(struct mtk_thermal *mt, int num, u32 apmixed_phys_base, u32 auxadc_phys_base, int ctrl_id) @@ -1072,6 +1104,7 @@ static int mtk_thermal_probe(struct platform_device *pdev) u64 auxadc_phys_base, apmixed_phys_base; struct thermal_zone_device *tzdev; void __iomem *apmixed_base, *auxadc_base; + struct mtk_thermal_zone *tz; mt = devm_kzalloc(&pdev->dev, sizeof(*mt), GFP_KERNEL); if (!mt) @@ -1150,6 +1183,9 @@ static int mtk_thermal_probe(struct platform_device *pdev) mtk_thermal_turn_on_buffer(mt, apmixed_base); + mt->raw_to_mcelsius = (mt->conf->version == MTK_THERMAL_V1) ? + raw_to_mcelsius_v1 : raw_to_mcelsius_v2; + if (mt->conf->version == MTK_THERMAL_V2) { mtk_thermal_release_periodic_ts(mt, auxadc_base); } @@ -1161,11 +1197,29 @@ static int mtk_thermal_probe(struct platform_device *pdev) platform_set_drvdata(pdev, mt); - tzdev = devm_thermal_of_zone_register(&pdev->dev, 0, mt, - &mtk_thermal_ops); - if (IS_ERR(tzdev)) { - ret = PTR_ERR(tzdev); - goto err_disable_clk_peri_therm; + for (i = 0; i < mt->conf->num_sensors + 1; i++) { + tz = devm_kmalloc(&pdev->dev, sizeof(*tz), GFP_KERNEL); + if (!tz) + return -ENOMEM; + + tz->mt = mt; + tz->id = i; + + tzdev = devm_thermal_of_zone_register(&pdev->dev, i, tz, (i == 0) ? + &mtk_thermal_ops : + &mtk_thermal_sensor_ops); + + if (IS_ERR(tzdev)) { + if (PTR_ERR(tzdev) == -ENODEV) { + dev_warn(&pdev->dev, + "sensor %d not registered in thermal zone in dt\n", i); + continue; + } + if (PTR_ERR(tzdev) == -EACCES) { + ret = PTR_ERR(tzdev); + goto err_disable_clk_peri_therm; + } + } } ret = devm_thermal_add_hwmon_sysfs(tzdev);