From patchwork Wed Sep 21 16:45:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiaoyao Li X-Patchwork-Id: 12983987 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D1B6FC6FA8B for ; Wed, 21 Sep 2022 16:50:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231843AbiIUQun (ORCPT ); Wed, 21 Sep 2022 12:50:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51848 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231473AbiIUQuR (ORCPT ); Wed, 21 Sep 2022 12:50:17 -0400 Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3C92851425; Wed, 21 Sep 2022 09:45:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1663778732; x=1695314732; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=9Rh9QI5021plHVnKQ/4sO96yjSHLmYjQeIDsxL6/qIg=; b=N2bg2b5z8Q+pTVO5IGXSgMvzrqOhGDw/WxwzPQqvi/BIFK2UGNBoDz/c a9SUXZGQx9++EaQ2JiwkHHu3cpLw5XRrnINy/spVuxxEP3/M5I3iJ9GKS TgqPeIImQOrQ85H02NBoKanu6yBb1jAP43xtltuV7QAJ4ZzUqGOosPCpt hPPQyT/qaMuEEE1DfkeP9v3QE7WhPc70TKwEybPAa+BEOQFXWIeBMMvVe 6umASJYVRbx+VnOyUWVnEvsKa/COd5uqeJ6ONmFJQvc6WNG8gBcDvRdxH vC7C7Jk3IW9XgYtuFUvssROzredkCK+bJjT22s6TyXJ5LimYZtqXvHwVS A==; X-IronPort-AV: E=McAfee;i="6500,9779,10477"; a="300044923" X-IronPort-AV: E=Sophos;i="5.93,333,1654585200"; d="scan'208";a="300044923" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Sep 2022 09:45:28 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,333,1654585200"; d="scan'208";a="948227915" Received: from lxy-dell.sh.intel.com ([10.239.48.38]) by fmsmga005.fm.intel.com with ESMTP; 21 Sep 2022 09:45:25 -0700 From: Xiaoyao Li To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Sean Christopherson , Paolo Bonzini , wei.w.wang@intel.com, kan.liang@linux.intel.com Cc: xiaoyao.li@intel.com, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org Subject: [RFC PATCH v2 1/3] perf/core: Expose perf_event_{en,dis}able_local() Date: Thu, 22 Sep 2022 00:45:19 +0800 Message-Id: <20220921164521.2858932-2-xiaoyao.li@intel.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220921164521.2858932-1-xiaoyao.li@intel.com> References: <20220921164521.2858932-1-xiaoyao.li@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org KVM needs them to disable/enable an Intel PT perf event before vm-entry/after vm-exit. Signed-off-by: Xiaoyao Li --- include/linux/perf_event.h | 1 + kernel/events/core.c | 7 +++++++ 2 files changed, 8 insertions(+) diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h index ee8b9ecdc03b..fc5f3952d6a2 100644 --- a/include/linux/perf_event.h +++ b/include/linux/perf_event.h @@ -1472,6 +1472,7 @@ extern int perf_swevent_get_recursion_context(void); extern void perf_swevent_put_recursion_context(int rctx); extern u64 perf_swevent_set_period(struct perf_event *event); extern void perf_event_enable(struct perf_event *event); +extern void perf_event_enable_local(struct perf_event *event); extern void perf_event_disable(struct perf_event *event); extern void perf_event_disable_local(struct perf_event *event); extern void perf_event_disable_inatomic(struct perf_event *event); diff --git a/kernel/events/core.c b/kernel/events/core.c index 2621fd24ad26..8324bb99c6bf 100644 --- a/kernel/events/core.c +++ b/kernel/events/core.c @@ -2446,6 +2446,7 @@ void perf_event_disable_local(struct perf_event *event) { event_function_local(event, __perf_event_disable, NULL); } +EXPORT_SYMBOL_GPL(perf_event_disable_local); /* * Strictly speaking kernel users cannot create groups and therefore this @@ -2984,6 +2985,12 @@ static void _perf_event_enable(struct perf_event *event) event_function_call(event, __perf_event_enable, NULL); } +void perf_event_enable_local(struct perf_event *event) +{ + event_function_local(event, __perf_event_enable, NULL); +} +EXPORT_SYMBOL_GPL(perf_event_enable_local); + /* * See perf_event_disable(); */ From patchwork Wed Sep 21 16:45:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiaoyao Li X-Patchwork-Id: 12983988 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5C550C6FA82 for ; Wed, 21 Sep 2022 16:50:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231564AbiIUQuq (ORCPT ); Wed, 21 Sep 2022 12:50:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51832 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231506AbiIUQuR (ORCPT ); Wed, 21 Sep 2022 12:50:17 -0400 Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2A92E50717; Wed, 21 Sep 2022 09:45:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1663778738; x=1695314738; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=csO58O6YHCh8TiEHFgaWlEB977WasEpvat7SJQLp5Uo=; b=Kme6qetrpYsjWh/SyU3Saf9JChli76OOCaJXHNCoQdfBJTAyMvXWHVIQ mEK/2l+zDhsKYj8lUF1HmmMEnRk3hGTD+qTyNyULscvi1NlATCMdRaWXc pdI25Aol8kHe9BgBSNrWvYtb8erPhHFYz+mb44YEMGHW980zkFbB2Qayx ZgYeIvHb7InfHBiSNXbdjHDyF2HnCpQ2S3pNq7YexxhDYpZZx7WTjKoY8 lDaIdw6XLzFr+W3iocqsMgYKOwuEpkFqZ6gpd/lRCyhP02IL7avSGIOeJ lPvib5gQmJHbGD2RSs5+qpRKTGm4A3NjE+IkJYl/2SKf2JyR2WAZroUMX A==; X-IronPort-AV: E=McAfee;i="6500,9779,10477"; a="300044983" X-IronPort-AV: E=Sophos;i="5.93,333,1654585200"; d="scan'208";a="300044983" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Sep 2022 09:45:37 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,333,1654585200"; d="scan'208";a="948227934" Received: from lxy-dell.sh.intel.com ([10.239.48.38]) by fmsmga005.fm.intel.com with ESMTP; 21 Sep 2022 09:45:28 -0700 From: Xiaoyao Li To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Sean Christopherson , Paolo Bonzini , wei.w.wang@intel.com, kan.liang@linux.intel.com Cc: xiaoyao.li@intel.com, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org Subject: [RFC PATCH v2 2/3] perf/x86/intel/pt: Introduce and export pt_get_curr_event() Date: Thu, 22 Sep 2022 00:45:20 +0800 Message-Id: <20220921164521.2858932-3-xiaoyao.li@intel.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220921164521.2858932-1-xiaoyao.li@intel.com> References: <20220921164521.2858932-1-xiaoyao.li@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org KVM supports PT_MODE_HOST_GUEST mode for Intel PT where host and guest have separate Intel PT configurations and they work independently. Currently, in this mode, when both host and guest enable PT, KVM manually clears MSR_IA32_RTIT_CTL.TRACEEN to disable host PT so that it can context switch the other PT MSRs. However, PT PMI can be delivered after this point and before the VM-entry. As a result, the re-enabling of PT leads to VM-entry failure of guest. To solve the problem, introduce and export pt_get_curr_event() for KVM to get current pt event. Along with perf_event_{dis, en}able_local(), With them, KVM can avoid PT re-enabling in PT PMI handler. Signed-off-by: Xiaoyao Li --- arch/x86/events/intel/pt.c | 8 ++++++++ arch/x86/include/asm/perf_event.h | 2 ++ 2 files changed, 10 insertions(+) diff --git a/arch/x86/events/intel/pt.c b/arch/x86/events/intel/pt.c index 82ef87e9a897..62bfc45c11c9 100644 --- a/arch/x86/events/intel/pt.c +++ b/arch/x86/events/intel/pt.c @@ -1624,6 +1624,14 @@ static void pt_event_stop(struct perf_event *event, int mode) } } +struct perf_event *pt_get_curr_event(void) +{ + struct pt *pt = this_cpu_ptr(&pt_ctx); + + return pt->handle.event; +} +EXPORT_SYMBOL_GPL(pt_get_curr_event); + static long pt_event_snapshot_aux(struct perf_event *event, struct perf_output_handle *handle, unsigned long size) diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h index f6fc8dd51ef4..7c3533392cf5 100644 --- a/arch/x86/include/asm/perf_event.h +++ b/arch/x86/include/asm/perf_event.h @@ -553,11 +553,13 @@ static inline int x86_perf_get_lbr(struct x86_pmu_lbr *lbr) #ifdef CONFIG_CPU_SUP_INTEL extern void intel_pt_handle_vmx(int on); + extern struct perf_event *pt_get_curr_event(void); #else static inline void intel_pt_handle_vmx(int on) { } +struct perf_event *pt_get_curr_event(void) { return NULL; } #endif #if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_CPU_SUP_AMD) From patchwork Wed Sep 21 16:45:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiaoyao Li X-Patchwork-Id: 12983989 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9A0E6C6FA82 for ; Wed, 21 Sep 2022 16:50:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231867AbiIUQus (ORCPT ); Wed, 21 Sep 2022 12:50:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51000 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231130AbiIUQuR (ORCPT ); Wed, 21 Sep 2022 12:50:17 -0400 Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 355755301C; Wed, 21 Sep 2022 09:45:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1663778738; x=1695314738; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Cp1pNg+16opBPY1j2Ba8kIc+eTwZIbA4gQJJdqATjn0=; b=YducHbOjYHA/w9+s+pFGMNEiT9h/1SKuqy7H0VhF1z7tpILKknYo3r5h 0ZjNyKtV9C2OleJnQr+pJ+ywKC55KMkHWbOEyrQX+klO6ZSmOgDkWDwUv Y6bHfjDtc8pxVhLgnL0uYGxFRpxjY+RdfjT0PZ1QRPwg07wOG7SORcLEa B43LXQN8DjXuEXo2BP/EygmqhQI2NUmpJk9Th14CtJcgSwvitDCHf9GSc P9pn6WJ0dfvReH13iHK6UFHR2Dxw0mweuMD+zmLe5hb4e73R3XLzpghmt v5qzRdG+xozhXhx0C88ZjkHF0AN8ARYttPA+XjuHwIcN+7qq+4C/Dhqh5 A==; X-IronPort-AV: E=McAfee;i="6500,9779,10477"; a="300044986" X-IronPort-AV: E=Sophos;i="5.93,333,1654585200"; d="scan'208";a="300044986" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Sep 2022 09:45:37 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,333,1654585200"; d="scan'208";a="948227970" Received: from lxy-dell.sh.intel.com ([10.239.48.38]) by fmsmga005.fm.intel.com with ESMTP; 21 Sep 2022 09:45:33 -0700 From: Xiaoyao Li To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Sean Christopherson , Paolo Bonzini , wei.w.wang@intel.com, kan.liang@linux.intel.com Cc: xiaoyao.li@intel.com, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org Subject: [RFC PATCH v2 3/3] KVM: VMX: Stop/resume host PT before/after VMX transition when PT_MODE_HOST_GUEST Date: Thu, 22 Sep 2022 00:45:21 +0800 Message-Id: <20220921164521.2858932-4-xiaoyao.li@intel.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220921164521.2858932-1-xiaoyao.li@intel.com> References: <20220921164521.2858932-1-xiaoyao.li@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Current implementation in pt_guest_enter() has two issues when pt mode is PT_MODE_HOST_GUEST. 1. It relies on VM_ENTRY_LOAD_IA32_RTIT_CTL to disable host's Intel PT for the case that host enables PT while guest not. However, it causes VM entry failure due to violating the requirement stated in SDM "VM-Execution Control Fields" If the logical processor is operating with Intel PT enabled (if IA32_RTIT_CTL.TraceEn = 1) at the time of VM entry, the "load IA32_RTIT_CTL" VM-entry control must be 0. 2. In the case both host and guest enable Intel PT, it disables host's Intel PT by manually clearing MSR_IA32_RTIT_CTL for the purpose to context switch host and guest's PT configurations. However, PT PMI can be delivered later and before VM entry. In the PT PMI handler, it will a) update the host PT MSRs which leads to what KVM stores in vmx->pt_desc.host becomes stale, and b) re-enable Intel PT which leads to VM entry failure as #1. To fix the above two issues, 1) grab and store host PT perf event and disable/enable host PT before vm-enter/ after vm-exit. 2) drop host pt_ctx and the logic to save/restore host PT MSRs since host PT driver doesn't rely on the previous value of PT MSR, i.e., the re-enabling of PT event after VM-exit re-initializes all the PT MSRs that it cares. Signed-off-by: Xiaoyao Li --- arch/x86/kvm/vmx/vmx.c | 31 +++++++++++++------------------ arch/x86/kvm/vmx/vmx.h | 2 +- 2 files changed, 14 insertions(+), 19 deletions(-) diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index c9b49a09e6b5..df1a16264bb6 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -1124,37 +1124,32 @@ static inline void pt_save_msr(struct pt_ctx *ctx, u32 addr_range) static void pt_guest_enter(struct vcpu_vmx *vmx) { + struct perf_event *event; + if (vmx_pt_mode_is_system()) return; - /* - * GUEST_IA32_RTIT_CTL is already set in the VMCS. - * Save host state before VM entry. - */ - rdmsrl(MSR_IA32_RTIT_CTL, vmx->pt_desc.host.ctl); - if (vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN) { - wrmsrl(MSR_IA32_RTIT_CTL, 0); - pt_save_msr(&vmx->pt_desc.host, vmx->pt_desc.num_address_ranges); + event = pt_get_curr_event(); + if (event) + perf_event_disable_local(event); + vmx->pt_desc.host_event = event; + + if (vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN) pt_load_msr(&vmx->pt_desc.guest, vmx->pt_desc.num_address_ranges); - } } static void pt_guest_exit(struct vcpu_vmx *vmx) { + struct perf_event *event = vmx->pt_desc.host_event; + if (vmx_pt_mode_is_system()) return; - if (vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN) { + if (vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN) pt_save_msr(&vmx->pt_desc.guest, vmx->pt_desc.num_address_ranges); - pt_load_msr(&vmx->pt_desc.host, vmx->pt_desc.num_address_ranges); - } - /* - * KVM requires VM_EXIT_CLEAR_IA32_RTIT_CTL to expose PT to the guest, - * i.e. RTIT_CTL is always cleared on VM-Exit. Restore it if necessary. - */ - if (vmx->pt_desc.host.ctl) - wrmsrl(MSR_IA32_RTIT_CTL, vmx->pt_desc.host.ctl); + if (event) + perf_event_enable_local(event); } void vmx_set_host_fs_gs(struct vmcs_host_state *host, u16 fs_sel, u16 gs_sel, diff --git a/arch/x86/kvm/vmx/vmx.h b/arch/x86/kvm/vmx/vmx.h index 24d58c2ffaa3..4c20bdabc85b 100644 --- a/arch/x86/kvm/vmx/vmx.h +++ b/arch/x86/kvm/vmx/vmx.h @@ -66,7 +66,7 @@ struct pt_desc { u64 ctl_bitmask; u32 num_address_ranges; u32 caps[PT_CPUID_REGS_NUM * PT_CPUID_LEAVES]; - struct pt_ctx host; + struct perf_event *host_event; struct pt_ctx guest; };