From patchwork Tue Sep 27 02:55:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tinghan Shen X-Patchwork-Id: 12989825 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F1E57C07E9D for ; Tue, 27 Sep 2022 03:29:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=av/8g8tg/2CduxYdwk8WlJ1dvcs2txueaDAFPytSxI4=; b=kQC7Ewo+1JZk1g InmX6P1sHGA9PeMhzGuxJsiiSXVbmTixjkH6QwBnFZPCmWaA7RJX+3aWgCr5PjZrZEKNPq/J6GYB9 fiXBlZi4tYOuY27HUCzFoTZqxAAj7T1MaWUjtUuWtglZJbmTCQdVX0Raf2K7PUQBYeiSMmSHrBxgY pTWCGw6xyItJGeUZqqjHpfupbI9j0KbuQuACwVrf1vMMRzmBxJUtT4ZTYd+Fg4fENBMs6Cnf06wVQ SdusKZ7SPwmLGlFBIWHpbyYM4YgJ9nZaExvRNcUoDoVYT2gcPQEeo0drcfQbElBDL3O/GvE7Q0wgN A0AWu80lK7uHTQxU96wA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1od1Ga-0085B5-8A; Tue, 27 Sep 2022 03:28:16 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1od1GW-00859W-A3; Tue, 27 Sep 2022 03:28:13 +0000 X-UUID: a32a75cac82743a5a0d18e0a1d14e1c3-20220926 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=X5/g02O+FAb76avY7mpBFXThZP45BZFh3KJ/fyx8Lr4=; b=tUcEPDvbmymY6ZOQPDv7DTn2C5mwgZsSIDk+3AXq4tFG3qA9gDEbNQGbStjsvJPNKmni62HECGNejXTlq44xMom52kQqPG1GlFgUnNSIuGek2Qm9Qy9JrY5umz3fDAnpcCEMSOX14yhFK2CzDoUZi/EeAQBWzlyTeOJYUzJ3hVc=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.11,REQID:b53e3945-e2c6-425e-87fa-73cb9f386cc9,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:39a5ff1,CLOUDID:07e62ba3-dc04-435c-b19b-71e131a5fc35,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:nil,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: a32a75cac82743a5a0d18e0a1d14e1c3-20220926 Received: from mtkmbs11n1.mediatek.inc [(172.21.101.185)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 257001965; Mon, 26 Sep 2022 20:28:02 -0700 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.3; Tue, 27 Sep 2022 10:56:25 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Tue, 27 Sep 2022 10:56:25 +0800 From: Tinghan Shen To: Bjorn Andersson , Mathieu Poirier , Rob Herring , "Krzysztof Kozlowski" , Matthias Brugger , Tiffany Lin , "Andrew-CT Chen" , Yunfei Dong , Mauro Carvalho Chehab , Tinghan Shen CC: , , , , , Subject: [PATCH v3 01/11] dt-bindings: remoteproc: mediatek: Give the subnode a persistent name Date: Tue, 27 Sep 2022 10:55:56 +0800 Message-ID: <20220927025606.26673-2-tinghan.shen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220927025606.26673-1-tinghan.shen@mediatek.com> References: <20220927025606.26673-1-tinghan.shen@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220926_202812_359927_B85D759C X-CRM114-Status: GOOD ( 13.48 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The node name doesn't matter to add the subnode as a cros-ec rpmsg device. Give it a clear persistent node name to simplify scp yaml. Signed-off-by: Tinghan Shen --- .../bindings/remoteproc/mtk,scp.yaml | 35 ++++++++++--------- .../arm64/boot/dts/mediatek/mt8183-kukui.dtsi | 2 +- 2 files changed, 20 insertions(+), 17 deletions(-) diff --git a/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml b/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml index 7e091eaffc18..786bed897916 100644 --- a/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml +++ b/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml @@ -58,6 +58,23 @@ properties: memory-region: maxItems: 1 + cros-ec-rpmsg: + type: object + description: + This subnode represents the rpmsg device. The names of the devices + are not important. The properties of this node are defined by the + individual bindings for the rpmsg devices. + + properties: + mediatek,rpmsg-name: + $ref: /schemas/types.yaml#/definitions/string-array + description: + Contains the name for the rpmsg device. Used to match + the subnode to rpmsg device announced by SCP. + + required: + - mediatek,rpmsg-name + required: - compatible - reg @@ -89,21 +106,7 @@ allOf: reg-names: maxItems: 2 -additionalProperties: - type: object - description: - Subnodes of the SCP represent rpmsg devices. The names of the devices - are not important. The properties of these nodes are defined by the - individual bindings for the rpmsg devices. - properties: - mediatek,rpmsg-name: - $ref: /schemas/types.yaml#/definitions/string-array - description: - Contains the name for the rpmsg device. Used to match - the subnode to rpmsg device announced by SCP. - - required: - - mediatek,rpmsg-name +additionalProperties: false examples: - | @@ -118,7 +121,7 @@ examples: clocks = <&infracfg CLK_INFRA_SCPSYS>; clock-names = "main"; - cros_ec { + cros-ec-rpmsg { mediatek,rpmsg-name = "cros-ec-rpmsg"; }; }; diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi index b4b86bb1f1a7..693ad5f2a82e 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi @@ -816,7 +816,7 @@ pinctrl-names = "default"; pinctrl-0 = <&scp_pins>; - cros_ec { + cros-ec-rpmsg { compatible = "google,cros-ec-rpmsg"; mediatek,rpmsg-name = "cros-ec-rpmsg"; }; From patchwork Tue Sep 27 02:55:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tinghan Shen X-Patchwork-Id: 12989809 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9583BC32771 for ; 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Mon, 26 Sep 2022 20:17:00 -0700 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs11n2.mediatek.inc (172.21.101.187) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Tue, 27 Sep 2022 10:56:25 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Tue, 27 Sep 2022 10:56:25 +0800 From: Tinghan Shen To: Bjorn Andersson , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , Tiffany Lin , Andrew-CT Chen , Yunfei Dong , Mauro Carvalho Chehab , Tinghan Shen CC: , , , , , Subject: [PATCH v3 02/11] dt-bindings: remoteproc: mediatek: Support MT8195 dual-core SCP Date: Tue, 27 Sep 2022 10:55:57 +0800 Message-ID: <20220927025606.26673-3-tinghan.shen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220927025606.26673-1-tinghan.shen@mediatek.com> References: <20220927025606.26673-1-tinghan.shen@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220926_201707_696489_DA3625C5 X-CRM114-Status: GOOD ( 17.21 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The MT8195 SCP is a dual-core RISC-V MCU. Extend the yaml file to describe the 2nd core as a subnode of the boot core. The configuration register is shared by MT8195 SCP core 0 and core 1. The core 1 can retrieve the information of configuration registers from parent node. Signed-off-by: Tinghan Shen --- .../bindings/remoteproc/mtk,scp.yaml | 97 ++++++++++++++++++- 1 file changed, 92 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml b/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml index 786bed897916..c012265be4eb 100644 --- a/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml +++ b/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml @@ -75,6 +75,83 @@ properties: required: - mediatek,rpmsg-name + '#address-cells': + const: 1 + + '#size-cells': + const: 1 + + ranges: true + +patternProperties: + "^scp-c[0-9]+@[a-f0-9]+$": + type: object + description: + The MediaTek SCP integrated to SoC might be a multi-core version. + The other cores are represented as child nodes of the boot core. + There are some integration differences for the IP like the usage of + address translator for translating SoC bus addresses into address space + for the processor. + + Each SCP core has own cache memory. The SRAM and L1TCM are shared by + cores. The power of cache, SRAM and L1TCM power should be enabled + before booting SCP cores. The size of cache, SRAM, and L1TCM are varied + on differnt SoCs. + + The SCP cores do not use an MMU, but has a set of registers to + control the translations between 32-bit CPU addresses into system bus + addresses. Cache and memory access settings are provided through a + Memory Protection Unit (MPU), programmable only from the SCP. + + properties: + compatible: + enum: + - mediatek,mt8195-scp-core + + reg: + description: The base address and size of SRAM. + maxItems: 1 + + reg-names: + const: sram + + interrupts: + maxItems: 1 + + firmware-name: + $ref: /schemas/types.yaml#/definitions/string + description: + If present, name (or relative path) of the file within the + firmware search path containing the firmware image used when + initializing sub cores of multi-core SCP. + + memory-region: + maxItems: 1 + + cros-ec-rpmsg: + type: object + description: + This subnode represents the rpmsg device. The namesof the devices + are not important. The properties of this node are defined by the + individual bindings for the rpmsg devices. + + properties: + mediatek,rpmsg-name: + $ref: /schemas/types.yaml#/definitions/string-array + description: + Contains the name for the rpmsg device. Used to match + the subnode to rpmsg device announced by SCP. + + required: + - mediatek,rpmsg-name + + required: + - compatible + - reg + - reg-names + + additionalProperties: false + required: - compatible - reg @@ -110,16 +187,26 @@ additionalProperties: false examples: - | - #include - scp@10500000 { - compatible = "mediatek,mt8192-scp"; + compatible = "mediatek,mt8195-scp"; reg = <0x10500000 0x80000>, <0x10700000 0x8000>, <0x10720000 0xe0000>; reg-names = "sram", "cfg", "l1tcm"; - clocks = <&infracfg CLK_INFRA_SCPSYS>; - clock-names = "main"; + + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x105a0000 0x105a0000 0x20000>; + + scp-c1@105a0000 { + compatible = "mediatek,mt8195-scp-core"; + reg = <0x105a0000 0x20000>; + reg-names = "sram"; + + cros-ec-rpmsg { + mediatek,rpmsg-name = "cros-ec-rpmsg"; + }; + }; cros-ec-rpmsg { mediatek,rpmsg-name = "cros-ec-rpmsg"; From patchwork Tue Sep 27 02:55:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tinghan Shen X-Patchwork-Id: 12989783 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4A6D5C07E9D for ; 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Mon, 26 Sep 2022 20:07:02 -0700 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs13n1.mediatek.inc (172.21.101.193) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Tue, 27 Sep 2022 10:56:26 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Tue, 27 Sep 2022 10:56:26 +0800 From: Tinghan Shen To: Bjorn Andersson , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , Tiffany Lin , Andrew-CT Chen , Yunfei Dong , Mauro Carvalho Chehab , Tinghan Shen CC: , , , , , Subject: [PATCH v3 03/11] arm64: dts: mt8195: Add SCP core 1 node Date: Tue, 27 Sep 2022 10:55:58 +0800 Message-ID: <20220927025606.26673-4-tinghan.shen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220927025606.26673-1-tinghan.shen@mediatek.com> References: <20220927025606.26673-1-tinghan.shen@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220926_200711_160706_EF0CC17E X-CRM114-Status: GOOD ( 10.73 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add the 2nd core(core 1) of MT8195 dual-core SCP to devicetree file. Reserve some SRAM spaces for the core 1 image. Signed-off-by: Tinghan Shen --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi index 905d1a90b406..48d457bd39b8 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -760,12 +760,24 @@ scp: scp@10500000 { compatible = "mediatek,mt8195-scp"; - reg = <0 0x10500000 0 0x100000>, + reg = <0 0x10500000 0 0xa0000>, <0 0x10720000 0 0xe0000>, <0 0x10700000 0 0x8000>; reg-names = "sram", "cfg", "l1tcm"; interrupts = ; status = "disabled"; + + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x105a0000 0 0x105a0000 0x20000>; + + scp_c1: scp-c1@105a0000 { + compatible = "mediatek,mt8195-scp-core"; + reg = <0x105a0000 0x20000>; + reg-names = "sram"; + interrupts = ; + status = "disabled"; + }; }; scp_adsp: clock-controller@10720000 { From patchwork Tue Sep 27 02:55:59 2022 Content-Type: text/plain; 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Tue, 27 Sep 2022 10:56:26 +0800 From: Tinghan Shen To: Bjorn Andersson , Mathieu Poirier , Rob Herring , "Krzysztof Kozlowski" , Matthias Brugger , Tiffany Lin , "Andrew-CT Chen" , Yunfei Dong , Mauro Carvalho Chehab , Tinghan Shen CC: , , , , , Subject: [PATCH v3 04/11] remoteproc: mediatek: Remove redundant rproc_boot Date: Tue, 27 Sep 2022 10:55:59 +0800 Message-ID: <20220927025606.26673-5-tinghan.shen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220927025606.26673-1-tinghan.shen@mediatek.com> References: <20220927025606.26673-1-tinghan.shen@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220926_201834_619124_1309EF21 X-CRM114-Status: GOOD ( 16.10 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The video codec doesn't need to explicitly boot SCP in its flow because the SCP remote processor enables auto boot. The redundant usage of rproc_boot increases the number of rproc.power over 1 and prevents successfully shutting down SCP by rproc_shutdown. Signed-off-by: Tinghan Shen --- .../mediatek/vcodec/mtk_vcodec_fw_scp.c | 2 +- drivers/remoteproc/mtk_scp.c | 17 +++++++++++++++++ include/linux/remoteproc/mtk_scp.h | 1 + 3 files changed, 19 insertions(+), 1 deletion(-) diff --git a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_fw_scp.c b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_fw_scp.c index d8e66b645bd8..c3194f88ff31 100644 --- a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_fw_scp.c +++ b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_fw_scp.c @@ -6,7 +6,7 @@ static int mtk_vcodec_scp_load_firmware(struct mtk_vcodec_fw *fw) { - return rproc_boot(scp_get_rproc(fw->scp)); + return scp_boot(fw->scp); } static unsigned int mtk_vcodec_scp_get_vdec_capa(struct mtk_vcodec_fw *fw) diff --git a/drivers/remoteproc/mtk_scp.c b/drivers/remoteproc/mtk_scp.c index d421a2ccaa1e..bf68bccab78b 100644 --- a/drivers/remoteproc/mtk_scp.c +++ b/drivers/remoteproc/mtk_scp.c @@ -673,6 +673,23 @@ struct rproc *scp_get_rproc(struct mtk_scp *scp) } EXPORT_SYMBOL_GPL(scp_get_rproc); +/** + * scp_boot() - Boot SCP + * + * @scp: mtk_scp structure + **/ +int scp_boot(struct mtk_scp *scp) +{ + struct rproc *rproc = scp->rproc; + + /* scp already booted when power > 0 */ + if (atomic_read(&rproc->power) > 0) + return 0; + else + return rproc_boot(scp->rproc); +} +EXPORT_SYMBOL_GPL(scp_boot); + /** * scp_get_vdec_hw_capa() - get video decoder hardware capability * diff --git a/include/linux/remoteproc/mtk_scp.h b/include/linux/remoteproc/mtk_scp.h index 7c2b7cc9fe6c..e463105b351c 100644 --- a/include/linux/remoteproc/mtk_scp.h +++ b/include/linux/remoteproc/mtk_scp.h @@ -52,6 +52,7 @@ void scp_put(struct mtk_scp *scp); struct device *scp_get_device(struct mtk_scp *scp); struct rproc *scp_get_rproc(struct mtk_scp *scp); +int scp_boot(struct mtk_scp *scp); int scp_ipi_register(struct mtk_scp *scp, u32 id, scp_ipi_handler_t handler, void *priv); From patchwork Tue Sep 27 02:56:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tinghan Shen X-Patchwork-Id: 12989736 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0F649C32771 for ; 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Mon, 26 Sep 2022 19:59:00 -0700 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.3; Tue, 27 Sep 2022 10:56:26 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Tue, 27 Sep 2022 10:56:26 +0800 From: Tinghan Shen To: Bjorn Andersson , Mathieu Poirier , Rob Herring , "Krzysztof Kozlowski" , Matthias Brugger , Tiffany Lin , "Andrew-CT Chen" , Yunfei Dong , Mauro Carvalho Chehab , Tinghan Shen CC: , , , , , Subject: [PATCH v3 05/11] remoteproc: mediatek: Add SCP core 1 register definitions Date: Tue, 27 Sep 2022 10:56:00 +0800 Message-ID: <20220927025606.26673-6-tinghan.shen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220927025606.26673-1-tinghan.shen@mediatek.com> References: <20220927025606.26673-1-tinghan.shen@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220926_195905_451859_38659C51 X-CRM114-Status: UNSURE ( 8.49 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add MT8195 SCP core 1 related register definitions. Signed-off-by: Tinghan Shen Reviewed-by: Mathieu Poirier Reviewed-by: AngeloGioacchino Del Regno --- drivers/remoteproc/mtk_common.h | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/remoteproc/mtk_common.h b/drivers/remoteproc/mtk_common.h index ea6fa1100a00..3778894c96f3 100644 --- a/drivers/remoteproc/mtk_common.h +++ b/drivers/remoteproc/mtk_common.h @@ -47,6 +47,7 @@ #define MT8192_SCP2SPM_IPC_CLR 0x4094 #define MT8192_GIPC_IN_SET 0x4098 #define MT8192_HOST_IPC_INT_BIT BIT(0) +#define MT8195_CORE1_HOST_IPC_INT_BIT BIT(4) #define MT8192_CORE0_SW_RSTN_CLR 0x10000 #define MT8192_CORE0_SW_RSTN_SET 0x10004 @@ -56,6 +57,26 @@ #define MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS GENMASK(7, 4) +#define MT8195_CPU1_SRAM_PD 0x1084 +#define MT8195_SSHUB2APMCU_IPC_SET 0x4088 +#define MT8195_SSHUB2APMCU_IPC_CLR 0x408C +#define MT8195_CORE1_SW_RSTN_CLR 0x20000 +#define MT8195_CORE1_SW_RSTN_SET 0x20004 +#define MT8195_CORE1_MEM_ATT_PREDEF 0x20008 +#define MT8195_CORE1_WDT_IRQ 0x20030 +#define MT8195_CORE1_WDT_CFG 0x20034 + +#define MT8195_SEC_CTRL 0x85000 +#define MT8195_CORE_OFFSET_ENABLE_D BIT(13) +#define MT8195_CORE_OFFSET_ENABLE_I BIT(12) +#define MT8195_L2TCM_OFFSET_RANGE_0_LOW 0x850b0 +#define MT8195_L2TCM_OFFSET_RANGE_0_HIGH 0x850b4 +#define MT8195_L2TCM_OFFSET 0x850d0 +#define SCP_SRAM_REMAP_LOW 0 +#define SCP_SRAM_REMAP_HIGH 1 +#define SCP_SRAM_REMAP_OFFSET 2 +#define SCP_SRAM_REMAP_SIZE 3 + #define SCP_FW_VER_LEN 32 #define SCP_SHARE_BUFFER_SIZE 288 From patchwork Tue Sep 27 02:56:01 2022 Content-Type: text/plain; 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Tue, 27 Sep 2022 10:56:26 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Tue, 27 Sep 2022 10:56:26 +0800 From: Tinghan Shen To: Bjorn Andersson , Mathieu Poirier , Rob Herring , "Krzysztof Kozlowski" , Matthias Brugger , Tiffany Lin , "Andrew-CT Chen" , Yunfei Dong , Mauro Carvalho Chehab , Tinghan Shen CC: , , , , , Subject: [PATCH v3 06/11] remoteproc: mediatek: Add MT8195 SCP core 1 operations Date: Tue, 27 Sep 2022 10:56:01 +0800 Message-ID: <20220927025606.26673-7-tinghan.shen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220927025606.26673-1-tinghan.shen@mediatek.com> References: <20220927025606.26673-1-tinghan.shen@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220926_195904_606962_303F1960 X-CRM114-Status: GOOD ( 14.64 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The SCP rproc driver has a set of chip dependent callbacks for boot sequence and IRQ handling. Implement these callbacks for MT8195 SCP core 1. Signed-off-by: Tinghan Shen --- drivers/remoteproc/mtk_scp.c | 57 ++++++++++++++++++++++++++++++++++++ 1 file changed, 57 insertions(+) diff --git a/drivers/remoteproc/mtk_scp.c b/drivers/remoteproc/mtk_scp.c index bf68bccab78b..1d17d77b8a14 100644 --- a/drivers/remoteproc/mtk_scp.c +++ b/drivers/remoteproc/mtk_scp.c @@ -176,6 +176,16 @@ static void mt8192_scp_reset_deassert(struct mtk_scp *scp) writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_CLR); } +static void mt8195_scp_c1_reset_assert(struct mtk_scp *scp) +{ + writel(1, scp->reg_base + MT8195_CORE1_SW_RSTN_SET); +} + +static void mt8195_scp_c1_reset_deassert(struct mtk_scp *scp) +{ + writel(1, scp->reg_base + MT8195_CORE1_SW_RSTN_CLR); +} + static void mt8183_scp_irq_handler(struct mtk_scp *scp) { u32 scp_to_host; @@ -212,6 +222,18 @@ static void mt8192_scp_irq_handler(struct mtk_scp *scp) } } +static void mt8195_scp_c1_irq_handler(struct mtk_scp *scp) +{ + u32 scp_to_host; + + scp_to_host = readl(scp->reg_base + MT8195_SSHUB2APMCU_IPC_SET); + + if (scp_to_host & MT8192_SCP_IPC_INT_BIT) + scp_ipi_handler(scp); + + writel(scp_to_host, scp->reg_base + MT8195_SSHUB2APMCU_IPC_CLR); +} + static irqreturn_t scp_irq_handler(int irq, void *priv) { struct mtk_scp *scp = priv; @@ -453,6 +475,19 @@ static int mt8195_scp_before_load(struct mtk_scp *scp) return 0; } +static int mt8195_scp_c1_before_load(struct mtk_scp *scp) +{ + scp_sram_power_on(scp->reg_base + MT8195_CPU1_SRAM_PD, 0); + + /* hold SCP in reset while loading FW. */ + scp->data->scp_reset_assert(scp); + + /* enable MPU for all memory regions */ + writel(0xff, scp->reg_base + MT8195_CORE1_MEM_ATT_PREDEF); + + return 0; +} + static int scp_load(struct rproc *rproc, const struct firmware *fw) { struct mtk_scp *scp = rproc->priv; @@ -625,6 +660,15 @@ static void mt8195_scp_stop(struct mtk_scp *scp) writel(0, scp->reg_base + MT8192_CORE0_WDT_CFG); } +static void mt8195_scp_c1_stop(struct mtk_scp *scp) +{ + /* Power off CPU SRAM */ + scp_sram_power_off(scp->reg_base + MT8195_CPU1_SRAM_PD, 0); + + /* Disable SCP watchdog */ + writel(0, scp->reg_base + MT8195_CORE1_WDT_CFG); +} + static int scp_stop(struct rproc *rproc) { struct mtk_scp *scp = (struct mtk_scp *)rproc->priv; @@ -1007,12 +1051,25 @@ static const struct mtk_scp_of_data mt8195_of_data = { .host_to_scp_int_bit = MT8192_HOST_IPC_INT_BIT, }; +static const struct mtk_scp_of_data mt8195_core_of_data = { + .scp_clk_get = mt8195_scp_clk_get, + .scp_before_load = mt8195_scp_c1_before_load, + .scp_irq_handler = mt8195_scp_c1_irq_handler, + .scp_reset_assert = mt8195_scp_c1_reset_assert, + .scp_reset_deassert = mt8195_scp_c1_reset_deassert, + .scp_stop = mt8195_scp_c1_stop, + .scp_da_to_va = mt8192_scp_da_to_va, + .host_to_scp_reg = MT8192_GIPC_IN_SET, + .host_to_scp_int_bit = MT8195_CORE1_HOST_IPC_INT_BIT, +}; + static const struct of_device_id mtk_scp_of_match[] = { { .compatible = "mediatek,mt8183-scp", .data = &mt8183_of_data }, { .compatible = "mediatek,mt8186-scp", .data = &mt8186_of_data }, { .compatible = "mediatek,mt8188-scp", .data = &mt8188_of_data }, { .compatible = "mediatek,mt8192-scp", .data = &mt8192_of_data }, { .compatible = "mediatek,mt8195-scp", .data = &mt8195_of_data }, + { .compatible = "mediatek,mt8195-scp-core", .data = &mt8195_core_of_data }, {}, }; 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Tue, 27 Sep 2022 10:56:26 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Tue, 27 Sep 2022 10:56:26 +0800 From: Tinghan Shen To: Bjorn Andersson , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , Tiffany Lin , Andrew-CT Chen , Yunfei Dong , Mauro Carvalho Chehab , Tinghan Shen CC: , , , , , Subject: [PATCH v3 07/11] remoteproc: mediatek: Probe MT8195 SCP core 1 Date: Tue, 27 Sep 2022 10:56:02 +0800 Message-ID: <20220927025606.26673-8-tinghan.shen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220927025606.26673-1-tinghan.shen@mediatek.com> References: <20220927025606.26673-1-tinghan.shen@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220926_202640_174316_EFF8BEDF X-CRM114-Status: GOOD ( 14.64 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The MT8195 SCP configuration registers for core 0 and core 1 is the same. Let SCP core 1 to reuse the mapped address requested by SCP core 0. Signed-off-by: Tinghan Shen --- drivers/remoteproc/mtk_common.h | 2 ++ drivers/remoteproc/mtk_scp.c | 27 +++++++++++++++++++++++---- 2 files changed, 25 insertions(+), 4 deletions(-) diff --git a/drivers/remoteproc/mtk_common.h b/drivers/remoteproc/mtk_common.h index 3778894c96f3..54265c515315 100644 --- a/drivers/remoteproc/mtk_common.h +++ b/drivers/remoteproc/mtk_common.h @@ -140,6 +140,8 @@ struct mtk_scp { size_t dram_size; struct rproc_subdev *rpmsg_subdev; + + struct mtk_scp *main_scp; }; /** diff --git a/drivers/remoteproc/mtk_scp.c b/drivers/remoteproc/mtk_scp.c index 1d17d77b8a14..f7b738743ba9 100644 --- a/drivers/remoteproc/mtk_scp.c +++ b/drivers/remoteproc/mtk_scp.c @@ -917,10 +917,29 @@ static int scp_probe(struct platform_device *pdev) scp->l1tcm_phys = res->start; } - scp->reg_base = devm_platform_ioremap_resource_byname(pdev, "cfg"); - if (IS_ERR(scp->reg_base)) - return dev_err_probe(dev, PTR_ERR(scp->reg_base), - "Failed to parse and map cfg memory\n"); + if (of_device_is_compatible(np, "mediatek,mt8195-scp-core")) { + struct device_node *pnp; + struct platform_device *scp_pdev; + + pnp = of_get_parent(np); + if (!pnp) + return dev_err_probe(dev, -ENODEV, "Failed to get parent core 0\n"); + + scp_pdev = of_find_device_by_node(pnp); + of_node_put(pnp); + if (!scp_pdev) + return dev_err_probe(dev, -ENODEV, "Failed to get scp core 0 pdev\n"); + + scp->main_scp = platform_get_drvdata(scp_pdev); + scp->reg_base = scp->main_scp->reg_base; + } else { + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cfg"); + scp->reg_base = devm_ioremap_resource(dev, res); + + if (IS_ERR(scp->reg_base)) + return dev_err_probe(dev, PTR_ERR(scp->reg_base), + "Failed to parse and map cfg memory\n"); + } ret = scp->data->scp_clk_get(scp); if (ret) From patchwork Tue Sep 27 02:56:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tinghan Shen X-Patchwork-Id: 12989738 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4D5B8C07E9D for ; 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Mon, 26 Sep 2022 19:59:02 -0700 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.3; Tue, 27 Sep 2022 10:56:26 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Tue, 27 Sep 2022 10:56:26 +0800 From: Tinghan Shen To: Bjorn Andersson , Mathieu Poirier , Rob Herring , "Krzysztof Kozlowski" , Matthias Brugger , Tiffany Lin , "Andrew-CT Chen" , Yunfei Dong , Mauro Carvalho Chehab , Tinghan Shen CC: , , , , , Subject: [PATCH v3 08/11] remoteproc: mediatek: Control SCP core 1 boot by rproc subdevice Date: Tue, 27 Sep 2022 10:56:03 +0800 Message-ID: <20220927025606.26673-9-tinghan.shen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220927025606.26673-1-tinghan.shen@mediatek.com> References: <20220927025606.26673-1-tinghan.shen@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220926_195912_065638_C3BD6DDC X-CRM114-Status: GOOD ( 17.40 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Register SCP core 1 as a subdevice of core 0 to control the boot sequence and watchdog handling. The core 1 has to boot after core 0 because the SCP clock and SRAM power is controlled by SCP core 0. When SCP core 0 reports a watchdog timeout event, the SRAM is emptied before rebooting the SCP core 0, forcing the reload of the SCP core 1 image. Signed-off-by: Tinghan Shen --- drivers/remoteproc/mtk_common.h | 8 ++++ drivers/remoteproc/mtk_scp.c | 71 +++++++++++++++++++++++++++++++++ 2 files changed, 79 insertions(+) diff --git a/drivers/remoteproc/mtk_common.h b/drivers/remoteproc/mtk_common.h index 54265c515315..dcde25f8bbf9 100644 --- a/drivers/remoteproc/mtk_common.h +++ b/drivers/remoteproc/mtk_common.h @@ -95,6 +95,13 @@ struct scp_ipi_desc { void *priv; }; +struct scp_subdev_core { + struct rproc_subdev subdev; + struct mtk_scp *scp; +}; + +#define to_subdev_core(d) container_of(d, struct scp_subdev_core, subdev) + struct mtk_scp; struct mtk_scp_of_data { @@ -142,6 +149,7 @@ struct mtk_scp { struct rproc_subdev *rpmsg_subdev; struct mtk_scp *main_scp; + struct rproc_subdev *core_subdev; }; /** diff --git a/drivers/remoteproc/mtk_scp.c b/drivers/remoteproc/mtk_scp.c index f7b738743ba9..2d43338b96da 100644 --- a/drivers/remoteproc/mtk_scp.c +++ b/drivers/remoteproc/mtk_scp.c @@ -871,6 +871,54 @@ static void scp_remove_rpmsg_subdev(struct mtk_scp *scp) } } +static int scp_core_subdev_start(struct rproc_subdev *subdev) +{ + struct scp_subdev_core *subdev_core = to_subdev_core(subdev); + struct mtk_scp *scp = subdev_core->scp; + + rproc_boot(scp->rproc); + + return 0; +} + +static void scp_core_subdev_stop(struct rproc_subdev *subdev, bool crashed) +{ + struct scp_subdev_core *subdev_core = to_subdev_core(subdev); + struct mtk_scp *scp = subdev_core->scp; + + rproc_shutdown(scp->rproc); +} + +static int scp_core_subdev_register(struct mtk_scp *scp) +{ + struct device *dev = scp->dev; + struct scp_subdev_core *subdev_core; + + subdev_core = devm_kzalloc(dev, sizeof(*subdev_core), GFP_KERNEL); + if (!subdev_core) { + scp->core_subdev = NULL; + return -ENOMEM; + } + + subdev_core->scp = scp; + subdev_core->subdev.start = scp_core_subdev_start; + subdev_core->subdev.stop = scp_core_subdev_stop; + + scp->core_subdev = &subdev_core->subdev; + rproc_add_subdev(scp->main_scp->rproc, scp->core_subdev); + + return 0; +} + +static void scp_core_subdev_unregister(struct mtk_scp *scp) +{ + if (scp->core_subdev) { + rproc_remove_subdev(scp->main_scp->rproc, scp->core_subdev); + devm_kfree(scp->dev, to_subdev_core(scp->core_subdev)); + scp->core_subdev = NULL; + } +} + static int scp_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -974,6 +1022,23 @@ static int scp_probe(struct platform_device *pdev) goto remove_subdev; } + if (of_device_is_compatible(np, "mediatek,mt8195-scp-core")) { + ret = scp_core_subdev_register(scp); + if (ret) { + dev_err_probe(dev, ret, "Failed to register subdev\n"); + goto remove_subdev; + } + + /* sub cores are booted as subdevices of main core. */ + rproc->auto_boot = false; + } else { + ret = devm_of_platform_populate(dev); + if (ret) { + dev_err_probe(dev, ret, "Failed to probe sub cores\n"); + goto remove_subdev; + } + } + ret = rproc_add(rproc); if (ret) goto remove_subdev; @@ -981,6 +1046,7 @@ static int scp_probe(struct platform_device *pdev) return 0; remove_subdev: + scp_core_subdev_unregister(scp); scp_remove_rpmsg_subdev(scp); scp_ipi_unregister(scp, SCP_IPI_INIT); release_dev_mem: @@ -997,6 +1063,11 @@ static int scp_remove(struct platform_device *pdev) struct mtk_scp *scp = platform_get_drvdata(pdev); int i; + if (of_device_is_compatible(scp->dev->of_node, "mediatek,mt8195-scp-core")) + scp_core_subdev_unregister(scp); + else + devm_of_platform_depopulate(scp->dev); + rproc_del(scp->rproc); scp_remove_rpmsg_subdev(scp); scp_ipi_unregister(scp, SCP_IPI_INIT); From patchwork Tue Sep 27 02:56:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tinghan Shen X-Patchwork-Id: 12989735 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3F047C32771 for ; Tue, 27 Sep 2022 03:00:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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Mon, 26 Sep 2022 19:59:02 -0700 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.3; Tue, 27 Sep 2022 10:56:26 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Tue, 27 Sep 2022 10:56:26 +0800 From: Tinghan Shen To: Bjorn Andersson , Mathieu Poirier , Rob Herring , "Krzysztof Kozlowski" , Matthias Brugger , Tiffany Lin , "Andrew-CT Chen" , Yunfei Dong , Mauro Carvalho Chehab , Tinghan Shen CC: , , , , , Subject: [PATCH v3 09/11] remoteproc: mediatek: Setup MT8195 SCP core 1 SRAM offset Date: Tue, 27 Sep 2022 10:56:04 +0800 Message-ID: <20220927025606.26673-10-tinghan.shen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220927025606.26673-1-tinghan.shen@mediatek.com> References: <20220927025606.26673-1-tinghan.shen@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220926_195906_459977_6B3A3763 X-CRM114-Status: GOOD ( 15.29 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Because MT8195 SCP core 0 and core 1 both boot from head of SRAM and have the same viewpoint of SRAM, SCP has a "Core 1 SRAM offset" to control the viewpoint of SCP core 1 to allow core 1 boot from different SRAM location. The "Core 1 SRAM offset" configuration is composed by specifying a range and an offset. When SCP core 1 accesses a SRAM address located in the configured range, SCP bus adds the configured offset to the address to shift the final physical destination on SCP SRAM. This shift is transparent to the software running on SCP core 1. Signed-off-by: Tinghan Shen --- drivers/remoteproc/mtk_scp.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/drivers/remoteproc/mtk_scp.c b/drivers/remoteproc/mtk_scp.c index 2d43338b96da..0f1b587f8502 100644 --- a/drivers/remoteproc/mtk_scp.c +++ b/drivers/remoteproc/mtk_scp.c @@ -477,6 +477,8 @@ static int mt8195_scp_before_load(struct mtk_scp *scp) static int mt8195_scp_c1_before_load(struct mtk_scp *scp) { + u32 sec_ctrl; + scp_sram_power_on(scp->reg_base + MT8195_CPU1_SRAM_PD, 0); /* hold SCP in reset while loading FW. */ @@ -485,6 +487,27 @@ static int mt8195_scp_c1_before_load(struct mtk_scp *scp) /* enable MPU for all memory regions */ writel(0xff, scp->reg_base + MT8195_CORE1_MEM_ATT_PREDEF); + /* The value of SRAM offset range is from the viewpoint of SCP core 1. + * This configuration adds an offset on SCP bus when SCP core 1 accesses SCP SRAM + * to solve the SCP core 0 and core 1 both fetch the 1st instruction from the same + * SRAM address. + * + * Because SCP core 0 and core 1 both boot from the head of sram, this must be + * configured before boot SCP core 1. + * + * Configure the range of SRAM addresses will be added offset. + */ + writel(0, scp->reg_base + MT8195_L2TCM_OFFSET_RANGE_0_LOW); + writel(scp->sram_size, scp->reg_base + MT8195_L2TCM_OFFSET_RANGE_0_HIGH); + + /* configure the offset value */ + writel(scp->sram_phys - scp->main_scp->sram_phys, scp->reg_base + MT8195_L2TCM_OFFSET); + + /* enable adding sram offset when fetching instruction and data */ + sec_ctrl = readl(scp->reg_base + MT8195_SEC_CTRL); + sec_ctrl |= MT8195_CORE_OFFSET_ENABLE_I | MT8195_CORE_OFFSET_ENABLE_D; + writel(sec_ctrl, scp->reg_base + MT8195_SEC_CTRL); + return 0; } From patchwork Tue Sep 27 02:56:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tinghan Shen X-Patchwork-Id: 12989733 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D51BEC07E9D for ; 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Mon, 26 Sep 2022 19:57:30 -0700 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs11n2.mediatek.inc (172.21.101.187) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Tue, 27 Sep 2022 10:56:27 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Tue, 27 Sep 2022 10:56:27 +0800 From: Tinghan Shen To: Bjorn Andersson , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , Tiffany Lin , Andrew-CT Chen , Yunfei Dong , Mauro Carvalho Chehab , Tinghan Shen CC: , , , , , Subject: [PATCH v3 10/11] remoteproc: mediatek: Handle MT8195 SCP core 1 watchdog timeout Date: Tue, 27 Sep 2022 10:56:05 +0800 Message-ID: <20220927025606.26673-11-tinghan.shen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220927025606.26673-1-tinghan.shen@mediatek.com> References: <20220927025606.26673-1-tinghan.shen@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220926_195735_927033_8BB0DA81 X-CRM114-Status: GOOD ( 16.51 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The MT8195 SCP core 1 watchdog timeout needs to be handled in the SCP core 0 IRQ handler because the MT8195 SCP core 1 watchdog timeout IRQ is wired on the same IRQ entry for core 0 watchdog timeout. MT8195 SCP has a watchdog status register to identify the watchdog timeout source when IRQ triggered. Signed-off-by: Tinghan Shen --- drivers/remoteproc/mtk_common.h | 4 +++ drivers/remoteproc/mtk_scp.c | 44 ++++++++++++++++++++++++++++++++- 2 files changed, 47 insertions(+), 1 deletion(-) diff --git a/drivers/remoteproc/mtk_common.h b/drivers/remoteproc/mtk_common.h index dcde25f8bbf9..6cd04ca9e681 100644 --- a/drivers/remoteproc/mtk_common.h +++ b/drivers/remoteproc/mtk_common.h @@ -55,6 +55,10 @@ #define MT8192_CORE0_WDT_IRQ 0x10030 #define MT8192_CORE0_WDT_CFG 0x10034 +#define MT8195_SYS_STATUS 0x4004 +#define MT8195_CORE0_WDT BIT(16) +#define MT8195_CORE1_WDT BIT(17) + #define MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS GENMASK(7, 4) #define MT8195_CPU1_SRAM_PD 0x1084 diff --git a/drivers/remoteproc/mtk_scp.c b/drivers/remoteproc/mtk_scp.c index 0f1b587f8502..159f3c69cd69 100644 --- a/drivers/remoteproc/mtk_scp.c +++ b/drivers/remoteproc/mtk_scp.c @@ -222,6 +222,48 @@ static void mt8192_scp_irq_handler(struct mtk_scp *scp) } } +static void mt8195_scp_irq_handler(struct mtk_scp *scp) +{ + u32 scp_to_host; + + scp_to_host = readl(scp->reg_base + MT8192_SCP2APMCU_IPC_SET); + + if (scp_to_host & MT8192_SCP_IPC_INT_BIT) { + scp_ipi_handler(scp); + } else { + if (readl(scp->reg_base + MT8195_SYS_STATUS) & MT8195_CORE1_WDT) { + struct device_node *c1_np; + struct platform_device *c1_pdev; + struct mtk_scp *c1_scp; + + writel(1, scp->reg_base + MT8195_CORE1_WDT_IRQ); + + c1_np = of_get_compatible_child(scp->dev->of_node, + "mediatek,mt8195-scp-core"); + if (!c1_np) { + dev_err(scp->dev, "cannot find core 1 node\n"); + goto clear_irq; + } + + c1_pdev = of_find_device_by_node(c1_np); + of_node_put(c1_np); + if (!c1_pdev) { + dev_err(scp->dev, "cannot find core 1 pdev\n"); + goto clear_irq; + } + + c1_scp = platform_get_drvdata(c1_pdev); + scp_wdt_handler(c1_scp, scp_to_host); + } else { + writel(1, scp->reg_base + MT8192_CORE0_WDT_IRQ); + scp_wdt_handler(scp, scp_to_host); + } + } + +clear_irq: + writel(scp_to_host, scp->reg_base + MT8192_SCP2APMCU_IPC_CLR); +} + static void mt8195_scp_c1_irq_handler(struct mtk_scp *scp) { u32 scp_to_host; @@ -1155,7 +1197,7 @@ static const struct mtk_scp_of_data mt8192_of_data = { static const struct mtk_scp_of_data mt8195_of_data = { .scp_clk_get = mt8195_scp_clk_get, .scp_before_load = mt8195_scp_before_load, - .scp_irq_handler = mt8192_scp_irq_handler, + .scp_irq_handler = mt8195_scp_irq_handler, .scp_reset_assert = mt8192_scp_reset_assert, .scp_reset_deassert = mt8192_scp_reset_deassert, .scp_stop = mt8195_scp_stop, From patchwork Tue Sep 27 02:56:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tinghan Shen X-Patchwork-Id: 12989737 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8EB0AC32771 for ; Tue, 27 Sep 2022 03:01:17 +0000 (UTC) DKIM-Signature: v=1; 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Mon, 26 Sep 2022 19:59:03 -0700 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.3; Tue, 27 Sep 2022 10:56:27 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Tue, 27 Sep 2022 10:56:27 +0800 From: Tinghan Shen To: Bjorn Andersson , Mathieu Poirier , Rob Herring , "Krzysztof Kozlowski" , Matthias Brugger , Tiffany Lin , "Andrew-CT Chen" , Yunfei Dong , Mauro Carvalho Chehab , Tinghan Shen CC: , , , , , Subject: [PATCH v3 11/11] remoteproc: mediatek: Refine ipi handler error message Date: Tue, 27 Sep 2022 10:56:06 +0800 Message-ID: <20220927025606.26673-12-tinghan.shen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220927025606.26673-1-tinghan.shen@mediatek.com> References: <20220927025606.26673-1-tinghan.shen@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220926_195912_073869_903B1B94 X-CRM114-Status: GOOD ( 12.58 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The error message doesn't accurately reflect the cause of the error. The error is due to a handler not being found, not an invalid IPI ID. Signed-off-by: Tinghan Shen Reviewed-by: AngeloGioacchino Del Regno --- drivers/remoteproc/mtk_scp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/remoteproc/mtk_scp.c b/drivers/remoteproc/mtk_scp.c index 159f3c69cd69..8b1765c61442 100644 --- a/drivers/remoteproc/mtk_scp.c +++ b/drivers/remoteproc/mtk_scp.c @@ -106,7 +106,7 @@ static void scp_ipi_handler(struct mtk_scp *scp) scp_ipi_lock(scp, id); handler = ipi_desc[id].handler; if (!handler) { - dev_err(scp->dev, "No such ipi id = %d\n", id); + dev_err(scp->dev, "No handler for ipi id = %d\n", id); scp_ipi_unlock(scp, id); return; }