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(dh207-96-59.xnet.hr. [88.207.96.59]) by smtp.googlemail.com with ESMTPSA id t7-20020a170906a10700b0074136cac2e7sm1267548ejy.81.2022.09.27.13.12.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Sep 2022 13:12:21 -0700 (PDT) From: Robert Marko To: agross@kernel.org, andersson@kernel.org, konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Robert Marko Subject: [PATCH 1/2] arm64: dts: qcom: ipq6018: fix NAND node name Date: Tue, 27 Sep 2022 22:12:17 +0200 Message-Id: <20220927201218.1264506-1-robimarko@gmail.com> X-Mailer: git-send-email 2.37.3 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Per schema it should be nand-controller@79b0000 instead of nand@79b0000. Fix it to match nand-controller.yaml requirements. Signed-off-by: Robert Marko Reviewed-by: Neil Armstrong Reviewed-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/ipq6018.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi index a7c7ca980a71..57978a8ab498 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi @@ -348,7 +348,7 @@ qpic_bam: dma-controller@7984000 { status = "disabled"; }; - qpic_nand: nand@79b0000 { + qpic_nand: nand-controller@79b0000 { compatible = "qcom,ipq6018-nand"; reg = <0x0 0x079b0000 0x0 0x10000>; #address-cells = <1>; From patchwork Tue Sep 27 20:12:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 12991313 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CEB26C6FA82 for ; Tue, 27 Sep 2022 20:13:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232050AbiI0UNe (ORCPT ); Tue, 27 Sep 2022 16:13:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60908 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232929AbiI0UNP (ORCPT ); Tue, 27 Sep 2022 16:13:15 -0400 Received: from mail-ed1-x530.google.com (mail-ed1-x530.google.com [IPv6:2a00:1450:4864:20::530]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E86C41ED236; Tue, 27 Sep 2022 13:12:23 -0700 (PDT) Received: by mail-ed1-x530.google.com with SMTP id a41so14670044edf.4; Tue, 27 Sep 2022 13:12:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=8pSjB+gJohvS5unlBusQ5X7FD9nY+Kc3aHB8SHm0lc4=; b=V6IyQApKrHwEnRiPh8ZfEmMdlOzzFZe+WqBG6IfHy30xgJSByiS0mhqIQrO4L69zHW ZrlJs2n+vTkLiQBEFEvfYvK9tpdaFmEXYU+/WVTczn67+qY6WfrzIP/cU4sdRaOUtKX0 3lX8sVOuwQOLVyC4g/yud+2K9uZTgwYgtjz3njjIO8umgu0hN3aqZN2HMm59npWnMGO4 ZnGMd+JFlBCJW4KB8QF/s/RasWZbSjRnLDWbaF+4ybIajEIOXVlkc4Z/2S7lbhT61uEq y3wVaS/Ay1KHgBiYYD9VQ5zDx1zxijwZ4jebuzJlWUPY/2WECH7RpllKr0bIycvUx+UV dV9w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=8pSjB+gJohvS5unlBusQ5X7FD9nY+Kc3aHB8SHm0lc4=; b=SGqaj69WedHRW6Be7AjjhUs55v4k58Fp6GGu53/Cr6LabekfGv5zVZCY46BQLHSIxg rWPDHZhSkVaC28nZ61XjeI58IHie910zcwmSO1XIA6hrj+i8C4GD82DaIBpeQDCZz/NC /Mf6Db6W7cRiZtFZeUuaFRcJm74+L5u9kebKaebTD31ChznBAOfmeliT5RBfmoBbNriK aPNNtYG5aLQ7/aFaTL29HQvtvqxZsGnaqdScbaz4W3L8Ypt5yKwh61Ll+HGlPwKAUWeY AP/Yl9MSmAfqme6Y9vwVLu+yLXZqzzT6MjBMXv3pnD1gJdLfdQ6AptrKXnlluncw3xvR mYmQ== X-Gm-Message-State: ACrzQf2h9kxl/VXL68enR8NwWcWU/+0N0HJvQGANzXnKa9N99j/Jqtba eV4SAvoJc9p8IvKpaOLH1GE= X-Google-Smtp-Source: AMsMyM41T3Qq7C/k7coJhotULEWD9XIfdLvFgcvBGe2okVecVjdNY7B892RoEHjUV1oXGDSf/Cy0Ng== X-Received: by 2002:a05:6402:5188:b0:452:5395:a271 with SMTP id q8-20020a056402518800b004525395a271mr29585135edd.383.1664309542538; Tue, 27 Sep 2022 13:12:22 -0700 (PDT) Received: from fedora.. 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[88.207.96.59]) by smtp.googlemail.com with ESMTPSA id t7-20020a170906a10700b0074136cac2e7sm1267548ejy.81.2022.09.27.13.12.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Sep 2022 13:12:22 -0700 (PDT) From: Robert Marko To: agross@kernel.org, andersson@kernel.org, konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Robert Marko Subject: [PATCH 2/2] arm64: dts: qcom: ipq6018: move ARMv8 timer out of SoC node Date: Tue, 27 Sep 2022 22:12:18 +0200 Message-Id: <20220927201218.1264506-2-robimarko@gmail.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220927201218.1264506-1-robimarko@gmail.com> References: <20220927201218.1264506-1-robimarko@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The ARM timer is usually considered not part of SoC node, just like other ARM designed blocks (PMU, PSCI). This fixes dtbs_check warning: arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dtb: soc: timer: {'compatible': ['arm,armv8-timer'], 'interrupts': [[1, 2, 3848], [1, 3, 3848], [1, 4, 3848], [1, 1, 3848]]} should not be valid under {'type': 'object'} From schema: dtschema/schemas/simple-bus.yaml Signed-off-by: Robert Marko Reviewed-by: Neil Armstrong Reviewed-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/ipq6018.dtsi | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi index 57978a8ab498..428e99e127c3 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi @@ -511,14 +511,6 @@ a53pll: clock@b116000 { clock-names = "xo"; }; - timer { - compatible = "arm,armv8-timer"; - interrupts = , - , - , - ; - }; - timer@b120000 { #address-cells = <1>; #size-cells = <1>; @@ -770,6 +762,14 @@ dwc_0: usb@8a00000 { }; }; + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + }; + wcss: wcss-smp2p { compatible = "qcom,smp2p"; qcom,smem = <435>, <428>;