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Thu, 29 Sep 2022 09:43:50 +0000 From: Quan Nguyen To: macro@orcam.me.uk, Lee Jones , Bagas Sanjaya , Rob Herring , Krzysztof Kozlowski , Jean Delvare , Guenter Roeck , Jonathan Corbet , Derek Kiernan , Dragan Cvetic , Arnd Bergmann , Greg Kroah-Hartman , Quan Nguyen , Thu Nguyen , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-hwmon@vger.kernel.org, linux-doc@vger.kernel.org, OpenBMC Maillist , Open Source Submission Cc: Phong Vo , thang@os.amperecomputing.com Subject: [PATCH v9 1/9] hwmon: smpro: Add Ampere's Altra smpro-hwmon driver Date: Thu, 29 Sep 2022 16:43:13 +0700 Message-Id: <20220929094321.770125-2-quan@os.amperecomputing.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220929094321.770125-1-quan@os.amperecomputing.com> References: <20220929094321.770125-1-quan@os.amperecomputing.com> X-ClientProxiedBy: SG2PR01CA0178.apcprd01.prod.exchangelabs.com (2603:1096:4:28::34) To SJ0PR01MB7282.prod.exchangelabs.com (2603:10b6:a03:3f2::24) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ0PR01MB7282:EE_|BN8PR01MB5682:EE_ X-MS-Office365-Filtering-Correlation-Id: f6cab5ac-88cf-4ea7-96aa-08daa1ff1cae X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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This driver supports accessing various CPU sensors provided by the SMpro co-processor including temperature, power, voltages, and current. Signed-off-by: Quan Nguyen Reviewed-by: Guenter Roeck --- Changes in v9: + Insert 'break;' to avoid fall-through [kernel test robot] + Update SPDX license [Greg] Changes in v8: + Masks reserved bit when read 10-bit power value [Quan] + Insert 'break;' to avoid fall-through [kernel test robot] Changes in v7: + Update GPL version [Quan] Changes in v6: + None Changes in v5: + Drop ManufacturerID checking when probe as it was checked during smpro-mfd probing [Quan] + Drop the use of register offset [Quan] + Removed the use of compatible string as it is instantiated by smpro-mfd driver [Quan] Changes in v4: + Returned regmap_read() error code [Guenter] Changes in v3: + Handled negative temperature value [Guenter] + Returned -ENODEV if Manufacturer ID is wrong [Guenter] + Refactored smpro_read_string() and smpro_temp_read() [Guenter] + Removed smpro_write() function [Guenter] + Added minor refactor changes [Quan] Changes in v2: + Removed "virtual" sensors [Guenter] + Reported SOC_TDP as "Socket TDP" using max attributes [Guenter] + Corrected return error code when host is turn off [Guenter] + Reported MEM HOT Threshold for all DIMMs as temp*_crit [Guenter] + Removed license info as SPDX-License-Identifier existed [Guenter] + Added is_visible() support [Guenter] + Used HWMON_CHANNEL_INFO() macro and LABEL attributes [Guenter] + Made is_valid_id() return boolean [Guenter] + Returned -EPROBE_DEFER when smpro reg inaccessible [Guenter] + Removed unnecessary error message when dev register fail [Guenter] + Removed Socket TDP sensor [Quan] + Included sensor type and channel in labels [Quan] + Refactorized code to fix checkpatch.pl --strict complaint [Quan] drivers/hwmon/Kconfig | 8 + drivers/hwmon/Makefile | 1 + drivers/hwmon/smpro-hwmon.c | 463 ++++++++++++++++++++++++++++++++++++ 3 files changed, 472 insertions(+) create mode 100644 drivers/hwmon/smpro-hwmon.c diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig index 7ac3daaf59ce..e7ec6af309c7 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig @@ -67,6 +67,14 @@ config SENSORS_ABITUGURU3 This driver can also be built as a module. If so, the module will be called abituguru3. +config SENSORS_SMPRO + tristate "Ampere's Altra SMpro hardware monitoring driver" + depends on MFD_SMPRO + help + If you say yes here you get support for the thermal, voltage, + current and power sensors of Ampere's Altra processor family SoC + with SMpro co-processor. + config SENSORS_AD7314 tristate "Analog Devices AD7314 and compatibles" depends on SPI diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile index 11d076cad8a2..c5cd7e3a67ff 100644 --- a/drivers/hwmon/Makefile +++ b/drivers/hwmon/Makefile @@ -187,6 +187,7 @@ obj-$(CONFIG_SENSORS_SHT4x) += sht4x.o obj-$(CONFIG_SENSORS_SHTC1) += shtc1.o obj-$(CONFIG_SENSORS_SIS5595) += sis5595.o obj-$(CONFIG_SENSORS_SMM665) += smm665.o +obj-$(CONFIG_SENSORS_SMPRO) += smpro-hwmon.o obj-$(CONFIG_SENSORS_SMSC47B397)+= smsc47b397.o obj-$(CONFIG_SENSORS_SMSC47M1) += smsc47m1.o obj-$(CONFIG_SENSORS_SMSC47M192)+= smsc47m192.o diff --git a/drivers/hwmon/smpro-hwmon.c b/drivers/hwmon/smpro-hwmon.c new file mode 100644 index 000000000000..ee54e21c2c12 --- /dev/null +++ b/drivers/hwmon/smpro-hwmon.c @@ -0,0 +1,463 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Ampere Computing SoC's SMPro Hardware Monitoring Driver + * + * Copyright (c) 2022, Ampere Computing LLC + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Logical Power Sensor Registers */ +#define SOC_TEMP 0x10 +#define SOC_VRD_TEMP 0x11 +#define DIMM_VRD_TEMP 0x12 +#define CORE_VRD_TEMP 0x13 +#define CH0_DIMM_TEMP 0x14 +#define CH1_DIMM_TEMP 0x15 +#define CH2_DIMM_TEMP 0x16 +#define CH3_DIMM_TEMP 0x17 +#define CH4_DIMM_TEMP 0x18 +#define CH5_DIMM_TEMP 0x19 +#define CH6_DIMM_TEMP 0x1A +#define CH7_DIMM_TEMP 0x1B +#define RCA_VRD_TEMP 0x1C + +#define CORE_VRD_PWR 0x20 +#define SOC_PWR 0x21 +#define DIMM_VRD1_PWR 0x22 +#define DIMM_VRD2_PWR 0x23 +#define CORE_VRD_PWR_MW 0x26 +#define SOC_PWR_MW 0x27 +#define DIMM_VRD1_PWR_MW 0x28 +#define DIMM_VRD2_PWR_MW 0x29 +#define RCA_VRD_PWR 0x2A +#define RCA_VRD_PWR_MW 0x2B + +#define MEM_HOT_THRESHOLD 0x32 +#define SOC_VR_HOT_THRESHOLD 0x33 +#define CORE_VRD_VOLT 0x34 +#define SOC_VRD_VOLT 0x35 +#define DIMM_VRD1_VOLT 0x36 +#define DIMM_VRD2_VOLT 0x37 +#define RCA_VRD_VOLT 0x38 + +#define CORE_VRD_CURR 0x39 +#define SOC_VRD_CURR 0x3A +#define DIMM_VRD1_CURR 0x3B +#define DIMM_VRD2_CURR 0x3C +#define RCA_VRD_CURR 0x3D + +struct smpro_hwmon { + struct regmap *regmap; +}; + +struct smpro_sensor { + const u8 reg; + const u8 reg_ext; + const char *label; +}; + +static const struct smpro_sensor temperature[] = { + { + .reg = SOC_TEMP, + .label = "temp1 SoC" + }, + { + .reg = SOC_VRD_TEMP, + .reg_ext = SOC_VR_HOT_THRESHOLD, + .label = "temp2 SoC VRD" + }, + { + .reg = DIMM_VRD_TEMP, + .label = "temp3 DIMM VRD" + }, + { + .reg = CORE_VRD_TEMP, + .label = "temp4 CORE VRD" + }, + { + .reg = CH0_DIMM_TEMP, + .reg_ext = MEM_HOT_THRESHOLD, + .label = "temp5 CH0 DIMM" + }, + { + .reg = CH1_DIMM_TEMP, + .reg_ext = MEM_HOT_THRESHOLD, + .label = "temp6 CH1 DIMM" + }, + { + .reg = CH2_DIMM_TEMP, + .reg_ext = MEM_HOT_THRESHOLD, + .label = "temp7 CH2 DIMM" + }, + { + .reg = CH3_DIMM_TEMP, + .reg_ext = MEM_HOT_THRESHOLD, + .label = "temp8 CH3 DIMM" + }, + { + .reg = CH4_DIMM_TEMP, + .reg_ext = MEM_HOT_THRESHOLD, + .label = "temp9 CH4 DIMM" + }, + { + .reg = CH5_DIMM_TEMP, + .reg_ext = MEM_HOT_THRESHOLD, + .label = "temp10 CH5 DIMM" + }, + { + .reg = CH6_DIMM_TEMP, + .reg_ext = MEM_HOT_THRESHOLD, + .label = "temp11 CH6 DIMM" + }, + { + .reg = CH7_DIMM_TEMP, + .reg_ext = MEM_HOT_THRESHOLD, + .label = "temp12 CH7 DIMM" + }, + { + .reg = RCA_VRD_TEMP, + .label = "temp13 RCA VRD" + }, +}; + +static const struct smpro_sensor voltage[] = { + { + .reg = CORE_VRD_VOLT, + .label = "vout0 CORE VRD" + }, + { + .reg = SOC_VRD_VOLT, + .label = "vout1 SoC VRD" + }, + { + .reg = DIMM_VRD1_VOLT, + .label = "vout2 DIMM VRD1" + }, + { + .reg = DIMM_VRD2_VOLT, + .label = "vout3 DIMM VRD2" + }, + { + .reg = RCA_VRD_VOLT, + .label = "vout4 RCA VRD" + }, +}; + +static const struct smpro_sensor curr_sensor[] = { + { + .reg = CORE_VRD_CURR, + .label = "iout1 CORE VRD" + }, + { + .reg = SOC_VRD_CURR, + .label = "iout2 SoC VRD" + }, + { + .reg = DIMM_VRD1_CURR, + .label = "iout3 DIMM VRD1" + }, + { + .reg = DIMM_VRD2_CURR, + .label = "iout4 DIMM VRD2" + }, + { + .reg = RCA_VRD_CURR, + .label = "iout5 RCA VRD" + }, +}; + +static const struct smpro_sensor power[] = { + { + .reg = CORE_VRD_PWR, + .reg_ext = CORE_VRD_PWR_MW, + .label = "power1 CORE VRD" + }, + { + .reg = SOC_PWR, + .reg_ext = SOC_PWR_MW, + .label = "power2 SoC" + }, + { + .reg = DIMM_VRD1_PWR, + .reg_ext = DIMM_VRD1_PWR_MW, + .label = "power3 DIMM VRD1" + }, + { + .reg = DIMM_VRD2_PWR, + .reg_ext = DIMM_VRD2_PWR_MW, + .label = "power4 DIMM VRD2" + }, + { + .reg = RCA_VRD_PWR, + .reg_ext = RCA_VRD_PWR_MW, + .label = "power5 RCA VRD" + }, +}; + +static int smpro_read_temp(struct device *dev, u32 attr, int channel, long *val) +{ + struct smpro_hwmon *hwmon = dev_get_drvdata(dev); + unsigned int value; + int ret; + + switch (attr) { + case hwmon_temp_input: + ret = regmap_read(hwmon->regmap, temperature[channel].reg, &value); + if (ret) + return ret; + break; + case hwmon_temp_crit: + ret = regmap_read(hwmon->regmap, temperature[channel].reg_ext, &value); + if (ret) + return ret; + break; + default: + return -EOPNOTSUPP; + } + + *val = sign_extend32(value, 8) * 1000; + return 0; +} + +static int smpro_read_in(struct device *dev, u32 attr, int channel, long *val) +{ + struct smpro_hwmon *hwmon = dev_get_drvdata(dev); + unsigned int value; + int ret; + + switch (attr) { + case hwmon_in_input: + ret = regmap_read(hwmon->regmap, voltage[channel].reg, &value); + if (ret < 0) + return ret; + /* 15-bit value in 1mV */ + *val = value & 0x7fff; + return 0; + default: + return -EOPNOTSUPP; + } +} + +static int smpro_read_curr(struct device *dev, u32 attr, int channel, long *val) +{ + struct smpro_hwmon *hwmon = dev_get_drvdata(dev); + unsigned int value; + int ret; + + switch (attr) { + case hwmon_curr_input: + ret = regmap_read(hwmon->regmap, curr_sensor[channel].reg, &value); + if (ret < 0) + return ret; + /* Scale reported by the hardware is 1mA */ + *val = value & 0x7fff; + return 0; + default: + return -EOPNOTSUPP; + } +} + +static int smpro_read_power(struct device *dev, u32 attr, int channel, long *val_pwr) +{ + struct smpro_hwmon *hwmon = dev_get_drvdata(dev); + unsigned int val = 0, val_mw = 0; + int ret; + + switch (attr) { + case hwmon_power_input: + ret = regmap_read(hwmon->regmap, power[channel].reg, &val); + if (ret) + return ret; + + ret = regmap_read(hwmon->regmap, power[channel].reg_ext, &val_mw); + if (ret) + return ret; + /* 10-bit value */ + *val_pwr = (val & 0x3ff) * 1000000 + (val_mw & 0x3ff) * 1000; + return 0; + + default: + return -EOPNOTSUPP; + } +} + +static int smpro_read(struct device *dev, enum hwmon_sensor_types type, + u32 attr, int channel, long *val) +{ + switch (type) { + case hwmon_temp: + return smpro_read_temp(dev, attr, channel, val); + case hwmon_in: + return smpro_read_in(dev, attr, channel, val); + case hwmon_power: + return smpro_read_power(dev, attr, channel, val); + case hwmon_curr: + return smpro_read_curr(dev, attr, channel, val); + default: + return -EOPNOTSUPP; + } +} + +static int smpro_read_string(struct device *dev, enum hwmon_sensor_types type, + u32 attr, int channel, const char **str) +{ + switch (type) { + case hwmon_temp: + switch (attr) { + case hwmon_temp_label: + *str = temperature[channel].label; + return 0; + default: + break; + } + break; + + case hwmon_in: + switch (attr) { + case hwmon_in_label: + *str = voltage[channel].label; + return 0; + default: + break; + } + break; + + case hwmon_curr: + switch (attr) { + case hwmon_curr_label: + *str = curr_sensor[channel].label; + return 0; + default: + break; + } + break; + + case hwmon_power: + switch (attr) { + case hwmon_power_label: + *str = power[channel].label; + return 0; + default: + break; + } + break; + default: + break; + } + + return -EOPNOTSUPP; +} + +static umode_t smpro_is_visible(const void *data, enum hwmon_sensor_types type, + u32 attr, int channel) +{ + const struct smpro_hwmon *hwmon = data; + unsigned int value; + int ret; + + switch (type) { + case hwmon_temp: + switch (attr) { + case hwmon_temp_input: + case hwmon_temp_label: + case hwmon_temp_crit: + ret = regmap_read(hwmon->regmap, temperature[channel].reg, &value); + if (ret || value == 0xFFFF) + return 0; + break; + } + default: + break; + } + + return 0444; +} + +static const struct hwmon_channel_info *smpro_info[] = { + HWMON_CHANNEL_INFO(temp, + HWMON_T_INPUT | HWMON_T_LABEL, + HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT, + HWMON_T_INPUT | HWMON_T_LABEL, + HWMON_T_INPUT | HWMON_T_LABEL, + HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT, + HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT, + HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT, + HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT, + HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT, + HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT, + HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT, + HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT, + HWMON_T_INPUT | HWMON_T_LABEL), + HWMON_CHANNEL_INFO(in, + HWMON_I_INPUT | HWMON_I_LABEL, + HWMON_I_INPUT | HWMON_I_LABEL, + HWMON_I_INPUT | HWMON_I_LABEL, + HWMON_I_INPUT | HWMON_I_LABEL, + HWMON_I_INPUT | HWMON_I_LABEL), + HWMON_CHANNEL_INFO(power, + HWMON_P_INPUT | HWMON_P_LABEL, + HWMON_P_INPUT | HWMON_P_LABEL, + HWMON_P_INPUT | HWMON_P_LABEL, + HWMON_P_INPUT | HWMON_P_LABEL, + HWMON_P_INPUT | HWMON_P_LABEL), + HWMON_CHANNEL_INFO(curr, + HWMON_C_INPUT | HWMON_C_LABEL, + HWMON_C_INPUT | HWMON_C_LABEL, + HWMON_C_INPUT | HWMON_C_LABEL, + HWMON_C_INPUT | HWMON_C_LABEL, + HWMON_C_INPUT | HWMON_C_LABEL), + NULL +}; + +static const struct hwmon_ops smpro_hwmon_ops = { + .is_visible = smpro_is_visible, + .read = smpro_read, + .read_string = smpro_read_string, +}; + +static const struct hwmon_chip_info smpro_chip_info = { + .ops = &smpro_hwmon_ops, + .info = smpro_info, +}; + +static int smpro_hwmon_probe(struct platform_device *pdev) +{ + struct smpro_hwmon *hwmon; + struct device *hwmon_dev; + + hwmon = devm_kzalloc(&pdev->dev, sizeof(struct smpro_hwmon), GFP_KERNEL); + if (!hwmon) + return -ENOMEM; + + hwmon->regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!hwmon->regmap) + return -ENODEV; + + hwmon_dev = devm_hwmon_device_register_with_info(&pdev->dev, "smpro_hwmon", + hwmon, &smpro_chip_info, NULL); + + return PTR_ERR_OR_ZERO(hwmon_dev); +} + +static struct platform_driver smpro_hwmon_driver = { + .probe = smpro_hwmon_probe, + .driver = { + .name = "smpro-hwmon", + }, +}; + +module_platform_driver(smpro_hwmon_driver); + +MODULE_AUTHOR("Thu Nguyen "); +MODULE_AUTHOR("Quan Nguyen "); +MODULE_DESCRIPTION("Ampere Altra SMPro hwmon driver"); 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Thu, 29 Sep 2022 09:43:56 +0000 From: Quan Nguyen To: macro@orcam.me.uk, Lee Jones , Bagas Sanjaya , Rob Herring , Krzysztof Kozlowski , Jean Delvare , Guenter Roeck , Jonathan Corbet , Derek Kiernan , Dragan Cvetic , Arnd Bergmann , Greg Kroah-Hartman , Quan Nguyen , Thu Nguyen , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-hwmon@vger.kernel.org, linux-doc@vger.kernel.org, OpenBMC Maillist , Open Source Submission Cc: Phong Vo , thang@os.amperecomputing.com Subject: [PATCH v9 2/9] docs: hwmon: (smpro-hwmon) Add documentation Date: Thu, 29 Sep 2022 16:43:14 +0700 Message-Id: <20220929094321.770125-3-quan@os.amperecomputing.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220929094321.770125-1-quan@os.amperecomputing.com> References: <20220929094321.770125-1-quan@os.amperecomputing.com> X-ClientProxiedBy: SG2PR01CA0178.apcprd01.prod.exchangelabs.com (2603:1096:4:28::34) To SJ0PR01MB7282.prod.exchangelabs.com (2603:10b6:a03:3f2::24) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ0PR01MB7282:EE_|MN2PR01MB5503:EE_ X-MS-Office365-Filtering-Correlation-Id: 3f1e272d-10e0-40db-9156-08daa1ff2010 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Signed-off-by: Thu Nguyen Signed-off-by: Quan Nguyen Reviewed-by: Guenter Roeck --- Changes in v9: + Update SPDX license [Greg] Changes from v3=>v8: + None Changes in v2: + Removed "virtual" sensors [Guenter] + Fixed typo "mili" to "milli", "nanoWatt" to "microWatt" [Guenter] + Reported SOC_TDP as "Socket TDP" using max attributes [Guenter] + Clarified "highest" meaning in documentation [Guenter] + Reported MEM HOT Threshold for all DIMMs as temp*_crit [Guenter] + Removed Socket TDP sensor [Quan] + Included sensor type and channel in labels [Quan] Documentation/hwmon/index.rst | 1 + Documentation/hwmon/smpro-hwmon.rst | 101 ++++++++++++++++++++++++++++ 2 files changed, 102 insertions(+) create mode 100644 Documentation/hwmon/smpro-hwmon.rst diff --git a/Documentation/hwmon/index.rst b/Documentation/hwmon/index.rst index c1d11cf13eef..ddff3c5713d7 100644 --- a/Documentation/hwmon/index.rst +++ b/Documentation/hwmon/index.rst @@ -187,6 +187,7 @@ Hardware Monitoring Kernel Drivers sis5595 sl28cpld smm665 + smpro-hwmon smsc47b397 smsc47m192 smsc47m1 diff --git a/Documentation/hwmon/smpro-hwmon.rst b/Documentation/hwmon/smpro-hwmon.rst new file mode 100644 index 000000000000..3a9b14dacf89 --- /dev/null +++ b/Documentation/hwmon/smpro-hwmon.rst @@ -0,0 +1,101 @@ +.. SPDX-License-Identifier: GPL-2.0-only + +Kernel driver Ampere(R)'s Altra(R) SMpro hwmon +============================================== + +Supported chips: + + * Ampere(R) Altra(R) + + Prefix: 'smpro' + + Reference: Altra SoC BMC Interface Specification + +Author: Thu Nguyen + +Description +----------- +This driver supports hardware monitoring for Ampere(R) Altra(R) SoC's based on the +SMpro co-processor (SMpro). +The following sensor types are supported by the driver: + + * temperature + * voltage + * current + * power + +The SMpro interface provides the registers to query the various sensors and +their values which are then exported to userspace by this driver. + +Usage Notes +----------- + +SMpro hwmon driver creates at least two sysfs files for each sensor. + +* File ``_label`` reports the sensor label. +* File ``_input`` returns the sensor value. + +The sysfs files are allocated in the SMpro root fs folder. +There is one root folder for each SMpro instance. + +When the SoC is turned off, the driver will fail to read registers +and return -ENXIO. + +Sysfs entries +------------- + +The following sysfs files are supported: + +* Ampere(R) Altra(R): + +============ ============= ====== =============================================== +Name Unit Perm Description +temp1_input milli Celsius RO SoC temperature +temp2_input milli Celsius RO Max temperature reported among SoC VRDs +temp2_crit milli Celsius RO SoC VRD HOT Threshold temperature +temp3_input milli Celsius RO Max temperature reported among DIMM VRDs +temp4_input milli Celsius RO Max temperature reported among Core VRDs +temp5_input milli Celsius RO Temperature of DIMM0 on CH0 +temp5_crit milli Celsius RO MEM HOT Threshold for all DIMMs +temp6_input milli Celsius RO Temperature of DIMM0 on CH1 +temp6_crit milli Celsius RO MEM HOT Threshold for all DIMMs +temp7_input milli Celsius RO Temperature of DIMM0 on CH2 +temp7_crit milli Celsius RO MEM HOT Threshold for all DIMMs +temp8_input milli Celsius RO Temperature of DIMM0 on CH3 +temp8_crit milli Celsius RO MEM HOT Threshold for all DIMMs +temp9_input milli Celsius RO Temperature of DIMM0 on CH4 +temp9_crit milli Celsius RO MEM HOT Threshold for all DIMMs +temp10_input milli Celsius RO Temperature of DIMM0 on CH5 +temp10_crit milli Celsius RO MEM HOT Threshold for all DIMMs +temp11_input milli Celsius RO Temperature of DIMM0 on CH6 +temp11_crit milli Celsius RO MEM HOT Threshold for all DIMMs +temp12_input milli Celsius RO Temperature of DIMM0 on CH7 +temp12_crit milli Celsius RO MEM HOT Threshold for all DIMMs +temp13_input milli Celsius RO Max temperature reported among RCA VRDs +in0_input milli Volts RO Core voltage +in1_input milli Volts RO SoC voltage +in2_input milli Volts RO DIMM VRD1 voltage +in3_input milli Volts RO DIMM VRD2 voltage +in4_input milli Volts RO RCA VRD voltage +cur1_input milli Amperes RO Core VRD current +cur2_input milli Amperes RO SoC VRD current +cur3_input milli Amperes RO DIMM VRD1 current +cur4_input milli Amperes RO DIMM VRD2 current +cur5_input milli Amperes RO RCA VRD current +power1_input micro Watts RO Core VRD power +power2_input micro Watts RO SoC VRD power +power3_input micro Watts RO DIMM VRD1 power +power4_input micro Watts RO DIMM VRD2 power +power5_input micro Watts RO RCA VRD power +============ ============= ====== =============================================== + +Example:: + + # cat in0_input + 830 + # cat temp1_input + 37000 + # cat curr1_input + 9000 + # cat power5_input + 19500000 From patchwork Thu Sep 29 09:43:15 2022 Content-Type: text/plain; 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Thu, 29 Sep 2022 09:44:01 +0000 From: Quan Nguyen To: macro@orcam.me.uk, Lee Jones , Bagas Sanjaya , Rob Herring , Krzysztof Kozlowski , Jean Delvare , Guenter Roeck , Jonathan Corbet , Derek Kiernan , Dragan Cvetic , Arnd Bergmann , Greg Kroah-Hartman , Quan Nguyen , Thu Nguyen , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-hwmon@vger.kernel.org, linux-doc@vger.kernel.org, OpenBMC Maillist , Open Source Submission Cc: Phong Vo , thang@os.amperecomputing.com Subject: [PATCH v9 3/9] misc: smpro-errmon: Add Ampere's SMpro error monitor driver Date: Thu, 29 Sep 2022 16:43:15 +0700 Message-Id: <20220929094321.770125-4-quan@os.amperecomputing.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220929094321.770125-1-quan@os.amperecomputing.com> References: <20220929094321.770125-1-quan@os.amperecomputing.com> X-ClientProxiedBy: SG2PR01CA0178.apcprd01.prod.exchangelabs.com (2603:1096:4:28::34) To SJ0PR01MB7282.prod.exchangelabs.com (2603:10b6:a03:3f2::24) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ0PR01MB7282:EE_|SN6PR01MB4798:EE_ X-MS-Office365-Filtering-Correlation-Id: 7a6c9943-51c2-4055-6fd5-08daa1ff2398 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Signed-off-by: Quan Nguyen --- Changes in v9: + Fix ugly static struct define [Greg] + Remove unused defines and update documentation [Quan] + Add minor refactor code [Quan] + Fix messy goto [Greg] + Update SPDX licence [Greg] + Use ATTRIBUTE_GROUPS() [Greg] + Use dev_groups instead of sysfs_create_group() to avoid racing issue with user space [Greg] + Refactor code to fix unnecessary initialization issue [Quan] + Refactor code to avoid clever encoding issue [Quan] + Separate error_[smpro|pmpro] to error_* and warn_* [Quan] + Add minor code refactor [Quan] Changes in v8: + Update wording for SMPRO_ERRMON on Kconfig file [Quan] + Avoid uninitialized variable use [kernel test robot] + Switch to use sysfs_emit() [Greg] + Make sysfs to return single value [Greg] + Change errors_* sysfs to error_* [Quan] + Add overflow_[core|mem|pcie|other]_[ce|ue] sysfs to report overflow status of each type of HW errors [Quan] + Add some minor refactor [Quan] Changes in v7: + Remove regmap_acquire/release_lock(), read_i2c_block_data() [Quan] + Use regmap_noinc_read() instead of errmon_read_block() [Quan] + Validate number of errors before read [Quan] + Fix wrong return type of *_show() function [kernel test robot] + Adjust patch order to avoid dependence with smpro-mfd [Lee Jones] + Use pointer instead of stack memory [Quan] Changes in v6: + First introduced in v6 [Quan] drivers/misc/Kconfig | 12 + drivers/misc/Makefile | 1 + drivers/misc/smpro-errmon.c | 529 ++++++++++++++++++++++++++++++++++++ 3 files changed, 542 insertions(+) create mode 100644 drivers/misc/smpro-errmon.c diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 358ad56f6524..b9ceee949dab 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -176,6 +176,18 @@ config SGI_XP this feature will allow for direct communication between SSIs based on a network adapter and DMA messaging. +config SMPRO_ERRMON + tristate "Ampere Computing SMPro error monitor driver" + depends on MFD_SMPRO || COMPILE_TEST + help + Say Y here to get support for the SMpro error monitor function + provided by Ampere Computing's Altra and Altra Max SoCs. Upon + loading, the driver creates sysfs files which can be use to gather + multiple HW error data reported via read and write system calls. + + To compile this driver as a module, say M here. The driver will be + called smpro-errmon. + config CS5535_MFGPT tristate "CS5535/CS5536 Geode Multi-Function General Purpose Timer (MFGPT) support" depends on MFD_CS5535 diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index ac9b3e757ba1..bbe24d4511a3 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -23,6 +23,7 @@ obj-$(CONFIG_ENCLOSURE_SERVICES) += enclosure.o obj-$(CONFIG_KGDB_TESTS) += kgdbts.o obj-$(CONFIG_SGI_XP) += sgi-xp/ obj-$(CONFIG_SGI_GRU) += sgi-gru/ +obj-$(CONFIG_SMPRO_ERRMON) += smpro-errmon.o obj-$(CONFIG_CS5535_MFGPT) += cs5535-mfgpt.o obj-$(CONFIG_GEHC_ACHC) += gehc-achc.o obj-$(CONFIG_HP_ILO) += hpilo.o diff --git a/drivers/misc/smpro-errmon.c b/drivers/misc/smpro-errmon.c new file mode 100644 index 000000000000..d1431d419aa4 --- /dev/null +++ b/drivers/misc/smpro-errmon.c @@ -0,0 +1,529 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Ampere Computing SoC's SMpro Error Monitoring Driver + * + * Copyright (c) 2022, Ampere Computing LLC + * + */ + +#include +#include +#include +#include +#include + +/* GPI RAS Error Registers */ +#define GPI_RAS_ERR 0x7E + +/* Core and L2C Error Registers */ +#define CORE_CE_ERR_CNT 0x80 +#define CORE_CE_ERR_LEN 0x81 +#define CORE_CE_ERR_DATA 0x82 +#define CORE_UE_ERR_CNT 0x83 +#define CORE_UE_ERR_LEN 0x84 +#define CORE_UE_ERR_DATA 0x85 + +/* Memory Error Registers */ +#define MEM_CE_ERR_CNT 0x90 +#define MEM_CE_ERR_LEN 0x91 +#define MEM_CE_ERR_DATA 0x92 +#define MEM_UE_ERR_CNT 0x93 +#define MEM_UE_ERR_LEN 0x94 +#define MEM_UE_ERR_DATA 0x95 + +/* RAS Error/Warning Registers */ +#define ERR_SMPRO_TYPE 0xA0 +#define ERR_PMPRO_TYPE 0xA1 +#define ERR_SMPRO_INFO_LO 0xA2 +#define ERR_SMPRO_INFO_HI 0xA3 +#define ERR_SMPRO_DATA_LO 0xA4 +#define ERR_SMPRO_DATA_HI 0xA5 +#define WARN_SMPRO_INFO_LO 0xAA +#define WARN_SMPRO_INFO_HI 0xAB +#define ERR_PMPRO_INFO_LO 0xA6 +#define ERR_PMPRO_INFO_HI 0xA7 +#define ERR_PMPRO_DATA_LO 0xA8 +#define ERR_PMPRO_DATA_HI 0xA9 +#define WARN_PMPRO_INFO_LO 0xAC +#define WARN_PMPRO_INFO_HI 0xAD + +/* PCIE Error Registers */ +#define PCIE_CE_ERR_CNT 0xC0 +#define PCIE_CE_ERR_LEN 0xC1 +#define PCIE_CE_ERR_DATA 0xC2 +#define PCIE_UE_ERR_CNT 0xC3 +#define PCIE_UE_ERR_LEN 0xC4 +#define PCIE_UE_ERR_DATA 0xC5 + +/* Other Error Registers */ +#define OTHER_CE_ERR_CNT 0xD0 +#define OTHER_CE_ERR_LEN 0xD1 +#define OTHER_CE_ERR_DATA 0xD2 +#define OTHER_UE_ERR_CNT 0xD8 +#define OTHER_UE_ERR_LEN 0xD9 +#define OTHER_UE_ERR_DATA 0xDA + +/* Event Data Registers */ +#define VRD_WARN_FAULT_EVENT_DATA 0x78 +#define VRD_HOT_EVENT_DATA 0x79 +#define DIMM_HOT_EVENT_DATA 0x7A + +#define MAX_READ_BLOCK_LENGTH 48 + +#define RAS_SMPRO_ERR 0 +#define RAS_PMPRO_ERR 1 + +enum RAS_48BYTES_ERR_TYPES { + CORE_CE_ERR, + CORE_UE_ERR, + MEM_CE_ERR, + MEM_UE_ERR, + PCIE_CE_ERR, + PCIE_UE_ERR, + OTHER_CE_ERR, + OTHER_UE_ERR, + NUM_48BYTES_ERR_TYPE, +}; + +struct smpro_error_hdr { + u8 count; /* Number of the RAS errors */ + u8 len; /* Number of data bytes */ + u8 data; /* Start of 48-byte data */ + u8 max_cnt; /* Max num of errors */ +}; + +/* + * Included Address of registers to get Count, Length of data and Data + * of the 48 bytes error data + */ +static struct smpro_error_hdr smpro_error_table[] = { + [CORE_CE_ERR] = { + .count = CORE_CE_ERR_CNT, + .len = CORE_CE_ERR_LEN, + .data = CORE_CE_ERR_DATA, + .max_cnt = 32 + }, + [CORE_UE_ERR] = { + .count = CORE_UE_ERR_CNT, + .len = CORE_UE_ERR_LEN, + .data = CORE_UE_ERR_DATA, + .max_cnt = 32 + }, + [MEM_CE_ERR] = { + .count = MEM_CE_ERR_CNT, + .len = MEM_CE_ERR_LEN, + .data = MEM_CE_ERR_DATA, + .max_cnt = 16 + }, + [MEM_UE_ERR] = { + .count = MEM_UE_ERR_CNT, + .len = MEM_UE_ERR_LEN, + .data = MEM_UE_ERR_DATA, + .max_cnt = 16 + }, + [PCIE_CE_ERR] = { + .count = PCIE_CE_ERR_CNT, + .len = PCIE_CE_ERR_LEN, + .data = PCIE_CE_ERR_DATA, + .max_cnt = 96 + }, + [PCIE_UE_ERR] = { + .count = PCIE_UE_ERR_CNT, + .len = PCIE_UE_ERR_LEN, + .data = PCIE_UE_ERR_DATA, + .max_cnt = 96 + }, + [OTHER_CE_ERR] = { + .count = OTHER_CE_ERR_CNT, + .len = OTHER_CE_ERR_LEN, + .data = OTHER_CE_ERR_DATA, + .max_cnt = 8 + }, + [OTHER_UE_ERR] = { + .count = OTHER_UE_ERR_CNT, + .len = OTHER_UE_ERR_LEN, + .data = OTHER_UE_ERR_DATA, + .max_cnt = 8 + }, +}; + +/* + * List of SCP registers which are used to get + * one type of RAS Internal errors. + */ +struct smpro_int_error_hdr { + u8 type; + u8 info_l; + u8 info_h; + u8 data_l; + u8 data_h; + u8 warn_l; + u8 warn_h; +}; + +static struct smpro_int_error_hdr list_smpro_int_error_hdr[] = { + [RAS_SMPRO_ERR] = { + .type = ERR_SMPRO_TYPE, + .info_l = ERR_SMPRO_INFO_LO, + .info_h = ERR_SMPRO_INFO_HI, + .data_l = ERR_SMPRO_DATA_LO, + .data_h = ERR_SMPRO_DATA_HI, + .warn_l = WARN_SMPRO_INFO_LO, + .warn_h = WARN_SMPRO_INFO_HI, + }, + [RAS_PMPRO_ERR] = { + .type = ERR_PMPRO_TYPE, + .info_l = ERR_PMPRO_INFO_LO, + .info_h = ERR_PMPRO_INFO_HI, + .data_l = ERR_PMPRO_DATA_LO, + .data_h = ERR_PMPRO_DATA_HI, + .warn_l = WARN_PMPRO_INFO_LO, + .warn_h = WARN_PMPRO_INFO_HI, + }, +}; + +struct smpro_errmon { + struct regmap *regmap; +}; + +enum EVENT_TYPES { + VRD_WARN_FAULT_EVENT, + VRD_HOT_EVENT, + DIMM_HOT_EVENT, + NUM_EVENTS_TYPE, +}; + +/* Included Address of event source and data registers */ +static u8 smpro_event_table[NUM_EVENTS_TYPE] = { + VRD_WARN_FAULT_EVENT_DATA, + VRD_HOT_EVENT_DATA, + DIMM_HOT_EVENT_DATA, +}; + +static ssize_t smpro_event_data_read(struct device *dev, + struct device_attribute *da, char *buf, + int channel) +{ + struct smpro_errmon *errmon = dev_get_drvdata(dev); + s32 event_data; + int ret; + + ret = regmap_read(errmon->regmap, smpro_event_table[channel], &event_data); + if (ret) + return ret; + /* Clear event after read */ + if (event_data != 0) + regmap_write(errmon->regmap, smpro_event_table[channel], event_data); + + return sysfs_emit(buf, "%04x\n", event_data); +} + +static ssize_t smpro_overflow_data_read(struct device *dev, struct device_attribute *da, + char *buf, int channel) +{ + struct smpro_errmon *errmon = dev_get_drvdata(dev); + struct smpro_error_hdr *err_info; + s32 err_count; + int ret; + + err_info = &smpro_error_table[channel]; + + ret = regmap_read(errmon->regmap, err_info->count, &err_count); + if (ret) + return ret; + + /* Bit 8 indicates the overflow status */ + return sysfs_emit(buf, "%d\n", (err_count & BIT(8)) ? 1 : 0); +} + +static ssize_t smpro_error_data_read(struct device *dev, struct device_attribute *da, + char *buf, int channel) +{ + struct smpro_errmon *errmon = dev_get_drvdata(dev); + unsigned char err_data[MAX_READ_BLOCK_LENGTH]; + struct smpro_error_hdr *err_info; + s32 err_count, err_length; + int ret; + + err_info = &smpro_error_table[channel]; + + ret = regmap_read(errmon->regmap, err_info->count, &err_count); + /* Error count is the low byte */ + err_count &= 0xff; + if (ret || !err_count || err_count > err_info->max_cnt) + return ret; + + ret = regmap_read(errmon->regmap, err_info->len, &err_length); + if (ret || err_length <= 0) + return ret; + + if (err_length > MAX_READ_BLOCK_LENGTH) + err_length = MAX_READ_BLOCK_LENGTH; + + memset(err_data, 0x00, MAX_READ_BLOCK_LENGTH); + ret = regmap_noinc_read(errmon->regmap, err_info->data, err_data, err_length); + if (ret < 0) + return ret; + + /* clear the error */ + ret = regmap_write(errmon->regmap, err_info->count, 0x100); + if (ret) + return ret; + /* + * The output of Core/Memory/PCIe/Others UE/CE errors follows the format + * specified in section 5.8.1 CE/UE Error Data record in + * Altra SOC BMC Interface specification. + */ + return sysfs_emit(buf, "%*phN\n", MAX_READ_BLOCK_LENGTH, err_data); +} + +/* + * Output format: + * <4-byte hex value of error info><4-byte hex value of error extensive data> + * Where: + * + error info : The error information + * + error data : Extensive data (32 bits) + * Reference to section 5.10 RAS Internal Error Register Definition in + * Altra SOC BMC Interface specification + */ +static ssize_t smpro_internal_err_read(struct device *dev, struct device_attribute *da, + char *buf, int channel) +{ + struct smpro_errmon *errmon = dev_get_drvdata(dev); + struct smpro_int_error_hdr *err_info; + unsigned int err[4] = { 0 }; + unsigned int err_type; + unsigned int val; + int ret; + + /* read error status */ + ret = regmap_read(errmon->regmap, GPI_RAS_ERR, &val); + if (ret) + return ret; + + if ((channel == RAS_SMPRO_ERR && !(val & BIT(0))) || + (channel == RAS_PMPRO_ERR && !(val & BIT(1)))) + return 0; + + err_info = &list_smpro_int_error_hdr[channel]; + ret = regmap_read(errmon->regmap, err_info->type, &val); + if (ret) + return ret; + + err_type = (val & BIT(1)) ? BIT(1) : + (val & BIT(2)) ? BIT(2) : 0; + + if (!err_type) + return 0; + + ret = regmap_read(errmon->regmap, err_info->info_l, err + 1); + if (ret) + return ret; + + ret = regmap_read(errmon->regmap, err_info->info_h, err); + if (ret) + return ret; + + if (err_type & BIT(2)) { + /* Error with data type */ + ret = regmap_read(errmon->regmap, err_info->data_l, err + 3); + if (ret) + return ret; + + ret = regmap_read(errmon->regmap, err_info->data_h, err + 2); + if (ret) + return ret; + } + + /* clear the read errors */ + ret = regmap_write(errmon->regmap, err_info->type, err_type); + if (ret) + return ret; + + return sysfs_emit(buf, "%*phN\n", (int)sizeof(err), err); +} + +/* + * Output format: + * <4-byte hex value of warining info> + * Reference to section 5.10 RAS Internal Error Register Definition in + * Altra SOC BMC Interface specification + */ +static ssize_t smpro_internal_warn_read(struct device *dev, struct device_attribute *da, + char *buf, int channel) +{ + struct smpro_errmon *errmon = dev_get_drvdata(dev); + struct smpro_int_error_hdr *err_info; + unsigned int warn[2] = { 0 }; + unsigned int val; + int ret; + + /* read error status */ + ret = regmap_read(errmon->regmap, GPI_RAS_ERR, &val); + if (ret) + return ret; + + if ((channel == RAS_SMPRO_ERR && !(val & BIT(0))) || + (channel == RAS_PMPRO_ERR && !(val & BIT(1)))) + return 0; + + err_info = &list_smpro_int_error_hdr[channel]; + ret = regmap_read(errmon->regmap, err_info->type, &val); + if (ret) + return ret; + + if (!(val & BIT(0))) + return 0; + + ret = regmap_read(errmon->regmap, err_info->warn_l, warn + 1); + if (ret) + return ret; + + ret = regmap_read(errmon->regmap, err_info->warn_h, warn); + if (ret) + return ret; + + /* clear the warning */ + ret = regmap_write(errmon->regmap, err_info->type, BIT(0)); + if (ret) + return ret; + + return sysfs_emit(buf, "%*phN\n", (int)sizeof(warn), warn); +} + +#define ERROR_OVERFLOW_RO(_error, _index) \ + static ssize_t overflow_##_error##_show(struct device *dev, \ + struct device_attribute *da, \ + char *buf) \ + { \ + return smpro_overflow_data_read(dev, da, buf, _index); \ + } \ + static DEVICE_ATTR_RO(overflow_##_error) + +ERROR_OVERFLOW_RO(core_ce, CORE_CE_ERR); +ERROR_OVERFLOW_RO(core_ue, CORE_UE_ERR); +ERROR_OVERFLOW_RO(mem_ce, MEM_CE_ERR); +ERROR_OVERFLOW_RO(mem_ue, MEM_UE_ERR); +ERROR_OVERFLOW_RO(pcie_ce, PCIE_CE_ERR); +ERROR_OVERFLOW_RO(pcie_ue, PCIE_UE_ERR); +ERROR_OVERFLOW_RO(other_ce, OTHER_CE_ERR); +ERROR_OVERFLOW_RO(other_ue, OTHER_UE_ERR); + +#define ERROR_RO(_error, _index) \ + static ssize_t error_##_error##_show(struct device *dev, \ + struct device_attribute *da, \ + char *buf) \ + { \ + return smpro_error_data_read(dev, da, buf, _index); \ + } \ + static DEVICE_ATTR_RO(error_##_error) + +ERROR_RO(core_ce, CORE_CE_ERR); +ERROR_RO(core_ue, CORE_UE_ERR); +ERROR_RO(mem_ce, MEM_CE_ERR); +ERROR_RO(mem_ue, MEM_UE_ERR); +ERROR_RO(pcie_ce, PCIE_CE_ERR); +ERROR_RO(pcie_ue, PCIE_UE_ERR); +ERROR_RO(other_ce, OTHER_CE_ERR); +ERROR_RO(other_ue, OTHER_UE_ERR); + +static ssize_t error_smpro_show(struct device *dev, struct device_attribute *da, char *buf) +{ + return smpro_internal_err_read(dev, da, buf, RAS_SMPRO_ERR); +} +static DEVICE_ATTR_RO(error_smpro); + +static ssize_t error_pmpro_show(struct device *dev, struct device_attribute *da, char *buf) +{ + return smpro_internal_err_read(dev, da, buf, RAS_PMPRO_ERR); +} +static DEVICE_ATTR_RO(error_pmpro); + +static ssize_t warn_smpro_show(struct device *dev, struct device_attribute *da, char *buf) +{ + return smpro_internal_warn_read(dev, da, buf, RAS_SMPRO_ERR); +} +static DEVICE_ATTR_RO(warn_smpro); + +static ssize_t warn_pmpro_show(struct device *dev, struct device_attribute *da, char *buf) +{ + return smpro_internal_warn_read(dev, da, buf, RAS_PMPRO_ERR); +} +static DEVICE_ATTR_RO(warn_pmpro); + +#define EVENT_RO(_event, _index) \ + static ssize_t event_##_event##_show(struct device *dev, \ + struct device_attribute *da, \ + char *buf) \ + { \ + return smpro_event_data_read(dev, da, buf, _index); \ + } \ + static DEVICE_ATTR_RO(event_##_event) + +EVENT_RO(vrd_warn_fault, VRD_WARN_FAULT_EVENT); +EVENT_RO(vrd_hot, VRD_HOT_EVENT); +EVENT_RO(dimm_hot, DIMM_HOT_EVENT); + +static struct attribute *smpro_errmon_attrs[] = { + &dev_attr_overflow_core_ce.attr, + &dev_attr_overflow_core_ue.attr, + &dev_attr_overflow_mem_ce.attr, + &dev_attr_overflow_mem_ue.attr, + &dev_attr_overflow_pcie_ce.attr, + &dev_attr_overflow_pcie_ue.attr, + &dev_attr_overflow_other_ce.attr, + &dev_attr_overflow_other_ue.attr, + &dev_attr_error_core_ce.attr, + &dev_attr_error_core_ue.attr, + &dev_attr_error_mem_ce.attr, + &dev_attr_error_mem_ue.attr, + &dev_attr_error_pcie_ce.attr, + &dev_attr_error_pcie_ue.attr, + &dev_attr_error_other_ce.attr, + &dev_attr_error_other_ue.attr, + &dev_attr_error_smpro.attr, + &dev_attr_error_pmpro.attr, + &dev_attr_warn_smpro.attr, + &dev_attr_warn_pmpro.attr, + &dev_attr_event_vrd_warn_fault.attr, + &dev_attr_event_vrd_hot.attr, + &dev_attr_event_dimm_hot.attr, + NULL +}; + +ATTRIBUTE_GROUPS(smpro_errmon); + +static int smpro_errmon_probe(struct platform_device *pdev) +{ + struct smpro_errmon *errmon; + + errmon = devm_kzalloc(&pdev->dev, sizeof(struct smpro_errmon), GFP_KERNEL); + if (!errmon) + return -ENOMEM; + + platform_set_drvdata(pdev, errmon); + + errmon->regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!errmon->regmap) + return -ENODEV; + + return 0; +} + +static struct platform_driver smpro_errmon_driver = { + .probe = smpro_errmon_probe, + .driver = { + .name = "smpro-errmon", + .dev_groups = smpro_errmon_groups, + }, +}; + +module_platform_driver(smpro_errmon_driver); + +MODULE_AUTHOR("Tung Nguyen "); +MODULE_AUTHOR("Thinh Pham "); +MODULE_AUTHOR("Hoang Nguyen "); +MODULE_AUTHOR("Thu Nguyen "); +MODULE_AUTHOR("Quan Nguyen "); +MODULE_DESCRIPTION("Ampere Altra SMpro driver"); +MODULE_LICENSE("GPL"); From patchwork Thu Sep 29 09:43:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quan Nguyen X-Patchwork-Id: 12993856 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A794BC43219 for ; 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Signed-off-by: Thu Nguyen Signed-off-by: Quan Nguyen --- Changes in v9: + Fix issue when building htmldocs [Bagas] + Remove unnecessary channel info for VRD and DIMM event [Quan] + Update SPDX license info [Greg] + Update document to align with new changes in sysfs [Quan] Changes in v8: + Update to reflect single value per sysfs [Quan] Changes in v7: + None Changes in v6: + First introduced in v6 [Quan] Documentation/misc-devices/index.rst | 1 + Documentation/misc-devices/smpro-errmon.rst | 193 ++++++++++++++++++++ 2 files changed, 194 insertions(+) create mode 100644 Documentation/misc-devices/smpro-errmon.rst diff --git a/Documentation/misc-devices/index.rst b/Documentation/misc-devices/index.rst index 756be15a49a4..b74b3b34a235 100644 --- a/Documentation/misc-devices/index.rst +++ b/Documentation/misc-devices/index.rst @@ -27,6 +27,7 @@ fit into other categories. max6875 oxsemi-tornado pci-endpoint-test + smpro-errmon spear-pcie-gadget uacce xilinx_sdfec diff --git a/Documentation/misc-devices/smpro-errmon.rst b/Documentation/misc-devices/smpro-errmon.rst new file mode 100644 index 000000000000..b17f30a6cafd --- /dev/null +++ b/Documentation/misc-devices/smpro-errmon.rst @@ -0,0 +1,193 @@ +.. SPDX-License-Identifier: GPL-2.0-only + +Kernel driver Ampere(R)'s Altra(R) SMpro errmon +=============================================== + +Supported chips: + + * Ampere(R) Altra(R) + + Prefix: 'smpro' + + Preference: Altra SoC BMC Interface Specification + +Author: Thu Nguyen + +Description +----------- + +This driver supports hardware monitoring for Ampere(R) Altra(R) SoC's based on the +SMpro co-processor (SMpro). +The following SoC alert/event types are supported by the errmon driver: + +* Core CE/UE error +* Memory CE/UE error +* PCIe CE/UE error +* Other CE/UE error +* Internal SMpro/PMpro error +* VRD hot +* VRD warn/fault +* DIMM Hot + +The SMpro interface provides the registers to query the status of the SoC alerts/events +and their data and export to userspace by this driver. + +The SoC alerts/events will be referenced as error below. + +Usage Notes +----------- + +SMpro errmon driver creates the sysfs files for each error type. +Example: ``error_core_ce`` to get Core CE error type. + +* If the error is absented, the sysfs file returns empty. +* If the errors are presented, one each read to the sysfs, the oldest error will be returned and clear, the next read will be returned with the next error until all the errors are read out. + +For each host error type, SMpro keeps a latest max number of errors. All the oldest errors that were not read out will be dropped. In that case, the read to the corresponding overflow sysfs will return 1, otherwise, return 0. +Example: ``overflow_core_ce`` to report the overflow status of Core CE error type. + +The format of the error is depended on the error type. + +1) For Core/Memory/PCIe/Other CE/UE error types:: + +The return 48-byte in hex format in table below: + + ======= ============= =========== ========================================== + OFFSET FIELD SIZE (BYTE) DESCRIPTION + ======= ============= =========== ========================================== + 00 Error Type 1 See Table below for details + 01 Subtype 1 See Table below for details + 02 Instance 2 See Table below for details + 04 Error status 4 See ARM RAS specification for details + 08 Error Address 8 See ARM RAS specification for details + 16 Error Misc 0 8 See ARM RAS specification for details + 24 Error Misc 1 8 See ARM RAS specification for details + 32 Error Misc 2 8 See ARM RAS specification for details + 40 Error Misc 3 8 See ARM RAS specification for details + ======= ============= =========== ========================================== + +Below table defines the value of Error types, Sub Types, Sub component and instance: + + ============ ========== ========= =============== ==================================== + Error Group Error Type Sub type Sub component Instance + ============ ========== ========= =============== ==================================== + CPM (core) 0 0 Snoop-Logic CPM # + CPM (core) 0 2 Armv8 Core 1 CPM # + MCU (mem) 1 1 ERR1 MCU # | SLOT << 11 + MCU (mem) 1 2 ERR2 MCU # | SLOT << 11 + MCU (mem) 1 3 ERR3 MCU # + MCU (mem) 1 4 ERR4 MCU # + MCU (mem) 1 5 ERR5 MCU # + MCU (mem) 1 6 ERR6 MCU # + MCU (mem) 1 7 Link Error MCU # + Mesh (other) 2 0 Cross Point X | (Y << 5) | NS <<11 + Mesh (other) 2 1 Home Node(IO) X | (Y << 5) | NS <<11 + Mesh (other) 2 2 Home Node(Mem) X | (Y << 5) | NS <<11 | device<<12 + Mesh (other) 2 4 CCIX Node X | (Y << 5) | NS <<11 + 2P Link (other) 3 0 N/A Altra 2P Link # + GIC (other) 5 0 ERR0 0 + GIC (other) 5 1 ERR1 0 + GIC (other) 5 2 ERR2 0 + GIC (other) 5 3 ERR3 0 + GIC (other) 5 4 ERR4 0 + GIC (other) 5 5 ERR5 0 + GIC (other) 5 6 ERR6 0 + GIC (other) 5 7 ERR7 0 + GIC (other) 5 8 ERR8 0 + GIC (other) 5 9 ERR9 0 + GIC (other) 5 10 ERR10 0 + GIC (other) 5 11 ERR11 0 + GIC (other) 5 12 ERR12 0 + GIC (other) 5 13-21 ERR13 RC# + 1 + SMMU (other) 6 TCU 100 RC # + SMMU (other) 6 TBU0 0 RC # + SMMU (other) 6 TBU1 1 RC # + SMMU (other) 6 TBU2 2 RC # + SMMU (other) 6 TBU3 3 RC # + SMMU (other) 6 TBU4 4 RC # + SMMU (other) 6 TBU5 5 RC # + SMMU (other) 6 TBU6 6 RC # + SMMU (other) 6 TBU7 7 RC # + SMMU (other) 6 TBU8 8 RC # + SMMU (other) 6 TBU9 9 RC # + PCIe AER (pcie) 7 Root 0 RC # + PCIe AER (pcie) 7 Device 1 RC # + PCIe RC (pcie) 8 RCA HB 0 RC # + PCIe RC (pcie) 8 RCB HB 1 RC # + PCIe RC (pcie) 8 RASDP 8 RC # + OCM (other) 9 ERR0 0 0 + OCM (other) 9 ERR1 1 0 + OCM (other) 9 ERR2 2 0 + SMpro (other) 10 ERR0 0 0 + SMpro (other) 10 ERR1 1 0 + SMpro (other) 10 MPA_ERR 2 0 + PMpro (other) 11 ERR0 0 0 + PMpro (other) 11 ERR1 1 0 + PMpro (other) 11 MPA_ERR 2 0 + ============ ========== ========= =============== ==================================== + + For example: + # cat error_other_ue + 880807001e004010401040101500000001004010401040100c0000000000000000000000000000000000000000000000 + +2) For the Internal SMpro/PMpro error types:: + +The error_[smpro|pmro] sysfs returns string of 8-byte hex value: + <4-byte hex value of Error info><4-byte hex value of Error extensive data> + +The warn_[smpro|pmro] sysfs returns string of 4-byte hex value: + <4-byte hex value of Warning info> + +Reference to Altra SoC BMC Interface Specification for the details. + +3) For the VRD hot, VRD /warn/fault, DIMM Hot event:: + +The return string is 2-byte hex string value. Reference to section 5.7 GPI status register in Altra SoC BMC Interface Specification for the details. + + Example: + #cat event_vrd_hot + 0000 + +Sysfs entries +------------- + +The following sysfs files are supported: + +* Ampere(R) Altra(R): + +Alert Types: + + ======================== ================= ================================================== + Alert Type Sysfs name Description + ======================== ================= ================================================== + Core CE Error error_core_ce Trigger when Core has CE error + Core CE Error overflow overflow_core_ce Trigger when Core CE error overflow + Core UE Error error_core_ue Trigger when Core has UE error + Core UE Error overflow overflow_core_ue Trigger when Core UE error overflow + Memory CE Error error_mem_ce Trigger when Memory has CE error + Memory CE Error overflow overflow_mem_ce Trigger when Memory CE error overflow + Memory UE Error error_mem_ue Trigger when Memory has UE error + Memory UE Error overflow overflow_mem_ue Trigger when Memory UE error overflow + PCIe CE Error error_pcie_ce Trigger when any PCIe controller has CE error + PCIe CE Error overflow overflow_pcie_ce Trigger when any PCIe controller CE error overflow + PCIe UE Error error_pcie_ue Trigger when any PCIe controller has UE error + PCIe UE Error overflow overflow_pcie_ue Trigger when any PCIe controller UE error overflow + Other CE Error error_other_ce Trigger when any Others CE error + Other CE Error overflow overflow_other_ce Trigger when any Others CE error overflow + Other UE Error error_other_ue Trigger when any Others UE error + Other UE Error overflow overflow_other_ue Trigger when Others UE error overflow + SMpro Error error_smpro Trigger when system have SMpro error + SMpro Warning warn_smpro Trigger when system have SMpro warning + PMpro Error error_pmpro Trigger when system have PMpro error + PMpro Warning warn_pmpro Trigger when system have PMpro warning + ======================== ================= ================================================== + +Event Type: + + ============================ ========================== + Event Type Sysfs name + ============================ ========================== + VRD HOT event_vrd_hot + VR Warn/Fault event_vrd_warn_fault + DIMM Hot event_dimm_hot + ============================ ========================== From patchwork Thu Sep 29 09:43:17 2022 Content-Type: text/plain; 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Thu, 29 Sep 2022 09:44:13 +0000 From: Quan Nguyen To: macro@orcam.me.uk, Lee Jones , Bagas Sanjaya , Rob Herring , Krzysztof Kozlowski , Jean Delvare , Guenter Roeck , Jonathan Corbet , Derek Kiernan , Dragan Cvetic , Arnd Bergmann , Greg Kroah-Hartman , Quan Nguyen , Thu Nguyen , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-hwmon@vger.kernel.org, linux-doc@vger.kernel.org, OpenBMC Maillist , Open Source Submission Cc: Phong Vo , thang@os.amperecomputing.com Subject: [PATCH v9 5/9] misc: smpro-misc: Add Ampere's Altra SMpro misc driver Date: Thu, 29 Sep 2022 16:43:17 +0700 Message-Id: <20220929094321.770125-6-quan@os.amperecomputing.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220929094321.770125-1-quan@os.amperecomputing.com> References: <20220929094321.770125-1-quan@os.amperecomputing.com> X-ClientProxiedBy: SG2PR01CA0178.apcprd01.prod.exchangelabs.com (2603:1096:4:28::34) To SJ0PR01MB7282.prod.exchangelabs.com (2603:10b6:a03:3f2::24) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ0PR01MB7282:EE_|SN6PR01MB4798:EE_ X-MS-Office365-Filtering-Correlation-Id: c57f180d-2bed-40f8-0d8d-08daa1ff2a74 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Signed-off-by: Quan Nguyen --- Changes in v9: + Update SPDX licence [Greg] + Use ATTRIBUTE_GROUPS() [Greg] + Use dev_groups instead of sysfs_create_group() to avoid racing issue with user space [Greg] + Refactor code to avoid clever encoding issue [Quan] Changes in v8: + Update wording for SMPRO_MISC in Kconfig file [Quan] + Switch to use sysfs_emit() [Quan] Changes in v7: + Fix wrong return type of *_show/store() functions [kernel robot test] + Adjust patch order to remove dependence with smpro-mfd [Lee Jones] Changes in v6: + First introduced in v6 [Quan] drivers/misc/Kconfig | 10 +++ drivers/misc/Makefile | 1 + drivers/misc/smpro-misc.c | 145 ++++++++++++++++++++++++++++++++++++++ 3 files changed, 156 insertions(+) create mode 100644 drivers/misc/smpro-misc.c diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index b9ceee949dab..9947b7892bd5 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -188,6 +188,16 @@ config SMPRO_ERRMON To compile this driver as a module, say M here. The driver will be called smpro-errmon. +config SMPRO_MISC + tristate "Ampere Computing SMPro miscellaneous driver" + depends on MFD_SMPRO || COMPILE_TEST + help + Say Y here to get support for the SMpro error miscellalenous function + provided by Ampere Computing's Altra and Altra Max SoCs. + + To compile this driver as a module, say M here. The driver will be + called smpro-misc. + config CS5535_MFGPT tristate "CS5535/CS5536 Geode Multi-Function General Purpose Timer (MFGPT) support" depends on MFD_CS5535 diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index bbe24d4511a3..87b54a4a4422 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -24,6 +24,7 @@ obj-$(CONFIG_KGDB_TESTS) += kgdbts.o obj-$(CONFIG_SGI_XP) += sgi-xp/ obj-$(CONFIG_SGI_GRU) += sgi-gru/ obj-$(CONFIG_SMPRO_ERRMON) += smpro-errmon.o +obj-$(CONFIG_SMPRO_MISC) += smpro-misc.o obj-$(CONFIG_CS5535_MFGPT) += cs5535-mfgpt.o obj-$(CONFIG_GEHC_ACHC) += gehc-achc.o obj-$(CONFIG_HP_ILO) += hpilo.o diff --git a/drivers/misc/smpro-misc.c b/drivers/misc/smpro-misc.c new file mode 100644 index 000000000000..6c427141e51b --- /dev/null +++ b/drivers/misc/smpro-misc.c @@ -0,0 +1,145 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Ampere Computing SoC's SMpro Misc Driver + * + * Copyright (c) 2022, Ampere Computing LLC + */ +#include +#include +#include +#include + +/* Boot Stage/Progress Registers */ +#define BOOTSTAGE 0xB0 +#define BOOTSTAGE_LO 0xB1 +#define CUR_BOOTSTAGE 0xB2 +#define BOOTSTAGE_HI 0xB3 + +/* SOC State Registers */ +#define SOC_POWER_LIMIT 0xE5 + +struct smpro_misc { + struct regmap *regmap; +}; + +static ssize_t boot_progress_show(struct device *dev, struct device_attribute *da, char *buf) +{ + struct smpro_misc *misc = dev_get_drvdata(dev); + u16 boot_progress[3] = { 0 }; + u32 bootstage; + u8 boot_stage; + u8 cur_stage; + u32 reg_lo; + u32 reg; + int ret; + + /* Read current boot stage */ + ret = regmap_read(misc->regmap, CUR_BOOTSTAGE, ®); + if (ret) + return ret; + + cur_stage = reg & 0xff; + + ret = regmap_read(misc->regmap, BOOTSTAGE, &bootstage); + if (ret) + return ret; + + boot_stage = (bootstage >> 8) & 0xff; + + if (boot_stage > cur_stage) + return -EINVAL; + + ret = regmap_read(misc->regmap, BOOTSTAGE_LO, ®_lo); + if (!ret) + ret = regmap_read(misc->regmap, BOOTSTAGE_HI, ®); + if (ret) + return ret; + + /* Firmware to report new boot stage next time */ + if (boot_stage < cur_stage) { + ret = regmap_write(misc->regmap, BOOTSTAGE, ((bootstage & 0xff00) | 0x1)); + if (ret) + return ret; + } + + boot_progress[0] = bootstage; + boot_progress[1] = swab16(reg); + boot_progress[2] = swab16(reg_lo); + + return sysfs_emit(buf, "%*phN\n", (int)sizeof(boot_progress), boot_progress); +} + +static DEVICE_ATTR_RO(boot_progress); + +static ssize_t soc_power_limit_show(struct device *dev, struct device_attribute *da, char *buf) +{ + struct smpro_misc *misc = dev_get_drvdata(dev); + unsigned int value; + int ret; + + ret = regmap_read(misc->regmap, SOC_POWER_LIMIT, &value); + if (ret) + return ret; + + return sysfs_emit(buf, "%d\n", value); +} + +static ssize_t soc_power_limit_store(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct smpro_misc *misc = dev_get_drvdata(dev); + unsigned long val; + s32 ret; + + ret = kstrtoul(buf, 0, &val); + if (ret) + return ret; + + ret = regmap_write(misc->regmap, SOC_POWER_LIMIT, (unsigned int)val); + if (ret) + return -EPROTO; + + return count; +} + +static DEVICE_ATTR_RW(soc_power_limit); + +static struct attribute *smpro_misc_attrs[] = { + &dev_attr_boot_progress.attr, + &dev_attr_soc_power_limit.attr, + NULL +}; + +ATTRIBUTE_GROUPS(smpro_misc); + +static int smpro_misc_probe(struct platform_device *pdev) +{ + struct smpro_misc *misc; + + misc = devm_kzalloc(&pdev->dev, sizeof(struct smpro_misc), GFP_KERNEL); + if (!misc) + return -ENOMEM; + + platform_set_drvdata(pdev, misc); + + misc->regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!misc->regmap) + return -ENODEV; + + return 0; +} + +static struct platform_driver smpro_misc_driver = { + .probe = smpro_misc_probe, + .driver = { + .name = "smpro-misc", + .dev_groups = smpro_misc_groups, + }, +}; + +module_platform_driver(smpro_misc_driver); + +MODULE_AUTHOR("Tung Nguyen "); +MODULE_AUTHOR("Quan Nguyen "); +MODULE_DESCRIPTION("Ampere Altra SMpro Misc driver"); +MODULE_LICENSE("GPL"); From patchwork Thu Sep 29 09:43:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quan Nguyen X-Patchwork-Id: 12993858 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 83875C433FE for ; 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Signed-off-by: Thu Nguyen Signed-off-by: Quan Nguyen --- Changes in v9: + Update SPDX licence [Greg] Changes in v8: + Update to reflect single value per sysfs [Quan] Changes in v7: + None Changes in v6: + First introduced in v6 [Quan] Documentation/misc-devices/index.rst | 1 + Documentation/misc-devices/smpro-misc.rst | 82 +++++++++++++++++++++++ 2 files changed, 83 insertions(+) create mode 100644 Documentation/misc-devices/smpro-misc.rst diff --git a/Documentation/misc-devices/index.rst b/Documentation/misc-devices/index.rst index b74b3b34a235..b40cd1b402f7 100644 --- a/Documentation/misc-devices/index.rst +++ b/Documentation/misc-devices/index.rst @@ -28,6 +28,7 @@ fit into other categories. oxsemi-tornado pci-endpoint-test smpro-errmon + smpro-misc spear-pcie-gadget uacce xilinx_sdfec diff --git a/Documentation/misc-devices/smpro-misc.rst b/Documentation/misc-devices/smpro-misc.rst new file mode 100644 index 000000000000..d21be4a09e69 --- /dev/null +++ b/Documentation/misc-devices/smpro-misc.rst @@ -0,0 +1,82 @@ +.. SPDX-License-Identifier: GPL-2.0-only + +Kernel driver Ampere(R) Altra(R) SMpro miscellaneous +==================================================== + +Supported chips: + + * Ampere(R) Altra(R) + + Prefix: 'smpro' + + Reference: Altra SoC BMC Interface Specification + +Author: Thu Nguyen + +Description +----------- + +This driver support the monitoring and configuration of various miscellaneous +data provided by Ampere(R) Altra(R) SMpro processor. +At this time, these include: + + * Reading Boot Progress information + * Configuring SoC Power Limit + +Sysfs entries +------------- + +1) Boot progress + +SMpro misc driver creates the sysfs files ``boot_progress``. +The format of ``boot_progress`` file is as below:: + + + +Where: + +* Boot stage:: + + 0: SMpro firmware booting. + 1: PMpro firmware booting. + 2: ATF BL1 firmware booting. + 3: DDR initialization. + 4: DDR training report status. + 5: ATF BL2 firmware booting. + 6: ATF BL31 firmware booting. + 7: ATF BL32 firmware booting. + 8: UEFI firmware booting. + 9: OS booting. + +* Boot status:: + + 0: Not started. + 1: Started. + 2: Complete without error. + 3: Failure. + +* boot progress: 32 bits boot progress code + +The sysfs ``boot_progress`` only reports the boot state when the host is booting. +If the host is already booted, it returns latest state. + +Example:: + + #cat boot_progress + 0102808454A8 + +2) SoC Power Limit + +SMpro misc driver creates the sysfs file ``soc_power_limit`` to get/set the SoC Power Limit. + +Reading this sysfs return the current setting of SoC Power Limit (W) in decimal string. +Writing the desired value in decimal string to set the SoC Power Limit in Watt (W). +The range of SoC Power Limit is 90-500(W) and will be ignored if out of range. + +Example:: + + #cat soc_power_limit + 90 + #echo 95 > soc_power_limit + #cat soc_power_limit + 95 From patchwork Thu Sep 29 09:43:19 2022 Content-Type: text/plain; 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Thu, 29 Sep 2022 09:44:24 +0000 From: Quan Nguyen To: macro@orcam.me.uk, Lee Jones , Bagas Sanjaya , Rob Herring , Krzysztof Kozlowski , Jean Delvare , Guenter Roeck , Jonathan Corbet , Derek Kiernan , Dragan Cvetic , Arnd Bergmann , Greg Kroah-Hartman , Quan Nguyen , Thu Nguyen , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-hwmon@vger.kernel.org, linux-doc@vger.kernel.org, OpenBMC Maillist , Open Source Submission Cc: Phong Vo , thang@os.amperecomputing.com, Rob Herring Subject: [PATCH v9 7/9] dt-bindings: mfd: Add bindings for Ampere Altra SMPro MFD driver Date: Thu, 29 Sep 2022 16:43:19 +0700 Message-Id: <20220929094321.770125-8-quan@os.amperecomputing.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220929094321.770125-1-quan@os.amperecomputing.com> References: <20220929094321.770125-1-quan@os.amperecomputing.com> X-ClientProxiedBy: SG2PR01CA0178.apcprd01.prod.exchangelabs.com (2603:1096:4:28::34) To SJ0PR01MB7282.prod.exchangelabs.com (2603:10b6:a03:3f2::24) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ0PR01MB7282:EE_|SN6PR01MB4798:EE_ X-MS-Office365-Filtering-Correlation-Id: c46a8a0b-2565-4f5e-b3cb-08daa1ff3156 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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The SMpro co-processor on Ampere Altra processor family is to monitor and report various data included hwmon-related info, RAS errors, and other miscellaneous information. Signed-off-by: Quan Nguyen Reviewed-by: Rob Herring --- Changes in v9: + Update SPDX license [Greg] Changes in v8: + Removed unused #*_cells [Krzysztof] Changes in v7: + None Changes in v6: + None .../devicetree/bindings/mfd/ampere,smpro.yaml | 42 +++++++++++++++++++ 1 file changed, 42 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/ampere,smpro.yaml diff --git a/Documentation/devicetree/bindings/mfd/ampere,smpro.yaml b/Documentation/devicetree/bindings/mfd/ampere,smpro.yaml new file mode 100644 index 000000000000..c442c3cdffed --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/ampere,smpro.yaml @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/ampere,smpro.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Ampere Altra SMPro firmware driver + +maintainers: + - Quan Nguyen + +description: | + Ampere Altra SMPro firmware may contain different blocks like hardware + monitoring, error monitoring and other miscellaneous features. + +properties: + compatible: + enum: + - ampere,smpro + + reg: + description: + I2C device address. + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + smpro@4f { + compatible = "ampere,smpro"; + reg = <0x4f>; + }; + }; From patchwork Thu Sep 29 09:43:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quan Nguyen X-Patchwork-Id: 12993860 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C9C42C43219 for ; Thu, 29 Sep 2022 09:45:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235531AbiI2Jpk (ORCPT ); Thu, 29 Sep 2022 05:45:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40260 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234594AbiI2Jo5 (ORCPT ); Thu, 29 Sep 2022 05:44:57 -0400 Received: from NAM11-CO1-obe.outbound.protection.outlook.com (mail-co1nam11on2108.outbound.protection.outlook.com [40.107.220.108]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 02E7DCF7; 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Thu, 29 Sep 2022 09:44:30 +0000 From: Quan Nguyen To: macro@orcam.me.uk, Lee Jones , Bagas Sanjaya , Rob Herring , Krzysztof Kozlowski , Jean Delvare , Guenter Roeck , Jonathan Corbet , Derek Kiernan , Dragan Cvetic , Arnd Bergmann , Greg Kroah-Hartman , Quan Nguyen , Thu Nguyen , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-hwmon@vger.kernel.org, linux-doc@vger.kernel.org, OpenBMC Maillist , Open Source Submission Cc: Phong Vo , thang@os.amperecomputing.com Subject: [PATCH v9 8/9] mfd: Add Ampere's Altra SMpro MFD driver Date: Thu, 29 Sep 2022 16:43:20 +0700 Message-Id: <20220929094321.770125-9-quan@os.amperecomputing.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220929094321.770125-1-quan@os.amperecomputing.com> References: <20220929094321.770125-1-quan@os.amperecomputing.com> X-ClientProxiedBy: SG2PR01CA0178.apcprd01.prod.exchangelabs.com (2603:1096:4:28::34) To SJ0PR01MB7282.prod.exchangelabs.com (2603:10b6:a03:3f2::24) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ0PR01MB7282:EE_|MN2PR01MB5503:EE_ X-MS-Office365-Filtering-Correlation-Id: 13fcc3d7-07cc-4ac5-09fc-08daa1ff34ce X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Signed-off-by: Quan Nguyen --- Changes in v9: + Rename smpro-mfd.c to smpro-core.c [Lee Jones] + Fix include files in alphabetical order [Lee Jones] + Add defines to avoid using magic numbers [Lee Jones] + Return -EINVAL if device does not match [Lee Jones] + Remove unneccessary comment [Lee Jones] + Refactor error path handling in smpro_core_read/write() [Quan] Changes in v8: + None Changes in v7: + Smpro-mfd now significant changes in compare with simple-mfd-i2c driver, remove the copyright note about simple-mfd-i2c [Quan] + Install bus->read/write() to handle multiple types of bus access. [Quan] + Update license to MODULE_LICENSE("GPL") [Quan] + Add others minor refactor the code [Quan] Changes in v6: + Update license part to reflect that this driver is clone from simple-mfd-i2c driver [Quan] Changes in v5: + Dropped the use of simple-mfd-i2c driver [Quan] + Introduced drivers/mfd/smpro-mfd.c driver to instantiate sub-devices. This is to avoid DT nodes without resource issue [Quan] + Revised commit message [Quan] Changes in v4: + Add "depends on I2C" to fix build issue found by kernel test robot [Guenter] Changes in v3: + None Changes in v2: + Used 'struct of_device_id's .data attribute [Lee Jones] drivers/mfd/Kconfig | 12 ++++ drivers/mfd/Makefile | 1 + drivers/mfd/smpro-core.c | 138 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 151 insertions(+) create mode 100644 drivers/mfd/smpro-core.c diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 8b93856de432..9e77f4762999 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -77,6 +77,18 @@ config MFD_AS3711 help Support for the AS3711 PMIC from AMS +config MFD_SMPRO + tristate "Ampere Computing SMpro core driver" + depends on I2C + select MFD_CORE + select REGMAP_I2C + help + Say yes here to enable SMpro driver support for Ampere's Altra + processor family. + + Ampere's Altra SMpro exposes an I2C regmap interface that can + be accessed by child devices. + config MFD_AS3722 tristate "ams AS3722 Power Management IC" select MFD_CORE diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 7ed3ef4a698c..9387c3ddab4e 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -271,6 +271,7 @@ obj-$(CONFIG_MFD_QCOM_PM8008) += qcom-pm8008.o obj-$(CONFIG_SGI_MFD_IOC3) += ioc3.o obj-$(CONFIG_MFD_SIMPLE_MFD_I2C) += simple-mfd-i2c.o +obj-$(CONFIG_MFD_SMPRO) += smpro-core.o obj-$(CONFIG_MFD_INTEL_M10_BMC) += intel-m10-bmc.o obj-$(CONFIG_MFD_ATC260X) += atc260x-core.o diff --git a/drivers/mfd/smpro-core.c b/drivers/mfd/smpro-core.c new file mode 100644 index 000000000000..d7729cf70378 --- /dev/null +++ b/drivers/mfd/smpro-core.c @@ -0,0 +1,138 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Ampere Altra Family SMPro core driver + * Copyright (c) 2022, Ampere Computing LLC + */ + +#include +#include +#include +#include +#include +#include + +/* Identification Registers */ +#define MANUFACTURER_ID_REG 0x02 +#define AMPERE_MANUFACTURER_ID 0xCD3A + +#define CORE_CE_ERR_DATA 0x82 +#define CORE_UE_ERR_DATA 0x85 +#define MEM_CE_ERR_DATA 0x92 +#define MEM_UE_ERR_DATA 0x95 +#define PCIE_CE_ERR_DATA 0xC2 +#define PCIE_UE_ERR_DATA 0xC5 +#define OTHER_CE_ERR_DATA 0xD2 +#define OTHER_UE_ERR_DATA 0xDA + +static int smpro_core_write(void *context, const void *data, size_t count) +{ + struct device *dev = context; + struct i2c_client *i2c = to_i2c_client(dev); + int ret; + + ret = i2c_master_send(i2c, data, count); + if (unlikely(ret != count)) + return (ret < 0) ? ret : -EIO; + + return 0; +} + +static int smpro_core_read(void *context, const void *reg, size_t reg_size, + void *val, size_t val_size) +{ + struct device *dev = context; + struct i2c_client *i2c = to_i2c_client(dev); + struct i2c_msg xfer[2]; + unsigned char buf[2]; + int ret; + + xfer[0].addr = i2c->addr; + xfer[0].flags = 0; + + buf[0] = *(u8 *)reg; + buf[1] = val_size; + xfer[0].len = 2; + xfer[0].buf = buf; + + xfer[1].addr = i2c->addr; + xfer[1].flags = I2C_M_RD; + xfer[1].len = val_size; + xfer[1].buf = val; + + ret = i2c_transfer(i2c->adapter, xfer, 2); + if (unlikely(ret != 2)) + return (ret < 0) ? ret : -EIO; + + return 0; +} + +static const struct regmap_bus smpro_regmap_bus = { + .read = smpro_core_read, + .write = smpro_core_write, + .val_format_endian_default = REGMAP_ENDIAN_BIG, +}; + +static bool smpro_core_readable_noinc_reg(struct device *dev, unsigned int reg) +{ + return (reg == CORE_CE_ERR_DATA || reg == CORE_UE_ERR_DATA || + reg == MEM_CE_ERR_DATA || reg == MEM_UE_ERR_DATA || + reg == PCIE_CE_ERR_DATA || reg == PCIE_UE_ERR_DATA || + reg == OTHER_CE_ERR_DATA || reg == OTHER_UE_ERR_DATA); +} + +static const struct regmap_config smpro_regmap_config = { + .reg_bits = 8, + .val_bits = 16, + .readable_noinc_reg = smpro_core_readable_noinc_reg, +}; + +static const struct mfd_cell smpro_devs[] = { + MFD_CELL_NAME("smpro-hwmon"), + MFD_CELL_NAME("smpro-errmon"), + MFD_CELL_NAME("smpro-misc"), +}; + +static int smpro_core_probe(struct i2c_client *i2c) +{ + const struct regmap_config *config; + struct regmap *regmap; + unsigned int val; + int ret; + + config = device_get_match_data(&i2c->dev); + if (!config) + return -EINVAL; + + regmap = devm_regmap_init(&i2c->dev, &smpro_regmap_bus, &i2c->dev, config); + if (IS_ERR(regmap)) + return PTR_ERR(regmap); + + ret = regmap_read(regmap, MANUFACTURER_ID_REG, &val); + if (ret) + return ret; + + if (val != AMPERE_MANUFACTURER_ID) + return -ENODEV; + + return devm_mfd_add_devices(&i2c->dev, PLATFORM_DEVID_AUTO, + smpro_devs, ARRAY_SIZE(smpro_devs), NULL, 0, NULL); +} + +static const struct of_device_id smpro_core_of_match[] = { + { .compatible = "ampere,smpro", .data = &smpro_regmap_config }, + {} +}; +MODULE_DEVICE_TABLE(of, smpro_core_of_match); + +static struct i2c_driver smpro_core_driver = { + .probe_new = smpro_core_probe, + .driver = { + .name = "smpro-core", + .of_match_table = smpro_core_of_match, + }, +}; +module_i2c_driver(smpro_core_driver); + +MODULE_AUTHOR("Quan Nguyen "); +MODULE_DESCRIPTION("SMPRO CORE - I2C driver"); +MODULE_LICENSE("GPL"); From patchwork Thu Sep 29 09:43:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quan Nguyen X-Patchwork-Id: 12993861 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DBDAAC43217 for ; Thu, 29 Sep 2022 09:46:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235113AbiI2JqD (ORCPT ); Thu, 29 Sep 2022 05:46:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40240 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234921AbiI2JpR (ORCPT ); Thu, 29 Sep 2022 05:45:17 -0400 Received: from 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X-OriginatorOrg: os.amperecomputing.com X-MS-Exchange-CrossTenant-Network-Message-Id: 00dbd368-f74d-4981-6b0e-08daa1ff3832 X-MS-Exchange-CrossTenant-AuthSource: SJ0PR01MB7282.prod.exchangelabs.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Sep 2022 09:44:36.1968 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3bc2b170-fd94-476d-b0ce-4229bdc904a7 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: k+oQ4dKkbwbZE/UJ5f9JSq3rxqYUEugN7b1+zSXLPru+lLDmUm53+/KZf9MbsZebmt9XaQ+xzTfHM5Bri+c+KpJBQYpVp32L1PfeGi4nmfg= X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR01MB5503 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Add documentation for the Ampere(R)'s Altra(R) SMpro sysfs interfaces Signed-off-by: Quan Nguyen --- Changes in v9: + Remove unnecessary channel info for VRD and DIMM event [Quan] + Update to align with sysfs changes [Quan] Changes in v8: + Sysfs to return single value in hex format [Greg] + Fix KernelVersion info [Greg] + Change errors_* to error_* [Quan] + Added overflow_[core|mem|pcie|other]_[ce|ue] [Quan] Changes in v7: + First introduce in v7 [Greg] .../sysfs-bus-platform-devices-ampere-smpro | 125 ++++++++++++++++++ 1 file changed, 125 insertions(+) create mode 100644 Documentation/ABI/testing/sysfs-bus-platform-devices-ampere-smpro diff --git a/Documentation/ABI/testing/sysfs-bus-platform-devices-ampere-smpro b/Documentation/ABI/testing/sysfs-bus-platform-devices-ampere-smpro new file mode 100644 index 000000000000..d8f82a06570d --- /dev/null +++ b/Documentation/ABI/testing/sysfs-bus-platform-devices-ampere-smpro @@ -0,0 +1,125 @@ +What: /sys/bus/platform/devices/smpro-errmon.*/error_[core|mem|pcie|other]_[ce|ue] +KernelVersion: 5.18 +Contact: quan@os.amperecomputing.com +Description: + (RO) Contains the 48-byte Ampere (Vendor-Specific) Error Record printed + in hex format. + + The detail of each sysfs entries is as below: + +-------------+---------------------------------------------------------+ + | Error | Sysfs entry | + +-------------+---------------------------------------------------------+ + | Core's CE | /sys/bus/platform/devices/smpro-errmon.*/error_core_ce | + | Core's UE | /sys/bus/platform/devices/smpro-errmon.*/error_core_ue | + | Memory's CE | /sys/bus/platform/devices/smpro-errmon.*/error_mem_ce | + | Memory's UE | /sys/bus/platform/devices/smpro-errmon.*/error_mem_ue | + | PCIe's CE | /sys/bus/platform/devices/smpro-errmon.*/error_pcie_ce | + | PCIe's UE | /sys/bus/platform/devices/smpro-errmon.*/error_pcie_ue | + | Other's CE | /sys/bus/platform/devices/smpro-errmon.*/error_other_ce| + | Other's UE | /sys/bus/platform/devices/smpro-errmon.*/error_other_ue| + +-------------+---------------------------------------------------------+ + UE: Uncorrect-able Error + CE: Correct-able Error + + See section 3.3 Ampere (Vendor-Specific) Error Record Formats, + Altra Family RAS Supplement. + + +What: /sys/bus/platform/devices/smpro-errmon.*/overflow_[core|mem|pcie|other]_[ce|ue] +KernelVersion: 5.18 +Contact: quan@os.amperecomputing.com +Description: + (RO) Return the overflow status of each type HW error reported: + 0 : No overflow + 1 : There is an overflow and the oldest HW errors are dropped + + The detail of each sysfs entries is as below: + +-------------+-----------------------------------------------------------+ + | Overflow | Sysfs entry | + +-------------+-----------------------------------------------------------+ + | Core's CE | /sys/bus/platform/devices/smpro-errmon.*/overflow_core_ce | + | Core's UE | /sys/bus/platform/devices/smpro-errmon.*/overflow_core_ue | + | Memory's CE | /sys/bus/platform/devices/smpro-errmon.*/overflow_mem_ce | + | Memory's UE | /sys/bus/platform/devices/smpro-errmon.*/overflow_mem_ue | + | PCIe's CE | /sys/bus/platform/devices/smpro-errmon.*/overflow_pcie_ce | + | PCIe's UE | /sys/bus/platform/devices/smpro-errmon.*/overflow_pcie_ue | + | Other's CE | /sys/bus/platform/devices/smpro-errmon.*/overflow_other_ce| + | Other's UE | /sys/bus/platform/devices/smpro-errmon.*/overflow_other_ue| + +-------------+-----------------------------------------------------------+ + UE: Uncorrect-able Error + CE: Correct-able Error + +What: /sys/bus/platform/devices/smpro-errmon.*/[error|warn]_[smpro|pmpro] +KernelVersion: 5.18 +Contact: quan@os.amperecomputing.com +Description: + (RO) Contains the internal firmware error/warning printed as hex format. + + The detail of each sysfs entries is as below: + +---------------+------------------------------------------------------+ + | Error | Sysfs entry | + +---------------+------------------------------------------------------+ + | SMpro error | /sys/bus/platform/devices/smpro-errmon.*/error_smpro | + | SMpro warning | /sys/bus/platform/devices/smpro-errmon.*/warn_smpro | + | PMpro error | /sys/bus/platform/devices/smpro-errmon.*/error_pmpro | + | PMpro warning | /sys/bus/platform/devices/smpro-errmon.*/warn_pmpro | + +---------------+------------------------------------------------------+ + See more details in section 5.10 RAS Internal Error Register Definitions, + Altra Family Soc BMC Interface Specification. + +What: /sys/bus/platform/devices/smpro-errmon.*/event_[vrd_warn_fault|vrd_hot|dimm_hot] +KernelVersion: 5.18 +Contact: quan@os.amperecomputing.com +Description: + (RO) Contains the detail information in case of VRD/DIMM warning/hot events + in hex format as below: + + AAAA + Where: + AAAA: The event detail information data + + See more details in section 5.7 GPI Status Registers, + Altra Family Soc BMC Interface Specification. + + +What: /sys/bus/platform/devices/smpro-misc.*/boot_progress +KernelVersion: 5.18 +Contact: quan@os.amperecomputing.com +Description: + (RO) Contains the boot stages information in hex as format below: + + AABBCCCCCCCC + Where: + AA : The boot stages + 00: SMpro firmware booting + 01: PMpro firmware booting + 02: ATF BL1 firmware booting + 03: DDR initialization + 04: DDR training report status + 05: ATF BL2 firmware booting + 06: ATF BL31 firmware booting + 07: ATF BL32 firmware booting + 08: UEFI firmware booting + 09: OS booting + BB : Boot status + 00: Not started + 01: Started + 02: Completed without error + 03: Failed. + CCCCCCCC: Boot status information defined for each boot stages + + See more details in section 5.11 Boot Stage Register Definitions, + and section 6. Processor Boot Progress Codes, Altra Family Soc BMC + Interface Specification. + + +What: /sys/bus/platform/devices/smpro-misc*/soc_power_limit +KernelVersion: 5.18 +Contact: quan@os.amperecomputing.com +Description: + (RW) Contains the desired SoC power limit in Watt. + Writes to this sysfs set the desired SoC power limit (W). + Reads from this register return the current SoC power limit (W). + The value ranges: + Minimum: 120 W + Maximum: Socket TDP power