From patchwork Mon Oct 3 19:43:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dzmitry Sankouski X-Patchwork-Id: 12997763 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ED2FFC43219 for ; Mon, 3 Oct 2022 19:43:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229868AbiJCTnh (ORCPT ); Mon, 3 Oct 2022 15:43:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35186 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229862AbiJCTna (ORCPT ); Mon, 3 Oct 2022 15:43:30 -0400 Received: from mail-wr1-x42d.google.com (mail-wr1-x42d.google.com [IPv6:2a00:1450:4864:20::42d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F30192D1E3; Mon, 3 Oct 2022 12:43:26 -0700 (PDT) Received: by mail-wr1-x42d.google.com with SMTP id b4so11264968wrs.1; Mon, 03 Oct 2022 12:43:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=KP9o2XQ77tiLc9uDpTqe9K2cLM/l5kzzkPf/Kwq6vwU=; b=SGr9JLQa9SWqw4hV5LZr6u8lTtXiSUGjsycWyzfKimB+1p5CQ0eJoaBN+dtQbmPIPh kSH9v30XU0bFy/6Cn2zv7wSqSWsI5X/Fkm9QIPw4LEfuViP+1kqT3fyLw9pOLPyg4olc hMyIfBPLZyVV1XVXEW4sCYgr45KKT+kZin5QZNWuPEQbDabGtBp5Ho6LrpaMa6zeYL1q k1UtkXEQHX5IIuN2lS+BIMH5PLn79P739i1lqsQ8P1OgfFZyzbb+K25snv+OOxJY54lZ Zu0ijQPJ99DQ6a4RvOInO35kepN9JfS5oqh6u+dnPvGfJUY7PL52OKSCbw8ZK0A4XMr5 MLVA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=KP9o2XQ77tiLc9uDpTqe9K2cLM/l5kzzkPf/Kwq6vwU=; b=Io4z1QOn1xeZewK8EPDKxN27h5YYJnCV4SRujcXELMYwxHPZvgDj/djMRwjz834ZVw OFB4qZGuOuu458b3XZJs3yD5NotuLHHjV7HOKQEznpo2aQSlXkWNTA4Bf1zSJGqU8mvx 8qbrNpRqxV8IFN9jl6KgT8v9IiqaWlH9xEH4wauWhE2aoQ3prQ4lSKnp+XZj9lfuwksf WPCwflYhZiYSrvjAxq5YFLscM4l/shmgQorUJWqgSEM/K6/CtuilMUEQ0SGVKkWrjT5I A8oN2QSmBeQVoc5hAmmxBzlg2VmU4kZZcf64H0Z3KmIVBos2yxEscFsiS1KTGSsZCMjA c0ww== X-Gm-Message-State: ACrzQf00Nzs6w1YLex7ONZauO5P16FA9nBx9RfHWsBHRIzuA/2FaKggR eul5HQ08/s48bJKBErJs/xy1zxlFn24= X-Google-Smtp-Source: AMsMyM76oIIJCxXSSmhWVALQogpvk8YZeFIO85zKb+sNX7d/TtIA1Fbzi6+ILflSIgTvf2WzjlYknQ== X-Received: by 2002:adf:f18c:0:b0:22c:df1c:92cd with SMTP id h12-20020adff18c000000b0022cdf1c92cdmr11679270wro.52.1664826204795; Mon, 03 Oct 2022 12:43:24 -0700 (PDT) Received: from localhost.localdomain ([46.216.9.29]) by smtp.googlemail.com with ESMTPSA id q5-20020a05600c2e4500b003b50428cf66sm12041663wmf.33.2022.10.03.12.43.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Oct 2022 12:43:24 -0700 (PDT) From: Dzmitry Sankouski To: linux-kernel@vger.kernel.org Cc: Dzmitry Sankouski , Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org (open list:ARM/QUALCOMM SUPPORT), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS) Subject: [PATCH v5 1/2] arm64: dts: qcom: sagit: add initial device tree for sagit Date: Mon, 3 Oct 2022 22:43:14 +0300 Message-Id: <20221003194315.943903-2-dsankouski@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20221003194315.943903-1-dsankouski@gmail.com> References: <20221003194315.943903-1-dsankouski@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org New device support - Xiaomi Mi6 phone What works: - storage - usb - power regulators Signed-off-by: Dzmitry Sankouski --- Changes for v5: - use pm8005_regulators label arch/arm64/boot/dts/qcom/Makefile | 1 + .../boot/dts/qcom/msm8998-xiaomi-sagit.dts | 687 ++++++++++++++++++ arch/arm64/boot/dts/qcom/pm8998.dtsi | 6 + 3 files changed, 694 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/msm8998-xiaomi-sagit.dts diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 1d86a33de528..0460aabf1b59 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -46,6 +46,7 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8998-oneplus-dumpling.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8998-sony-xperia-yoshino-lilac.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8998-sony-xperia-yoshino-maple.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8998-sony-xperia-yoshino-poplar.dtb +dtb-$(CONFIG_ARCH_QCOM) += msm8998-xiaomi-sagit.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb dtb-$(CONFIG_ARCH_QCOM) += qrb5165-rb5.dtb diff --git a/arch/arm64/boot/dts/qcom/msm8998-xiaomi-sagit.dts b/arch/arm64/boot/dts/qcom/msm8998-xiaomi-sagit.dts new file mode 100644 index 000000000000..a8a2a58e408e --- /dev/null +++ b/arch/arm64/boot/dts/qcom/msm8998-xiaomi-sagit.dts @@ -0,0 +1,687 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Xiaomi Mi 6 (sagit) device tree source based on msm8998-mtp.dtsi + * + * Copyright (c) 2022, The Linux Foundation. All rights reserved. + * Copyright (c) 2022, Degdag Mohamed + * Copyright (c) 2022, Dzmitry Sankouski + */ + +/dts-v1/; + +#include "msm8998.dtsi" +#include "pm8005.dtsi" +#include "pm8998.dtsi" +#include "pmi8998.dtsi" +#include +#include +#include + +/* + * Delete following upstream (msm8998.dtsi) reserved + * memory mappings which are different in this device. + */ +/delete-node/ &mpss_mem; +/delete-node/ &venus_mem; +/delete-node/ &mba_mem; +/delete-node/ &slpi_mem; +/delete-node/ &ipa_fw_mem; +/delete-node/ &ipa_gsi_mem; +/delete-node/ &gpu_mem; +/delete-node/ &wlan_msa_mem; + +/ { + model = "Xiaomi Mi 6"; + compatible = "xiaomi,sagit", "qcom,msm8998"; + chassis-type = "handset"; + /* Required for bootloader to select correct board */ + qcom,board-id = <30 0>; + + reserved-memory { + /* + * The following memory regions on downstream are "dynamically allocated" + * but given the same addresses every time. Hard code them as these addresses + * are where the Xiaomi signed firmware expects them to be. + */ + ipa_fws_region: ipa@f7800000 { + compatible = "shared-dma-pool"; + reg = <0x0 0xf7800000 0x0 0x5000>; + no-map; + }; + + zap_shader_region: gpu@f7900000 { + compatible = "shared-dma-pool"; + reg = <0x0 0xf7900000 0x0 0x2000>; + no-map; + }; + + mpss_mem: memory@8d000000 { + reg = <0x0 0x8d000000 0x0 0x7000000>; + no-map; + }; + + venus_mem: memory@94000000 { + reg = <0x0 0x94000000 0x0 0x500000>; + no-map; + }; + + mba_mem: memory@94500000 { + reg = <0x0 0x94500000 0x0 0x200000>; + no-map; + }; + + slpi_mem: memory@94700000 { + reg = <0x0 0x94700000 0x0 0x10000>; + no-map; + }; + + ipa_fw_mem: memory@95600000 { + reg = <0x0 0x95600000 0x0 0x10000>; + no-map; + }; + + ipa_gsi_mem: memory@95610000 { + reg = <0x0 0x95610000 0x0 0x5000>; + no-map; + }; + + gpu_mem: memory@95615000 { + reg = <0x0 0x95615000 0x0 0x100000>; + no-map; + }; + + wlan_msa_mem: memory@95715000 { + reg = <0x0 0x95715000 0x0 0x100000>; + no-map; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + label = "Volume buttons"; + autorepeat; + + pinctrl-names = "default"; + pinctrl-0 = <&vol_up_key_default>; + + key-vol-up { + label = "Volume up"; + gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <15>; + wakeup-source; + }; + }; + + gpio-hall-sensor { + compatible = "gpio-keys"; + label = "Hall effect sensor"; + + pinctrl-names = "default"; + pinctrl-0 = <&hall_sensor_default_state>; + + event-hall-sensor { + label = "Hall Effect Sensor"; + gpios = <&tlmm 124 GPIO_ACTIVE_LOW>; + linux,input-type = ; + linux,code = ; + linux,can-disable; + wakeup-source; + }; + }; + + vph_pwr: vph-pwr-regulator { + compatible = "regulator-fixed"; + regulator-name = "vph_pwr"; + regulator-min-microvolt = <3700000>; + regulator-max-microvolt = <3700000>; + regulator-always-on; + regulator-boot-on; + }; + + disp_vddts_vreg: disp-vddts-regulator { + compatible = "regulator-fixed"; + regulator-name = "disp-vddts-regulator"; + gpio = <&tlmm 50 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-boot-on; + }; +}; + +&blsp1_i2c5 { + pinctrl-names = "default", "sleep"; + status = "okay"; + + touchscreen@20 { + compatible = "syna,rmi4-i2c"; + reg = <0x20>; + #address-cells = <1>; + #size-cells = <0>; + + interrupt-parent = <&tlmm>; + interrupts = <125 IRQ_TYPE_EDGE_FALLING>; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&ts_active_state>; + pinctrl-1 = <&ts_int_suspend_state &ts_reset_suspend_state>; + + vdd-supply = <&disp_vddts_vreg>; + vio-supply = <&vreg_l6a_1p8>; + + syna,reset-delay-ms = <20>; + syna,startup-delay-ms = <20>; + + rmi4-f01@1 { + reg = <0x01>; + syna,nosleep-mode = <1>; + }; + + rmi4-f12@12 { + reg = <0x12>; + touchscreen-x-mm = <64>; + touchscreen-y-mm = <114>; + syna,sensor-type = <1>; + syna,rezero-wait-ms = <20>; + }; + + rmi4-f1a@1a { + reg = <0x1a>; + syna,codes = ; + }; + }; +}; + +&blsp1_i2c5_sleep { + /delete-property/ bias-pull-up; + bias-disable; +}; + +&blsp1_uart3 { + status = "okay"; + + bluetooth { + compatible = "qcom,wcn3990-bt"; + + vddio-supply = <&vreg_s4a_1p8>; + vddxo-supply = <&vreg_l7a_1p8>; + vddrf-supply = <&vreg_l17a_1p3>; + vddch0-supply = <&vreg_l25a_3p3>; + max-speed = <3200000>; + }; +}; + +&blsp1_uart3_on { + rx { + /delete-property/ bias-disable; + /* + * Configure a pull-up on 46 (RX). This is needed to + * avoid garbage data when the TX pin of the Bluetooth + * module is in tri-state (module powered off or not + * driving the signal yet). + */ + bias-pull-up; + }; + + cts { + /delete-property/ bias-disable; + /* + * Configure a pull-down on 47 (CTS) to match the pull + * of the Bluetooth module. + */ + bias-pull-down; + }; +}; + +&blsp2_uart1 { + status = "okay"; +}; + +&pm8005_regulators { + compatible = "qcom,pm8005-regulators"; + + vdd_s1-supply = <&vph_pwr>; + + pm8005_s1: s1 { /* VDD_GFX supply */ + regulator-min-microvolt = <524000>; + regulator-max-microvolt = <1100000>; + regulator-enable-ramp-delay = <500>; + + /* hack until we rig up the gpu consumer */ + regulator-always-on; + }; +}; + +&pm8998_gpio { + vol_up_key_default: vol-up-key-default-state { + pins = "gpio6"; + function = "normal"; + bias-pull-up; + input-enable; + qcom,drive-strength = ; + }; + + audio_mclk_pin: audio-mclk-pin-active-state { + pins = "gpio13"; + function = "func2"; + power-source = <0>; + }; +}; + +&qusb2phy { + status = "okay"; + + vdda-pll-supply = <&vreg_l12a_1p8>; + vdda-phy-dpdm-supply = <&vreg_l24a_3p075>; +}; + +&rpm_requests { + regulators-0 { + compatible = "qcom,rpm-pm8998-regulators"; + + vdd_s1-supply = <&vph_pwr>; + vdd_s2-supply = <&vph_pwr>; + vdd_s3-supply = <&vph_pwr>; + vdd_s4-supply = <&vph_pwr>; + vdd_s5-supply = <&vph_pwr>; + vdd_s6-supply = <&vph_pwr>; + vdd_s7-supply = <&vph_pwr>; + vdd_s8-supply = <&vph_pwr>; + vdd_s9-supply = <&vph_pwr>; + vdd_s10-supply = <&vph_pwr>; + vdd_s11-supply = <&vph_pwr>; + vdd_s12-supply = <&vph_pwr>; + vdd_s13-supply = <&vph_pwr>; + vdd_l1_l27-supply = <&vreg_s7a_1p025>; + vdd_l2_l8_l17-supply = <&vreg_s3a_1p35>; + vdd_l3_l11-supply = <&vreg_s7a_1p025>; + vdd_l4_l5-supply = <&vreg_s7a_1p025>; + vdd_l6-supply = <&vreg_s5a_2p04>; + vdd_l7_l12_l14_l15-supply = <&vreg_s5a_2p04>; + vdd_l9-supply = <&vreg_bob>; + vdd_l10_l23_l25-supply = <&vreg_bob>; + vdd_l13_l19_l21-supply = <&vreg_bob>; + vdd_l16_l28-supply = <&vreg_bob>; + vdd_l18_l22-supply = <&vreg_bob>; + vdd_l20_l24-supply = <&vreg_bob>; + vdd_l26-supply = <&vreg_s3a_1p35>; + vdd_lvs1_lvs2-supply = <&vreg_s4a_1p8>; + + vreg_s3a_1p35: s3 { + regulator-min-microvolt = <1352000>; + regulator-max-microvolt = <1352000>; + }; + + vreg_s4a_1p8: s4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-allow-set-load; + }; + + vreg_s5a_2p04: s5 { + regulator-min-microvolt = <1904000>; + regulator-max-microvolt = <2040000>; + }; + + vreg_s7a_1p025: s7 { + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1028000>; + }; + + vreg_l1a_0p875: l1 { + regulator-min-microvolt = <880000>; + regulator-max-microvolt = <880000>; + }; + + vreg_l2a_1p2: l2 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + vreg_l3a_1p0: l3 { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + }; + + vreg_l5a_0p8: l5 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <800000>; + }; + + vreg_l6a_1p8: l6 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + vreg_l7a_1p8: l7 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + vreg_l8a_1p2: l8 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + vreg_l9a_1p8: l9 { + regulator-min-microvolt = <1808000>; + regulator-max-microvolt = <2960000>; + }; + + vreg_l10a_1p8: l10 { + regulator-min-microvolt = <1808000>; + regulator-max-microvolt = <2960000>; + }; + + vreg_l11a_1p0: l11 { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + }; + + vreg_l12a_1p8: l12 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + vreg_l13a_2p95: l13 { + regulator-min-microvolt = <1808000>; + regulator-max-microvolt = <2960000>; + }; + + vreg_l14a_1p8: l14 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + vreg_l15a_1p8: l15 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + vreg_l16a_2p7: l16 { + regulator-min-microvolt = <2704000>; + regulator-max-microvolt = <2704000>; + }; + + vreg_l17a_1p3: l17 { + regulator-min-microvolt = <1304000>; + regulator-max-microvolt = <1304000>; + }; + + vreg_l18a_2p7: l18 { + regulator-min-microvolt = <2704000>; + regulator-max-microvolt = <2704000>; + }; + + vreg_l19a_3p0: l19 { + regulator-min-microvolt = <3008000>; + regulator-max-microvolt = <3008000>; + }; + + vreg_l20a_2p95: l20 { + regulator-min-microvolt = <2960000>; + regulator-max-microvolt = <2960000>; + regulator-allow-set-load; + }; + + vreg_l21a_2p95: l21 { + regulator-min-microvolt = <2960000>; + regulator-max-microvolt = <2960000>; + regulator-system-load = <800000>; + regulator-allow-set-load; + }; + + vreg_l22a_2p85: l22 { + regulator-min-microvolt = <2864000>; + regulator-max-microvolt = <2864000>; + }; + + vreg_l23a_3p3: l23 { + regulator-min-microvolt = <3312000>; + regulator-max-microvolt = <3312000>; + }; + + vreg_l24a_3p075: l24 { + regulator-min-microvolt = <3088000>; + regulator-max-microvolt = <3088000>; + }; + + vreg_l25a_3p3: l25 { + regulator-min-microvolt = <3104000>; + regulator-max-microvolt = <3312000>; + }; + + vreg_l26a_1p2: l26 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-allow-set-load; + }; + + vreg_l28_3p0: l28 { + regulator-min-microvolt = <3008000>; + regulator-max-microvolt = <3008000>; + }; + + vreg_lvs1a_1p8: lvs1 { }; + + vreg_lvs2a_1p8: lvs2 { }; + }; + + regulators-1 { + compatible = "qcom,rpm-pmi8998-regulators"; + + vdd_bob-supply = <&vph_pwr>; + + vreg_bob: bob { + regulator-min-microvolt = <3312000>; + regulator-max-microvolt = <3600000>; + }; + }; +}; + +&tlmm { + gpio-reserved-ranges = <0 4>, <81 4>; + + cci1_default_state: cci1-default-state { + pins = "gpio19", "gpio20"; + function = "cci_i2c"; + bias-disable; + drive-strength = <2>; + }; + + cdc_reset_n: cdc-reset-n { + pins = "gpio64"; + function = "gpio"; + bias-pull-down; + drive-strength = <16>; + output-high; + }; + + hall_sensor_default_state: hall-sensor-default-state { + pins = "gpio124"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + input-enable; + }; + + mdss_dsi_active_state: mdss-dsi-active-state { + pins = "gpio94"; + function = "gpio"; + drive-strength = <8>; + bias-disable; + }; + + mdss_dsi_suspend_state: mdss-dsi-suspend-state { + pins = "gpio94"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; + + mdss_te_active_state: mdss-te-active-state { + pins = "gpio10"; + function = "mdp_vsync_a"; + drive-strength = <2>; + bias-pull-down; + }; + + mdss_te_suspend_state: mdss-te-suspend-state { + pins = "gpio10"; + function = "mdp_vsync_a"; + drive-strength = <2>; + bias-pull-down; + }; + + msm_mclk0_active_state: msm-mclk0-active-state { + pins = "gpio13"; + function = "cam_mclk"; + drive-strength = <2>; + bias-disable; + }; + + msm_mclk0_suspend_state: msm-mclk0-suspend-state { + pins = "gpio13"; + function = "cam_mclk"; + drive-strength = <2>; + bias-pull-down; + }; + + msm_mclk1_active_state: msm-mclk1-active-state { + pins = "gpio14"; + function = "cam_mclk"; + drive-strength = <2>; + bias-disable; + }; + + msm_mclk1_suspend_state: msm-mclk1-suspend-state { + pins = "gpio14"; + function = "cam_mclk"; + drive-strength = <2>; + bias-pull-down; + }; + + nfc_int_active_state: nfc-int-active-state { + pins = "gpio92"; + function = "gpio"; + drive-strength = <6>; + bias-pull-up; + }; + + nfc_int_suspend_state: nfc-int-suspend-state { + pins = "gpio92"; + function = "gpio"; + drive-strength = <6>; + bias-pull-up; + }; + + nfc_enable_active_state: nfc-enable-active-state { + pins = "gpio12", "gpio116"; + function = "gpio"; + drive-strength = <6>; + bias-pull-up; + }; + + nfc_enable_suspend_state: nfc-enable-suspend-state { + pins = "gpio12", "gpio116"; + function = "gpio"; + drive-strength = <6>; + bias-disable; + }; + + ts_active_state: ts-active-state { + pins = "gpio89", "gpio125"; + function = "gpio"; + drive-strength = <16>; + bias-pull-up; + input-enable; + }; + + ts_int_suspend_state: ts-int-suspend-state { + pins = "gpio125"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + ts_reset_suspend_state: ts-reset-suspend-state { + pins = "gpio89"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + wcd_int_n: wcd-int-n { + pins = "gpio54"; + function = "gpio"; + bias-pull-down; + drive-strength = <2>; + input-enable; + }; + + wsa_leftspk_pwr_n: wsa-leftspk-pwr-n { + pins = "gpio65"; + function = "gpio"; + bias-disable; + drive-strength = <2>; + output-low; + }; + + wsa_rightspk_pwr_n: wsa-rightspk-pwr-n { + pins = "gpio66"; + function = "gpio"; + bias-disable; + drive-strength = <2>; + output-low; + }; +}; + +&pm8998_resin { + debounce = <15625>; + linux,code = ; +}; + +&ufshc { + status = "okay"; + + vcc-supply = <&vreg_l20a_2p95>; + vccq-supply = <&vreg_l26a_1p2>; + vccq2-supply = <&vreg_s4a_1p8>; + vcc-max-microamp = <750000>; + vccq-max-microamp = <560000>; + vccq2-max-microamp = <750000>; +}; + +&ufsphy { + status = "okay"; + + vdda-phy-supply = <&vreg_l1a_0p875>; + vdda-pll-supply = <&vreg_l2a_1p2>; + vddp-ref-clk-supply = <&vreg_l26a_1p2>; +}; + +&usb3 { + status = "okay"; + + /* Disable USB3 clock requirement as the device only supports USB2 */ + qcom,select-utmi-as-pipe-clk; +}; + +&usb3_dwc3 { + /* Drop the unused USB 3 PHY */ + phys = <&qusb2phy>; + phy-names = "usb2-phy"; + + /* Fastest mode for USB 2 */ + maximum-speed = "high-speed"; + + /* Force to peripheral until we can switch modes */ + dr_mode = "peripheral"; +}; + +&wifi { + status = "okay"; + vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>; + vdd-1.8-xo-supply = <&vreg_l7a_1p8>; + vdd-1.3-rfa-supply = <&vreg_l17a_1p3>; + vdd-3.3-ch0-supply = <&vreg_l25a_3p3>; +}; diff --git a/arch/arm64/boot/dts/qcom/pm8998.dtsi b/arch/arm64/boot/dts/qcom/pm8998.dtsi index d09f2954b6f9..4551af463081 100644 --- a/arch/arm64/boot/dts/qcom/pm8998.dtsi +++ b/arch/arm64/boot/dts/qcom/pm8998.dtsi @@ -52,6 +52,12 @@ pm8998_pwrkey: pwrkey { bias-pull-up; linux,code = ; }; + + pm8998_resin: resin { + compatible = "qcom,pm8941-resin"; + bias-pull-up; + interrupts = ; + }; }; pm8998_temp: temp-alarm@2400 { From patchwork Mon Oct 3 19:43:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dzmitry Sankouski X-Patchwork-Id: 12997762 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0A35CC43217 for ; Mon, 3 Oct 2022 19:43:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229773AbiJCTng (ORCPT ); Mon, 3 Oct 2022 15:43:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35212 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229842AbiJCTn3 (ORCPT ); Mon, 3 Oct 2022 15:43:29 -0400 Received: from mail-wr1-x429.google.com (mail-wr1-x429.google.com [IPv6:2a00:1450:4864:20::429]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 812E548CB0; Mon, 3 Oct 2022 12:43:27 -0700 (PDT) Received: by mail-wr1-x429.google.com with SMTP id r6so18226635wru.8; Mon, 03 Oct 2022 12:43:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=3RLX1VxjXOs3ZcDQ2RhxhL9p3wd3mTVn1GXIHd4zMVE=; b=FqB08cxtviPNqjGDYUnRQ1GKeRD2FPwtsz7gA1tuQ6pDMzN9WIo8vWohuMVuey3s8A iri+aBxfRbIYUOmCLP1J/UvP/mt8kQL3SXq3lJGY/h0ZEJJixiYBmqEKZj4w6kJRTCmo grn9yhhEe+Lut8LLphj9/xEuUcl8/AiSIW+q4pWEV+2G+6k2PQdIhwaldT5UeyURNR4y +pQr24syzWGOHTkTpvTozK0AFTDMWRPXCTkwD7yFYP+Jt3nNpWuqq++jogYN+MvKm/A2 A6w7qebfrUKkuyu2N29G/SW5rxylkRwOmIH22SI/cWe4iIfAvtKDW4YwyeHAcFkGpxCI dsGw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=3RLX1VxjXOs3ZcDQ2RhxhL9p3wd3mTVn1GXIHd4zMVE=; b=W4fS24Qwf2nLOO8/sO4ddwVzfMbbN9gPNBx+5Nrt2rw+ks5nj5XERhuQozwbo/JnEx DYperSicKjsiWXMQER3zV7gaYgkmzDaiUOUENzRryHyO6VElpC8IQNhhYacYsMyV65wC cndl8RrhZK1217dPrW6YXkTO6VtGN3i9WKzCvT4Ey3F0qbLYKQ9iTY8yiR7A2s06Lo33 YXlU3xsSURqu3I3Ubxg05rJ1Bp50JUQDJgMYrR7+RKgG1ThmjoM8O3DXy6JgBJVxzbIt e5jkgGhjw3BpBml7/KqBBidSx/GhS4LBLozX/eOwmJHdpcWcFdl4EncRUpHE8mFZ8npP 4B3A== X-Gm-Message-State: ACrzQf3S7B1yn1v2Sp3Auxo3rYidn8LK29OWJXgFTUmqhTw5T3K+JlQJ 8Dhs/XglzVqktDKgccv4R0dXYNgA6yo= X-Google-Smtp-Source: AMsMyM4pKfGdBvaeAGrqDGa4Q+3gGp1bHraBkcQjvKY4HPheZk6WeUzmJrD+smUyNX4cltbOhGNL/w== X-Received: by 2002:a05:6000:1882:b0:22a:f7a2:736a with SMTP id a2-20020a056000188200b0022af7a2736amr13930335wri.691.1664826205733; Mon, 03 Oct 2022 12:43:25 -0700 (PDT) Received: from localhost.localdomain ([46.216.9.29]) by smtp.googlemail.com with ESMTPSA id q5-20020a05600c2e4500b003b50428cf66sm12041663wmf.33.2022.10.03.12.43.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Oct 2022 12:43:25 -0700 (PDT) From: Dzmitry Sankouski To: linux-kernel@vger.kernel.org Cc: Dzmitry Sankouski , Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org (open list:ARM/QUALCOMM SUPPORT), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS) Subject: [PATCH v5 2/2] dt-bindings: arm: add xiaomi,sagit board based on msm8998 chip Date: Mon, 3 Oct 2022 22:43:15 +0300 Message-Id: <20221003194315.943903-3-dsankouski@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20221003194315.943903-1-dsankouski@gmail.com> References: <20221003194315.943903-1-dsankouski@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org add xiaomi,sagit board (Xiaomi Mi 6) binding Signed-off-by: Dzmitry Sankouski --- Changes for v5: none Documentation/devicetree/bindings/arm/qcom.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index fb1d00bcc847..294075bafb97 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -239,6 +239,7 @@ properties: - sony,xperia-lilac - sony,xperia-maple - sony,xperia-poplar + - xiaomi,sagit - const: qcom,msm8998 - items: