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[93.5.22.158]) by smtp.googlemail.com with ESMTPSA id k38-20020a05600c1ca600b003a3170a7af9sm2313758wms.4.2022.10.05.07.57.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 Oct 2022 07:57:40 -0700 (PDT) From: Alexandre Mergnat Date: Wed, 05 Oct 2022 16:57:21 +0200 Subject: [PATCH v2 1/5] dt-bindings: mfd: mt6397: add binding for MT6357 MIME-Version: 1.0 Message-Id: <20221005-mt6357-support-v2-1-f17ba2d2d0a9@baylibre.com> References: <20221005-mt6357-support-v2-0-f17ba2d2d0a9@baylibre.com> In-Reply-To: <20221005-mt6357-support-v2-0-f17ba2d2d0a9@baylibre.com> To: Lee Jones , Mark Brown , Matthias Brugger , Rob Herring , Liam Girdwood , Krzysztof Kozlowski , Dmitry Torokhov , Chen Zhong Cc: linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Rob Herring , linux-kernel@vger.kernel.org, linux-input@vger.kernel.org, Fabien Parent , Alexandre Mergnat X-Mailer: b4 0.10.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=882; i=amergnat@baylibre.com; h=from:subject:message-id; bh=uiI/lTRtppBO+0nDIciFuabIoTVXVizM4YxyzOA2AfE=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBjPZtiqsXNeSVNW2Je72n7QruLLMGxh+hxZPVvbf+4 5YOOY1WJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCYz2bYgAKCRArRkmdfjHURdebD/ 9RYcYBY/53YUJ9LuhhvvE86q5/Jf97d9LhIpsn8mrj4Wd9tkluXjGbeP/lYK+pQqcHIyRNJGPMTA09 a7JHSyUzS6VsVO51ZIrsWcFjA0HVjTN2unOsP27q6hFVJPDUfI6uviDZaT2KrV2cGJlGvyYNRvb+ml eiSkwsMqMPXon+1ht14uWBHaowVIINJ432/50NjfV34Z0e9xeUQmopUNeOVkstbEPvrd5OpfXTJIfm ad4mbAAU5Rh6aFQx/N/9zS7LPp+nu8orXEUqr+84VQRYalE4F6kF4TqjXcWvOXR3daihVfvYxjyVjm vurRVuxuKfOTBABlEmkV9BG2LjH2PxWZknp+RpDy9FC74DeB35Jy9ydWBzii/2Sol4ZewPIu1PiAQW c7IDx+Sr2qXVmdWNNZLMaK18l6aqWYKCmJ/FROxoDW+nvaJ777CD3dEiUNa/Dl1NGt2gv39d1Duk3b T4peNdtyAtEnaaZmRUEU3GCP9Npi3xDNiOZ4HT3r+xWbgNnd95W4+7Xg94mesZOFdamhi3s1ag8wP6 sRiZnYOLE/8QcNhkh/ckRYuxnucIGWKCdV1cv6qyFxgZ7McQytWq2SfLN2JNjkOBVDMF4cmxE55tqE t15U9Z7yo0D6LLd+PbrvC+lGenwl0d6K23EKsVx0W6vz3TAuJQzjKBJIcBiA== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 Precedence: bulk List-ID: X-Mailing-List: linux-input@vger.kernel.org From: Fabien Parent Add binding documentation for the MT6357 PMIC. Signed-off-by: Fabien Parent Signed-off-by: Alexandre Mergnat Acked-by: Rob Herring --- Documentation/devicetree/bindings/mfd/mt6397.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mfd/mt6397.txt b/Documentation/devicetree/bindings/mfd/mt6397.txt index 0088442efca1..518986c44880 100644 --- a/Documentation/devicetree/bindings/mfd/mt6397.txt +++ b/Documentation/devicetree/bindings/mfd/mt6397.txt @@ -21,6 +21,7 @@ Required properties: compatible: "mediatek,mt6323" for PMIC MT6323 "mediatek,mt6331" for PMIC MT6331 and MT6332 + "mediatek,mt6357" for PMIC MT6357 "mediatek,mt6358" for PMIC MT6358 and MT6366 "mediatek,mt6359" for PMIC MT6359 "mediatek,mt6397" for PMIC MT6397 From patchwork Wed Oct 5 14:57:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 12999329 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ACCBEC43217 for ; Wed, 5 Oct 2022 14:57:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230188AbiJEO5r (ORCPT ); Wed, 5 Oct 2022 10:57:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49126 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230169AbiJEO5p (ORCPT ); Wed, 5 Oct 2022 10:57:45 -0400 Received: from mail-wr1-x42b.google.com (mail-wr1-x42b.google.com [IPv6:2a00:1450:4864:20::42b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5E2A856BA5 for ; Wed, 5 Oct 2022 07:57:44 -0700 (PDT) Received: by mail-wr1-x42b.google.com with SMTP id j7so20989999wrr.3 for ; Wed, 05 Oct 2022 07:57:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date; bh=s+CLRBFlSL1ov10J+uevk8iYtEx5Lrr8EaQpxu9a9Lw=; b=4z/dLjviSn7zfqdTN/An5N64z93GP96nvU8QRIvaYA7odlZMjwUHVN6eNxxdrMPrTF zOsLFff+wqUSKIPA4wuRlkMFxK2E4/RZZH9F1mFy9dD6+/rPQa2MeZYYHiTcGggS7YEv ctp693yr5qI6oa4Njx1ye4WdADunUaSaFrKpT8nCZW/C0wW3ZPBFJBPPkk5orqKrpYXc 7PAgEciHcSO9UJrDjUY8VY7Irn/eA0r1la8im9xFi96VbTvxoCVGkEM+BnSfeVMcR6nG ayGpTe52F8676sFV6owNJ07xum0tjvkJ+IAvWh+BA7vXRJTiVZxxvzzKwW98bhJkJrIl UQXw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date; bh=s+CLRBFlSL1ov10J+uevk8iYtEx5Lrr8EaQpxu9a9Lw=; b=ANSS7PBmUBGAExeOV6fyFNBnHoDE5jdb/cmqAC+9I0RxjtqWg/orXr8aZ/yX1iFFVf GZLNTTgiVUFU5gn1YvFLCxdXnh07OcrRm0k7khYOrvHe9g0lh7h22VuFSMHQQ0vu4QsJ P2sSavcSe9CgV7sU7G+FSyu+RZcHJsG4Ybcpj5bc+Jco/na9Xj4ikBT6pwwhPLvoRxTB KM85E/JqKiaXnerMvK5byOX2szAjinfeCrVWTpsQNYBnjsR1/dpJseBlULb7rfur5nhw fXBUrURd8kbuBxT0lsSuWTXT520OOqB6VR4c0/L1OVsZgZLTKD6qCMqDuySLr5FTxUlp V64g== X-Gm-Message-State: ACrzQf0PnR/Y6aQ+J2EK1dmqrZzSERInXJL21LuCuYOlK7gJi0mbykWt GibAdGTwnMVISg71rqLN+TC1DQ== X-Google-Smtp-Source: AMsMyM4K9uNjIUEU5oRVePb9o4GJMjsAIa3NMyBDwIbvtm4ZY+x3YXOjJGnKtkk8Wpa5pBXt11tq4Q== X-Received: by 2002:a05:6000:144c:b0:22b:dda:eeb0 with SMTP id v12-20020a056000144c00b0022b0ddaeeb0mr73656wrx.335.1664981862771; Wed, 05 Oct 2022 07:57:42 -0700 (PDT) Received: from [127.0.1.1] (158.22.5.93.rev.sfr.net. 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Signed-off-by: Fabien Parent Signed-off-by: Alexandre Mergnat Acked-by: Rob Herring Acked-by: Dmitry Torokhov --- Documentation/devicetree/bindings/input/mediatek,pmic-keys.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/input/mediatek,pmic-keys.yaml b/Documentation/devicetree/bindings/input/mediatek,pmic-keys.yaml index 2f72ec418415..037c3ae9f1c3 100644 --- a/Documentation/devicetree/bindings/input/mediatek,pmic-keys.yaml +++ b/Documentation/devicetree/bindings/input/mediatek,pmic-keys.yaml @@ -26,6 +26,7 @@ properties: enum: - mediatek,mt6323-keys - mediatek,mt6331-keys + - mediatek,mt6357-keys - mediatek,mt6358-keys - mediatek,mt6397-keys From patchwork Wed Oct 5 14:57:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 12999330 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3FD91C4332F for ; Wed, 5 Oct 2022 14:57:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230219AbiJEO5u (ORCPT ); Wed, 5 Oct 2022 10:57:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49182 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230196AbiJEO5s (ORCPT ); Wed, 5 Oct 2022 10:57:48 -0400 Received: from mail-wr1-x42f.google.com (mail-wr1-x42f.google.com [IPv6:2a00:1450:4864:20::42f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CE1705726D for ; Wed, 5 Oct 2022 07:57:45 -0700 (PDT) Received: by mail-wr1-x42f.google.com with SMTP id j7so20990096wrr.3 for ; Wed, 05 Oct 2022 07:57:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date; bh=NMBKaD9Twna7IpylLh1Pii+0NHq3Tt+1dQSxsHPnhnI=; b=Hst2MvqV8VevRzE3etMrA6kSMfvgIuiAfaCynzE7IkR9Io0HI8lg7bUg63JfYMWEkK nPO6tiMwmli6JyRLLt0zoF/wdCk3RP14rzZQ3EGaY+NK1Xo88qkhgedjnLlqUqi+Q6xo AkiKqHTmA5awgOAyJxWwdep5tgd3e80NShEstqKqyZt8WbF8gUec//oD+yoqyT9jeMxR BNPWd9JAJiHkJx2Y3dylQmpEkpjIbaOBP0XleP9d1ifAEaehTXUzZszRIaLM8Dju5Ovr tRzEfCSKSPK3NNudofh+2LOo5vLA2tBDXv8c0R9Ssx/XnRvAyBzKomhAPVkIzDTeU15H s98A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date; bh=NMBKaD9Twna7IpylLh1Pii+0NHq3Tt+1dQSxsHPnhnI=; b=kDz506tbkdl/7OroUjTQXtxpAsycIXjzQYN4lJ+LaTDrS4Osc+loWpBcfPThoFvekh RJnJiW6mXTEmMCysEK55e4NtPqtS776b4xOp4VTn/Rq6wQLhBXVAh+uEOFDcz06v7Oxv a6glUocnwkra01JPyDvUriqLsr56WAb300qisuFmvc2jb6vJ2zBUR/At9/rJp1P1R+v8 DzIdRbVc/e+Jjp6e3DiUeKdpsaxReUuu1URELjLJ6KbfwT5jfjGDeUACO0zB/0zGqO6M NBXmo0siMFXpmzfWlsm2v/KN5JC7BiEFF2dSYzg2ysT3Ol0KArMK9GmvpLVHcjhQuY3y KGLA== X-Gm-Message-State: ACrzQf1OA7EkL05uJtqfK0HNmL781hP0kUq5gX4+N3TZwmDUFzDx97Vv IeWPpn2MfpgMs8cFhkq3AP2Xmw== X-Google-Smtp-Source: AMsMyM7PsaiJ6VUmwuOx5ZbJ3KP9mS1WG5DE6w4IVyMiekbda0EK5DLj4DlYpim3B+Fi+gXq5Q1BCQ== X-Received: by 2002:a05:6000:2a3:b0:226:dff3:b031 with SMTP id l3-20020a05600002a300b00226dff3b031mr63751wry.495.1664981863950; Wed, 05 Oct 2022 07:57:43 -0700 (PDT) Received: from [127.0.1.1] (158.22.5.93.rev.sfr.net. [93.5.22.158]) by smtp.googlemail.com with ESMTPSA id k38-20020a05600c1ca600b003a3170a7af9sm2313758wms.4.2022.10.05.07.57.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 Oct 2022 07:57:43 -0700 (PDT) From: Alexandre Mergnat Date: Wed, 05 Oct 2022 16:57:23 +0200 Subject: [PATCH v2 3/5] dt-bindings: regulator: Add binding schema for mt6357 regulators MIME-Version: 1.0 Message-Id: <20221005-mt6357-support-v2-3-f17ba2d2d0a9@baylibre.com> References: <20221005-mt6357-support-v2-0-f17ba2d2d0a9@baylibre.com> In-Reply-To: <20221005-mt6357-support-v2-0-f17ba2d2d0a9@baylibre.com> To: Lee Jones , Mark Brown , Matthias Brugger , Rob Herring , Liam Girdwood , Krzysztof Kozlowski , Dmitry Torokhov , Chen Zhong Cc: linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Rob Herring , linux-kernel@vger.kernel.org, linux-input@vger.kernel.org, Fabien Parent , Alexandre Mergnat X-Mailer: b4 0.10.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=11067; i=amergnat@baylibre.com; h=from:subject:message-id; bh=Pf7gUUCDiv8w5usm43co0Y+0T3FAWUVmGhPRNAVLSaA=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBjPZtin1UVLC8DUs0zxbpYgrYJ2HRGTyfHMukneGVc 1+lkXGyJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCYz2bYgAKCRArRkmdfjHURXTUEA CBH/ywLdtM7OzUVWzude0dzpseK3dSzpwAdtf+0pqFHTHp8l19WEGI+RCEQ0KmmgdSpsQFZuIcxcz6 Nlg+tbWlerIVP8gBKWe1HAnswK3miNF1CmWd+8cWhrFIX0L6/OnFExdQfh2rs1ZZPLbTk5yosmnWYU nU5anB1h6OMK2p1DHZdacn8hy+6td0SfyqKxADu78mK0LBX6KrFrFdQvjkzBpqXpN9di1rNJFGICq+ vst1TP66ytgUEHkYWlOTTfrSvy9xTWcmDTP1HTm3Kj3C5Tff/7kJ80DK+odfe46amJERvWtJAX6zxm PkZijjH+hh1xflLih99pUthdD6uRXRlGfeQ1zMSm0bvIJfC3eMMSl/priZGC4JV+Ju1+ysEgQ1sJDy T9OqMMaAPmVlZj24rmJpPOsNfFN1IMkLFDnb39M5hJD3M3IkkJq2dSSLIApMll8stZyYhDSBo31hja hxpdBheGpbGXJ6jt3BIsgKQsymBktpRBpFIGFRKTYbBnL4xZncVmUjhvtCuZN9n6TkSYPlnxY91zLS c08YU8AKazCUFmIKayMdAZwR0lEPRtOEm0gOg5sutLa6AJqklInog/3Zotp26rF5el1Ig+F4WX8lFH 9LLOz5No03XzJnBA4T3JMYl47R3DV3Ssx5BsUvBx+UOICrKCCvjFve7bUoCA== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 Precedence: bulk List-ID: X-Mailing-List: linux-input@vger.kernel.org From: Fabien Parent Add YAML schema for the MediaTek MT6357 regulators. Signed-off-by: Fabien Parent Signed-off-by: Alexandre Mergnat --- .../regulator/mediatek,mt6357-regulator.yaml | 284 +++++++++++++++++++++ 1 file changed, 284 insertions(+) diff --git a/Documentation/devicetree/bindings/regulator/mediatek,mt6357-regulator.yaml b/Documentation/devicetree/bindings/regulator/mediatek,mt6357-regulator.yaml new file mode 100644 index 000000000000..83ce2cf287dd --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/mediatek,mt6357-regulator.yaml @@ -0,0 +1,284 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/mediatek,mt6357-regulator.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek MT6357 Regulators + +maintainers: + - Fabien Parent + - Alexandre Mergnat + +description: | + The MT6357 PMIC provides 5 BUCK and 29 LDO. + Regulators and nodes are named according to the regulator type: + buck- and ldo-. + MT6357 regulators node should be sub node of the MT6397 MFD node. + +patternProperties: + "^buck-v(core|modem|pa|proc|s1)$": + type: object + $ref: "regulator.yaml#" + + properties: + regulator-name: + pattern: "^v(core|modem|pa|proc|s1)$" + + unevaluatedProperties: false + + "^ldo-v(aud28|aux18|cama|camd|cn18|cn28|cn33-bt|cn33-wifi|dram)$": + type: object + $ref: "regulator.yaml#" + + properties: + regulator-name: + pattern: "^v(aud28|aux18|cama|camd|cn18|cn28|cn33-bt|cn33-wifi|dram)$" + + unevaluatedProperties: false + + "^ldo-v(efuse|emc|ibr|io18|io28|ldo28|mch|rf12|rf18)$": + type: object + $ref: "regulator.yaml#" + + properties: + regulator-name: + pattern: "^v(efuse|emc|ibr|io18|io28|ldo28|mch|rf12|rf18)$" + + unevaluatedProperties: false + + "^ldo-v(xo22|sim1,sim2|sram-others|sram-proc|usb33|xo22)$": + type: object + $ref: "regulator.yaml#" + + properties: + regulator-name: + pattern: "^v(xo22|sim1,sim2|sram-others|sram-proc|usb33|xo22)$" + + unevaluatedProperties: false + +additionalProperties: false + +examples: + - | + pmic { + regulators { + mt6357_vproc_reg: buck-vproc { + regulator-name = "vproc"; + regulator-min-microvolt = <518750>; + regulator-max-microvolt = <1312500>; + regulator-ramp-delay = <6250>; + regulator-enable-ramp-delay = <220>; + regulator-always-on; + }; + mt6357_vcore_reg: buck-vcore { + regulator-name = "vcore"; + regulator-min-microvolt = <518750>; + regulator-max-microvolt = <1312500>; + regulator-ramp-delay = <6250>; + regulator-enable-ramp-delay = <220>; + regulator-always-on; + }; + mt6357_vmodem_reg: buck-vmodem { + regulator-name = "vmodem"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1193750>; + regulator-ramp-delay = <6250>; + regulator-enable-ramp-delay = <220>; + }; + mt6357_vs1_reg: buck-vs1 { + regulator-name = "vs1"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <2200000>; + regulator-ramp-delay = <12500>; + regulator-enable-ramp-delay = <220>; + regulator-always-on; + }; + mt6357_vpa_reg: buck-vpa { + regulator-name = "vpa"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3650000>; + regulator-ramp-delay = <50000>; + regulator-enable-ramp-delay = <220>; + }; + mt6357_vfe28_reg: ldo-vfe28 { + compatible = "regulator-fixed"; + regulator-name = "vfe28"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <264>; + }; + mt6357_vxo22_reg: ldo-vxo22 { + regulator-name = "vxo22"; + regulator-min-microvolt = <2200000>; + regulator-max-microvolt = <2400000>; + regulator-enable-ramp-delay = <110>; + }; + mt6357_vrf18_reg: ldo-vrf18 { + compatible = "regulator-fixed"; + regulator-name = "vrf18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <110>; + }; + mt6357_vrf12_reg: ldo-vrf12 { + compatible = "regulator-fixed"; + regulator-name = "vrf12"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-enable-ramp-delay = <110>; + }; + mt6357_vefuse_reg: ldo-vefuse { + regulator-name = "vefuse"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <264>; + }; + mt6357_vcn33_bt_reg: ldo-vcn33-bt { + regulator-name = "vcn33-bt"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3500000>; + regulator-enable-ramp-delay = <264>; + }; + mt6357_vcn33_wifi_reg: ldo-vcn33-wifi { + regulator-name = "vcn33-wifi"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3500000>; + regulator-enable-ramp-delay = <264>; + }; + mt6357_vcn28_reg: ldo-vcn28 { + compatible = "regulator-fixed"; + regulator-name = "vcn28"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <264>; + }; + mt6357_vcn18_reg: ldo-vcn18 { + compatible = "regulator-fixed"; + regulator-name = "vcn18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <264>; + }; + mt6357_vcama_reg: ldo-vcama { + regulator-name = "vcama"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <264>; + }; + mt6357_vcamd_reg: ldo-vcamd { + regulator-name = "vcamd"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <264>; + }; + mt6357_vcamio_reg: ldo-vcamio18 { + compatible = "regulator-fixed"; + regulator-name = "vcamio"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <264>; + }; + mt6357_vldo28_reg: ldo-vldo28 { + regulator-name = "vldo28"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <3000000>; + regulator-enable-ramp-delay = <264>; + }; + mt6357_vsram_others_reg: ldo-vsram-others { + regulator-name = "vsram-others"; + regulator-min-microvolt = <518750>; + regulator-max-microvolt = <1312500>; + regulator-ramp-delay = <6250>; + regulator-enable-ramp-delay = <110>; + regulator-always-on; + }; + mt6357_vsram_proc_reg: ldo-vsram-proc { + regulator-name = "vsram-proc"; + regulator-min-microvolt = <518750>; + regulator-max-microvolt = <1312500>; + regulator-ramp-delay = <6250>; + regulator-enable-ramp-delay = <110>; + regulator-always-on; + }; + mt6357_vaux18_reg: ldo-vaux18 { + compatible = "regulator-fixed"; + regulator-name = "vaux18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <264>; + }; + mt6357_vaud28_reg: ldo-vaud28 { + compatible = "regulator-fixed"; + regulator-name = "vaud28"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <264>; + }; + mt6357_vio28_reg: ldo-vio28 { + compatible = "regulator-fixed"; + regulator-name = "vio28"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <264>; + }; + mt6357_vio18_reg: ldo-vio18 { + compatible = "regulator-fixed"; + regulator-name = "vio18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <264>; + regulator-always-on; + }; + mt6357_vdram_reg: ldo-vdram { + regulator-name = "vdram"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1200000>; + regulator-enable-ramp-delay = <3300>; + }; + mt6357_vmc_reg: ldo-vmc { + regulator-name = "vmc"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <44>; + }; + mt6357_vmch_reg: ldo-vmch { + regulator-name = "vmch"; + regulator-min-microvolt = <2900000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <44>; + }; + mt6357_vemc_reg: ldo-vemc { + regulator-name = "vemc"; + regulator-min-microvolt = <2900000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <44>; + regulator-always-on; + }; + mt6357_vsim1_reg: ldo-vsim1 { + regulator-name = "vsim1"; + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <3100000>; + regulator-enable-ramp-delay = <264>; + }; + mt6357_vsim2_reg: ldo-vsim2 { + regulator-name = "vsim2"; + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <3100000>; + regulator-enable-ramp-delay = <264>; + }; + mt6357_vibr_reg: ldo-vibr { + regulator-name = "vibr"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <44>; + }; + mt6357_vusb33_reg: ldo-vusb33 { + regulator-name = "vusb33"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3100000>; + regulator-enable-ramp-delay = <264>; + }; + }; + }; +... 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[93.5.22.158]) by smtp.googlemail.com with ESMTPSA id k38-20020a05600c1ca600b003a3170a7af9sm2313758wms.4.2022.10.05.07.57.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 Oct 2022 07:57:44 -0700 (PDT) From: Alexandre Mergnat Date: Wed, 05 Oct 2022 16:57:24 +0200 Subject: [PATCH v2 4/5] regulator: add mt6357 regulator MIME-Version: 1.0 Message-Id: <20221005-mt6357-support-v2-4-f17ba2d2d0a9@baylibre.com> References: <20221005-mt6357-support-v2-0-f17ba2d2d0a9@baylibre.com> In-Reply-To: <20221005-mt6357-support-v2-0-f17ba2d2d0a9@baylibre.com> To: Lee Jones , Mark Brown , Matthias Brugger , Rob Herring , Liam Girdwood , Krzysztof Kozlowski , Dmitry Torokhov , Chen Zhong Cc: linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Rob Herring , linux-kernel@vger.kernel.org, linux-input@vger.kernel.org, Fabien Parent , Alexandre Mergnat X-Mailer: b4 0.10.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=16868; i=amergnat@baylibre.com; h=from:subject:message-id; bh=7m89e7rgerIPtJUkEwKURLiggz85Nh8CJoiONbInp/w=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBjPZtiENgNxuuF2yW4Fl3jCMyRN8eD/t07xLWPy2b7 +++IjNiJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCYz2bYgAKCRArRkmdfjHURQ5VD/ 0YWw788pdQlUinJS0kO5iTi5m7W7CZGSZJ+GQgA5MY1YwPowx0Rou5gTIn7FYjb3Hxo58DYi5bNmr8 NHnyOhZ3L3piBFoZqRjftMMKNQ9Lqeg0PwYU7g6abJAYoFzIGps8A6bznlEZ52edb78ypMSWBuHXKg Ifp2/cHStSZ9fwOLVBxviTVrLwhn7xi9HQ3ibKk9heBXBphdd4pvoSwveIk6sVq4yMSIrdf3DmxLPY 0FbNmRJqyG2N7Z+z2ixi5aBbn3xwQ9pWED+oJDeU0FXI4hELgEz4Xpm3dM4tOVrHkcGX3IFA6Ct5gM o2lmuYlV86ewUe5aJY3fn4H3f3RAmgYAnwWgPVDNrIAp/dBur4QGwtoVap5bM1z3ruUnbR35Km4z5K nXJbQnhLo8K4OeUL7hHCjeviRLf05G797iS8sP6G7q3s0UAIdfRKyqQYIlt+mYRvUhbMVJuIxnVUmn SYp2yoR3d6YEfhfGC6QT3IzLcltIqE9Np3s8w8sUKgvk49g3pEG+j6S+UU1Sa0jdPAETFZpdZP/DqJ X12ZEer7kMCZpZodOAyK84aOrbStsvP24PdsWsc93KOb6ybaU6L6udNyAKkshrwJWe5r6bbL3nu1NX Vuh3xlvWrWRL9jqkjlzqD1LJZdARZTlqzWpVBM+ZWiZ+JDqtJ83yxtDheeRw== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 Precedence: bulk List-ID: X-Mailing-List: linux-input@vger.kernel.org From: Fabien Parent Add regulator driver for the MT6357 PMIC. Signed-off-by: Fabien Parent Signed-off-by: Alexandre Mergnat --- drivers/regulator/Kconfig | 9 + drivers/regulator/Makefile | 1 + drivers/regulator/mt6357-regulator.c | 485 +++++++++++++++++++++++++++++ include/linux/regulator/mt6357-regulator.h | 51 +++ 4 files changed, 546 insertions(+) diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig index 070e4403c6c2..a659a57438f4 100644 --- a/drivers/regulator/Kconfig +++ b/drivers/regulator/Kconfig @@ -805,6 +805,15 @@ config REGULATOR_MT6332 This driver supports the control of different power rails of device through regulator interface +config REGULATOR_MT6357 + tristate "MediaTek MT6357 PMIC" + depends on MFD_MT6397 + help + Say y here to select this option to enable the power regulator of + MediaTek MT6357 PMIC. + This driver supports the control of different power rails of device + through regulator interface. + config REGULATOR_MT6358 tristate "MediaTek MT6358 PMIC" depends on MFD_MT6397 diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile index 5962307e1130..e4d67b7b1af6 100644 --- a/drivers/regulator/Makefile +++ b/drivers/regulator/Makefile @@ -97,6 +97,7 @@ obj-$(CONFIG_REGULATOR_MT6315) += mt6315-regulator.o obj-$(CONFIG_REGULATOR_MT6323) += mt6323-regulator.o obj-$(CONFIG_REGULATOR_MT6331) += mt6331-regulator.o obj-$(CONFIG_REGULATOR_MT6332) += mt6332-regulator.o +obj-$(CONFIG_REGULATOR_MT6357) += mt6357-regulator.o obj-$(CONFIG_REGULATOR_MT6358) += mt6358-regulator.o obj-$(CONFIG_REGULATOR_MT6359) += mt6359-regulator.o obj-$(CONFIG_REGULATOR_MT6360) += mt6360-regulator.o diff --git a/drivers/regulator/mt6357-regulator.c b/drivers/regulator/mt6357-regulator.c new file mode 100644 index 000000000000..4ecd41429448 --- /dev/null +++ b/drivers/regulator/mt6357-regulator.c @@ -0,0 +1,485 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright (c) 2022 MediaTek Inc. +// Copyright (c) 2022 BayLibre, SAS. +// Author: Chen Zhong +// Author: Fabien Parent +// +// Based on mt6397-regulator.c +// + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * MT6357 regulators' information + * + * @desc: standard fields of regulator description. + * @vselon_reg: Register sections for hardware control mode of bucks + * @vselctrl_reg: Register for controlling the buck control mode. + * @vselctrl_mask: Mask for query buck's voltage control mode. + */ +struct mt6357_regulator_info { + struct regulator_desc desc; + const u32 *index_table; + unsigned int n_table; + u32 vsel_shift; + u32 da_vsel_reg; + u32 da_vsel_mask; + u32 da_vsel_shift; +}; + +#define MT6357_BUCK(match, vreg, min, max, step, \ + volt_ranges, vosel_reg, vosel_mask, _da_vsel_mask) \ +[MT6357_ID_##vreg] = { \ + .desc = { \ + .name = #vreg, \ + .of_match = of_match_ptr(match), \ + .regulators_node = "regulators", \ + .ops = &mt6357_volt_range_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6357_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = ((max) - (min)) / (step) + 1, \ + .linear_ranges = volt_ranges, \ + .n_linear_ranges = ARRAY_SIZE(volt_ranges), \ + .vsel_reg = vosel_reg, \ + .vsel_mask = vosel_mask, \ + .enable_reg = MT6357_BUCK_##vreg##_CON0, \ + .enable_mask = BIT(0), \ + }, \ + .da_vsel_reg = MT6357_BUCK_##vreg##_DBG0, \ + .da_vsel_mask = vosel_mask, \ + .da_vsel_shift = 0, \ +} + +#define MT6357_LDO(match, vreg, ldo_volt_table, \ + ldo_index_table, enreg, vosel, \ + vosel_mask) \ +[MT6357_ID_##vreg] = { \ + .desc = { \ + .name = #vreg, \ + .of_match = of_match_ptr(match), \ + .regulators_node = "regulators", \ + .ops = &mt6357_volt_table_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6357_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = ARRAY_SIZE(ldo_volt_table), \ + .volt_table = ldo_volt_table, \ + .vsel_reg = vosel, \ + .vsel_mask = vosel_mask << 8, \ + .enable_reg = enreg, \ + .enable_mask = BIT(0), \ + }, \ + .index_table = ldo_index_table, \ + .n_table = ARRAY_SIZE(ldo_index_table), \ +} + +#define MT6357_LDO1(match, vreg, min, max, step, volt_ranges, \ + enreg, vosel, vosel_mask) \ +[MT6357_ID_##vreg] = { \ + .desc = { \ + .name = #vreg, \ + .of_match = of_match_ptr(match), \ + .regulators_node = "regulators", \ + .ops = &mt6357_volt_range_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6357_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = ((max) - (min)) / (step) + 1, \ + .linear_ranges = volt_ranges, \ + .n_linear_ranges = ARRAY_SIZE(volt_ranges), \ + .vsel_reg = vosel, \ + .vsel_mask = vosel_mask, \ + .enable_reg = enreg, \ + .enable_mask = BIT(0), \ + }, \ + .da_vsel_reg = MT6357_LDO_##vreg##_DBG0, \ + .da_vsel_mask = 0x7f, \ + .da_vsel_shift = 8, \ +} + +#define MT6357_REG_FIXED(match, vreg, volt) \ +[MT6357_ID_##vreg] = { \ + .desc = { \ + .name = #vreg, \ + .of_match = of_match_ptr(match), \ + .regulators_node = "regulators", \ + .ops = &mt6357_volt_fixed_ops, \ + .type = REGULATOR_VOLTAGE, \ + .id = MT6357_ID_##vreg, \ + .owner = THIS_MODULE, \ + .n_voltages = 1, \ + .enable_reg = MT6357_LDO_##vreg##_CON0, \ + .enable_mask = BIT(0), \ + .min_uV = volt, \ + }, \ +} + +static int mt6357_set_voltage_sel(struct regulator_dev *rdev, + unsigned int selector) +{ + int idx, ret; + const u32 *pvol; + struct mt6357_regulator_info *info = rdev_get_drvdata(rdev); + + pvol = info->index_table; + + idx = pvol[selector]; + ret = regmap_update_bits(rdev->regmap, info->desc.vsel_reg, + info->desc.vsel_mask, + idx << 8); + + return ret; +} + +static int mt6357_get_voltage_sel(struct regulator_dev *rdev) +{ + int idx, ret; + u32 selector; + struct mt6357_regulator_info *info = rdev_get_drvdata(rdev); + const u32 *pvol; + + ret = regmap_read(rdev->regmap, info->desc.vsel_reg, &selector); + if (ret != 0) { + dev_info(&rdev->dev, + "Failed to get mt6357 %s vsel reg: %d\n", + info->desc.name, ret); + return ret; + } + + selector = (selector & info->desc.vsel_mask) >> 8; + pvol = info->index_table; + for (idx = 0; idx < info->desc.n_voltages; idx++) { + if (pvol[idx] == selector) + return idx; + } + + return -EINVAL; +} + +static int mt6357_get_buck_voltage_sel(struct regulator_dev *rdev) +{ + int ret, regval; + struct mt6357_regulator_info *info = rdev_get_drvdata(rdev); + + ret = regmap_read(rdev->regmap, info->da_vsel_reg, ®val); + if (ret != 0) { + dev_err(&rdev->dev, + "Failed to get mt6357 Buck %s vsel reg: %d\n", + info->desc.name, ret); + return ret; + } + + ret = (regval & info->da_vsel_mask) >> info->da_vsel_shift; + + return ret; +} + +static const struct regulator_ops mt6357_volt_range_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = mt6357_get_buck_voltage_sel, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +static const struct regulator_ops mt6357_volt_table_ops = { + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_iterate, + .set_voltage_sel = mt6357_set_voltage_sel, + .get_voltage_sel = mt6357_get_voltage_sel, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +static const struct regulator_ops mt6357_volt_fixed_ops = { + .list_voltage = regulator_list_voltage_linear, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +static const int vxo22_voltages[] = { + 2200000, + 2400000, +}; + +static const int vefuse_voltages[] = { + 1200000, + 1300000, + 1500000, + 1800000, + 2800000, + 2900000, + 3000000, + 3300000, +}; + +static const int vcn33_voltages[] = { + 3300000, + 3400000, + 3500000, +}; + +static const int vcama_voltages[] = { + 2500000, + 2800000, +}; + +static const int vcamd_voltages[] = { + 1000000, + 1100000, + 1200000, + 1300000, + 1500000, + 1800000, +}; + +static const int vldo28_voltages[] = { + 2800000, + 3000000, +}; + +static const int vdram_voltages[] = { + 1100000, + 1200000, +}; + +static const int vsim_voltages[] = { + 1700000, + 1800000, + 2700000, + 3000000, + 3100000, +}; + +static const int vibr_voltages[] = { + 1200000, + 1300000, + 1500000, + 1800000, + 2000000, + 2800000, + 3000000, + 3300000, +}; + +static const int vmc_voltages[] = { + 1800000, + 2900000, + 3000000, + 3300000, +}; + +static const int vmch_voltages[] = { + 2900000, + 3000000, + 3300000, +}; + +static const int vemc_voltages[] = { + 2900000, + 3000000, + 3300000, +}; + +static const int vusb_voltages[] = { + 3000000, + 3100000, +}; + +static const int vmc_idx[] = { + 4, 10, 11, 13, +}; + +static const int vmch_idx[] = { + 2, 3, 5, +}; + +static const int vemc_idx[] = { + 2, 3, 5, +}; + +static const int vusb_idx[] = { + 3, 4, +}; + +static const int vxo22_idx[] = { + 0, 2, +}; + +static const int vefuse_idx[] = { + 0, 1, 2, 4, 9, 10, 11, 13, +}; + +static const int vcn33_idx[] = { + 1, 2, 3, +}; + +static const int vcama_idx[] = { + 7, 10, +}; + +static const int vcamd_idx[] = { + 4, 5, 6, 7, 9, 12, +}; + +static const int vldo28_idx[] = { + 1, 3, +}; + +static const int vdram_idx[] = { + 1, 2, +}; + +static const int vsim_idx[] = { + 3, 4, 8, 11, 12, +}; + +static const int vibr_idx[] = { + 0, 1, 2, 4, 5, 9, 11, 13, +}; + +static const struct linear_range buck_volt_range1[] = { + REGULATOR_LINEAR_RANGE(518750, 0, 0x7f, 6250), +}; + +static const struct linear_range buck_volt_range2[] = { + REGULATOR_LINEAR_RANGE(500000, 0, 0x7f, 6250), +}; + +static const struct linear_range buck_volt_range3[] = { + REGULATOR_LINEAR_RANGE(500000, 0, 0x3f, 50000), +}; + +static const struct linear_range buck_volt_range4[] = { + REGULATOR_LINEAR_RANGE(1200000, 0, 0x7f, 12500), +}; + +/* The array is indexed by id(MT6357_ID_XXX) */ +static struct mt6357_regulator_info mt6357_regulators[] = { + /* Bucks */ + MT6357_BUCK("buck-vcore", VCORE, 518750, 1312500, 6250, + buck_volt_range1, MT6357_BUCK_VCORE_ELR0, 0x7f, 0x7f), + MT6357_BUCK("buck-vproc", VPROC, 518750, 1312500, 6250, + buck_volt_range1, MT6357_BUCK_VPROC_ELR0, 0x7f, 0x7f), + MT6357_BUCK("buck-vmodem", VMODEM, 500000, 1293750, 6250, + buck_volt_range2, MT6357_BUCK_VMODEM_ELR0, 0x7f, 0x7f), + MT6357_BUCK("buck-vpa", VPA, 500000, 3650000, 50000, + buck_volt_range3, MT6357_BUCK_VPA_CON1, 0x3f, 0x3f), + MT6357_BUCK("buck-vs1", VS1, 1200000, 2787500, 12500, + buck_volt_range4, MT6357_BUCK_VS1_ELR0, 0x7f, 0x7f), + + /* LDOs */ + MT6357_LDO("ldo-vcama", VCAMA, vcama_voltages, vcama_idx, + MT6357_LDO_VCAMA_CON0, MT6357_VCAMA_ANA_CON0, 0xf), + MT6357_LDO("ldo-vcamd", VCAMD, vcamd_voltages, vcamd_idx, + MT6357_LDO_VCAMD_CON0, MT6357_VCAMD_ANA_CON0, 0xf), + MT6357_LDO("ldo-vcn33-bt", VCN33_BT, vcn33_voltages, vcn33_idx, + MT6357_LDO_VCN33_CON0_0, MT6357_VCN33_ANA_CON0, 0x3), + MT6357_LDO("ldo-vcn33-wifi", VCN33_WIFI, vcn33_voltages, vcn33_idx, + MT6357_LDO_VCN33_CON0_1, MT6357_VCN33_ANA_CON0, 0x3), + MT6357_LDO("ldo-vdram", VDRAM, vdram_voltages, vdram_idx, + MT6357_LDO_VDRAM_CON0, MT6357_VDRAM_ELR_2, 0x3), + MT6357_LDO("ldo-vefuse", VEFUSE, vefuse_voltages, vefuse_idx, + MT6357_LDO_VEFUSE_CON0, MT6357_VEFUSE_ANA_CON0, 0xf), + MT6357_LDO("ldo-vemc", VEMC, vemc_voltages, vemc_idx, + MT6357_LDO_VEMC_CON0, MT6357_VEMC_ANA_CON0, 0x7), + MT6357_LDO("ldo-vibr", VIBR, vibr_voltages, vibr_idx, + MT6357_LDO_VIBR_CON0, MT6357_VIBR_ANA_CON0, 0xf), + MT6357_LDO("ldo-vldo28", VLDO28, vldo28_voltages, vldo28_idx, + MT6357_LDO_VLDO28_CON0_0, MT6357_VLDO28_ANA_CON0, 0x3), + MT6357_LDO("ldo-vmc", VMC, vmc_voltages, vmc_idx, + MT6357_LDO_VMC_CON0, MT6357_VMC_ANA_CON0, 0xf), + MT6357_LDO("ldo-vmch", VMCH, vmch_voltages, vmch_idx, + MT6357_LDO_VMCH_CON0, MT6357_VMCH_ANA_CON0, 0x7), + MT6357_LDO("ldo-vsim1", VSIM1, vsim_voltages, vsim_idx, + MT6357_LDO_VSIM1_CON0, MT6357_VSIM1_ANA_CON0, 0xf), + MT6357_LDO("ldo-vsim2", VSIM2, vsim_voltages, vsim_idx, + MT6357_LDO_VSIM2_CON0, MT6357_VSIM2_ANA_CON0, 0xf), + MT6357_LDO("ldo-vusb33", VUSB33, vusb_voltages, vusb_idx, + MT6357_LDO_VUSB33_CON0_0, MT6357_VUSB33_ANA_CON0, 0x7), + MT6357_LDO("ldo-vxo22", VXO22, vxo22_voltages, vxo22_idx, + MT6357_LDO_VXO22_CON0, MT6357_VXO22_ANA_CON0, 0x3), + + MT6357_LDO1("ldo-vsram-proc", VSRAM_PROC, 518750, 1312500, 6250, + buck_volt_range1, MT6357_LDO_VSRAM_PROC_CON0, + MT6357_LDO_VSRAM_CON0, 0x7f), + MT6357_LDO1("ldo-vsram-others", VSRAM_OTHERS, 518750, 1312500, 6250, + buck_volt_range1, MT6357_LDO_VSRAM_OTHERS_CON0, + MT6357_LDO_VSRAM_CON1, 0x7f), + + MT6357_REG_FIXED("ldo-vaud28", VAUD28, 2800000), + MT6357_REG_FIXED("ldo-vaux18", VAUX18, 1800000), + MT6357_REG_FIXED("ldo-vcamio18", VCAMIO, 1800000), + MT6357_REG_FIXED("ldo-vcn18", VCN18, 1800000), + MT6357_REG_FIXED("ldo-vcn28", VCN28, 2800000), + MT6357_REG_FIXED("ldo-vfe28", VFE28, 2800000), + MT6357_REG_FIXED("ldo-vio18", VIO18, 1800000), + MT6357_REG_FIXED("ldo-vio28", VIO28, 2800000), + MT6357_REG_FIXED("ldo-vrf12", VRF12, 1200000), + MT6357_REG_FIXED("ldo-vrf18", VRF18, 1800000), +}; + +static int mt6357_regulator_probe(struct platform_device *pdev) +{ + struct mt6397_chip *mt6357 = dev_get_drvdata(pdev->dev.parent); + struct regulator_config config = {}; + struct regulator_dev *rdev; + int i; + + pdev->dev.of_node = pdev->dev.parent->of_node; + + for (i = 0; i < MT6357_MAX_REGULATOR; i++) { + config.dev = &pdev->dev; + config.driver_data = &mt6357_regulators[i]; + config.regmap = mt6357->regmap; + + rdev = devm_regulator_register(&pdev->dev, + &mt6357_regulators[i].desc, + &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, "failed to register %s\n", + mt6357_regulators[i].desc.name); + return PTR_ERR(rdev); + } + } + + return 0; +} + +static const struct platform_device_id mt6357_platform_ids[] = { + { "mt6357-regulator" }, + { /* sentinel */ }, +}; +MODULE_DEVICE_TABLE(platform, mt6357_platform_ids); + +static struct platform_driver mt6357_regulator_driver = { + .driver = { + .name = "mt6357-regulator", + }, + .probe = mt6357_regulator_probe, + .id_table = mt6357_platform_ids, +}; + +module_platform_driver(mt6357_regulator_driver); + +MODULE_AUTHOR("Fabien Parent "); +MODULE_DESCRIPTION("Regulator Driver for MediaTek MT6357 PMIC"); +MODULE_LICENSE("GPL"); diff --git a/include/linux/regulator/mt6357-regulator.h b/include/linux/regulator/mt6357-regulator.h new file mode 100644 index 000000000000..238b1ee77ea6 --- /dev/null +++ b/include/linux/regulator/mt6357-regulator.h @@ -0,0 +1,51 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2022 MediaTek Inc. + */ + +#ifndef __LINUX_REGULATOR_MT6357_H +#define __LINUX_REGULATOR_MT6357_H + +enum { + /* Bucks */ + MT6357_ID_VCORE, + MT6357_ID_VMODEM, + MT6357_ID_VPA, + MT6357_ID_VPROC, + MT6357_ID_VS1, + + /* LDOs */ + MT6357_ID_VAUX18, + MT6357_ID_VAUD28, + MT6357_ID_VCAMA, + MT6357_ID_VCAMD, + MT6357_ID_VCAMIO, + MT6357_ID_VCN18, + MT6357_ID_VCN28, + MT6357_ID_VCN33_BT, + MT6357_ID_VCN33_WIFI, + MT6357_ID_VDRAM, + MT6357_ID_VEFUSE, + MT6357_ID_VEMC, + MT6357_ID_VFE28, + MT6357_ID_VIBR, + MT6357_ID_VIO18, + MT6357_ID_VIO28, + MT6357_ID_VLDO28, + MT6357_ID_VMC, + MT6357_ID_VMCH, + MT6357_ID_VRF12, + MT6357_ID_VRF18, + MT6357_ID_VSIM1, + MT6357_ID_VSIM2, + MT6357_ID_VSRAM_OTHERS, + MT6357_ID_VSRAM_PROC, + MT6357_ID_VUSB33, + MT6357_ID_VXO22, + + MT6357_ID_RG_MAX, +}; + +#define MT6357_MAX_REGULATOR MT6357_ID_RG_MAX + +#endif /* __LINUX_REGULATOR_MT6357_H */ From patchwork Wed Oct 5 14:57:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 12999332 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 72989C433FE for ; Wed, 5 Oct 2022 14:58:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230297AbiJEO6b (ORCPT ); Wed, 5 Oct 2022 10:58:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49244 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230247AbiJEO6H (ORCPT ); Wed, 5 Oct 2022 10:58:07 -0400 Received: from mail-wr1-x434.google.com (mail-wr1-x434.google.com [IPv6:2a00:1450:4864:20::434]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AB7317CB61 for ; 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[93.5.22.158]) by smtp.googlemail.com with ESMTPSA id k38-20020a05600c1ca600b003a3170a7af9sm2313758wms.4.2022.10.05.07.57.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 Oct 2022 07:57:45 -0700 (PDT) From: Alexandre Mergnat Date: Wed, 05 Oct 2022 16:57:25 +0200 Subject: [PATCH v2 5/5] Input: mtk-pmic-keys: add MT6357 support MIME-Version: 1.0 Message-Id: <20221005-mt6357-support-v2-5-f17ba2d2d0a9@baylibre.com> References: <20221005-mt6357-support-v2-0-f17ba2d2d0a9@baylibre.com> In-Reply-To: <20221005-mt6357-support-v2-0-f17ba2d2d0a9@baylibre.com> To: Lee Jones , Mark Brown , Matthias Brugger , Rob Herring , Liam Girdwood , Krzysztof Kozlowski , Dmitry Torokhov , Chen Zhong Cc: linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Rob Herring , linux-kernel@vger.kernel.org, linux-input@vger.kernel.org, Fabien Parent , Alexandre Mergnat X-Mailer: b4 0.10.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=1828; i=amergnat@baylibre.com; h=from:subject:message-id; bh=K+NtkSoTyty3WNtqny3ZNRZqV9d7SWTjFAQ6sSNyyMw=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBjPZtiUzTmaPYNKYUV3W/stU4RFeLEKuVzt2ZzEqp/ Eq6ivv+JAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCYz2bYgAKCRArRkmdfjHURUSiD/ 9sA4ZHNufNW0mMKCBepfnBrZ6W30ICWNvG+puYQvyX/jwxtj2IuDK+24Mh1zWfMtIUQeSW0T57XDoi 0ghn+UGPc1bfvlMsd9/XBIEzfqJBNYOsGZDXJekiMu2RnvOsUDnpwTn5f/mvhXLTURVzqDugUc6Oz3 /PHQNz/FNtHEo1vN8BPoGboWkKJf7QsfaQzD6yljthQ86IyLobiFeTS0umNxK3d7YRWLsUUoxNdxA+ 3iLXSyPZc2o1a8bi5CfWL/zvbWSauPcgj3BpN4jY4+GeUSz32+j1PqxE1vkcfO7SAxSPBr3qzUTnC/ IKwuSMqmMNxoD8NiMcH6tX2CXOSxhNHnTHlyvjOGNDv7krLQyVjGORuKvRS9UVXAO/OCqeOpGNZIhQ JciObzKUp3Q1XfnaczjG/Mh3Hk2EDAkCg+lWTC8s6LI9h2kmuJIsomFnAUs5yfqJspDRTPSdYB3u4w oQ5kxjH7JMve0b8aqTPkQ6hz2Nftwl5bGl1aPtQUUG8viXIvRaucyPrZjhEWAUUeqKdcC99BLlRJjM AmyUMcmlvzo2OwGaVEe8Gw3tIsBer+cDkRvEg3vxGM+Hs2awbUPmNjvBiRI3AzF/JJ1kQ2mYPYYneA mrSVR3VxVlZw0HzMwiz0qDW5WY4BVztDoCexJRkFvYB9qLvqWrx1Y+sTWc2A== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 Precedence: bulk List-ID: X-Mailing-List: linux-input@vger.kernel.org From: Fabien Parent Add PMIC Keys support on MT6357 SoC. Signed-off-by: Fabien Parent Signed-off-by: Alexandre Mergnat Reviewed-by: Mattijs Korpershoek Reviewed-by: AngeloGioacchino Del Regno Acked-by: Dmitry Torokhov --- drivers/input/keyboard/mtk-pmic-keys.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/input/keyboard/mtk-pmic-keys.c b/drivers/input/keyboard/mtk-pmic-keys.c index 9b34da0ec260..2a63e0718eb6 100644 --- a/drivers/input/keyboard/mtk-pmic-keys.c +++ b/drivers/input/keyboard/mtk-pmic-keys.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -90,6 +91,19 @@ static const struct mtk_pmic_regs mt6331_regs = { .rst_lprst_mask = MTK_PMIC_MT6331_RST_DU_MASK, }; +static const struct mtk_pmic_regs mt6357_regs = { + .keys_regs[MTK_PMIC_PWRKEY_INDEX] = + MTK_PMIC_KEYS_REGS(MT6357_TOPSTATUS, + 0x2, MT6357_PSC_TOP_INT_CON0, 0x5, + MTK_PMIC_PWRKEY_RST), + .keys_regs[MTK_PMIC_HOMEKEY_INDEX] = + MTK_PMIC_KEYS_REGS(MT6357_TOPSTATUS, + 0x8, MT6357_PSC_TOP_INT_CON0, 0xa, + MTK_PMIC_HOMEKEY_INDEX), + .pmic_rst_reg = MT6357_TOP_RST_MISC, + .rst_lprst_mask = MTK_PMIC_RST_DU_MASK, +}; + static const struct mtk_pmic_regs mt6358_regs = { .keys_regs[MTK_PMIC_PWRKEY_INDEX] = MTK_PMIC_KEYS_REGS(MT6358_TOPSTATUS, @@ -276,6 +290,9 @@ static const struct of_device_id of_mtk_pmic_keys_match_tbl[] = { }, { .compatible = "mediatek,mt6331-keys", .data = &mt6331_regs, + }, { + .compatible = "mediatek,mt6357-keys", + .data = &mt6357_regs, }, { .compatible = "mediatek,mt6358-keys", .data = &mt6358_regs,