From patchwork Thu Oct 6 02:04:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: allen X-Patchwork-Id: 12999793 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E890EC433F5 for ; Thu, 6 Oct 2022 02:05:21 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CA69510E484; Thu, 6 Oct 2022 02:05:09 +0000 (UTC) Received: from ironport.ite.com.tw (60-251-196-230.hinet-ip.hinet.net [60.251.196.230]) by gabe.freedesktop.org (Postfix) with ESMTPS id DB23510E484 for ; Thu, 6 Oct 2022 02:05:03 +0000 (UTC) Received: from unknown (HELO mse.ite.com.tw) ([192.168.35.30]) by ironport.ite.com.tw with ESMTP; 06 Oct 2022 10:05:03 +0800 Received: from CSBMAIL1.internal.ite.com.tw (CSBMAIL1.internal.ite.com.tw [192.168.65.58]) by mse.ite.com.tw with ESMTP id 29624wid058647; Thu, 6 Oct 2022 10:04:58 +0800 (GMT-8) (envelope-from allen.chen@ite.com.tw) Received: from VirtualBox.internal.ite.com.tw (192.168.70.46) by CSBMAIL1.internal.ite.com.tw (192.168.65.58) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.14; Thu, 6 Oct 2022 10:04:57 +0800 From: allen To: Subject: [PATCH v3 1/2] dt-bindings: it6505: add properties to restrict output bandwidth Date: Thu, 6 Oct 2022 10:04:43 +0800 Message-ID: <20221006020444.15823-2-allen.chen@ite.com.tw> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221006020444.15823-1-allen.chen@ite.com.tw> References: <20221006020444.15823-1-allen.chen@ite.com.tw> MIME-Version: 1.0 X-Originating-IP: [192.168.70.46] X-ClientProxiedBy: CSBMAIL1.internal.ite.com.tw (192.168.65.58) To CSBMAIL1.internal.ite.com.tw (192.168.65.58) X-TM-SNTS-SMTP: 27E7FD5C63B1681BED147386BDA8FB32301068E8EE6D65B692F6A999687563E12002:8 X-MAIL: mse.ite.com.tw 29624wid058647 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Kenneth Hung , Jernej Skrabec , Krzysztof Kozlowski , Jau-Chih Tseng , David Airlie , Allen Chen , "open list:DRM DRIVERS" , Neil Armstrong , open list , Robert Foss , Pin-yen Lin , Hermes Wu , Rob Herring , Laurent Pinchart , Andrzej Hajda , Jonas Karlman Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: allen chen Add properties to restrict dp output data-lanes and clock. Signed-off-by: Pin-Yen Lin Signed-off-by: Allen Chen --- .../bindings/display/bridge/ite,it6505.yaml | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml b/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml index 833d11b2303a..f5482a614d05 100644 --- a/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml +++ b/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml @@ -52,6 +52,16 @@ properties: maxItems: 1 description: extcon specifier for the Power Delivery + ite,dp-output-data-lane-count: + description: restrict the dp output data-lanes with value of 1-4 + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 1, 2, 4 ] + + ite,dp-output-max-pixel-clock-mhz: + description: restrict max pixel clock + $ref: /schemas/types.yaml#/definitions/uint32 + default: 150 + port: $ref: /schemas/graph.yaml#/properties/port description: A port node pointing to DPI host port node @@ -84,6 +94,8 @@ examples: pwr18-supply = <&it6505_pp18_reg>; reset-gpios = <&pio 179 1>; extcon = <&usbc_extcon>; + ite,dp-output-data-lane-count = <2>; + ite,dp-output-max-pixel-clock-mhz = <150>; port { it6505_in: endpoint { From patchwork Thu Oct 6 02:04:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: allen X-Patchwork-Id: 12999794 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4CFAAC433FE for ; Thu, 6 Oct 2022 02:05:27 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3AD9C10E495; Thu, 6 Oct 2022 02:05:17 +0000 (UTC) Received: from ironport.ite.com.tw (60-251-196-230.hinet-ip.hinet.net [60.251.196.230]) by gabe.freedesktop.org (Postfix) with ESMTPS id B205F10E487 for ; Thu, 6 Oct 2022 02:05:04 +0000 (UTC) Received: from unknown (HELO mse.ite.com.tw) ([192.168.35.30]) by ironport.ite.com.tw with ESMTP; 06 Oct 2022 10:05:04 +0800 Received: from CSBMAIL1.internal.ite.com.tw (CSBMAIL1.internal.ite.com.tw [192.168.65.58]) by mse.ite.com.tw with ESMTP id 29624xiQ058648; Thu, 6 Oct 2022 10:04:59 +0800 (GMT-8) (envelope-from allen.chen@ite.com.tw) Received: from VirtualBox.internal.ite.com.tw (192.168.70.46) by CSBMAIL1.internal.ite.com.tw (192.168.65.58) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.14; Thu, 6 Oct 2022 10:04:59 +0800 From: allen To: Subject: [PATCH v3 2/2] drm/bridge: add it6505 driver to read data-lanes and max-pixel-clock-mhz from dt Date: Thu, 6 Oct 2022 10:04:44 +0800 Message-ID: <20221006020444.15823-3-allen.chen@ite.com.tw> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221006020444.15823-1-allen.chen@ite.com.tw> References: <20221006020444.15823-1-allen.chen@ite.com.tw> MIME-Version: 1.0 X-Originating-IP: [192.168.70.46] X-ClientProxiedBy: CSBMAIL1.internal.ite.com.tw (192.168.65.58) To CSBMAIL1.internal.ite.com.tw (192.168.65.58) X-TM-SNTS-SMTP: 5444D5DECE8CEE89F56CBFAA8093601BD179EFDA3A669DAFD22A0FFAC3BDDA5E2002:8 X-MAIL: mse.ite.com.tw 29624xiQ058648 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kenneth Hung , Jernej Skrabec , Jau-Chih Tseng , David Airlie , Allen Chen , "open list:DRM DRIVERS" , Neil Armstrong , open list , Robert Foss , Pin-yen Lin , Hermes Wu , Laurent Pinchart , Andrzej Hajda , Jonas Karlman Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: allen chen Add driver to read data-lanes and max-pixel-clock-mhz from dt property to restrict output bandwidth. Signed-off-by: Allen chen Signed-off-by: Pin-yen Lin --- drivers/gpu/drm/bridge/ite-it6505.c | 36 ++++++++++++++++++++++++++--- 1 file changed, 33 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/bridge/ite-it6505.c b/drivers/gpu/drm/bridge/ite-it6505.c index 2767b70fa2cb..eca9a2c296a8 100644 --- a/drivers/gpu/drm/bridge/ite-it6505.c +++ b/drivers/gpu/drm/bridge/ite-it6505.c @@ -436,6 +436,8 @@ struct it6505 { bool powered; bool hpd_state; u32 afe_setting; + u32 max_dpi_pixel_clock; + u32 max_lane_count; enum hdcp_state hdcp_status; struct delayed_work hdcp_work; struct work_struct hdcp_wait_ksv_list; @@ -1475,7 +1477,8 @@ static void it6505_parse_link_capabilities(struct it6505 *it6505) it6505->lane_count = link->num_lanes; DRM_DEV_DEBUG_DRIVER(dev, "Sink support %d lanes training", it6505->lane_count); - it6505->lane_count = min_t(int, it6505->lane_count, MAX_LANE_COUNT); + it6505->lane_count = min_t(int, it6505->lane_count, + it6505->max_lane_count); it6505->branch_device = drm_dp_is_branch(it6505->dpcd); DRM_DEV_DEBUG_DRIVER(dev, "Sink %sbranch device", @@ -2901,7 +2904,7 @@ it6505_bridge_mode_valid(struct drm_bridge *bridge, if (mode->flags & DRM_MODE_FLAG_INTERLACE) return MODE_NO_INTERLACE; - if (mode->clock > DPI_PIXEL_CLK_MAX) + if (mode->clock > it6505->max_dpi_pixel_clock) return MODE_CLOCK_HIGH; it6505->video_info.clock = mode->clock; @@ -3066,6 +3069,8 @@ static void it6505_parse_dt(struct it6505 *it6505) { struct device *dev = &it6505->client->dev; u32 *afe_setting = &it6505->afe_setting; + u32 *max_lane_count = &it6505->max_lane_count; + u32 *max_dpi_pixel_clock = &it6505->max_dpi_pixel_clock; it6505->lane_swap_disabled = device_property_read_bool(dev, "no-laneswap"); @@ -3081,7 +3086,32 @@ static void it6505_parse_dt(struct it6505 *it6505) } else { *afe_setting = 0; } - DRM_DEV_DEBUG_DRIVER(dev, "using afe_setting: %d", *afe_setting); + + if (device_property_read_u32(dev, "ite,dp-output-data-lane-count", + max_lane_count) == 0) { + if (*max_lane_count > 4 || *max_lane_count == 3) { + dev_err(dev, "max lane count error, use default"); + *max_lane_count = MAX_LANE_COUNT; + } + } else { + *max_lane_count = MAX_LANE_COUNT; + } + + if (device_property_read_u32(dev, "ite,dp-output-max-pixel-clock-mhz", + max_dpi_pixel_clock) == 0) { + *max_dpi_pixel_clock *= 1000; + if (*max_dpi_pixel_clock > 297000) { + dev_err(dev, "max pixel clock error, use default"); + *max_dpi_pixel_clock = DPI_PIXEL_CLK_MAX; + } + } else { + *max_dpi_pixel_clock = DPI_PIXEL_CLK_MAX; + } + + DRM_DEV_DEBUG_DRIVER(dev, "using afe_setting: %u, max_lane_count: %u", + it6505->afe_setting, it6505->max_lane_count); + DRM_DEV_DEBUG_DRIVER(dev, "using max_dpi_pixel_clock: %u kHz", + it6505->max_dpi_pixel_clock); } static ssize_t receive_timing_debugfs_show(struct file *file, char __user *buf,