From patchwork Thu Oct 13 02:03:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Moudy Ho X-Patchwork-Id: 13005576 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 17CDEC433FE for ; Thu, 13 Oct 2022 02:10:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type:MIME-Version: References:In-Reply-To:Message-ID:Date:Subject:CC:To:From:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=crufHaBJqDwuFiPQOlCXJvq1DOxDaZbIVtDdwONvRV4=; b=U+BxJDEXBoVLf9k6RTfYFefGkK ZjwXZ3MTs191a5hi9tgd1yOeiYI846fxY8M1E+xIf4tazPoa6X4Abg86k1fTAu9c0gxr/KmBk5eiG h7tRsoWjn6jSsB3zzwYL9HiyHQrpThjv/mgXIgvFqPSPkSwty1qPaufHZ/ULxWtlbM9pG2VB3e78I DBUs/o9UueEHS64PfI5JFghBcxpFjRA+5+z4o1FTtGGTUKfDw1IAqXuvhD1KmR/wNVNJaDAxr4VE5 1gCxifUvbdnnhOrA8A/Z6KAa77IadlyGASAwR+ZvJ7G/82uvxo4G9D3jLnxalz3lPr2k/6ZQee8iT rU8HF0ew==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oing4-00AGJI-Dq; Thu, 13 Oct 2022 02:10:28 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oinfE-00AFtZ-1w; Thu, 13 Oct 2022 02:09:38 +0000 X-UUID: 83d99b2b731742acac2bd39e664b16e0-20221012 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=crufHaBJqDwuFiPQOlCXJvq1DOxDaZbIVtDdwONvRV4=; b=CaW8kaqsrbvhtT73VzeJoynMmkuHZz0CGTS6A8NCAIsdPnDfMlni7GC81hn2NRMrU0R8Dm0XBfMCZw8NlRxBA08aXEfT3TsjqKAUAS4FnYYogKOYbVeIccY3mBY8zsiHnB/wogECEHml2d75MDLj831nRtLGe7NH2goTinOSIiY=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.11,REQID:9b116df4-9e23-490d-82fb-40d94dad89f5,IP:0,U RL:0,TC:0,Content:-5,EDM:0,RT:0,SF:100,FILE:0,BULK:0,RULE:Release_Ham,ACTI ON:release,TS:95 X-CID-INFO: VERSION:1.1.11,REQID:9b116df4-9e23-490d-82fb-40d94dad89f5,IP:0,URL :0,TC:0,Content:-5,EDM:0,RT:0,SF:100,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACTI ON:quarantine,TS:95 X-CID-META: VersionHash:39a5ff1,CLOUDID:d1985101-cdeb-479d-93af-53f947adce9d,B ulkID:221013100335DTOR77OQ,BulkQuantity:0,Recheck:0,SF:38|28|17|19|48,TC:n il,Content:0,EDM:-3,IP:nil,URL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: 83d99b2b731742acac2bd39e664b16e0-20221012 Received: from mtkmbs13n1.mediatek.inc [(172.21.101.193)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1032907772; Wed, 12 Oct 2022 19:03:33 -0700 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Thu, 13 Oct 2022 10:03:30 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Thu, 13 Oct 2022 10:03:30 +0800 From: Moudy Ho To: Rob Herring , Krzysztof Kozlowski , Matthias Brugger , AngeloGioacchino Del Regno , Chun-Kuang Hu CC: , , , , , Moudy Ho Subject: [PATCH v3 1/8] dt-bindings: arm: mediatek: mmsys: Add support for MT8195 VPPSYS Date: Thu, 13 Oct 2022 10:03:22 +0800 Message-ID: <20221013020329.8800-2-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20221013020329.8800-1-moudy.ho@mediatek.com> References: <20221013020329.8800-1-moudy.ho@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221012_190936_179884_EDEFBF93 X-CRM114-Status: GOOD ( 10.62 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org For MT8195, VPPSYS0 and VPPSYS1 are 2 display pipes with hardware differences in power domains, clocks and subsystem counts, which should be determined by compatible names. Signed-off-by: Moudy Ho Acked-by: Krzysztof Kozlowski --- .../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml index 0711f1834fbd..493aa9e8d484 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml @@ -48,7 +48,10 @@ properties: - const: syscon - items: - - const: mediatek,mt8195-vdosys0 + - enum: + - mediatek,mt8195-vdosys0 + - mediatek,mt8195-vppsys0 + - mediatek,mt8195-vppsys1 - const: mediatek,mt8195-mmsys - const: syscon From patchwork Thu Oct 13 02:03:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Moudy Ho X-Patchwork-Id: 13005577 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E212FC433FE for ; Thu, 13 Oct 2022 02:12:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type:MIME-Version: References:In-Reply-To:Message-ID:Date:Subject:CC:To:From:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Hj9OKZZqSVAE3FsCa836J5/45ZgcYYNM7gvHR6O1VnU=; b=lf1E8sDsMdeAKCUd7wd7rX0vc/ 4C8qflslQfC3nLEi/IWv2gHhUOsIsKeGOHrRlEJAJfvve3rUICBT++UuU2C85kNYf7LimsxXsupVZ 128w6PWZ5Z9rh8sPplbbjjdJTTJ+NgZcBDDGrjucTeXIKiv6rdTweCnuJwr92DCYOelhtL5wRL6LD HkMvMI72hetaoxbzurKlsLjKkdDA0U372Z8NfnWc+KdIosHUxITDS0OBf6eVQL2TibAOZPxKDIYt7 kr2kFcDgIbx7Vco7IbvpCnS3VZdFW0BKPk3ahtxSENQpLdLjXzJZ/UmagKjIFTfAwZMArBh44o3YJ LV2e25yg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oinhY-00AH1C-4c; Thu, 13 Oct 2022 02:12:00 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oinfa-00AG4P-42; Thu, 13 Oct 2022 02:09:59 +0000 X-UUID: f99bfc238a7e41b6a298006bbec1a847-20221012 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=Hj9OKZZqSVAE3FsCa836J5/45ZgcYYNM7gvHR6O1VnU=; b=T32NLUXhdZ91O9VOsCcRBRmPvwoMYpiH6u0PZS2EwzbzH1OGapn7GDI9pGneZd71poLkqAc9FSkO0Gv5ABDYVrp9jkyWllrPs7IOWY73HVQ9kfMLpGxWmrop6oK4pk/141EUl40+xAqZi3wZi71CRrrkoB6tzJYYlFkZg0pNShk=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.11,REQID:130c6cd2-b44b-465a-8f44-f1f8cd4a64fa,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:100,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:100 X-CID-INFO: VERSION:1.1.11,REQID:130c6cd2-b44b-465a-8f44-f1f8cd4a64fa,IP:0,URL :0,TC:0,Content:0,EDM:0,RT:0,SF:100,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACTIO N:quarantine,TS:100 X-CID-META: VersionHash:39a5ff1,CLOUDID:e0a65101-cdeb-479d-93af-53f947adce9d,B ulkID:221013100332BSB71T7L,BulkQuantity:1,Recheck:0,SF:38|28|17|19|48,TC:n il,Content:0,EDM:-3,IP:nil,URL:0,File:nil,Bulk:40,QS:nil,BEC:nil,COL:0 X-UUID: f99bfc238a7e41b6a298006bbec1a847-20221012 Received: from mtkmbs13n1.mediatek.inc [(172.21.101.193)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1684335090; Wed, 12 Oct 2022 19:04:35 -0700 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Thu, 13 Oct 2022 10:03:30 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Thu, 13 Oct 2022 10:03:30 +0800 From: Moudy Ho To: Rob Herring , Krzysztof Kozlowski , Matthias Brugger , AngeloGioacchino Del Regno , Chun-Kuang Hu CC: , , , , , Roy-CW.Yeh , Moudy Ho Subject: [PATCH v3 2/8] dt-bindings: soc: mediatek: Add support for MT8195 VPPSYS Date: Thu, 13 Oct 2022 10:03:23 +0800 Message-ID: <20221013020329.8800-3-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20221013020329.8800-1-moudy.ho@mediatek.com> References: <20221013020329.8800-1-moudy.ho@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221012_190958_264006_762DEAF8 X-CRM114-Status: UNSURE ( 8.67 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org From: "Roy-CW.Yeh" Add compatible for MT8195 VPPSYS on MUTEX. Signed-off-by: Roy-CW.Yeh Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno Acked-by: Krzysztof Kozlowski --- .../devicetree/bindings/soc/mediatek/mediatek,mutex.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml b/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml index 9241e5fc7cff..5f044ba183fd 100644 --- a/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml +++ b/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml @@ -34,6 +34,7 @@ properties: - mediatek,mt8186-mdp3-mutex - mediatek,mt8192-disp-mutex - mediatek,mt8195-disp-mutex + - mediatek,mt8195-vpp-mutex reg: maxItems: 1 From patchwork Thu Oct 13 02:03:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Moudy Ho X-Patchwork-Id: 13005591 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 95237C4332F for ; Thu, 13 Oct 2022 03:06:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type:MIME-Version: References:In-Reply-To:Message-ID:Date:Subject:CC:To:From:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=DKtcimmmsyJAP/vChFdABDsLsebfmgng3jA8jevjhyA=; b=Iz/Z4kqe8sFA7KK6LxtZzvsNyZ aUChAOrDcnXIO48nDJH75JTyT+jCCwOO4g5B2lLhPfXyY+R0PIHwe6bDf687Vw7X8BtCyFSt3uhj/ mb7PsdjvJyz4VtCJYpWBt+zqBwwk3eB+nXuDPvXc8YUpZ4/yEleqkY8U1qe7cC6E0yfU9Q5Qa9n2o iNfWxh9vonbIxK+8CIqyB5dwcce7R7MaqRm7WfZSYmNnum52f3K9VhaeIptpZYNIm8rcgwO5CevhI SqnqOBsxhyL4Pb0PrmWARDSpZfB7p/9nXz50c42yHicpDUUnYM6zrws8A+IGrQ2Hkpw31wmwsnCkQ OiGpgxRA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oioY6-00ARHp-KJ; Thu, 13 Oct 2022 03:06:18 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oioY3-00ARH4-Cy; Thu, 13 Oct 2022 03:06:18 +0000 X-UUID: a55c061a642b46ddad16cbed485cdfe0-20221012 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=DKtcimmmsyJAP/vChFdABDsLsebfmgng3jA8jevjhyA=; b=Ov4apU9oVux65eafbcGeIuStLDuBDemaaVtSfIxRx98ZgfdJT/bEgjySN5mtsfTdWfoD1Iv4m6Y7mJpaX0fX/tMirFGYa0n0bJ44cMivEm0SCEcLQsyUGwG5W1Dg2qj2X/fsus+piH1NlzuFN1zLqzXtImEyIjKixlPnSg54lBc=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.11,REQID:a3e0eae5-c2c8-4c9a-b3f6-5c75457abb45,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:39a5ff1,CLOUDID:f8a91cff-ee8c-4ff7-afe9-644435e96625,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: a55c061a642b46ddad16cbed485cdfe0-20221012 Received: from mtkmbs11n1.mediatek.inc [(172.21.101.185)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 551392189; Wed, 12 Oct 2022 20:04:10 -0700 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs11n2.mediatek.inc (172.21.101.187) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Thu, 13 Oct 2022 10:03:30 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Thu, 13 Oct 2022 10:03:30 +0800 From: Moudy Ho To: Rob Herring , Krzysztof Kozlowski , Matthias Brugger , AngeloGioacchino Del Regno , Chun-Kuang Hu CC: , , , , , Roy-CW.Yeh , Moudy Ho Subject: [PATCH v3 3/8] arm64: dts: mediatek: mt8195: add MMSYS configuration for VPPSYS Date: Thu, 13 Oct 2022 10:03:24 +0800 Message-ID: <20221013020329.8800-4-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20221013020329.8800-1-moudy.ho@mediatek.com> References: <20221013020329.8800-1-moudy.ho@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221012_200615_467368_0AB1D63D X-CRM114-Status: GOOD ( 10.81 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org From: "Roy-CW.Yeh" With the change of the MMSYS binding file for MT8195, the compatible name of VPPSYS in dts need to be fixed to match the definition. Signed-off-by: Roy-CW.Yeh Signed-off-by: Moudy Ho --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi index 905d1a90b406..1bb6054531c1 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -1476,8 +1476,9 @@ #clock-cells = <1>; }; - vppsys0: clock-controller@14000000 { - compatible = "mediatek,mt8195-vppsys0"; + vppsys0: syscon@14000000 { + compatible = "mediatek,mt8195-vppsys0", + "mediatek,mt8195-mmsys", "syscon"; reg = <0 0x14000000 0 0x1000>; #clock-cells = <1>; }; @@ -1581,8 +1582,9 @@ power-domains = <&spm MT8195_POWER_DOMAIN_WPESYS>; }; - vppsys1: clock-controller@14f00000 { - compatible = "mediatek,mt8195-vppsys1"; + vppsys1: syscon@14f00000 { + compatible = "mediatek,mt8195-vppsys1", + "mediatek,mt8195-mmsys", "syscon"; reg = <0 0x14f00000 0 0x1000>; #clock-cells = <1>; }; From patchwork Thu Oct 13 02:03:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Moudy Ho X-Patchwork-Id: 13005572 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 780BBC4332F for ; Thu, 13 Oct 2022 02:08:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type:MIME-Version: References:In-Reply-To:Message-ID:Date:Subject:CC:To:From:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=0Q5kRH18gt6Y/pbwXFl9/gu+4070qb8aRhjVye5Kcvw=; b=Aaup0qLACq+kMRMQFjhZXi98IP MChGyCkOrENPIln5KOEnaiPmGmZRexcWlfOuJ480r4UuT60TSHpBt72OIBi0QdQnw+q/XbykQHe5s wKysSQDInwBMcLQff8BSH5MqCfhB3YPz9wSB51Z5hJj71lSyvBFJL/tTPRKT6eECLXYjHQS6tfKtt E3LcWNJwhFnUsPVTqRMJDfkqDi1WB999FnyJKi4MK4o5wL+5mBGWZt4ydAhSaCkXsFwKkBvrf+WMC tgiMqJk+SnkAaJo6HVTIY4ESYGTTz5Q/8jN/jx5FUbAjA8GrnMK38+vtqXAyI2dIsqP8OJefeQn2P dXlAou7A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oineI-00AFOC-5p; Thu, 13 Oct 2022 02:08:38 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oineB-00AFGW-AL; Thu, 13 Oct 2022 02:08:35 +0000 X-UUID: e5adba18d6354bc29afd0e0b9fe5141e-20221012 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=0Q5kRH18gt6Y/pbwXFl9/gu+4070qb8aRhjVye5Kcvw=; b=D5uYOHeUQVJ/NehsKYzoqOKK/B8uQe+k4vRupYd3ncWIcWQkYyPq2MjXqxGe5Fhhh/QN/ugofg6r1yY8qK4UCo2SCloLbf1qHiA2A5fXOkVkJ0zrxyCpLfkIyKmD0T83aYrrrm5yrKwPf4QDE3P8rCep87KvbCWdR9yEfaV/6Cs=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.11,REQID:2ce01fe9-fb98-4c39-8687-644dd6cb096e,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:39a5ff1,CLOUDID:729d5101-cdeb-479d-93af-53f947adce9d,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: e5adba18d6354bc29afd0e0b9fe5141e-20221012 Received: from mtkmbs11n1.mediatek.inc [(172.21.101.185)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 83630917; Wed, 12 Oct 2022 19:03:54 -0700 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs13n1.mediatek.inc (172.21.101.193) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Thu, 13 Oct 2022 10:03:30 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Thu, 13 Oct 2022 10:03:30 +0800 From: Moudy Ho To: Rob Herring , Krzysztof Kozlowski , Matthias Brugger , AngeloGioacchino Del Regno , Chun-Kuang Hu CC: , , , , , Moudy Ho Subject: [PATCH v3 4/8] arm64: dts: mediatek: mt8195: add MUTEX configuration for VPPSYS Date: Thu, 13 Oct 2022 10:03:25 +0800 Message-ID: <20221013020329.8800-5-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20221013020329.8800-1-moudy.ho@mediatek.com> References: <20221013020329.8800-1-moudy.ho@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221012_190831_405744_06966EC6 X-CRM114-Status: UNSURE ( 9.67 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org In MT8195, the MMSYS has two Video Processor Pipepline Subsystems named VPPSYS0 and VPPSYS1, each with specific MUTEX to control Start of Frame(SOF) and End of Frame (EOF) signals. Before working with them, the addresses, interrupts, clocks and power domains need to be set up in dts. Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi index 1bb6054531c1..4888d5ff9df7 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -1483,6 +1483,15 @@ #clock-cells = <1>; }; + mutex@1400f000 { + compatible = "mediatek,mt8195-vpp-mutex"; + reg = <0 0x1400f000 0 0x1000>; + interrupts = ; + mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0xf000 0x1000>; + clocks = <&vppsys0 CLK_VPP0_MUTEX>; + power-domains = <&spm MT8195_POWER_DOMAIN_VPPSYS0>; + }; + smi_sub_common_vpp0_vpp1_2x1: smi@14010000 { compatible = "mediatek,mt8195-smi-sub-common"; reg = <0 0x14010000 0 0x1000>; @@ -1589,6 +1598,15 @@ #clock-cells = <1>; }; + mutex@14f01000 { + compatible = "mediatek,mt8195-vpp-mutex"; + reg = <0 0x14f01000 0 0x1000>; + interrupts = ; + mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0x1000 0x1000>; + clocks = <&vppsys1 CLK_VPP1_DISP_MUTEX>; + power-domains = <&spm MT8195_POWER_DOMAIN_VPPSYS1>; + }; + larb5: larb@14f02000 { compatible = "mediatek,mt8195-smi-larb"; reg = <0 0x14f02000 0 0x1000>; From patchwork Thu Oct 13 02:03:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Moudy Ho X-Patchwork-Id: 13005575 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CC12AC4332F for ; Thu, 13 Oct 2022 02:10:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type:MIME-Version: References:In-Reply-To:Message-ID:Date:Subject:CC:To:From:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=f6kS2xybjWEXGhmkdT7MwEra4D5lvvtQFEPepc/e8KM=; b=q6Y5ZTSjJMGRa8GWwyiUUaPPmb r2qlg+1ACimDUz8x3CVK5ZfJV5hV15P+wHvNHN3X4rUm5mJWx6krwhYzyLrDWSE0WFv2cFlTbkrOQ jwpRmndRwmOToqrdpU9uazUsi3yejc+3s3D2WMBvqswG3JHnTT6qHcl+rVr0Sll0JDc/ql362gdX9 WcpFHMtz4JslF/0N0Q0TEUwzfCf9FPwncowo9wPq5Ss41rPX1k6GTGoEiF/YVn876Z0UhdVJ32QEK FpO4zzgiKarekbruR9IVwdG+0HGubQn1m0qt2ellRyu5daV8bl9PXAgI6ZEmMUVYqWIxZvQY5w6op 7txdg3XA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oing2-00AGI2-F9; Thu, 13 Oct 2022 02:10:26 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oinfC-00AFsc-JO; Thu, 13 Oct 2022 02:09:37 +0000 X-UUID: 9cb347dba1c545eda497b099d3441b66-20221012 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=f6kS2xybjWEXGhmkdT7MwEra4D5lvvtQFEPepc/e8KM=; b=Bp7bAdY0ulY0rG2S6aj/5+GPfelIFTkDInSiJlOi+pvHj6zjEpV5AZfj2rlz6GfOnx8PG+TXzBsN6tXny4+cZloH7YPN5Ilo0zSSzU8pZk5otys5+PYROTdVt/sJBAVGu2jc1xRj4tTcfpNYGyE9O6Ut5A8no1kjrB+3FEdjQuE=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.11,REQID:b9e04c76-25ec-4b0a-8fdb-e11d79098699,IP:0,U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:100,FILE:0,BULK:0,RULE:Release_Ham,ACT ION:release,TS:75 X-CID-INFO: VERSION:1.1.11,REQID:b9e04c76-25ec-4b0a-8fdb-e11d79098699,IP:0,URL :0,TC:0,Content:-25,EDM:0,RT:0,SF:100,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACT ION:quarantine,TS:75 X-CID-META: VersionHash:39a5ff1,CLOUDID:1adac2e1-2948-402a-a6e4-b5d31fe11eb7,B ulkID:2210131003351DSQVOVB,BulkQuantity:0,Recheck:0,SF:38|28|17|19|48,TC:n il,Content:0,EDM:-3,IP:nil,URL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: 9cb347dba1c545eda497b099d3441b66-20221012 Received: from mtkmbs13n1.mediatek.inc [(172.21.101.193)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 759843911; Wed, 12 Oct 2022 19:03:34 -0700 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Thu, 13 Oct 2022 10:03:30 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Thu, 13 Oct 2022 10:03:30 +0800 From: Moudy Ho To: Rob Herring , Krzysztof Kozlowski , Matthias Brugger , AngeloGioacchino Del Regno , Chun-Kuang Hu CC: , , , , , Roy-CW.Yeh , Moudy Ho Subject: [PATCH v3 5/8] soc: mediatek: mmsys: add support for MT8195 VPPSYS Date: Thu, 13 Oct 2022 10:03:26 +0800 Message-ID: <20221013020329.8800-6-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20221013020329.8800-1-moudy.ho@mediatek.com> References: <20221013020329.8800-1-moudy.ho@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221012_190934_691343_6DEE8C0F X-CRM114-Status: GOOD ( 14.00 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org From: "Roy-CW.Yeh" Add MT8195 VPPSYS0 and VPPSYS1 driver data. Signed-off-by: Roy-CW.Yeh Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno --- drivers/soc/mediatek/mtk-mmsys.c | 22 ++++++++++++++++++++++ drivers/soc/mediatek/mtk-mmsys.h | 1 + 2 files changed, 23 insertions(+) diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c index 146a78ba06c1..86454c0812b1 100644 --- a/drivers/soc/mediatek/mtk-mmsys.c +++ b/drivers/soc/mediatek/mtk-mmsys.c @@ -80,6 +80,16 @@ static const struct mtk_mmsys_driver_data mt8195_vdosys0_driver_data = { .num_routes = ARRAY_SIZE(mmsys_mt8195_routing_table), }; +static const struct mtk_mmsys_driver_data mt8195_vppsys0_driver_data = { + .clk_driver = "clk-mt8195-vpp0", + .is_vppsys = true, +}; + +static const struct mtk_mmsys_driver_data mt8195_vppsys1_driver_data = { + .clk_driver = "clk-mt8195-vpp1", + .is_vppsys = true, +}; + static const struct mtk_mmsys_driver_data mt8365_mmsys_driver_data = { .clk_driver = "clk-mt8365-mm", .routes = mt8365_mmsys_routing_table, @@ -241,6 +251,9 @@ static int mtk_mmsys_probe(struct platform_device *pdev) if (IS_ERR(clks)) return PTR_ERR(clks); + if (mmsys->data->is_vppsys) + goto out_probe_done; + drm = platform_device_register_data(&pdev->dev, "mediatek-drm", PLATFORM_DEVID_AUTO, NULL, 0); if (IS_ERR(drm)) { @@ -248,6 +261,7 @@ static int mtk_mmsys_probe(struct platform_device *pdev) return PTR_ERR(drm); } +out_probe_done: return 0; } @@ -292,6 +306,14 @@ static const struct of_device_id of_match_mtk_mmsys[] = { .compatible = "mediatek,mt8195-vdosys0", .data = &mt8195_vdosys0_driver_data, }, + { + .compatible = "mediatek,mt8195-vppsys0", + .data = &mt8195_vppsys0_driver_data, + }, + { + .compatible = "mediatek,mt8195-vppsys1", + .data = &mt8195_vppsys1_driver_data, + }, { .compatible = "mediatek,mt8365-mmsys", .data = &mt8365_mmsys_driver_data, diff --git a/drivers/soc/mediatek/mtk-mmsys.h b/drivers/soc/mediatek/mtk-mmsys.h index 77f37f8c715b..54a96b83afb4 100644 --- a/drivers/soc/mediatek/mtk-mmsys.h +++ b/drivers/soc/mediatek/mtk-mmsys.h @@ -91,6 +91,7 @@ struct mtk_mmsys_driver_data { const struct mtk_mmsys_routes *routes; const unsigned int num_routes; const u16 sw0_rst_offset; + const bool is_vppsys; }; /* From patchwork Thu Oct 13 02:03:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Moudy Ho X-Patchwork-Id: 13005574 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A5E95C433FE for ; Thu, 13 Oct 2022 02:09:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type:MIME-Version: References:In-Reply-To:Message-ID:Date:Subject:CC:To:From:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=iYszTDzcbttfvAF3CXSLu+F11if5Sng517HUPZbjxR8=; b=NYImnDlMMtJjqk8bCsKnDAS3Sl 65/fUJk8fMcmLEMhNBygylfDXvjMuigj9K82Toz4uR6MMFyYNssKR7sM+x0+I5GmsyM7yxHssUQ9v Q/LX4b45QxVhyUdmZ6JGSausSASe63f4TNTtLXQPlljyf+Rv5SNHC6s7J6ZXOHY0aRzn1FvLA2WVi uGmdvDcBgnfZ9SL/VrIbg79/cI1A4Kiu96Re/q0LpbNSTd+uqUUg7Pm5HwSoHH7p9ibAI4bnc58R6 EZE3ciZqkxhaucSImPg4+ykbwawz40bbpY44T2++WSMbpydqNP//Tm2CtkxvaKpFHWuH+qiUEdXPK 4A6etOzA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oinfN-00AFyH-LH; Thu, 13 Oct 2022 02:09:45 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oineq-00AFbZ-HZ; Thu, 13 Oct 2022 02:09:15 +0000 X-UUID: c3adf63e8a484419a07e2c6ee8159fef-20221012 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=iYszTDzcbttfvAF3CXSLu+F11if5Sng517HUPZbjxR8=; b=CXMoNK43v9LQ7x+ziKFVJ5/Ke3HkaGgNveo2vbNeC/4sQt9wVVU+Xy/VgEO1a3s4hCS9mmyEcNa5UYVLZIOcsVbdBnM+I62LWDrxeHsNHImnVomtrYz2hhqPy9Dbc2CkjpwNby/qdG60U8MnTNsHGhvjCf8FVTMd4hSVGyg5udM=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.11,REQID:2647c070-ce04-4a67-949f-7a9d08225267,IP:0,U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:100,FILE:0,BULK:0,RULE:Release_Ham,ACT ION:release,TS:75 X-CID-INFO: VERSION:1.1.11,REQID:2647c070-ce04-4a67-949f-7a9d08225267,IP:0,URL :0,TC:0,Content:-25,EDM:0,RT:0,SF:100,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACT ION:quarantine,TS:75 X-CID-META: VersionHash:39a5ff1,CLOUDID:baf119ff-ee8c-4ff7-afe9-644435e96625,B ulkID:221013100335XLD05XQG,BulkQuantity:1,Recheck:0,SF:38|28|17|19|48,TC:n il,Content:0,EDM:-3,IP:nil,URL:0,File:nil,Bulk:40,QS:nil,BEC:nil,COL:0 X-UUID: c3adf63e8a484419a07e2c6ee8159fef-20221012 Received: from mtkmbs13n1.mediatek.inc [(172.21.101.193)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 978879451; Wed, 12 Oct 2022 19:04:37 -0700 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Thu, 13 Oct 2022 10:03:31 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Thu, 13 Oct 2022 10:03:31 +0800 From: Moudy Ho To: Rob Herring , Krzysztof Kozlowski , Matthias Brugger , AngeloGioacchino Del Regno , Chun-Kuang Hu CC: , , , , , Roy-CW.Yeh , Moudy Ho Subject: [PATCH v3 6/8] soc: mediatek: mmsys: add config api for RSZ switching and DCM Date: Thu, 13 Oct 2022 10:03:27 +0800 Message-ID: <20221013020329.8800-7-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20221013020329.8800-1-moudy.ho@mediatek.com> References: <20221013020329.8800-1-moudy.ho@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221012_190912_647757_3275ED73 X-CRM114-Status: GOOD ( 11.22 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org From: "Roy-CW.Yeh" Due to MT8195 HW design, some RSZs have additional settings that need to be configured in MMSYS. Signed-off-by: Roy-CW.Yeh Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno --- drivers/soc/mediatek/mt8195-mmsys.h | 13 ++++++++ drivers/soc/mediatek/mtk-mmsys.c | 42 ++++++++++++++++++++++++++ include/linux/soc/mediatek/mtk-mmsys.h | 4 +++ 3 files changed, 59 insertions(+) diff --git a/drivers/soc/mediatek/mt8195-mmsys.h b/drivers/soc/mediatek/mt8195-mmsys.h index abfe94a30248..a1b8e3fd037e 100644 --- a/drivers/soc/mediatek/mt8195-mmsys.h +++ b/drivers/soc/mediatek/mt8195-mmsys.h @@ -75,6 +75,19 @@ #define MT8195_SOUT_DSC_WRAP1_OUT_TO_SINA_VIRTUAL0 (2 << 16) #define MT8195_SOUT_DSC_WRAP1_OUT_TO_VPP_MERGE (3 << 16) +/* VPPSYS1 */ +#define MT8195_VPP1_HW_DCM_1ST_DIS0 0x150 +#define MT8195_VPP1_HW_DCM_1ST_DIS1 0x160 +#define MT8195_VPP1_HW_DCM_2ND_DIS0 0x1a0 +#define MT8195_VPP1_HW_DCM_2ND_DIS1 0x1b0 +#define MT8195_SVPP2_BUF_BF_RSZ_SWITCH 0xf48 +#define MT8195_SVPP3_BUF_BF_RSZ_SWITCH 0xf74 + +/* VPPSYS1 HW DCM client*/ +#define MT8195_SVPP1_MDP_RSZ BIT(25) +#define MT8195_SVPP2_MDP_RSZ BIT(4) +#define MT8195_SVPP3_MDP_RSZ BIT(5) + static const struct mtk_mmsys_routes mmsys_mt8195_routing_table[] = { { DDP_COMPONENT_OVL0, DDP_COMPONENT_RDMA0, diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c index 86454c0812b1..c2d42e8cd301 100644 --- a/drivers/soc/mediatek/mtk-mmsys.c +++ b/drivers/soc/mediatek/mtk-mmsys.c @@ -160,6 +160,48 @@ void mtk_mmsys_ddp_dpi_fmt_config(struct device *dev, u32 val) } EXPORT_SYMBOL_GPL(mtk_mmsys_ddp_dpi_fmt_config); +void mtk_mmsys_vpp_rsz_merge_config(struct device *dev, u32 id, bool enable) +{ + u32 reg; + + switch (id) { + case 2: + reg = MT8195_SVPP2_BUF_BF_RSZ_SWITCH; + break; + case 3: + reg = MT8195_SVPP3_BUF_BF_RSZ_SWITCH; + break; + default: + dev_err(dev, "Invalid id %d\n", id); + return; + } + + mtk_mmsys_update_bits(dev_get_drvdata(dev), reg, ~0, enable); +} +EXPORT_SYMBOL_GPL(mtk_mmsys_vpp_rsz_merge_config); + +void mtk_mmsys_vpp_rsz_dcm_config(struct device *dev, bool enable) +{ + u32 client; + + client = MT8195_SVPP1_MDP_RSZ; + mtk_mmsys_update_bits(dev_get_drvdata(dev), + MT8195_VPP1_HW_DCM_1ST_DIS0, client, + ((enable) ? client : 0)); + mtk_mmsys_update_bits(dev_get_drvdata(dev), + MT8195_VPP1_HW_DCM_2ND_DIS0, client, + ((enable) ? client : 0)); + + client = MT8195_SVPP2_MDP_RSZ | MT8195_SVPP3_MDP_RSZ; + mtk_mmsys_update_bits(dev_get_drvdata(dev), + MT8195_VPP1_HW_DCM_1ST_DIS1, client, + ((enable) ? client : 0)); + mtk_mmsys_update_bits(dev_get_drvdata(dev), + MT8195_VPP1_HW_DCM_2ND_DIS1, client, + ((enable) ? client : 0)); +} +EXPORT_SYMBOL_GPL(mtk_mmsys_vpp_rsz_dcm_config); + static int mtk_mmsys_reset_update(struct reset_controller_dev *rcdev, unsigned long id, bool assert) { diff --git a/include/linux/soc/mediatek/mtk-mmsys.h b/include/linux/soc/mediatek/mtk-mmsys.h index 16ac0e5847f0..691d70545311 100644 --- a/include/linux/soc/mediatek/mtk-mmsys.h +++ b/include/linux/soc/mediatek/mtk-mmsys.h @@ -66,4 +66,8 @@ void mtk_mmsys_ddp_disconnect(struct device *dev, void mtk_mmsys_ddp_dpi_fmt_config(struct device *dev, u32 val); +void mtk_mmsys_vpp_rsz_merge_config(struct device *dev, u32 id, bool enable); + +void mtk_mmsys_vpp_rsz_dcm_config(struct device *dev, bool enable); + #endif /* __MTK_MMSYS_H */ From patchwork Thu Oct 13 02:03:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Moudy Ho X-Patchwork-Id: 13005573 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 88300C4332F for ; Thu, 13 Oct 2022 02:09:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type:MIME-Version: References:In-Reply-To:Message-ID:Date:Subject:CC:To:From:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=RwIzkqZDNUF77Vh/sEKkllJuBWJIBT09XZvdLNUSwN8=; b=3Gpyap5rmFrmgUvGHtnCqIHqhY c0aquEqfNexZT3owlBIsYYMEwxSwo7mX6Po3SRKOQOgL65lkDBPb+crpmz4oypiv4xTe2bYcDJZEr SHoicFwY9gRB9lrd8ItK0SmUyDXoEVD6reHZsvRoL4EdWtW8OA5apwdbDrGE95IpNXPIZX8yiOHwj qgyCaUXNVZykdPD0AbfPMi5XLnebXt08dkWb+myx/6KaQcRBRwBvMa+5ZMQrlwbkh47sgKK9y0shK oOsSKnWv3atk5/0KdWdtz7PeKwjGbL0AieUweNA3LNnrl7biiaGpqoLVSD/FoYf5UN/CBroLjIBsp EGt+mhSQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oineu-00AFkp-DV; Thu, 13 Oct 2022 02:09:16 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oineq-00AFgM-Ha; Thu, 13 Oct 2022 02:09:14 +0000 X-UUID: 87de5e7365ca448e99ac46ab9301b96c-20221012 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=RwIzkqZDNUF77Vh/sEKkllJuBWJIBT09XZvdLNUSwN8=; b=WdQ/5ODEKdpdn0wH0K1ieIxZSkVDOKHWPHkXwlETuhbQh7rpmLLv8a8MEIiQMblsLJz3lX9SfpaxBnFEsL1RxqraZnKTgw9B3qPtWR0fxPFf0CrNGPXxz2ED5Pc7PrOvVu+ClG4k5XV5iNyapNKaFmEXI0qAR+M0nDjODwo5vaw=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.11,REQID:6a5d8c32-794e-45eb-a31f-61da6e179db8,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:100,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:100 X-CID-INFO: VERSION:1.1.11,REQID:6a5d8c32-794e-45eb-a31f-61da6e179db8,IP:0,URL :0,TC:0,Content:0,EDM:0,RT:0,SF:100,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACTIO N:quarantine,TS:100 X-CID-META: VersionHash:39a5ff1,CLOUDID:bbf119ff-ee8c-4ff7-afe9-644435e96625,B ulkID:221013100335ZJWYIA4H,BulkQuantity:1,Recheck:0,SF:38|28|17|19|48,TC:n il,Content:0,EDM:-3,IP:nil,URL:0,File:nil,Bulk:40,QS:nil,BEC:nil,COL:0 X-UUID: 87de5e7365ca448e99ac46ab9301b96c-20221012 Received: from mtkmbs13n1.mediatek.inc [(172.21.101.193)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 537984659; Wed, 12 Oct 2022 19:04:36 -0700 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Thu, 13 Oct 2022 10:03:31 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Thu, 13 Oct 2022 10:03:31 +0800 From: Moudy Ho To: Rob Herring , Krzysztof Kozlowski , Matthias Brugger , AngeloGioacchino Del Regno , Chun-Kuang Hu CC: , , , , , Roy-CW.Yeh , Moudy Ho Subject: [PATCH v3 7/8] soc: mediatek: mutex: Add mtk_mutex_set_mod support to set MOD1 Date: Thu, 13 Oct 2022 10:03:28 +0800 Message-ID: <20221013020329.8800-8-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20221013020329.8800-1-moudy.ho@mediatek.com> References: <20221013020329.8800-1-moudy.ho@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221012_190912_658260_E5F8A3F9 X-CRM114-Status: GOOD ( 13.64 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org From: "Roy-CW.Yeh" Add mtk_mutex_set_mod support to set MOD1 Signed-off-by: Roy-CW.Yeh Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno --- drivers/soc/mediatek/mtk-mutex.c | 33 +++++++++++++++++++++++++------- 1 file changed, 26 insertions(+), 7 deletions(-) diff --git a/drivers/soc/mediatek/mtk-mutex.c b/drivers/soc/mediatek/mtk-mutex.c index c1a33d52038e..a2be15a5c93a 100644 --- a/drivers/soc/mediatek/mtk-mutex.c +++ b/drivers/soc/mediatek/mtk-mutex.c @@ -23,6 +23,7 @@ #define DISP_REG_MUTEX(n) (0x24 + 0x20 * (n)) #define DISP_REG_MUTEX_RST(n) (0x28 + 0x20 * (n)) #define DISP_REG_MUTEX_MOD(mutex_mod_reg, n) (mutex_mod_reg + 0x20 * (n)) +#define DISP_REG_MUTEX_MOD1(mutex_mod_reg, n) ((mutex_mod_reg) + 0x20 * (n) + 0x4) #define DISP_REG_MUTEX_SOF(mutex_sof_reg, n) (mutex_sof_reg + 0x20 * (n)) #define DISP_REG_MUTEX_MOD2(n) (0x34 + 0x20 * (n)) @@ -740,7 +741,7 @@ int mtk_mutex_write_mod(struct mtk_mutex *mutex, struct mtk_mutex_ctx *mtx = container_of(mutex, struct mtk_mutex_ctx, mutex[mutex->id]); unsigned int reg; - unsigned int offset; + u32 reg_offset, id_offset = 0; WARN_ON(&mtx->mutex[mutex->id] != mutex); @@ -750,16 +751,34 @@ int mtk_mutex_write_mod(struct mtk_mutex *mutex, return -EINVAL; } - offset = DISP_REG_MUTEX_MOD(mtx->data->mutex_mod_reg, - mutex->id); - reg = readl_relaxed(mtx->regs + offset); + /* + * Some SoCs may have multiple MUTEX_MOD registers as more than 32 mods + * are present, hence requiring multiple 32-bits registers. + * + * The mutex_table_mod fully represents that by defining the number of + * the mod sequentially, later used as a bit number, which can be more + * than 0..31. + * + * In order to retain compatibility with older SoCs, we perform R/W on + * the single 32 bits registers, but this requires us to translate the + * mutex ID bit accordingly. + */ + if (mtx->data->mutex_table_mod[idx] < 32) { + reg_offset = DISP_REG_MUTEX_MOD(mtx->data->mutex_mod_reg, + mutex->id); + } else { + reg_offset = DISP_REG_MUTEX_MOD1(mtx->data->mutex_mod_reg, + mutex->id); + id_offset = 32; + } + reg = readl_relaxed(mtx->regs + reg_offset); if (clear) - reg &= ~BIT(mtx->data->mutex_table_mod[idx]); + reg &= ~BIT(mtx->data->mutex_table_mod[idx] - id_offset); else - reg |= BIT(mtx->data->mutex_table_mod[idx]); + reg |= BIT(mtx->data->mutex_table_mod[idx] - id_offset); - writel_relaxed(reg, mtx->regs + offset); + writel_relaxed(reg, mtx->regs + reg_offset); return 0; } From patchwork Thu Oct 13 02:03:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Moudy Ho X-Patchwork-Id: 13005581 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6001AC4332F for ; Thu, 13 Oct 2022 02:12:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type:MIME-Version: References:In-Reply-To:Message-ID:Date:Subject:CC:To:From:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Zm3EQQMci5enC07pANz8FYSXrKaRjNl7ReZbqzR5o7I=; b=PN3nAs3uWwWniuiRLy0rSJUH4I Dcx53CwLFJYcIsXctArTyMpjqcS9cVhmeh8QASbTNwUq5qxafnTWHhk/3z94M50mbUOuuUAsinClB wze1X5/o3zpJn7xiXAfLEVr3D7j/3t8AnusQu9zQwxFVGLiQ9EeUT0z1dH6NbM2VWTFrdgVUNnOrd UR+M8dviimaRffSEoyNleEFZmXNJx0YiGfPQv2T/8sRXgXtB35SUxzTm18wfMZl1RSrjYJfe2/Pb9 b2RaaKj4RUDTyGKmaCNSmuxnoKMQZ6H4XTg8/X1X/Gvkrbb/T738+MImFfj8cxfMzi93C6w7Hrhj+ sT0UyYog==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oiniD-00AHKR-BA; Thu, 13 Oct 2022 02:12:41 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oinff-00AG7J-2c; Thu, 13 Oct 2022 02:10:05 +0000 X-UUID: ab85a58cf86f4efaa55e61bfbd46d8cf-20221012 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=Zm3EQQMci5enC07pANz8FYSXrKaRjNl7ReZbqzR5o7I=; b=Ff1K+UM3RK17hRDvXSB7iOdqgDRVukS9ArUPOZgyVg62nP4O7AsYLZLw0JnEfU2Vd7e41AImW3L6992lTrnR0tv9JsPv9xW3LwRS0ln9DkssnCVBv14oCfIsFH2FULgM1A/5rt1jM99rNAQDDkHHfZB7WwwvL3GQdlv5Ad9oqgU=; X-CID-P-RULE: Spam_GS6885AD X-CID-O-INFO: VERSION:1.1.11,REQID:a883823a-931f-4c15-b146-24fcc3b8a8ad,IP:0,U RL:0,TC:0,Content:34,EDM:0,RT:0,SF:100,FILE:0,BULK:0,RULE:Spam_GS6885AD,AC TION:quarantine,TS:134 X-CID-INFO: VERSION:1.1.11,REQID:a883823a-931f-4c15-b146-24fcc3b8a8ad,IP:0,URL :0,TC:0,Content:34,EDM:0,RT:0,SF:100,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACTI ON:quarantine,TS:134 X-CID-META: VersionHash:39a5ff1,CLOUDID:bcf119ff-ee8c-4ff7-afe9-644435e96625,B ulkID:2210131003367EMNTCO5,BulkQuantity:1,Recheck:0,SF:38|28|17|19|48,TC:n il,Content:4,EDM:-3,IP:nil,URL:0,File:nil,Bulk:40,QS:nil,BEC:nil,COL:0 X-UUID: ab85a58cf86f4efaa55e61bfbd46d8cf-20221012 Received: from mtkmbs13n1.mediatek.inc [(172.21.101.193)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 386080483; Wed, 12 Oct 2022 19:04:37 -0700 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Thu, 13 Oct 2022 10:03:31 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Thu, 13 Oct 2022 10:03:31 +0800 From: Moudy Ho To: Rob Herring , Krzysztof Kozlowski , Matthias Brugger , AngeloGioacchino Del Regno , Chun-Kuang Hu CC: , , , , , Roy-CW.Yeh , Moudy Ho Subject: [PATCH v3 8/8] soc: mediatek: mutex: support MT8195 VPPSYS Date: Thu, 13 Oct 2022 10:03:29 +0800 Message-ID: <20221013020329.8800-9-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20221013020329.8800-1-moudy.ho@mediatek.com> References: <20221013020329.8800-1-moudy.ho@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221012_191003_323763_773AF6A4 X-CRM114-Status: GOOD ( 10.21 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org From: "Roy-CW.Yeh" Add MT8195 VPPSYS0 and VPPSYS1 mutex info to driver data Signed-off-by: Roy-CW.Yeh Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno --- drivers/soc/mediatek/mtk-mutex.c | 102 +++++++++++++++++++++++++ include/linux/soc/mediatek/mtk-mutex.h | 35 +++++++++ 2 files changed, 137 insertions(+) diff --git a/drivers/soc/mediatek/mtk-mutex.c b/drivers/soc/mediatek/mtk-mutex.c index a2be15a5c93a..86b9372080c4 100644 --- a/drivers/soc/mediatek/mtk-mutex.c +++ b/drivers/soc/mediatek/mtk-mutex.c @@ -131,6 +131,53 @@ #define MT8195_MUTEX_MOD_DISP_DP_INTF0 21 #define MT8195_MUTEX_MOD_DISP_PWM0 27 +/* VPPSYS0 */ +#define MT8195_MUTEX_MOD_MDP_RDMA0 0 +#define MT8195_MUTEX_MOD_MDP_FG0 1 +#define MT8195_MUTEX_MOD_MDP_STITCH0 2 +#define MT8195_MUTEX_MOD_MDP_HDR0 3 +#define MT8195_MUTEX_MOD_MDP_AAL0 4 +#define MT8195_MUTEX_MOD_MDP_RSZ0 5 +#define MT8195_MUTEX_MOD_MDP_TDSHP0 6 +#define MT8195_MUTEX_MOD_MDP_COLOR0 7 +#define MT8195_MUTEX_MOD_MDP_OVL0 8 +#define MT8195_MUTEX_MOD_MDP_PAD0 9 +#define MT8195_MUTEX_MOD_MDP_TCC0 10 +#define MT8195_MUTEX_MOD_MDP_WROT0 11 + +/* VPPSYS1 */ +#define MT8195_MUTEX_MOD_MDP_TCC1 3 +#define MT8195_MUTEX_MOD_MDP_RDMA1 4 +#define MT8195_MUTEX_MOD_MDP_RDMA2 5 +#define MT8195_MUTEX_MOD_MDP_RDMA3 6 +#define MT8195_MUTEX_MOD_MDP_FG1 7 +#define MT8195_MUTEX_MOD_MDP_FG2 8 +#define MT8195_MUTEX_MOD_MDP_FG3 9 +#define MT8195_MUTEX_MOD_MDP_HDR1 10 +#define MT8195_MUTEX_MOD_MDP_HDR2 11 +#define MT8195_MUTEX_MOD_MDP_HDR3 12 +#define MT8195_MUTEX_MOD_MDP_AAL1 13 +#define MT8195_MUTEX_MOD_MDP_AAL2 14 +#define MT8195_MUTEX_MOD_MDP_AAL3 15 +#define MT8195_MUTEX_MOD_MDP_RSZ1 16 +#define MT8195_MUTEX_MOD_MDP_RSZ2 17 +#define MT8195_MUTEX_MOD_MDP_RSZ3 18 +#define MT8195_MUTEX_MOD_MDP_TDSHP1 19 +#define MT8195_MUTEX_MOD_MDP_TDSHP2 20 +#define MT8195_MUTEX_MOD_MDP_TDSHP3 21 +#define MT8195_MUTEX_MOD_MDP_MERGE2 22 +#define MT8195_MUTEX_MOD_MDP_MERGE3 23 +#define MT8195_MUTEX_MOD_MDP_COLOR1 24 +#define MT8195_MUTEX_MOD_MDP_COLOR2 25 +#define MT8195_MUTEX_MOD_MDP_COLOR3 26 +#define MT8195_MUTEX_MOD_MDP_OVL1 27 +#define MT8195_MUTEX_MOD_MDP_PAD1 28 +#define MT8195_MUTEX_MOD_MDP_PAD2 29 +#define MT8195_MUTEX_MOD_MDP_PAD3 30 +#define MT8195_MUTEX_MOD_MDP_WROT1 31 +#define MT8195_MUTEX_MOD_MDP_WROT2 32 +#define MT8195_MUTEX_MOD_MDP_WROT3 33 + #define MT8365_MUTEX_MOD_DISP_OVL0 7 #define MT8365_MUTEX_MOD_DISP_OVL0_2L 8 #define MT8365_MUTEX_MOD_DISP_RDMA0 9 @@ -375,6 +422,52 @@ static const unsigned int mt8195_mutex_mod[DDP_COMPONENT_ID_MAX] = { [DDP_COMPONENT_DP_INTF0] = MT8195_MUTEX_MOD_DISP_DP_INTF0, }; +static const unsigned int mt8195_mutex_table_mod[MUTEX_MOD_IDX_MAX] = { + [MUTEX_MOD_IDX_MDP_RDMA0] = MT8195_MUTEX_MOD_MDP_RDMA0, + [MUTEX_MOD_IDX_MDP_RDMA1] = MT8195_MUTEX_MOD_MDP_RDMA1, + [MUTEX_MOD_IDX_MDP_RDMA2] = MT8195_MUTEX_MOD_MDP_RDMA2, + [MUTEX_MOD_IDX_MDP_RDMA3] = MT8195_MUTEX_MOD_MDP_RDMA3, + [MUTEX_MOD_IDX_MDP_STITCH0] = MT8195_MUTEX_MOD_MDP_STITCH0, + [MUTEX_MOD_IDX_MDP_FG0] = MT8195_MUTEX_MOD_MDP_FG0, + [MUTEX_MOD_IDX_MDP_FG1] = MT8195_MUTEX_MOD_MDP_FG1, + [MUTEX_MOD_IDX_MDP_FG2] = MT8195_MUTEX_MOD_MDP_FG2, + [MUTEX_MOD_IDX_MDP_FG3] = MT8195_MUTEX_MOD_MDP_FG3, + [MUTEX_MOD_IDX_MDP_HDR0] = MT8195_MUTEX_MOD_MDP_HDR0, + [MUTEX_MOD_IDX_MDP_HDR1] = MT8195_MUTEX_MOD_MDP_HDR1, + [MUTEX_MOD_IDX_MDP_HDR2] = MT8195_MUTEX_MOD_MDP_HDR2, + [MUTEX_MOD_IDX_MDP_HDR3] = MT8195_MUTEX_MOD_MDP_HDR3, + [MUTEX_MOD_IDX_MDP_AAL0] = MT8195_MUTEX_MOD_MDP_AAL0, + [MUTEX_MOD_IDX_MDP_AAL1] = MT8195_MUTEX_MOD_MDP_AAL1, + [MUTEX_MOD_IDX_MDP_AAL2] = MT8195_MUTEX_MOD_MDP_AAL2, + [MUTEX_MOD_IDX_MDP_AAL3] = MT8195_MUTEX_MOD_MDP_AAL3, + [MUTEX_MOD_IDX_MDP_RSZ0] = MT8195_MUTEX_MOD_MDP_RSZ0, + [MUTEX_MOD_IDX_MDP_RSZ1] = MT8195_MUTEX_MOD_MDP_RSZ1, + [MUTEX_MOD_IDX_MDP_RSZ2] = MT8195_MUTEX_MOD_MDP_RSZ2, + [MUTEX_MOD_IDX_MDP_RSZ3] = MT8195_MUTEX_MOD_MDP_RSZ3, + [MUTEX_MOD_IDX_MDP_MERGE2] = MT8195_MUTEX_MOD_MDP_MERGE2, + [MUTEX_MOD_IDX_MDP_MERGE3] = MT8195_MUTEX_MOD_MDP_MERGE3, + [MUTEX_MOD_IDX_MDP_TDSHP0] = MT8195_MUTEX_MOD_MDP_TDSHP0, + [MUTEX_MOD_IDX_MDP_TDSHP1] = MT8195_MUTEX_MOD_MDP_TDSHP1, + [MUTEX_MOD_IDX_MDP_TDSHP2] = MT8195_MUTEX_MOD_MDP_TDSHP2, + [MUTEX_MOD_IDX_MDP_TDSHP3] = MT8195_MUTEX_MOD_MDP_TDSHP3, + [MUTEX_MOD_IDX_MDP_COLOR0] = MT8195_MUTEX_MOD_MDP_COLOR0, + [MUTEX_MOD_IDX_MDP_COLOR1] = MT8195_MUTEX_MOD_MDP_COLOR1, + [MUTEX_MOD_IDX_MDP_COLOR2] = MT8195_MUTEX_MOD_MDP_COLOR2, + [MUTEX_MOD_IDX_MDP_COLOR3] = MT8195_MUTEX_MOD_MDP_COLOR3, + [MUTEX_MOD_IDX_MDP_OVL0] = MT8195_MUTEX_MOD_MDP_OVL0, + [MUTEX_MOD_IDX_MDP_OVL1] = MT8195_MUTEX_MOD_MDP_OVL1, + [MUTEX_MOD_IDX_MDP_PAD0] = MT8195_MUTEX_MOD_MDP_PAD0, + [MUTEX_MOD_IDX_MDP_PAD1] = MT8195_MUTEX_MOD_MDP_PAD1, + [MUTEX_MOD_IDX_MDP_PAD2] = MT8195_MUTEX_MOD_MDP_PAD2, + [MUTEX_MOD_IDX_MDP_PAD3] = MT8195_MUTEX_MOD_MDP_PAD3, + [MUTEX_MOD_IDX_MDP_TCC0] = MT8195_MUTEX_MOD_MDP_TCC0, + [MUTEX_MOD_IDX_MDP_TCC1] = MT8195_MUTEX_MOD_MDP_TCC1, + [MUTEX_MOD_IDX_MDP_WROT0] = MT8195_MUTEX_MOD_MDP_WROT0, + [MUTEX_MOD_IDX_MDP_WROT1] = MT8195_MUTEX_MOD_MDP_WROT1, + [MUTEX_MOD_IDX_MDP_WROT2] = MT8195_MUTEX_MOD_MDP_WROT2, + [MUTEX_MOD_IDX_MDP_WROT3] = MT8195_MUTEX_MOD_MDP_WROT3, +}; + static const unsigned int mt8365_mutex_mod[DDP_COMPONENT_ID_MAX] = { [DDP_COMPONENT_AAL0] = MT8365_MUTEX_MOD_DISP_AAL, [DDP_COMPONENT_CCORR] = MT8365_MUTEX_MOD_DISP_CCORR, @@ -520,6 +613,13 @@ static const struct mtk_mutex_data mt8195_mutex_driver_data = { .mutex_sof_reg = MT8183_MUTEX0_SOF0, }; +static const struct mtk_mutex_data mt8195_vpp_mutex_driver_data = { + .mutex_sof = mt8195_mutex_sof, + .mutex_mod_reg = MT8183_MUTEX0_MOD0, + .mutex_sof_reg = MT8183_MUTEX0_SOF0, + .mutex_table_mod = mt8195_mutex_table_mod, +}; + static const struct mtk_mutex_data mt8365_mutex_driver_data = { .mutex_mod = mt8365_mutex_mod, .mutex_sof = mt8183_mutex_sof, @@ -877,6 +977,8 @@ static const struct of_device_id mutex_driver_dt_match[] = { .data = &mt8192_mutex_driver_data}, { .compatible = "mediatek,mt8195-disp-mutex", .data = &mt8195_mutex_driver_data}, + { .compatible = "mediatek,mt8195-vpp-mutex", + .data = &mt8195_vpp_mutex_driver_data}, { .compatible = "mediatek,mt8365-disp-mutex", .data = &mt8365_mutex_driver_data}, {}, diff --git a/include/linux/soc/mediatek/mtk-mutex.h b/include/linux/soc/mediatek/mtk-mutex.h index b335c2837cd8..635218e3ac68 100644 --- a/include/linux/soc/mediatek/mtk-mutex.h +++ b/include/linux/soc/mediatek/mtk-mutex.h @@ -22,6 +22,41 @@ enum mtk_mutex_mod_index { MUTEX_MOD_IDX_MDP_CCORR0, MUTEX_MOD_IDX_MDP_HDR0, MUTEX_MOD_IDX_MDP_COLOR0, + MUTEX_MOD_IDX_MDP_RDMA1, + MUTEX_MOD_IDX_MDP_RDMA2, + MUTEX_MOD_IDX_MDP_RDMA3, + MUTEX_MOD_IDX_MDP_STITCH0, + MUTEX_MOD_IDX_MDP_FG0, + MUTEX_MOD_IDX_MDP_FG1, + MUTEX_MOD_IDX_MDP_FG2, + MUTEX_MOD_IDX_MDP_FG3, + MUTEX_MOD_IDX_MDP_HDR1, + MUTEX_MOD_IDX_MDP_HDR2, + MUTEX_MOD_IDX_MDP_HDR3, + MUTEX_MOD_IDX_MDP_AAL1, + MUTEX_MOD_IDX_MDP_AAL2, + MUTEX_MOD_IDX_MDP_AAL3, + MUTEX_MOD_IDX_MDP_RSZ2, + MUTEX_MOD_IDX_MDP_RSZ3, + MUTEX_MOD_IDX_MDP_MERGE2, + MUTEX_MOD_IDX_MDP_MERGE3, + MUTEX_MOD_IDX_MDP_TDSHP1, + MUTEX_MOD_IDX_MDP_TDSHP2, + MUTEX_MOD_IDX_MDP_TDSHP3, + MUTEX_MOD_IDX_MDP_COLOR1, + MUTEX_MOD_IDX_MDP_COLOR2, + MUTEX_MOD_IDX_MDP_COLOR3, + MUTEX_MOD_IDX_MDP_OVL0, + MUTEX_MOD_IDX_MDP_OVL1, + MUTEX_MOD_IDX_MDP_PAD0, + MUTEX_MOD_IDX_MDP_PAD1, + MUTEX_MOD_IDX_MDP_PAD2, + MUTEX_MOD_IDX_MDP_PAD3, + MUTEX_MOD_IDX_MDP_TCC0, + MUTEX_MOD_IDX_MDP_TCC1, + MUTEX_MOD_IDX_MDP_WROT1, + MUTEX_MOD_IDX_MDP_WROT2, + MUTEX_MOD_IDX_MDP_WROT3, MUTEX_MOD_IDX_MAX /* ALWAYS keep at the end */ };