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From: Padmanabhan Rajanbabu
To: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
alim.akhtar@samsung.com, chanho61.park@samsung.com,
linus.walleij@linaro.org, pankaj.dubey@samsung.com
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-samsung-soc@vger.kernel.org,
Padmanabhan Rajanbabu
Subject: [PATCH v3 1/4] arm64: dts: fix drive strength macros as per FSD HW
UM
Date: Thu, 13 Oct 2022 16:10:21 +0530
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References: <20221013104024.50179-1-p.rajanbabu@samsung.com>
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Drive strength macros defined for FSD platform is not reflecting actual
names and values as per HW UM. FSD SoC pinctrl has following four levels
of drive-strength and their corresponding values:
Level-1 <-> 0
Level-2 <-> 1
Level-4 <-> 2
Level-6 <-> 3
The commit 684dac402f21 ("arm64: dts: fsd: Add initial pinctrl support")
used drive strength macros defined for Exynos4 SoC family. For some IPs
the macros values of Exynos4 matched and worked well, but Exynos4 SoC
family drive-strength (names and values) is not exactly matching with
FSD SoC.
Fix the drive strength macros to reflect actual names and values given
in FSD HW UM.
Fixes: 684dac402f21 ("arm64: dts: fsd: Add initial pinctrl support")
Signed-off-by: Padmanabhan Rajanbabu
Reviewed-by: Alim Akhtar
---
arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi | 8 ++++----
arch/arm64/boot/dts/tesla/fsd-pinctrl.h | 6 +++---
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
index d0abb9aa0e9e..4e151d419909 100644
--- a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
@@ -55,14 +55,14 @@
samsung,pins = "gpf5-0";
samsung,pin-function = ;
samsung,pin-pud = ;
- samsung,pin-drv = ;
+ samsung,pin-drv = ;
};
ufs_refclk_out: ufs-refclk-out-pins {
samsung,pins = "gpf5-1";
samsung,pin-function = ;
samsung,pin-pud = ;
- samsung,pin-drv = ;
+ samsung,pin-drv = ;
};
};
@@ -239,14 +239,14 @@
samsung,pins = "gpb6-1";
samsung,pin-function = ;
samsung,pin-pud = ;
- samsung,pin-drv = ;
+ samsung,pin-drv = ;
};
pwm1_out: pwm1-out-pins {
samsung,pins = "gpb6-5";
samsung,pin-function = ;
samsung,pin-pud = ;
- samsung,pin-drv = ;
+ samsung,pin-drv = ;
};
hs_i2c0_bus: hs-i2c0-bus-pins {
diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.h b/arch/arm64/boot/dts/tesla/fsd-pinctrl.h
index 6ffbda362493..c397d02208a0 100644
--- a/arch/arm64/boot/dts/tesla/fsd-pinctrl.h
+++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.h
@@ -16,9 +16,9 @@
#define FSD_PIN_PULL_UP 3
#define FSD_PIN_DRV_LV1 0
-#define FSD_PIN_DRV_LV2 2
-#define FSD_PIN_DRV_LV3 1
-#define FSD_PIN_DRV_LV4 3
+#define FSD_PIN_DRV_LV2 1
+#define FSD_PIN_DRV_LV4 2
+#define FSD_PIN_DRV_LV6 3
#define FSD_PIN_FUNC_INPUT 0
#define FSD_PIN_FUNC_OUTPUT 1
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From: Padmanabhan Rajanbabu
To: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
alim.akhtar@samsung.com, chanho61.park@samsung.com,
linus.walleij@linaro.org, pankaj.dubey@samsung.com
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-samsung-soc@vger.kernel.org,
Padmanabhan Rajanbabu
Subject: [PATCH v3 2/4] arm64: dts: fix HSI2C drive strength values as per
FSD HW UM
Date: Thu, 13 Oct 2022 16:10:22 +0530
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References: <20221013104024.50179-1-p.rajanbabu@samsung.com>
Precedence: bulk
List-ID:
X-Mailing-List: linux-samsung-soc@vger.kernel.org
Drive strength values used for HSI2C is not reflecting the default values
recommended by FSD HW UM.
Fix the drive strength values for HSI2C, thereby ensuring that the existing
device tree file is using default drive strength values recommended by
UM for FSD SoC.
Fixes: 684dac402f21 ("arm64: dts: fsd: Add initial pinctrl support")
Signed-off-by: Padmanabhan Rajanbabu
Reviewed-by: Alim Akhtar
---
arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
index 4e151d419909..09a492b1fd6e 100644
--- a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
@@ -253,56 +253,56 @@
samsung,pins = "gpb0-0", "gpb0-1";
samsung,pin-function = ;
samsung,pin-pud = ;
- samsung,pin-drv = ;
+ samsung,pin-drv = ;
};
hs_i2c1_bus: hs-i2c1-bus-pins {
samsung,pins = "gpb0-2", "gpb0-3";
samsung,pin-function = ;
samsung,pin-pud = ;
- samsung,pin-drv = ;
+ samsung,pin-drv = ;
};
hs_i2c2_bus: hs-i2c2-bus-pins {
samsung,pins = "gpb0-4", "gpb0-5";
samsung,pin-function = ;
samsung,pin-pud = ;
- samsung,pin-drv = ;
+ samsung,pin-drv = ;
};
hs_i2c3_bus: hs-i2c3-bus-pins {
samsung,pins = "gpb0-6", "gpb0-7";
samsung,pin-function = ;
samsung,pin-pud = ;
- samsung,pin-drv = ;
+ samsung,pin-drv = ;
};
hs_i2c4_bus: hs-i2c4-bus-pins {
samsung,pins = "gpb1-0", "gpb1-1";
samsung,pin-function = ;
samsung,pin-pud = ;
- samsung,pin-drv = ;
+ samsung,pin-drv = ;
};
hs_i2c5_bus: hs-i2c5-bus-pins {
samsung,pins = "gpb1-2", "gpb1-3";
samsung,pin-function = ;
samsung,pin-pud = ;
- samsung,pin-drv = ;
+ samsung,pin-drv = ;
};
hs_i2c6_bus: hs-i2c6-bus-pins {
samsung,pins = "gpb1-4", "gpb1-5";
samsung,pin-function = ;
samsung,pin-pud = ;
- samsung,pin-drv = ;
+ samsung,pin-drv = ;
};
hs_i2c7_bus: hs-i2c7-bus-pins {
samsung,pins = "gpb1-6", "gpb1-7";
samsung,pin-function = ;
samsung,pin-pud = ;
- samsung,pin-drv = ;
+ samsung,pin-drv = ;
};
uart0_data: uart0-data-pins {
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From: Padmanabhan Rajanbabu
To: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
alim.akhtar@samsung.com, chanho61.park@samsung.com,
linus.walleij@linaro.org, pankaj.dubey@samsung.com
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-samsung-soc@vger.kernel.org,
Padmanabhan Rajanbabu
Subject: [PATCH v3 3/4] arm64: dts: fix UART drive strength values as per
FSD HW UM
Date: Thu, 13 Oct 2022 16:10:23 +0530
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Drive strength values used for UART is not reflecting the default values
recommended by FSD HW UM.
Fix the drive strength values for UART, thereby ensuring that the existing
device tree file is using default drive strength values recommended by UM
for FSD SoC.
Fixes: 684dac402f21 ("arm64: dts: fsd: Add initial pinctrl support")
Signed-off-by: Padmanabhan Rajanbabu
Reviewed-by: Alim Akhtar
---
arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
index 09a492b1fd6e..a2634e70925a 100644
--- a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
@@ -309,14 +309,14 @@
samsung,pins = "gpb7-0", "gpb7-1";
samsung,pin-function = ;
samsung,pin-pud = ;
- samsung,pin-drv = ;
+ samsung,pin-drv = ;
};
uart1_data: uart1-data-pins {
samsung,pins = "gpb7-4", "gpb7-5";
samsung,pin-function = ;
samsung,pin-pud = ;
- samsung,pin-drv = ;
+ samsung,pin-drv = ;
};
spi0_bus: spi0-bus-pins {
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From: Padmanabhan Rajanbabu
To: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
alim.akhtar@samsung.com, chanho61.park@samsung.com,
linus.walleij@linaro.org, pankaj.dubey@samsung.com
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-samsung-soc@vger.kernel.org,
Padmanabhan Rajanbabu
Subject: [PATCH v3 4/4] arm64: dts: fix SPI drive strength values as per FSD
HW UM
Date: Thu, 13 Oct 2022 16:10:24 +0530
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Drive strength values used for SPI is not reflecting the default values
recommended by FSD HW UM.
Fix the drive strength values for SPI, thereby ensuring that the existing
device tree file is using default drive strength values recommended by UM
for FSD SoC.
Fixes: 684dac402f21 ("arm64: dts: fsd: Add initial pinctrl support")
Signed-off-by: Padmanabhan Rajanbabu
Reviewed-by: Alim Akhtar
---
arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
index a2634e70925a..e3852c946352 100644
--- a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
@@ -323,21 +323,21 @@
samsung,pins = "gpb4-0", "gpb4-2", "gpb4-3";
samsung,pin-function = ;
samsung,pin-pud = ;
- samsung,pin-drv = ;
+ samsung,pin-drv = ;
};
spi1_bus: spi1-bus-pins {
samsung,pins = "gpb4-4", "gpb4-6", "gpb4-7";
samsung,pin-function = ;
samsung,pin-pud = ;
- samsung,pin-drv = ;
+ samsung,pin-drv = ;
};
spi2_bus: spi2-bus-pins {
samsung,pins = "gpb5-0", "gpb5-2", "gpb5-3";
samsung,pin-function = ;
samsung,pin-pud = ;
- samsung,pin-drv = ;
+ samsung,pin-drv = ;
};
};