From patchwork Sat Oct 15 03:59:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alan Previn X-Patchwork-Id: 13007573 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 787E8C433FE for ; Sat, 15 Oct 2022 03:58:02 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 856D910E35D; Sat, 15 Oct 2022 03:58:00 +0000 (UTC) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5B52F10E35B for ; Sat, 15 Oct 2022 03:57:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1665806264; x=1697342264; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=AfultzwJU1iCG5ZabJ4C5hyoWh+wpJDvXCAw2HNqGjg=; b=REFwEU5xDuoRiFHgF1K4EFdy1TGpw0ASyRezhq6Q9ob9917l7D7sKl9p P3CvYdwFBFFXvU5QviLcC0Ctorhp7+cbYD8fmbylQRfFNottNYXF1T1vk aX9LlBQTs7eEAyUdImSZ7dghN2qXxgbIGtndJDAy3QSyf0CwLCAFGJD21 rJkahh/iRg/+gtdEbGvVYPEBmFIiWz/uSdCFlfmyvQrP4ZsHj4FrX5CaY sxC3wdZ+Ke3sEou0Tv82mr2kFWT8lZnqam9AGigsY+Kbh3jt5Q8svpUnn IXs5rfjN4W1E6xPTOqjo1unIFnfP3APDdnvAF7H5z3Tam6fJ6Sbr8K3JN g==; X-IronPort-AV: E=McAfee;i="6500,9779,10500"; a="332036828" X-IronPort-AV: E=Sophos;i="5.95,186,1661842800"; d="scan'208";a="332036828" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Oct 2022 20:57:43 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10500"; a="716962775" X-IronPort-AV: E=Sophos;i="5.95,186,1661842800"; d="scan'208";a="716962775" Received: from aalteres-desk.fm.intel.com ([10.80.57.53]) by FMSMGA003.fm.intel.com with ESMTP; 14 Oct 2022 20:57:43 -0700 From: Alan Previn To: intel-gfx@lists.freedesktop.org Date: Fri, 14 Oct 2022 20:59:51 -0700 Message-Id: <20221015035952.1741319-2-alan.previn.teres.alexis@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221015035952.1741319-1-alan.previn.teres.alexis@intel.com> References: <20221015035952.1741319-1-alan.previn.teres.alexis@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 1/2] drm/i915/guc: Add error-capture init warnings when needed X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" If GuC is being used and we initialized GuC-error-capture, we need to be warning if we don't provide an error-capture register list in the firmware ADS, for valid GT engines. A warning makes sense as this would impact debugability without realizing why a reglist wasn't retrieved and reported by GuC. However, depending on the platform, we might have certain engines that have a register list for engine instance error state but not for engine class. Thus, add a check only to warn if the register list was non existent vs an empty list (use the empty lists to skip the warning). Signed-off-by: Alan Previn --- .../gpu/drm/i915/gt/uc/intel_guc_capture.c | 55 ++++++++++++++++++- 1 file changed, 53 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c index 8f1165146013..290c1e1343dd 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c @@ -419,6 +419,44 @@ guc_capture_get_device_reglist(struct intel_guc *guc) return default_lists; } +static const char * +__stringify_type(u32 type) +{ + switch (type) { + case GUC_CAPTURE_LIST_TYPE_GLOBAL: + return "Global"; + case GUC_CAPTURE_LIST_TYPE_ENGINE_CLASS: + return "Class"; + case GUC_CAPTURE_LIST_TYPE_ENGINE_INSTANCE: + return "Instance"; + default: + return "unknown"; + } + + return ""; +} + +static const char * +__stringify_engclass(u32 class) +{ + switch (class) { + case GUC_RENDER_CLASS: + return "Render"; + case GUC_VIDEO_CLASS: + return "Video"; + case GUC_VIDEOENHANCE_CLASS: + return "VideoEnhance"; + case GUC_BLITTER_CLASS: + return "Blitter"; + case GUC_COMPUTE_CLASS: + return "Compute"; + default: + return "unknown"; + } + + return ""; +} + static int guc_capture_list_init(struct intel_guc *guc, u32 owner, u32 type, u32 classid, struct guc_mmio_reg *ptr, u16 num_entries) @@ -487,19 +525,32 @@ intel_guc_capture_getlistsize(struct intel_guc *guc, u32 owner, u32 type, u32 cl size_t *size) { struct intel_guc_state_capture *gc = guc->capture; + struct drm_i915_private *i915 = guc_to_gt(guc)->i915; struct __guc_capture_ads_cache *cache = &gc->ads_cache[owner][type][classid]; int num_regs; - if (!gc->reglists) + if (!gc->reglists) { + drm_warn(&i915->drm, "GuC-capture: No reglist on this device\n"); return -ENODEV; + } if (cache->is_valid) { *size = cache->size; return cache->status; } + if (!guc_capture_get_one_list(gc->reglists, owner, type, classid)) { + if (owner == GUC_CAPTURE_LIST_INDEX_PF && type == GUC_CAPTURE_LIST_TYPE_GLOBAL) + drm_warn(&i915->drm, "GuC-capture: missing reglist type-Global\n"); + if (owner == GUC_CAPTURE_LIST_INDEX_PF) + drm_warn(&i915->drm, "GuC-capture: missing regiist type(%d)-%s : " + "%s(%d)-Engine\n", type, __stringify_type(type), + __stringify_engclass(classid), classid); + return -ENODATA; + } + num_regs = guc_cap_list_num_regs(gc, owner, type, classid); - if (!num_regs) + if (!num_regs) /* intentional empty lists can exist depending on hw config */ return -ENODATA; *size = PAGE_ALIGN((sizeof(struct guc_debug_capture_list)) + From patchwork Sat Oct 15 03:59:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alan Previn X-Patchwork-Id: 13007571 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 550F0C4332F for ; Sat, 15 Oct 2022 03:57:51 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E039610E35A; Sat, 15 Oct 2022 03:57:49 +0000 (UTC) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7533D10E35D for ; Sat, 15 Oct 2022 03:57:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1665806264; x=1697342264; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=ZzBHfgbCHeUP8jfrPHq12zqotmBQWOaT4H0q+GTdn+M=; b=U5/WW4QSf8SxPed2FRUry6/lz1LqTZoAup5lLK5RRu+nwz1eifIRyvwk JDpZgCcF2g7SBSnOqvJ7Qp0xBN1TmxIhcnNiYdXt0j4FGeUMV0+uxuFFQ QJ079NhZqfh45xL0N+Z5n8VsDOD6VZ6FIPuZJcAZKV0k9BhAHqxQg9XGP l5hOXFhrc31G+2U71KlnlHYQ3xOxJR4UKpE3KZpkpLhhjNHDdOVFrUomc ZLuM9IXi3P4tCHFGN+uOkteLRbHWmaniz1eqb++zfAgmXCadccKBZJqsQ zWuHzeAtdpTKwXCZ4p86P1FOohaNsPFIGYpPZ5p+m7E6zIWAxeOil+0EG Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10500"; a="332036829" X-IronPort-AV: E=Sophos;i="5.95,186,1661842800"; d="scan'208";a="332036829" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Oct 2022 20:57:43 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10500"; a="716962776" X-IronPort-AV: E=Sophos;i="5.95,186,1661842800"; d="scan'208";a="716962776" Received: from aalteres-desk.fm.intel.com ([10.80.57.53]) by FMSMGA003.fm.intel.com with ESMTP; 14 Oct 2022 20:57:43 -0700 From: Alan Previn To: intel-gfx@lists.freedesktop.org Date: Fri, 14 Oct 2022 20:59:52 -0700 Message-Id: <20221015035952.1741319-3-alan.previn.teres.alexis@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221015035952.1741319-1-alan.previn.teres.alexis@intel.com> References: <20221015035952.1741319-1-alan.previn.teres.alexis@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 2/2] drm/i915/guc: Add compute reglist for GuC error capture X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add compute reglist for GuC error capture. Signed-off-by: Alan Previn --- drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c index 290c1e1343dd..da3a09c11d12 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c @@ -169,6 +169,8 @@ static struct __guc_mmio_reg_descr_group default_lists[] = { MAKE_REGLIST(default_global_regs, PF, GLOBAL, 0), MAKE_REGLIST(default_rc_class_regs, PF, ENGINE_CLASS, GUC_RENDER_CLASS), MAKE_REGLIST(xe_lpd_rc_inst_regs, PF, ENGINE_INSTANCE, GUC_RENDER_CLASS), + MAKE_REGLIST(default_rc_class_regs, PF, ENGINE_CLASS, GUC_COMPUTE_CLASS), + MAKE_REGLIST(xe_lpd_rc_inst_regs, PF, ENGINE_INSTANCE, GUC_COMPUTE_CLASS), MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_VIDEO_CLASS), MAKE_REGLIST(xe_lpd_vd_inst_regs, PF, ENGINE_INSTANCE, GUC_VIDEO_CLASS), MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_VIDEOENHANCE_CLASS), @@ -182,6 +184,8 @@ static const struct __guc_mmio_reg_descr_group xe_lpd_lists[] = { MAKE_REGLIST(xe_lpd_global_regs, PF, GLOBAL, 0), MAKE_REGLIST(xe_lpd_rc_class_regs, PF, ENGINE_CLASS, GUC_RENDER_CLASS), MAKE_REGLIST(xe_lpd_rc_inst_regs, PF, ENGINE_INSTANCE, GUC_RENDER_CLASS), + MAKE_REGLIST(xe_lpd_rc_class_regs, PF, ENGINE_CLASS, GUC_COMPUTE_CLASS), + MAKE_REGLIST(xe_lpd_rc_inst_regs, PF, ENGINE_INSTANCE, GUC_COMPUTE_CLASS), MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_VIDEO_CLASS), MAKE_REGLIST(xe_lpd_vd_inst_regs, PF, ENGINE_INSTANCE, GUC_VIDEO_CLASS), MAKE_REGLIST(xe_lpd_vec_class_regs, PF, ENGINE_CLASS, GUC_VIDEOENHANCE_CLASS),