From patchwork Fri Jan 18 16:46:03 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 10771193 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C4EBB6C2 for ; Fri, 18 Jan 2019 16:47:09 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B14382FB29 for ; Fri, 18 Jan 2019 16:47:09 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A5BA72FBE3; Fri, 18 Jan 2019 16:47:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 59D932FB29 for ; Fri, 18 Jan 2019 16:47:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=/T6xpHkVxYSWyAwqcfrBKE/9yUt6y5zWg8+GNQh7FtY=; b=Tk3hf9MvqImuShKi7luvip01dS G+gpsWe6iq7q/C+vayP+ccNMgZiRdrBAQVcF1DIUg7qFp0A9bHDCwS2meboyunmWiYqev5xG1yX2Z f5t+g2Z56LoxLAcF6qlKIn/o6z5fKJgld08jTZnp+qycVSK3fYdjQWy3grGPv3dROvxz2YSX+oexk RcpjsQKNuVFUetxd3xElUwShSZVDA6/5m8c23YO3b4DlhmZzuUWUap6aO2nq8iVxbZ89S/brRQx7a bJa4Ch+gLiP4JggR6KStxv2osyqZdAoPmyib8mmU7yjlzkjpyY1paKM0r6XghtmqQHNYP+HVUojMc U2GA0uSw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gkXIQ-0008MG-7y; Fri, 18 Jan 2019 16:47:06 +0000 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70] helo=foss.arm.com) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gkXHy-000843-JY for linux-arm-kernel@lists.infradead.org; Fri, 18 Jan 2019 16:46:46 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7C1491596; Fri, 18 Jan 2019 08:46:38 -0800 (PST) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id AF3763F7BE; Fri, 18 Jan 2019 08:46:36 -0800 (PST) From: Julien Grall To: linux-arm-kernel@lists.infradead.org Subject: [RFC PATCH 1/8] arm64/fpsimd: Update documentation of do_sve_acc Date: Fri, 18 Jan 2019 16:46:03 +0000 Message-Id: <20190118164610.8123-2-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190118164610.8123-1-julien.grall@arm.com> References: <20190118164610.8123-1-julien.grall@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190118_084638_747410_59AC63F9 X-CRM114-Status: GOOD ( 12.72 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: tokamoto@jp.fujitsu.com, Anton.Kirilov@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, oleg@redhat.com, Julien Grall , alex.bennee@linaro.org, Dave.Martin@arm.com, Daniel.Kiss@arm.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP TIF_SVE is cleared by fpsimd_restore_current_state() not task_fpsimd_load(). Update the documentatio of do_sve_acc to reflect this behavior. Signed-off-by: Julien Grall --- arch/arm64/kernel/fpsimd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c index 5ebe73b69961..b3870905a492 100644 --- a/arch/arm64/kernel/fpsimd.c +++ b/arch/arm64/kernel/fpsimd.c @@ -799,7 +799,7 @@ void fpsimd_release_task(struct task_struct *dead_task) * the SVE access trap will be disabled the next time this task * reaches ret_to_user. * - * TIF_SVE should be clear on entry: otherwise, task_fpsimd_load() + * TIF_SVE should be clear on entry: otherwise, fpsimd_restore_current_state() * would have disabled the SVE access trap for userspace during * ret_to_user, making an SVE access trap impossible in that case. */ From patchwork Fri Jan 18 16:46:04 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 10771195 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id F3D3013B5 for ; Fri, 18 Jan 2019 16:47:27 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E02422FB29 for ; Fri, 18 Jan 2019 16:47:27 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D455F2FBE3; Fri, 18 Jan 2019 16:47:27 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 7B5CB2FB29 for ; Fri, 18 Jan 2019 16:47:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=ahLyIWc08NAf3XfU7C9Y8LzatuCKdAcW7SsTHUlCovU=; b=EyE1okpd2w0JjlMehI1jMiz5UD DPkL3JgtEVECK1uTrLsqCZFTJ2e8Xfwuq8XEdEhKg4Gf1MjGBBqmMEscL3wdLT3ObtkADYHKfqsIO MfgjUpMsDXnQrxfusubNdOsD8AQpoi4It9X7KkUQzXkP1+32KstXo6wKlu+zkknTlSrZFCTTZRPsT txltPg6jcp0tG5OdgQ0khNPh/zv9oXYj0Ez5rpIRe0UO6KvdRBqarRHWRYLFTPixV2lRurFGzGz2i RM6XftZxpYQtRE+krtOF5a3I9nrOL3GpYcOoSnSpbDM2Gz/eI2WlNsDxgjHcbDnl5LXu8FImaoSSP n8vKkLRw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gkXIh-00007U-0C; Fri, 18 Jan 2019 16:47:23 +0000 Received: from foss.arm.com ([217.140.101.70]) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gkXI0-00085H-Kr for linux-arm-kernel@lists.infradead.org; Fri, 18 Jan 2019 16:46:47 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 86C4F1650; Fri, 18 Jan 2019 08:46:40 -0800 (PST) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B9B163F7BE; Fri, 18 Jan 2019 08:46:38 -0800 (PST) From: Julien Grall To: linux-arm-kernel@lists.infradead.org Subject: [RFC PATCH 2/8] arm64/signal: Update the comment in preserve_sve_context Date: Fri, 18 Jan 2019 16:46:04 +0000 Message-Id: <20190118164610.8123-3-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190118164610.8123-1-julien.grall@arm.com> References: <20190118164610.8123-1-julien.grall@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190118_084640_790121_374421ED X-CRM114-Status: GOOD ( 11.84 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: tokamoto@jp.fujitsu.com, Anton.Kirilov@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, oleg@redhat.com, Julien Grall , alex.bennee@linaro.org, Dave.Martin@arm.com, Daniel.Kiss@arm.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The SVE state is saved by fpsimd_signal_preserve_current_state() and not preserve_fpsimd_context(). Update the comment in preserve_sve_context to reflect the current behavior. Signed-off-by: Julien Grall --- arch/arm64/kernel/signal.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm64/kernel/signal.c b/arch/arm64/kernel/signal.c index 867a7cea70e5..11e335f489b0 100644 --- a/arch/arm64/kernel/signal.c +++ b/arch/arm64/kernel/signal.c @@ -255,7 +255,8 @@ static int preserve_sve_context(struct sve_context __user *ctx) if (vq) { /* * This assumes that the SVE state has already been saved to - * the task struct by calling preserve_fpsimd_context(). + * the task struct by calling the function + * fpsimd_signal_preserve_current_state(). */ err |= __copy_to_user((char __user *)ctx + SVE_SIG_REGS_OFFSET, current->thread.sve_state, From patchwork Fri Jan 18 16:46:05 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 10771197 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C349013B5 for ; Fri, 18 Jan 2019 16:47:43 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AEDB12FB29 for ; Fri, 18 Jan 2019 16:47:43 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A0F192FBE3; Fri, 18 Jan 2019 16:47:43 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 334742FB29 for ; Fri, 18 Jan 2019 16:47:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=bVZMBs7SgLeJlIGXk64pD8K7vSPV6fyxgZBXA/WCvAU=; b=W12vUdPLrqdVF6UZ57y4rs+QoR I7oVBgBITyJDGIUTpkWvu5uvchNrsMMsbVaHpItimfdhMLYOzBgTGOPi4pgEMMPnPrIQ6FvxrBxCT ZYz94gEND8IC4VX6SY1couliG4i1wMRAkMUb8qbtxG9O9ig998OI1kmc4lGb+mHRoUpqvf72LkwxU q2y/gAttfRBL94a/y0IK3K6SDSThTFqUa9/TIKdGcdweY4Xnrg6enUQSv9LcUPwMMt9DE9+HoYogv XTREmRTGcJeY4lEpEc77K5kD0GmFEO1mLV4SOUKHGOX+KqjDKIrxGXBkez95Wr5Mj3UwU6RJXzIrD vPugf6ag==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gkXIw-0000MH-46; Fri, 18 Jan 2019 16:47:38 +0000 Received: from foss.arm.com ([217.140.101.70]) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gkXI2-00085Y-RW for linux-arm-kernel@lists.infradead.org; Fri, 18 Jan 2019 16:46:53 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B78BA165C; Fri, 18 Jan 2019 08:46:42 -0800 (PST) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C51773F7BE; Fri, 18 Jan 2019 08:46:40 -0800 (PST) From: Julien Grall To: linux-arm-kernel@lists.infradead.org Subject: [RFC PATCH 3/8] arm64/fpsimdmacros: Allow the macro "for" to be used in more cases Date: Fri, 18 Jan 2019 16:46:05 +0000 Message-Id: <20190118164610.8123-4-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190118164610.8123-1-julien.grall@arm.com> References: <20190118164610.8123-1-julien.grall@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190118_084643_010720_4B8C1A70 X-CRM114-Status: GOOD ( 12.63 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: tokamoto@jp.fujitsu.com, Anton.Kirilov@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, oleg@redhat.com, Julien Grall , alex.bennee@linaro.org, Dave Martin , Daniel.Kiss@arm.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The current version of the macro "for" is only able to works when the counter is used to generate registers using mnemonics. This is because gas is not able to evaluate the expression generated if used to generate registers name (i.e x\n). Gas offers a way to evaluate macro arguments by using % in front of them under the alternate macro mode [1]. The implementation of "for" is updated to use the alternate macro mode and %, so we can use the macro in more cases. As the alternate macro mode may have side-effect, this is disabled when generating the body. While it is enough to prefix the argument of the macro "__for_body" with %, the arguments of "__for" are also prefixed to get a more bearable value in case of compilation error. [1] https://sourceware.org/binutils/docs/as/Altmacro.html Suggested-by: Dave Martin Signed-off-by: Julien Grall --- arch/arm64/include/asm/fpsimdmacros.h | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/arch/arm64/include/asm/fpsimdmacros.h b/arch/arm64/include/asm/fpsimdmacros.h index 46843515d77b..e2ab77dd9b4f 100644 --- a/arch/arm64/include/asm/fpsimdmacros.h +++ b/arch/arm64/include/asm/fpsimdmacros.h @@ -177,19 +177,23 @@ .macro __for from:req, to:req .if (\from) == (\to) - _for__body \from + _for__body %\from .else - __for \from, (\from) + ((\to) - (\from)) / 2 - __for (\from) + ((\to) - (\from)) / 2 + 1, \to + __for %\from, %((\from) + ((\to) - (\from)) / 2) + __for %((\from) + ((\to) - (\from)) / 2 + 1), %\to .endif .endm .macro _for var:req, from:req, to:req, insn:vararg .macro _for__body \var:req + .noaltmacro \insn + .altmacro .endm + .altmacro __for \from, \to + .noaltmacro .purgem _for__body .endm From patchwork Fri Jan 18 16:46:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 10771199 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 470396C2 for ; Fri, 18 Jan 2019 16:48:00 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2B5402FB55 for ; Fri, 18 Jan 2019 16:48:00 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1C5C62FBE4; Fri, 18 Jan 2019 16:48:00 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C79C32FB55 for ; Fri, 18 Jan 2019 16:47:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=XU+cvUiMd/9Uy0lJjbLv6qsJVyNM6QINAG+GJ0PDiW0=; b=p7CoozCUa9yLTWB5Z/Nvmh9NPP nuP510LN3vm2q0ok4Xa5CagYJs6iej6U5+gCF1VhuqfA3LfVc1WLY0THjA0GPcsVH8VTQxd8N58De tw6wmdSlPCYa52jQRFEMcsiqq4kSRoO6m801FtR6eyEI0tVQZaZedTAlFWv054+8RbETPeEBDD9sw wfcI9AOcFzkU8QaqM8XzFghNE2YfvNUUfWVyvTNOZmz3lYKo/1v5vNuYfhm6m0SEKo0TYORfHobCp Dg1GVwCutw4/oQoASZb3n1qm2IXxKhi9RooN0kXogMj5VaRxpId0UpY0vWRwOWGT735KhuDlqVnMh erxmvkMQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gkXJB-0000fS-7C; Fri, 18 Jan 2019 16:47:53 +0000 Received: from foss.arm.com ([217.140.101.70]) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gkXI4-00085o-SP for linux-arm-kernel@lists.infradead.org; Fri, 18 Jan 2019 16:46:56 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id BE6451684; Fri, 18 Jan 2019 08:46:44 -0800 (PST) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id F2A483F7BE; Fri, 18 Jan 2019 08:46:42 -0800 (PST) From: Julien Grall To: linux-arm-kernel@lists.infradead.org Subject: [RFC PATCH 4/8] arm64/fpsimdmacros: Introduce a macro to update ZCR_EL1.LEN Date: Fri, 18 Jan 2019 16:46:06 +0000 Message-Id: <20190118164610.8123-5-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190118164610.8123-1-julien.grall@arm.com> References: <20190118164610.8123-1-julien.grall@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190118_084645_008832_21709612 X-CRM114-Status: UNSURE ( 9.97 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: tokamoto@jp.fujitsu.com, Anton.Kirilov@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, oleg@redhat.com, Julien Grall , alex.bennee@linaro.org, Dave.Martin@arm.com, Daniel.Kiss@arm.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP A follow-up patch will need to update ZCR_EL1.LEN. Add a macro that could be re-used in the current and new place to avoid code duplication. Signed-off-by: Julien Grall --- arch/arm64/include/asm/fpsimdmacros.h | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-) diff --git a/arch/arm64/include/asm/fpsimdmacros.h b/arch/arm64/include/asm/fpsimdmacros.h index e2ab77dd9b4f..5e291d9c1ba0 100644 --- a/arch/arm64/include/asm/fpsimdmacros.h +++ b/arch/arm64/include/asm/fpsimdmacros.h @@ -198,6 +198,17 @@ .purgem _for__body .endm +/* Update ZCR_EL1.LEN with the new VQ */ +.macro sve_load_vq xvqminus1, xtmp, xtmp2 + mrs_s \xtmp, SYS_ZCR_EL1 + bic \xtmp2, \xtmp, ZCR_ELx_LEN_MASK + orr \xtmp2, \xtmp2, \xvqminus1 + cmp \xtmp2, \xtmp + b.eq 921f + msr_s SYS_ZCR_EL1, \xtmp2 //self-synchronising +921: +.endm + .macro sve_save nxbase, xpfpsr, nxtmp _for n, 0, 31, _sve_str_v \n, \nxbase, \n - 34 _for n, 0, 15, _sve_str_p \n, \nxbase, \n - 16 @@ -212,13 +223,7 @@ .endm .macro sve_load nxbase, xpfpsr, xvqminus1, nxtmp, xtmp2 - mrs_s x\nxtmp, SYS_ZCR_EL1 - bic \xtmp2, x\nxtmp, ZCR_ELx_LEN_MASK - orr \xtmp2, \xtmp2, \xvqminus1 - cmp \xtmp2, x\nxtmp - b.eq 921f - msr_s SYS_ZCR_EL1, \xtmp2 // self-synchronising -921: + sve_load_vq \xvqminus1, x\nxtmp, \xtmp2 _for n, 0, 31, _sve_ldr_v \n, \nxbase, \n - 34 _sve_ldr_p 0, \nxbase _sve_wrffr 0 From patchwork Fri Jan 18 16:46:07 2019 Content-Type: text/plain; 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Fri, 18 Jan 2019 16:48:07 +0000 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70] helo=foss.arm.com) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gkXI7-00086P-0C for linux-arm-kernel@lists.infradead.org; Fri, 18 Jan 2019 16:46:57 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C8C9C80D; Fri, 18 Jan 2019 08:46:46 -0800 (PST) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 08B8E3F7BE; Fri, 18 Jan 2019 08:46:44 -0800 (PST) From: Julien Grall To: linux-arm-kernel@lists.infradead.org Subject: [RFC PATCH 5/8] arm64/sve: Implement helper to flush SVE registers Date: Fri, 18 Jan 2019 16:46:07 +0000 Message-Id: <20190118164610.8123-6-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190118164610.8123-1-julien.grall@arm.com> References: <20190118164610.8123-1-julien.grall@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190118_084647_238015_24EE1B6E X-CRM114-Status: GOOD ( 11.21 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: tokamoto@jp.fujitsu.com, Anton.Kirilov@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, oleg@redhat.com, Julien Grall , alex.bennee@linaro.org, Dave.Martin@arm.com, Daniel.Kiss@arm.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Introduce a new helper that will zero all SVE registers but the first 128-bits of each vector. Signed-off-by: Julien Grall --- arch/arm64/include/asm/fpsimd.h | 3 +++ arch/arm64/include/asm/fpsimdmacros.h | 19 +++++++++++++++++++ arch/arm64/kernel/entry-fpsimd.S | 7 +++++++ 3 files changed, 29 insertions(+) diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h index dd1ad3950ef5..fa2439205c35 100644 --- a/arch/arm64/include/asm/fpsimd.h +++ b/arch/arm64/include/asm/fpsimd.h @@ -79,6 +79,9 @@ static inline void *sve_pffr(struct thread_struct *thread) extern void sve_save_state(void *state, u32 *pfpsr); extern void sve_load_state(void const *state, u32 const *pfpsr, unsigned long vq_minus_1); + +extern void sve_flush_live(void); + extern unsigned int sve_get_vl(void); struct arm64_cpu_capabilities; diff --git a/arch/arm64/include/asm/fpsimdmacros.h b/arch/arm64/include/asm/fpsimdmacros.h index 5e291d9c1ba0..a41ab337bf42 100644 --- a/arch/arm64/include/asm/fpsimdmacros.h +++ b/arch/arm64/include/asm/fpsimdmacros.h @@ -175,6 +175,13 @@ | ((\np) << 5) .endm +/* PFALSE P\np.B */ +.macro _sve_pfalse np + _sve_check_preg \np + .inst 0x2518e400 \ + | (\np) +.endm + .macro __for from:req, to:req .if (\from) == (\to) _for__body %\from @@ -209,6 +216,18 @@ 921: .endm +/* Preserve the first 128-bits of Znz and zero the rest. */ +.macro _sve_flush_z nz + _sve_check_zreg \nz + mov v\nz\().16b, v\nz\().16b +.endm + +.macro sve_flush + _for n, 0, 31, _sve_flush_z \n + _for n, 0, 15, _sve_pfalse \n + _sve_wrffr 0 +.endm + .macro sve_save nxbase, xpfpsr, nxtmp _for n, 0, 31, _sve_str_v \n, \nxbase, \n - 34 _for n, 0, 15, _sve_str_p \n, \nxbase, \n - 16 diff --git a/arch/arm64/kernel/entry-fpsimd.S b/arch/arm64/kernel/entry-fpsimd.S index 12d4958e6429..17121a51c41f 100644 --- a/arch/arm64/kernel/entry-fpsimd.S +++ b/arch/arm64/kernel/entry-fpsimd.S @@ -57,4 +57,11 @@ ENTRY(sve_get_vl) _sve_rdvl 0, 1 ret ENDPROC(sve_get_vl) + +/* Zero all SVE registers but the first 128-bits of each vector */ +ENTRY(sve_flush_live) + sve_flush + ret +ENDPROC(sve_flush_live) + #endif /* CONFIG_ARM64_SVE */ From patchwork Fri Jan 18 16:46:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 10771203 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 94B516C2 for ; Fri, 18 Jan 2019 16:48:26 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7EDFF2FBE3 for ; Fri, 18 Jan 2019 16:48:26 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 706DB2FB55; Fri, 18 Jan 2019 16:48:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 110522FB55 for ; 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Fri, 18 Jan 2019 16:48:23 +0000 Received: from foss.arm.com ([217.140.101.70]) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gkXI9-00087l-CU for linux-arm-kernel@lists.infradead.org; Fri, 18 Jan 2019 16:47:00 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D33801596; Fri, 18 Jan 2019 08:46:48 -0800 (PST) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 12F2B3F7BE; Fri, 18 Jan 2019 08:46:46 -0800 (PST) From: Julien Grall To: linux-arm-kernel@lists.infradead.org Subject: [RFC PATCH 6/8] arm64/sve: Implement helper to load SVE registers from FPSIMD state Date: Fri, 18 Jan 2019 16:46:08 +0000 Message-Id: <20190118164610.8123-7-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190118164610.8123-1-julien.grall@arm.com> References: <20190118164610.8123-1-julien.grall@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190118_084649_922624_D7C0ACA1 X-CRM114-Status: GOOD ( 11.24 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: tokamoto@jp.fujitsu.com, Anton.Kirilov@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, oleg@redhat.com, Julien Grall , alex.bennee@linaro.org, Dave.Martin@arm.com, Daniel.Kiss@arm.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP In a follow-up patch, we may save the FPSIMD rather than the full SVE state when the state has to be zeroed on return to userspace (e.g during a syscall). Introduce an helper to load SVE vectors from FPSIMD state and zero the rest of SVE registers. Signed-off-by: Julien Grall --- arch/arm64/include/asm/fpsimd.h | 3 +++ arch/arm64/kernel/entry-fpsimd.S | 17 +++++++++++++++++ 2 files changed, 20 insertions(+) diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h index fa2439205c35..859c2c108f92 100644 --- a/arch/arm64/include/asm/fpsimd.h +++ b/arch/arm64/include/asm/fpsimd.h @@ -82,6 +82,9 @@ extern void sve_load_state(void const *state, u32 const *pfpsr, extern void sve_flush_live(void); +extern void sve_load_from_fpsimd_state(struct user_fpsimd_state const *state, + unsigned long vq_minus_1); + extern unsigned int sve_get_vl(void); struct arm64_cpu_capabilities; diff --git a/arch/arm64/kernel/entry-fpsimd.S b/arch/arm64/kernel/entry-fpsimd.S index 17121a51c41f..35c21a707730 100644 --- a/arch/arm64/kernel/entry-fpsimd.S +++ b/arch/arm64/kernel/entry-fpsimd.S @@ -58,6 +58,23 @@ ENTRY(sve_get_vl) ret ENDPROC(sve_get_vl) +/* + * Load SVE state from FPSIMD state. + * + * x0 = pointer to struct fpsimd_state + * x1 = VQ - 1 + * + * Each SVE vector will be loaded with the first 128-bits taken from FPSIMD + * and the rest zeroed. All the other SVE registers will be zeroed. + */ +ENTRY(sve_load_from_fpsimd_state) + sve_load_vq x1, x2, x3 + fpsimd_restore x0, 8 + _for n, 0, 15, _sve_pfalse \n + _sve_wrffr 0 + ret +ENDPROC(sve_load_from_fpsimd_state) + /* Zero all SVE registers but the first 128-bits of each vector */ ENTRY(sve_flush_live) sve_flush From patchwork Fri Jan 18 16:46:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 10771207 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 367F76C2 for ; Fri, 18 Jan 2019 16:49:05 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 21F592E3F5 for ; Fri, 18 Jan 2019 16:49:05 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 15E202E435; Fri, 18 Jan 2019 16:49:05 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 41FC92E3F5 for ; Fri, 18 Jan 2019 16:49:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=KzcFsn1zLvC6H6Yco5qQReHj5e1/NsBdzzbM3C26Y4k=; b=rceKOCrlld2i//tXNR0nmJed6o wc/Vev0D/SyI1Nj1sEPl4oGchgU0BWdYt0M7VLihTysAXoXlgY6g+K/pNGxX2rSp17CBX/U+7HUA4 3fYocvSZor/xM/8I3J2tqTo/1Zuth3UX8OClC7wWA3koXBYpTUpr8F5Hhl0pVgwsnsutqdomMWysl BL3Zg7HbxFFgBhIZvN/ITEaeW5FYA9KbRfQ1ZBUehWJxnG0/fbnfDjLInPSgOG63wwIdgsvzWvNf7 3JLJlbW7iRZ443Dp+TbNpgdDtfbFGHRYFnNInjPIAADOa7Me35HOsl2NdyLn6eYh6PtUDy6r0y64t hYA4uRAg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gkXKC-0001cN-4u; Fri, 18 Jan 2019 16:48:56 +0000 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70] helo=foss.arm.com) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gkXIB-00089X-51 for linux-arm-kernel@lists.infradead.org; Fri, 18 Jan 2019 16:47:04 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DCF7C1650; Fri, 18 Jan 2019 08:46:50 -0800 (PST) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 1C84F3F7BE; Fri, 18 Jan 2019 08:46:48 -0800 (PST) From: Julien Grall To: linux-arm-kernel@lists.infradead.org Subject: [RFC PATCH 7/8] arm64/sve: Don't disable SVE on syscalls return Date: Fri, 18 Jan 2019 16:46:09 +0000 Message-Id: <20190118164610.8123-8-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190118164610.8123-1-julien.grall@arm.com> References: <20190118164610.8123-1-julien.grall@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190118_084651_895236_1306845A X-CRM114-Status: GOOD ( 22.76 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: tokamoto@jp.fujitsu.com, Anton.Kirilov@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, oleg@redhat.com, Julien Grall , alex.bennee@linaro.org, Dave.Martin@arm.com, Daniel.Kiss@arm.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Per the syscalls ABI, SVE registers will be unknown after a syscalls. In practice the kernel will disable SVE and zero all the registers but the first 128-bits of the vector on the next SVE instructions. In workload mixing SVE and syscall, this will result of 2 entry/exit to the kernel per exit. To avoid the second entry/exit, a new flag TIF_SVE_NEEDS_FLUSH is introduced to mark a task that needs to flush the SVE context on return to userspace. On entry to a syscall, the flag TIF_SVE will still be cleared. It will be restored on return to userspace once the SVE state has been flushed. This means that if a task requires to synchronize the FP state during a syscall (e.g context switch, signal), only the FPSIMD registers will be saved. When the task is rescheduled, the SVE state will be loaded from FPSIMD state. Signed-off-by: Julien Grall --- arch/arm64/include/asm/thread_info.h | 5 ++++- arch/arm64/kernel/fpsimd.c | 32 ++++++++++++++++++++++++++++++++ arch/arm64/kernel/process.c | 1 + arch/arm64/kernel/ptrace.c | 7 +++++++ arch/arm64/kernel/signal.c | 14 +++++++++++++- arch/arm64/kernel/syscall.c | 13 +++++-------- 6 files changed, 62 insertions(+), 10 deletions(-) diff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/thread_info.h index bbca68b54732..78a836d61dc1 100644 --- a/arch/arm64/include/asm/thread_info.h +++ b/arch/arm64/include/asm/thread_info.h @@ -87,6 +87,7 @@ void arch_release_task_struct(struct task_struct *tsk); #define TIF_FOREIGN_FPSTATE 3 /* CPU's FP state is not current's */ #define TIF_UPROBE 4 /* uprobe breakpoint or singlestep */ #define TIF_FSCHECK 5 /* Check FS is USER_DS on return */ +#define TIF_SVE_NEEDS_FLUSH 6 /* Flush SVE registers on return */ #define TIF_NOHZ 7 #define TIF_SYSCALL_TRACE 8 #define TIF_SYSCALL_AUDIT 9 @@ -114,10 +115,12 @@ void arch_release_task_struct(struct task_struct *tsk); #define _TIF_FSCHECK (1 << TIF_FSCHECK) #define _TIF_32BIT (1 << TIF_32BIT) #define _TIF_SVE (1 << TIF_SVE) +#define _TIF_SVE_NEEDS_FLUSH (1 << TIF_SVE_NEEDS_FLUSH) #define _TIF_WORK_MASK (_TIF_NEED_RESCHED | _TIF_SIGPENDING | \ _TIF_NOTIFY_RESUME | _TIF_FOREIGN_FPSTATE | \ - _TIF_UPROBE | _TIF_FSCHECK) + _TIF_UPROBE | _TIF_FSCHECK | \ + _TIF_SVE_NEEDS_FLUSH) #define _TIF_SYSCALL_WORK (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | \ _TIF_SYSCALL_TRACEPOINT | _TIF_SECCOMP | \ diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c index b3870905a492..ff76e7cc358d 100644 --- a/arch/arm64/kernel/fpsimd.c +++ b/arch/arm64/kernel/fpsimd.c @@ -148,6 +148,8 @@ extern void __percpu *efi_sve_state; */ static void __sve_free(struct task_struct *task) { + /* SVE context will be zeroed when allocated. */ + clear_tsk_thread_flag(task, TIF_SVE_NEEDS_FLUSH); kfree(task->thread.sve_state); task->thread.sve_state = NULL; } @@ -204,6 +206,11 @@ static void sve_free(struct task_struct *task) * * FPSR and FPCR are always stored in task->thread.uw.fpsimd_state * irrespective of whether TIF_SVE is clear or set, since these are * not vector length dependent. + * + * * When TIF_SVE_NEEDS_FLUSH is set, all the SVE registers but the first + * 128-bits of the Z-registers are logically zero but not stored anywhere. + * Saving logically zero bits across context switches is therefore + * pointless, although they must be zeroed before re-entering userspace. */ /* @@ -213,6 +220,14 @@ static void sve_free(struct task_struct *task) * thread_struct is known to be up to date, when preparing to enter * userspace. * + * When TIF_SVE_NEEDS_FLUSH is set, the SVE state will be restored from the + * FPSIMD state. + * + * TIF_SVE_NEEDS_FLUSH and TIF_SVE set at the same time should never happen. + * In the unlikely case it happens, the code is able to cope with it. I will + * first restore the SVE registers and then flush them in + * fpsimd_restore_current_state. + * * Softirqs (and preemption) must be disabled. */ static void task_fpsimd_load(void) @@ -223,6 +238,12 @@ static void task_fpsimd_load(void) sve_load_state(sve_pffr(¤t->thread), ¤t->thread.uw.fpsimd_state.fpsr, sve_vq_from_vl(current->thread.sve_vl) - 1); + else if (system_supports_sve() && + test_and_clear_thread_flag(TIF_SVE_NEEDS_FLUSH)) { + sve_load_from_fpsimd_state(¤t->thread.uw.fpsimd_state, + sve_vq_from_vl(current->thread.sve_vl) - 1); + set_thread_flag(TIF_SVE); + } else fpsimd_load_state(¤t->thread.uw.fpsimd_state); } @@ -1014,6 +1035,17 @@ void fpsimd_restore_current_state(void) fpsimd_bind_task_to_cpu(); } + if (system_supports_sve() && + test_and_clear_thread_flag(TIF_SVE_NEEDS_FLUSH)) { + /* + * The userspace had SVE enabled on entry to the kernel + * and requires the state to be flushed. + */ + sve_flush_live(); + sve_user_enable(); + set_thread_flag(TIF_SVE); + } + local_bh_enable(); } diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c index a0f985a6ac50..52e27d18cb8f 100644 --- a/arch/arm64/kernel/process.c +++ b/arch/arm64/kernel/process.c @@ -319,6 +319,7 @@ int copy_thread(unsigned long clone_flags, unsigned long stack_start, * and disable discard SVE state for p: */ clear_tsk_thread_flag(p, TIF_SVE); + clear_tsk_thread_flag(p, TIF_SVE_NEEDS_FLUSH); p->thread.sve_state = NULL; /* diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c index 9dce33b0e260..20099c0604be 100644 --- a/arch/arm64/kernel/ptrace.c +++ b/arch/arm64/kernel/ptrace.c @@ -899,6 +899,11 @@ static int sve_set(struct task_struct *target, ret = __fpr_set(target, regset, pos, count, kbuf, ubuf, SVE_PT_FPSIMD_OFFSET); clear_tsk_thread_flag(target, TIF_SVE); + /* + * If ptrace requested to use FPSIMD, then don't try to + * re-enable SVE when the task is running again. + */ + clear_tsk_thread_flag(target, TIF_SVE_NEEDS_FLUSH); goto out; } @@ -923,6 +928,8 @@ static int sve_set(struct task_struct *target, */ fpsimd_sync_to_sve(target); set_tsk_thread_flag(target, TIF_SVE); + /* Don't flush SVE registers on return as ptrace will update them. */ + clear_tsk_thread_flag(target, TIF_SVE_NEEDS_FLUSH); BUILD_BUG_ON(SVE_PT_SVE_OFFSET != sizeof(header)); start = SVE_PT_SVE_OFFSET; diff --git a/arch/arm64/kernel/signal.c b/arch/arm64/kernel/signal.c index 11e335f489b0..cf70b196fc82 100644 --- a/arch/arm64/kernel/signal.c +++ b/arch/arm64/kernel/signal.c @@ -535,6 +535,17 @@ static int restore_sigframe(struct pt_regs *regs, } else { err = restore_fpsimd_context(user.fpsimd); } + + /* + * When successfully restoring the: + * - FPSIMD context, we don't want to re-enable SVE + * - SVE context, we don't want to override what was + * restored + */ + if (err == 0) + clear_thread_flag(TIF_SVE_NEEDS_FLUSH); + + } return err; @@ -947,7 +958,8 @@ asmlinkage void do_notify_resume(struct pt_regs *regs, rseq_handle_notify_resume(NULL, regs); } - if (thread_flags & _TIF_FOREIGN_FPSTATE) + if (thread_flags & (_TIF_FOREIGN_FPSTATE | + _TIF_SVE_NEEDS_FLUSH)) fpsimd_restore_current_state(); } diff --git a/arch/arm64/kernel/syscall.c b/arch/arm64/kernel/syscall.c index 5610ac01c1ec..5ae2100fc5e8 100644 --- a/arch/arm64/kernel/syscall.c +++ b/arch/arm64/kernel/syscall.c @@ -111,16 +111,13 @@ static inline void sve_user_discard(void) if (!system_supports_sve()) return; - clear_thread_flag(TIF_SVE); - /* - * task_fpsimd_load() won't be called to update CPACR_EL1 in - * ret_to_user unless TIF_FOREIGN_FPSTATE is still set, which only - * happens if a context switch or kernel_neon_begin() or context - * modification (sigreturn, ptrace) intervenes. - * So, ensure that CPACR_EL1 is already correct for the fast-path case. + * TIF_SVE is cleared to save the FPSIMD state rather than the SVE + * state on context switch. The bit will be set again while + * restoring/zeroing the registers. */ - sve_user_disable(); + if (test_and_clear_thread_flag(TIF_SVE)) + set_thread_flag(TIF_SVE_NEEDS_FLUSH); } asmlinkage void el0_svc_handler(struct pt_regs *regs) From patchwork Fri Jan 18 16:46:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 10771205 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 511666C2 for ; Fri, 18 Jan 2019 16:48:42 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3B9682FB55 for ; Fri, 18 Jan 2019 16:48:42 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2E0FD2FBEF; Fri, 18 Jan 2019 16:48:42 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id A15972FB55 for ; Fri, 18 Jan 2019 16:48:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=kcC7ZgYPHJJt7/whp8Cx+WWtIj77rVhJvH8LFgUmccI=; b=CUc9UoskEv9HtCt0qMxX4Ur8h6 7DSfeYIz5zdbmUGnnbiyIJVw10isLviFO6M97+rlLAHdN1yiaSBXxdAS2fShQaInOFtalwVE1sAnE 5LHRIOErmtlRACIg1YHwsnoUNjNzj0Nw1DZeZnYNALAMh9QW/ozuqcUWChj6bVzKuYuqxovXoMbjB NEJgksWC23CDN5GoJwsDLivLid/SY+JvvKnGSlJkdIACUKNv6h3bSxlTJjp8wEBNqA9/S64OHuxq3 /QtS1d22dEwL4e7c8xHpm3xfpPUKQ770ex+T6NQfJ7wlFXfxCKIX2hjYzS4BDuzI9WCZnGaQFhSg2 kFVoq6iw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gkXJv-0001Mv-AS; Fri, 18 Jan 2019 16:48:39 +0000 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70] helo=foss.arm.com) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gkXID-0008BZ-7i for linux-arm-kernel@lists.infradead.org; Fri, 18 Jan 2019 16:47:03 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E7E00168F; Fri, 18 Jan 2019 08:46:52 -0800 (PST) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 2762F3F7BE; Fri, 18 Jan 2019 08:46:51 -0800 (PST) From: Julien Grall To: linux-arm-kernel@lists.infradead.org Subject: [RFC PATCH 8/8] arm64/sve: Rework SVE trap access to use TIF_SVE_NEEDS_FLUSH Date: Fri, 18 Jan 2019 16:46:10 +0000 Message-Id: <20190118164610.8123-9-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190118164610.8123-1-julien.grall@arm.com> References: <20190118164610.8123-1-julien.grall@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190118_084653_902306_155A55EC X-CRM114-Status: GOOD ( 18.94 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: tokamoto@jp.fujitsu.com, Anton.Kirilov@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, oleg@redhat.com, Julien Grall , alex.bennee@linaro.org, Dave.Martin@arm.com, Daniel.Kiss@arm.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP SVE state will be flushed on the first SVE access trap. At the moment, the SVE state will be generated from the FPSIMD state in software and then loaded in memory. It is possible to use the newly introduce flag TIF_SVE_NEEDS_FLUSH to avoid a lot of memory access. If the FPSIMD state is in memory, the SVE state will be loaded on return to userspace from the FPSIMD state. If the FPSIMD state is loaded, then we need to the vector-length before relying on return to userspace to flush the SVE registers. This is because the vector-length is only set when loading from memory. Signed-off-by: Julien Grall --- arch/arm64/include/asm/fpsimd.h | 2 ++ arch/arm64/kernel/entry-fpsimd.S | 5 +++++ arch/arm64/kernel/fpsimd.c | 30 ++++++++++++++++++------------ 3 files changed, 25 insertions(+), 12 deletions(-) diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h index 859c2c108f92..8a53c46adfa3 100644 --- a/arch/arm64/include/asm/fpsimd.h +++ b/arch/arm64/include/asm/fpsimd.h @@ -87,6 +87,8 @@ extern void sve_load_from_fpsimd_state(struct user_fpsimd_state const *state, extern unsigned int sve_get_vl(void); +extern void sve_set_vq(unsigned long vq_minus_1); + struct arm64_cpu_capabilities; extern void sve_kernel_enable(const struct arm64_cpu_capabilities *__unused); diff --git a/arch/arm64/kernel/entry-fpsimd.S b/arch/arm64/kernel/entry-fpsimd.S index 35c21a707730..e3ec566d7335 100644 --- a/arch/arm64/kernel/entry-fpsimd.S +++ b/arch/arm64/kernel/entry-fpsimd.S @@ -58,6 +58,11 @@ ENTRY(sve_get_vl) ret ENDPROC(sve_get_vl) +ENTRY(sve_set_vq) + sve_load_vq x0, x1, x2 + ret +ENDPROC(sve_set_vq) + /* * Load SVE state from FPSIMD state. * diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c index ff76e7cc358d..d6a61828ccd6 100644 --- a/arch/arm64/kernel/fpsimd.c +++ b/arch/arm64/kernel/fpsimd.c @@ -815,10 +815,8 @@ void fpsimd_release_task(struct task_struct *dead_task) /* * Trapped SVE access * - * Storage is allocated for the full SVE state, the current FPSIMD - * register contents are migrated across, and TIF_SVE is set so that - * the SVE access trap will be disabled the next time this task - * reaches ret_to_user. + * Storage is allocated for the full SVE state and rely on the return + * code to actually convert the FPSIMD state to SVE state. * * TIF_SVE should be clear on entry: otherwise, fpsimd_restore_current_state() * would have disabled the SVE access trap for userspace during @@ -836,15 +834,20 @@ asmlinkage void do_sve_acc(unsigned int esr, struct pt_regs *regs) local_bh_disable(); - fpsimd_save(); - fpsimd_to_sve(current); - - /* Force ret_to_user to reload the registers: */ - fpsimd_flush_task_state(current); - set_thread_flag(TIF_FOREIGN_FPSTATE); + set_thread_flag(TIF_SVE_NEEDS_FLUSH); + /* + * We should not be here with SVE enabled. TIF_SVE will be set + * before returning to userspace by fpsimd_restore_current_state(). + */ + WARN_ON(test_thread_flag(TIF_SVE)); - if (test_and_set_thread_flag(TIF_SVE)) - WARN_ON(1); /* SVE access shouldn't have trapped */ + /* + * The return path (see fpsimd_restore_current_state) requires the + * Vector-Length to be loaded beforehand when the FPSIMD state is + * loaded. + */ + if (!test_thread_flag(TIF_FOREIGN_FPSTATE)) + sve_set_vq(sve_vq_from_vl(current->thread.sve_vl) - 1); local_bh_enable(); } @@ -1040,6 +1043,9 @@ void fpsimd_restore_current_state(void) /* * The userspace had SVE enabled on entry to the kernel * and requires the state to be flushed. + * + * We rely on the Vector-Length to be set correctly before-hand + * when converting a loaded FPSIMD state to SVE state. */ sve_flush_live(); sve_user_enable();