From patchwork Fri Oct 21 05:49:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Jouni_H=C3=B6gander?= X-Patchwork-Id: 13014289 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 15E47C4332F for ; Fri, 21 Oct 2022 05:50:59 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6DA9A10E1F4; Fri, 21 Oct 2022 05:50:56 +0000 (UTC) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id D134910E1F4 for ; Fri, 21 Oct 2022 05:50:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1666331444; x=1697867444; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=FP4GiPQLARg62WcS2hnwg3qHavzf4iEk460MI2bskPg=; b=EJHsArMcyGBo4fQtFph8CRtiTVtVs9SSeqxmumeYSyOt62YeoGnKxvGl L1RX7tG2jzwmhu5+bZ++c4U+m0vWWha+lz9UkExrCUXDa6x7wbE5Pw5sw jJk8h+WVB2+oqHkbaydwr/DDRZu2OOgShb7GgotTrwxDTbiq8391Ho8F+ XTf4IZKzUCt7yIi/B121nuLhZA7mtV2iIJk3eUwq93NLOH2ty0cFsA6wf k7QiaFR7XMFDd3nKpiXes80waG3JeYFS/ob33zK7+U2/8q5ZeZLYyUOHi 9TfpJ5ff3Kcq6gAsYXgO9XxaTW+xvg1khAkgqiawiEqCRHyknhIgd077q w==; X-IronPort-AV: E=McAfee;i="6500,9779,10506"; a="308605705" X-IronPort-AV: E=Sophos;i="5.95,200,1661842800"; d="scan'208";a="308605705" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Oct 2022 22:50:43 -0700 X-IronPort-AV: E=McAfee;i="6500,9779,10506"; a="630296331" X-IronPort-AV: E=Sophos;i="5.95,200,1661842800"; d="scan'208";a="630296331" Received: from jpheiska-mobl.ger.corp.intel.com (HELO jhogande-mobl1.ger.corp.intel.com) ([10.249.38.122]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Oct 2022 22:50:41 -0700 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: Intel-gfx@lists.freedesktop.org Date: Fri, 21 Oct 2022 08:49:22 +0300 Message-Id: <20221021054922.2753034-1-jouni.hogander@intel.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Subject: [Intel-gfx] [PATCH] drm/i915/psr: Remove inappropriate DSC slice alignment warning X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Selective update area is now aligned with DSC slice height when DSC is enabled. Remove inappropriate warning about missing DSC alignment. Cc: José Roberto de Souza Cc: Mika Kahola Fixes: 47d4ae2192cb ("drm/i915/mtl: Extend PSR support") Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/7212 Signed-off-by: Jouni Högander Signed-off-by: Anshuman Gupta Reviewed-by: Mika Kahola --- drivers/gpu/drm/i915/display/intel_psr.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 904a1049eff3..64e9e134fdca 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -1678,9 +1678,6 @@ static void intel_psr2_sel_fetch_pipe_alignment(const struct intel_crtc_state *c pipe_clip->y1 -= pipe_clip->y1 % y_alignment; if (pipe_clip->y2 % y_alignment) pipe_clip->y2 = ((pipe_clip->y2 / y_alignment) + 1) * y_alignment; - - if (IS_ALDERLAKE_P(dev_priv) && crtc_state->dsc.compression_enable) - drm_warn(&dev_priv->drm, "Missing PSR2 sel fetch alignment with DSC\n"); } /*