From patchwork Thu Oct 27 14:39:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Thaler X-Patchwork-Id: 13022217 X-Patchwork-Delegate: bpf@iogearbox.net Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 19EB3FA3740 for ; Thu, 27 Oct 2022 14:39:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229670AbiJ0Ojc (ORCPT ); Thu, 27 Oct 2022 10:39:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45034 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234891AbiJ0Ojb (ORCPT ); Thu, 27 Oct 2022 10:39:31 -0400 Received: from mail-qt1-x833.google.com (mail-qt1-x833.google.com [IPv6:2607:f8b0:4864:20::833]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B1CF8765B for ; Thu, 27 Oct 2022 07:39:30 -0700 (PDT) Received: by mail-qt1-x833.google.com with SMTP id z6so1245508qtv.5 for ; Thu, 27 Oct 2022 07:39:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=20210112; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=K3mDVrST8R55B5LKmbjpdi1H/+/Vgvj4Ij8kYvApKU0=; b=BSi737I2htrWAisuysHLhNn2JrXto92dIeHLQq/jHmy/r5TXniNp1I3AUtOdmc2gQp 0XsR4lbsj2GMq//WZK/3pfrTDcol9oxBhCFge2w3uMURF+3zLMOYdFu9R7h1PTXRBHPD ALv33kqp3AXtYY/5GbrBUMAyus5nS+mc/CiUQS/l44ZBu7YYo2PjGJnBpDTRHQ+DG0rv tKn7auRVzthzVP3OJ0GwwKeZaMQmh9oVmNKzwgnKMt6k+eBhwc46vO4KRbZU8K540G7s HIuac6xfq+LQKqaWHeHWiNRR0YO4duWHNtPLeLLu8TpfMzSiyYz1cxxEXy3HWCI6s8Uv HZ1A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=K3mDVrST8R55B5LKmbjpdi1H/+/Vgvj4Ij8kYvApKU0=; b=xS3aR9rLjMhDcZaBSft8JTKeJSf7bSIsss9WgUyCapBKeRPhrKVWgRUASXRzIT/6xm rCM8VXPYvrBrCL6rKk16POe/N/guMEJcf6vWkiBcuHqB5vDyEJ9PPqKXvBtMk1ouISfr 3rPZBgCrpaIF/+vfIFShY/9+ltssZMTLrwqNzzQFxauGV2aUP8jmpeiuscrqs8JN3JAL dgcawI62I3z9QstyMAl5varikA7TVp3NdEKhIxJRSH9I4A+U7UIR3R/Oa4MaU4kamkd/ Yml6//uT7nVE3fxzWo4nP9BKGgELWFZ79QsyNw73ZLUb0ZYi9j30p+0pjDehvdrYHX8a r3mQ== X-Gm-Message-State: ACrzQf1pehUeGqVtR9g1mMa8D4KxpBeCqztG2kNgrx9FrTvRD98j5bu4 ze9Ip1XjsLieUjam2A6ZBLlpL+nOX2hnZw== X-Google-Smtp-Source: AMsMyM5x7/RACF5/Rbz1dFDIYncP9babSo6HjI7WFum8L2pzNZqL29dBSg+QVLVSichW8VhfGbvH4A== X-Received: by 2002:ac8:7e82:0:b0:39c:f746:9250 with SMTP id w2-20020ac87e82000000b0039cf7469250mr41819246qtj.620.1666881569501; Thu, 27 Oct 2022 07:39:29 -0700 (PDT) Received: from mariner-vm.. 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[67.185.99.176]) by smtp.gmail.com with ESMTPSA id n3-20020a05620a294300b006ed138e89f2sm1060825qkp.123.2022.10.27.07.39.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Oct 2022 07:39:29 -0700 (PDT) From: dthaler1968@googlemail.com To: bpf@vger.kernel.org Cc: Dave Thaler Subject: [PATCH 1/4] bpf, docs: Add note about type convention Date: Thu, 27 Oct 2022 14:39:11 +0000 Message-Id: <20221027143914.1928-1-dthaler1968@googlemail.com> X-Mailer: git-send-email 2.33.4 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: bpf@vger.kernel.org X-Patchwork-Delegate: bpf@iogearbox.net From: Dave Thaler Add note about type convention Signed-off-by: Dave Thaler Acked-by: Stanislav Fomichev --- Documentation/bpf/instruction-set.rst | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/bpf/instruction-set.rst b/Documentation/bpf/instruction-set.rst index 5d798437d..bed6d33fc 100644 --- a/Documentation/bpf/instruction-set.rst +++ b/Documentation/bpf/instruction-set.rst @@ -7,6 +7,11 @@ eBPF Instruction Set Specification, v1.0 This document specifies version 1.0 of the eBPF instruction set. +Documentation conventions +========================= + +For brevity, this document uses the type notion "u64", "u32", etc. +to mean an unsigned integer whose width is the specified number of bits. Registers and calling convention ================================ @@ -116,6 +121,8 @@ BPF_END 0xd0 byte swap operations (see `Byte swap instructions`_ below) dst_reg = (u32) dst_reg + (u32) src_reg; +where '(u32)' indicates truncation to 32 bits. + ``BPF_ADD | BPF_X | BPF_ALU64`` means:: dst_reg = dst_reg + src_reg From patchwork Thu Oct 27 14:39:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Thaler X-Patchwork-Id: 13022220 X-Patchwork-Delegate: bpf@iogearbox.net Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D291CECAAA1 for ; Thu, 27 Oct 2022 14:39:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234891AbiJ0Ojt (ORCPT ); Thu, 27 Oct 2022 10:39:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46298 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235362AbiJ0Ojo (ORCPT ); Thu, 27 Oct 2022 10:39:44 -0400 Received: from mail-qk1-x734.google.com (mail-qk1-x734.google.com [IPv6:2607:f8b0:4864:20::734]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 73FB83FA18 for ; Thu, 27 Oct 2022 07:39:42 -0700 (PDT) Received: by mail-qk1-x734.google.com with SMTP id f8so1038439qkg.3 for ; Thu, 27 Oct 2022 07:39:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=eDdqBOIUMediN5WUAXI9KaERBAOfgJ/z4PXqa10D5vw=; b=fB5ll8lI96bS26jmulG4wtc0Zp+zLdba/ZysVBkx+NcVp/dkT124+zcem5qsEBC/dq lXpWd0uaB41mO/05Lj3bUJkQjSxLDqOzotQq+oPUvuhOoGV2/Me9hPen6jbZwM3aH5m7 K/HvBRHxbmc3u/l7Y8UNCn+oEAPo7ppi5tOB2jHY4X085XYNL65RRA5Y4E5T7E5TQGZm ZrVqO4Juy1wzMeee1zE9jYPF9ICG4S63ZQrxEy/7l7Rw6lLLsefmtZIOm5bbtBFuIYNI 6Y8PaxYpbdnxXA/JJ9kZH4JCGObJ77AHStIJbArgLy7cauVBUKHZUk2MhKuG7MELPNi2 vFlw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=eDdqBOIUMediN5WUAXI9KaERBAOfgJ/z4PXqa10D5vw=; b=z9oukSLZqlO7UipulKRtW68xBMSDev3eq0ORqhieGOwAgd9qJNuGxiUKMS7r4P8ejc X87mW3vwLncpcxA7vSZfhJEk9NFi23egVpO2X+vZICIjJ3OD/qcmhNwD5nWdvSjr7Jb5 YMx6oWdYOfhXe4RUTxzyR0oajcpAoEvcAsio/igxj0DZxyS/IUytmsAxrynriXIXEYZP dw5O/FXHlidXTKFM6kBqCXwyEX8AU+K/HffzAAN9wJWECsNhHsasL5xxMrUWDfrXMxOL mDK3Pc0mhNeiFz5VfFTHFxsEv/yKWEluCKpevPLmP/TifUSWJcFFJuu++FWIf3ebc7FU r+Tw== X-Gm-Message-State: ACrzQf2e5kSpyUMLJwiCA3J1dT/eI3lJm+0i0FNk+5YOQ5K38bbzMEsA TLnuU1rYveCiVkrP36tiZQAqbETNC9ddwA== X-Google-Smtp-Source: AMsMyM4+iiIOQ28SeuOTvpOCADhUhVXMa7dj9CbcJy/EZqrm2P7SfUEldM9jCR6qHMlpvq4o7AJ9ZA== X-Received: by 2002:a05:620a:288b:b0:6b6:4f9b:85c6 with SMTP id j11-20020a05620a288b00b006b64f9b85c6mr34530570qkp.614.1666881570662; Thu, 27 Oct 2022 07:39:30 -0700 (PDT) Received: from mariner-vm.. (c-67-185-99-176.hsd1.wa.comcast.net. [67.185.99.176]) by smtp.gmail.com with ESMTPSA id n3-20020a05620a294300b006ed138e89f2sm1060825qkp.123.2022.10.27.07.39.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Oct 2022 07:39:30 -0700 (PDT) From: dthaler1968@googlemail.com To: bpf@vger.kernel.org Cc: Dave Thaler Subject: [PATCH 2/4] bpf, docs: Fix modulo zero, division by zero, overflow, and underflow Date: Thu, 27 Oct 2022 14:39:12 +0000 Message-Id: <20221027143914.1928-2-dthaler1968@googlemail.com> X-Mailer: git-send-email 2.33.4 In-Reply-To: <20221027143914.1928-1-dthaler1968@googlemail.com> References: <20221027143914.1928-1-dthaler1968@googlemail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: bpf@vger.kernel.org X-Patchwork-Delegate: bpf@iogearbox.net From: Dave Thaler Fix modulo zero, division by zero, overflow, and underflow. Also clarify how a negative immediate value is ued in unsigned division Signed-off-by: Dave Thaler --- Documentation/bpf/instruction-set.rst | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/Documentation/bpf/instruction-set.rst b/Documentation/bpf/instruction-set.rst index bed6d33fc..74dcc13a9 100644 --- a/Documentation/bpf/instruction-set.rst +++ b/Documentation/bpf/instruction-set.rst @@ -104,19 +104,26 @@ code value description BPF_ADD 0x00 dst += src BPF_SUB 0x10 dst -= src BPF_MUL 0x20 dst \*= src -BPF_DIV 0x30 dst /= src +BPF_DIV 0x30 dst = (src != 0) ? (dst / src) : 0 BPF_OR 0x40 dst \|= src BPF_AND 0x50 dst &= src BPF_LSH 0x60 dst <<= src BPF_RSH 0x70 dst >>= src BPF_NEG 0x80 dst = ~src -BPF_MOD 0x90 dst %= src +BPF_MOD 0x90 dst = (src != 0) ? (dst % src) : dst BPF_XOR 0xa0 dst ^= src BPF_MOV 0xb0 dst = src BPF_ARSH 0xc0 sign extending shift right BPF_END 0xd0 byte swap operations (see `Byte swap instructions`_ below) ======== ===== ========================================================== +Underflow and overflow are allowed during arithmetic operations, +meaning the 64-bit or 32-bit value will wrap. If +eBPF program execution would result in division by zero, +the destination register is instead set to zero. +If execution would result in modulo by zero, +the destination register is instead left unchanged. + ``BPF_ADD | BPF_X | BPF_ALU`` means:: dst_reg = (u32) dst_reg + (u32) src_reg; @@ -135,6 +142,10 @@ where '(u32)' indicates truncation to 32 bits. src_reg = src_reg ^ imm32 +Also note that the division and modulo operations are unsigned, +where 'imm' is first sign extended to 64 bits and then converted +to an unsigned 64-bit value. There are no instructions for +signed division or modulo. Byte swap instructions ~~~~~~~~~~~~~~~~~~~~~~ From patchwork Thu Oct 27 14:39:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Thaler X-Patchwork-Id: 13022218 X-Patchwork-Delegate: bpf@iogearbox.net Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DB407FA3740 for ; Thu, 27 Oct 2022 14:39:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235369AbiJ0Oji (ORCPT ); Thu, 27 Oct 2022 10:39:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45760 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233473AbiJ0Ojh (ORCPT ); Thu, 27 Oct 2022 10:39:37 -0400 Received: from mail-qt1-x82f.google.com (mail-qt1-x82f.google.com [IPv6:2607:f8b0:4864:20::82f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 861C026576 for ; Thu, 27 Oct 2022 07:39:35 -0700 (PDT) Received: by mail-qt1-x82f.google.com with SMTP id f22so1247669qto.3 for ; Thu, 27 Oct 2022 07:39:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=n4W9neA9Kpon8S9MP6UDODUqYxQ43Symz/mF9Y0tGOA=; b=Ab7fAToKMh0Vkf0kupAeSwRnBxeYjo2G4R8H78sWkRIpwpY2aDgPgMgZL/oZhfOUwF IUup5yG6+Kx4zt9bgaaYWyBLeQav7as/+7biMg7U36aP5eehGNPw0ISgtBnhSti3iF5N f67tTnqqHoWpZwAqhOYd8QJYXZAdC1q8k0p6E/IkMl9cXFGaSTPpDrfKpQfLVYCE5+oq Hhw1czjNtNt5hcYrfZJGikF2gAszZybn1v0BP9eQLSyyYbBk11KYC0ZnlmOQ9ouPXQNP bDTHHH57+IyPtMFLlV7/wIWfof3mSWf83eexJfq3OlbvbIfMNuHchVMMWIvcDBgNBTOm ZVnA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=n4W9neA9Kpon8S9MP6UDODUqYxQ43Symz/mF9Y0tGOA=; b=vCVDxVEpEF7R0UuVAvUbRlvHJC/RJtAYSjyQXFsp2GNgaj3Un+x1kWDpZWOm4WQDz0 Bkit843Ow6g8IKqXal8vImXsAuF7rgZ1fMgJolodKPHcnLLbYD+DZS1TuLPDH8nU1gJb /fX0dvFmWjO84mrZpAWAVy64B1kXLsUnLpEEIkRojrqOcsB3weVve80p8FZ28DI+OK/T 5bsQ6TqFmjxJXvL63G7R59KsmjILmvz7egeXrs2RxySYNqMa+eNtdzi/9Yww1aNKRGei C4IB4s6SZirFNTUn58JSRjbXoF9ZLp9+Ma74z4sibDzYmKcCRJqciTRwXu/IeT2TPeP+ tvPw== X-Gm-Message-State: ACrzQf0Xs6vhlJf5HdzuC6Cs4gYfByoLysjU11FMXPLNhZudUABhcMFg aNWyAyY+zarqer/pptTKeQuP38HUk5+MtA== X-Google-Smtp-Source: AMsMyM7fz+zLh5vmnEK12BzPXn6bJHV3qKQMmCN90QycC7XkR+SFmSO1aKjQHTeAkqzD0T8FDOFCwg== X-Received: by 2002:a05:622a:38b:b0:39c:e87e:5b3d with SMTP id j11-20020a05622a038b00b0039ce87e5b3dmr40783623qtx.532.1666881574223; Thu, 27 Oct 2022 07:39:34 -0700 (PDT) Received: from mariner-vm.. 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[67.185.99.176]) by smtp.gmail.com with ESMTPSA id n3-20020a05620a294300b006ed138e89f2sm1060825qkp.123.2022.10.27.07.39.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Oct 2022 07:39:33 -0700 (PDT) From: dthaler1968@googlemail.com To: bpf@vger.kernel.org Cc: Dave Thaler Subject: [PATCH 3/4] bpf, docs: Use consistent names for the same field Date: Thu, 27 Oct 2022 14:39:13 +0000 Message-Id: <20221027143914.1928-3-dthaler1968@googlemail.com> X-Mailer: git-send-email 2.33.4 In-Reply-To: <20221027143914.1928-1-dthaler1968@googlemail.com> References: <20221027143914.1928-1-dthaler1968@googlemail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: bpf@vger.kernel.org X-Patchwork-Delegate: bpf@iogearbox.net From: Dave Thaler Use consistent names for the same field Signed-off-by: Dave Thaler --- Documentation/bpf/instruction-set.rst | 107 ++++++++++++++++++-------- 1 file changed, 76 insertions(+), 31 deletions(-) diff --git a/Documentation/bpf/instruction-set.rst b/Documentation/bpf/instruction-set.rst index 74dcc13a9..aa1b37cb5 100644 --- a/Documentation/bpf/instruction-set.rst +++ b/Documentation/bpf/instruction-set.rst @@ -35,20 +35,59 @@ Instruction encoding eBPF has two instruction encodings: * the basic instruction encoding, which uses 64 bits to encode an instruction -* the wide instruction encoding, which appends a second 64-bit immediate value - (imm64) after the basic instruction for a total of 128 bits. +* the wide instruction encoding, which appends a second 64-bit immediate (i.e., + constant) value after the basic instruction for a total of 128 bits. -The basic instruction encoding looks as follows: +The basic instruction encoding is as follows, where MSB and LSB mean the most significant +bits and least significant bits, respectively: ============= ======= =============== ==================== ============ 32 bits (MSB) 16 bits 4 bits 4 bits 8 bits (LSB) ============= ======= =============== ==================== ============ -immediate offset source register destination register opcode +imm offset src dst opcode ============= ======= =============== ==================== ============ +imm + signed integer immediate value + +offset + signed integer offset used with pointer arithmetic + +src + the source register number (0-10), except where otherwise specified + (`64-bit immediate instructions`_ reuse this field for other purposes) + +dst + destination register number (0-10) + +opcode + operation to perform + Note that most instructions do not use all of the fields. Unused fields shall be cleared to zero. +As discussed below in `64-bit immediate instructions`_, a 64-bit immediate +instruction uses a 64-bit immediate value that is constructed as follows. +The 64 bits following the basic instruction contain a pseudo instruction +using the same format but with opcode, dst, src, and offset all set to zero, +and imm containing the high 32 bits of the immediate value. + +================= ================== +64 bits (MSB) 64 bits (LSB) +================= ================== +basic instruction pseudo instruction +================= ================== + +Thus the 64-bit immediate value is constructed as follows: + + imm64 = imm + (next_imm << 32) + +where 'next_imm' refers to the imm value of the pseudo instruction +following the basic instruction. + +In the remainder of this document 'src' and 'dst' refer to the values of the source +and destination registers, respectively, rather than the register number. + Instruction classes ------------------- @@ -76,20 +115,24 @@ For arithmetic and jump instructions (``BPF_ALU``, ``BPF_ALU64``, ``BPF_JMP`` an ============== ====== ================= 4 bits (MSB) 1 bit 3 bits (LSB) ============== ====== ================= -operation code source instruction class +code source instruction class ============== ====== ================= -The 4th bit encodes the source operand: +code + the operation code, whose meaning varies by instruction class - ====== ===== ======================================== - source value description - ====== ===== ======================================== - BPF_K 0x00 use 32-bit immediate as source operand - BPF_X 0x08 use 'src_reg' register as source operand - ====== ===== ======================================== +source + the source operand location, which unless otherwise specified is one of: -The four MSB bits store the operation code. + ====== ===== ========================================== + source value description + ====== ===== ========================================== + BPF_K 0x00 use 32-bit 'imm' value as source operand + BPF_X 0x08 use 'src' register value as source operand + ====== ===== ========================================== +instruction class + the instruction class (see `Instruction classes`_) Arithmetic instructions ----------------------- @@ -117,6 +160,8 @@ BPF_ARSH 0xc0 sign extending shift right BPF_END 0xd0 byte swap operations (see `Byte swap instructions`_ below) ======== ===== ========================================================== +where 'src' is the source operand value. + Underflow and overflow are allowed during arithmetic operations, meaning the 64-bit or 32-bit value will wrap. If eBPF program execution would result in division by zero, @@ -126,21 +171,21 @@ the destination register is instead left unchanged. ``BPF_ADD | BPF_X | BPF_ALU`` means:: - dst_reg = (u32) dst_reg + (u32) src_reg; + dst = (u32) ((u32) dst + (u32) src) where '(u32)' indicates truncation to 32 bits. ``BPF_ADD | BPF_X | BPF_ALU64`` means:: - dst_reg = dst_reg + src_reg + dst = dst + src ``BPF_XOR | BPF_K | BPF_ALU`` means:: - src_reg = (u32) src_reg ^ (u32) imm32 + src = (u32) src ^ (u32) imm ``BPF_XOR | BPF_K | BPF_ALU64`` means:: - src_reg = src_reg ^ imm32 + src = src ^ imm Also note that the division and modulo operations are unsigned, where 'imm' is first sign extended to 64 bits and then converted @@ -173,11 +218,11 @@ Examples: ``BPF_ALU | BPF_TO_LE | BPF_END`` with imm = 16 means:: - dst_reg = htole16(dst_reg) + dst = htole16(dst) ``BPF_ALU | BPF_TO_BE | BPF_END`` with imm = 64 means:: - dst_reg = htobe64(dst_reg) + dst = htobe64(dst) Jump instructions ----------------- @@ -252,15 +297,15 @@ instructions that transfer data between a register and memory. ``BPF_MEM | | BPF_STX`` means:: - *(size *) (dst_reg + off) = src_reg + *(size *) (dst + offset) = src_reg ``BPF_MEM | | BPF_ST`` means:: - *(size *) (dst_reg + off) = imm32 + *(size *) (dst + offset) = imm32 ``BPF_MEM | | BPF_LDX`` means:: - dst_reg = *(size *) (src_reg + off) + dst = *(size *) (src + offset) Where size is one of: ``BPF_B``, ``BPF_H``, ``BPF_W``, or ``BPF_DW``. @@ -294,11 +339,11 @@ BPF_XOR 0xa0 atomic xor ``BPF_ATOMIC | BPF_W | BPF_STX`` with 'imm' = BPF_ADD means:: - *(u32 *)(dst_reg + off16) += src_reg + *(u32 *)(dst + offset) += src ``BPF_ATOMIC | BPF_DW | BPF_STX`` with 'imm' = BPF ADD means:: - *(u64 *)(dst_reg + off16) += src_reg + *(u64 *)(dst + offset) += src In addition to the simple atomic operations, there also is a modifier and two complex atomic operations: @@ -313,16 +358,16 @@ BPF_CMPXCHG 0xf0 | BPF_FETCH atomic compare and exchange The ``BPF_FETCH`` modifier is optional for simple atomic operations, and always set for the complex atomic operations. If the ``BPF_FETCH`` flag -is set, then the operation also overwrites ``src_reg`` with the value that +is set, then the operation also overwrites ``src`` with the value that was in memory before it was modified. -The ``BPF_XCHG`` operation atomically exchanges ``src_reg`` with the value -addressed by ``dst_reg + off``. +The ``BPF_XCHG`` operation atomically exchanges ``src`` with the value +addressed by ``dst + offset``. The ``BPF_CMPXCHG`` operation atomically compares the value addressed by -``dst_reg + off`` with ``R0``. If they match, the value addressed by -``dst_reg + off`` is replaced with ``src_reg``. In either case, the -value that was at ``dst_reg + off`` before the operation is zero-extended +``dst + offset`` with ``R0``. If they match, the value addressed by +``dst + offset`` is replaced with ``src``. In either case, the +value that was at ``dst + offset`` before the operation is zero-extended and loaded back to ``R0``. 64-bit immediate instructions @@ -335,7 +380,7 @@ There is currently only one such instruction. ``BPF_LD | BPF_DW | BPF_IMM`` means:: - dst_reg = imm64 + dst = imm64 Legacy BPF Packet access instructions From patchwork Thu Oct 27 14:39:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Thaler X-Patchwork-Id: 13022219 X-Patchwork-Delegate: bpf@iogearbox.net Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0B6A1FA3741 for ; Thu, 27 Oct 2022 14:39:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233598AbiJ0Ojk (ORCPT ); Thu, 27 Oct 2022 10:39:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45786 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235362AbiJ0Oji (ORCPT ); Thu, 27 Oct 2022 10:39:38 -0400 Received: from mail-qt1-x833.google.com (mail-qt1-x833.google.com [IPv6:2607:f8b0:4864:20::833]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3E12A2AE3D for ; Thu, 27 Oct 2022 07:39:36 -0700 (PDT) Received: by mail-qt1-x833.google.com with SMTP id z6so1245764qtv.5 for ; Thu, 27 Oct 2022 07:39:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=MLdop4erkgbxyis05cdwFFJcQiYkQNAYLZdIA/YIkqw=; b=Qlspinaceyxc+IAGQarnfJqatVaRdnOKaMm0HDqRGX2pDwTliEYFiRUR33rgg/Te9x duCH4lGQNt9oCmYkQsVF0DLdK+CurWJqsKiWTeUkyq6W3HIf8dArSPo1iGGugkwU2SJD WiyJUm5+UIVDTTYm+lZCSgd/3PmjQ5uO4i7bdL7O22NyHMEt0uyJWrMxdVsNJSYUtkKi zn6AHavgjxHUzhILwZm+smHKxSpnQyQs0TCNdIKF4UsU1uB+t0b6I+gm/Ahp/cEgI12y ZAdskzcK5D9psMUxQh4U00bnYZOYRc17qcIkNawAUs+of38MfiLu3rcwGx8F3EHxR0uy GYyA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=MLdop4erkgbxyis05cdwFFJcQiYkQNAYLZdIA/YIkqw=; b=WXpVnqQnY19thH4J705IvvqjRsJxrCesZ5SeMQjbEQlNUdNlG1QygbukIuNKfOxCpM N6QpboiSHDdVWgXHbb+r+Jcj6eZEwOCzFQ6ccneEEDfutYKvtv71uO4O5GI/WHFTSsHB iTTSb2ZLSxz3rTJEvSpZtVum6NX1E3xqxz4jjey2RabKeVZgFSpEvjRAMinne+NtSRMc wBLaVOvofwmO8JmGFYXwpryVvR+pr0Vf052VEiCr0OS3etiLlqwZDTji+HeCiGshSSh0 sEq1QmYwqbtmH17S+bcRPL6AYGTTQHEgszV0GecE8k0oHqb6zUuhxJYDhIDiMdtD7RxN d23A== X-Gm-Message-State: ACrzQf17HVt6lqVfvF2WIBdvz0+DKBO+QupIRJQ73oOwq2rn5nLZq1t2 txdw3pQ9/XwUoShel2kF5O9a1Gy6G9mCog== X-Google-Smtp-Source: AMsMyM4W2/F8Qg1Qdx3tDH//GZRtCEgtf5O8JOqGPTHPEMRO42GmPA4KEtC6FGiLTuDT1KcQfSgK3w== X-Received: by 2002:ac8:5746:0:b0:39c:deac:c69c with SMTP id 6-20020ac85746000000b0039cdeacc69cmr41363642qtx.292.1666881575468; Thu, 27 Oct 2022 07:39:35 -0700 (PDT) Received: from mariner-vm.. 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[67.185.99.176]) by smtp.gmail.com with ESMTPSA id n3-20020a05620a294300b006ed138e89f2sm1060825qkp.123.2022.10.27.07.39.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Oct 2022 07:39:35 -0700 (PDT) From: dthaler1968@googlemail.com To: bpf@vger.kernel.org Cc: Dave Thaler Subject: [PATCH 4/4] bpf, docs: Explain helper functions Date: Thu, 27 Oct 2022 14:39:14 +0000 Message-Id: <20221027143914.1928-4-dthaler1968@googlemail.com> X-Mailer: git-send-email 2.33.4 In-Reply-To: <20221027143914.1928-1-dthaler1968@googlemail.com> References: <20221027143914.1928-1-dthaler1968@googlemail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: bpf@vger.kernel.org X-Patchwork-Delegate: bpf@iogearbox.net From: Dave Thaler Explain helper functions Signed-off-by: Dave Thaler --- Documentation/bpf/instruction-set.rst | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/Documentation/bpf/instruction-set.rst b/Documentation/bpf/instruction-set.rst index aa1b37cb5..40c3293d6 100644 --- a/Documentation/bpf/instruction-set.rst +++ b/Documentation/bpf/instruction-set.rst @@ -242,7 +242,7 @@ BPF_JSET 0x40 PC += off if dst & src BPF_JNE 0x50 PC += off if dst != src BPF_JSGT 0x60 PC += off if dst > src signed BPF_JSGE 0x70 PC += off if dst >= src signed -BPF_CALL 0x80 function call +BPF_CALL 0x80 function call see `Helper functions`_ BPF_EXIT 0x90 function / program return BPF_JMP only BPF_JLT 0xa0 PC += off if dst < src unsigned BPF_JLE 0xb0 PC += off if dst <= src unsigned @@ -253,6 +253,22 @@ BPF_JSLE 0xd0 PC += off if dst <= src signed The eBPF program needs to store the return value into register R0 before doing a BPF_EXIT. +Helper functions +~~~~~~~~~~~~~~~~ +Helper functions are a concept whereby BPF programs can call into a +set of function calls exposed by the eBPF runtime. Each helper +function is identified by an integer used in a ``BPF_CALL`` instruction. +The available helper functions may differ for each eBPF program type. + +Conceptually, each helper function is implemented with a commonly shared function +signature defined as: + + u64 function(u64 r1, u64 r2, u64 r3, u64 r4, u64 r5) + +In actuality, each helper function is defined as taking between 0 and 5 arguments, +with the remaining registers being ignored. The definition of a helper function +is responsible for specifying the type (e.g., integer, pointer, etc.) of the value returned, +the number of arguments, and the type of each argument. Load and store instructions ===========================