From patchwork Thu Oct 27 19:45:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haitao Huang X-Patchwork-Id: 13022661 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C2D16FA3743 for ; Thu, 27 Oct 2022 19:45:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236629AbiJ0Tpi (ORCPT ); Thu, 27 Oct 2022 15:45:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34904 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236322AbiJ0Tpg (ORCPT ); Thu, 27 Oct 2022 15:45:36 -0400 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 209125FF58 for ; Thu, 27 Oct 2022 12:45:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1666899936; x=1698435936; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=Oxv5SGcMEfOJY0KrKF5YdHFUZE3D54ECGrWr6qJ+HiM=; b=kg2uVj+T1wZHUS1xef2L9FyBYlkxulKN/qh9on3TRnrJoCMvBlJD4AbC PXG2vLBO5hY6PTocloIZ9T42SArIrhaUi+By8RWTDIaLT2cBJz9A9zRmX GZ5hNAtlOQUUg3XHIxfKIQ7kbFB3wwbQmqa4M4D+v55YZ9mDAwVQCWq2i HLxvWySJhGEgYX8zkgfg4qI1UyVhhUyp9Jqv+TiavaKX4xirac/eSJGZ0 AvFHskopFefFdn5qIiTODkRgezbeFUGLzfs5PsOy2qlHCY25A7s036ysC ZciZKIRePTZx5J8iWeQOevjvtUkNwUHDvUZQuxBYX3c+jZxyTBtAQtXeG A==; X-IronPort-AV: E=McAfee;i="6500,9779,10513"; a="310021407" X-IronPort-AV: E=Sophos;i="5.95,218,1661842800"; d="scan'208";a="310021407" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Oct 2022 12:45:33 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10513"; a="961753290" X-IronPort-AV: E=Sophos;i="5.95,218,1661842800"; d="scan'208";a="961753290" Received: from b4969161e530.jf.intel.com ([10.165.56.46]) by fmsmga005.fm.intel.com with ESMTP; 27 Oct 2022 12:45:32 -0700 From: Haitao Huang To: linux-sgx@vger.kernel.org, jarkko@kernel.org, dave.hansen@linux.intel.com, reinette.chatre@intel.com, vijay.dhanraj@intel.com Subject: [RFC PATCH v2 1/4] x86/sgx: Export sgx_encl_eaug_page Date: Thu, 27 Oct 2022 12:45:29 -0700 Message-Id: <20221027194532.180053-2-haitao.huang@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221027194532.180053-1-haitao.huang@linux.intel.com> References: <20221027194532.180053-1-haitao.huang@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-sgx@vger.kernel.org This function will be called by both the page fault handler and the fops->fadvise callback. Signed-off-by: Haitao Huang --- arch/x86/kernel/cpu/sgx/encl.c | 4 ++-- arch/x86/kernel/cpu/sgx/encl.h | 3 ++- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/x86/kernel/cpu/sgx/encl.c b/arch/x86/kernel/cpu/sgx/encl.c index 8bdeae2fc309..1abc5e7f2660 100644 --- a/arch/x86/kernel/cpu/sgx/encl.c +++ b/arch/x86/kernel/cpu/sgx/encl.c @@ -308,8 +308,8 @@ struct sgx_encl_page *sgx_encl_load_page(struct sgx_encl *encl, * Returns: Appropriate vm_fault_t: VM_FAULT_NOPAGE when PTE was installed * successfully, VM_FAULT_SIGBUS or VM_FAULT_OOM as error otherwise. */ -static vm_fault_t sgx_encl_eaug_page(struct vm_area_struct *vma, - struct sgx_encl *encl, unsigned long addr) +vm_fault_t sgx_encl_eaug_page(struct vm_area_struct *vma, + struct sgx_encl *encl, unsigned long addr) { vm_fault_t vmret = VM_FAULT_SIGBUS; struct sgx_pageinfo pginfo = {0}; diff --git a/arch/x86/kernel/cpu/sgx/encl.h b/arch/x86/kernel/cpu/sgx/encl.h index a65a952116fd..500437981161 100644 --- a/arch/x86/kernel/cpu/sgx/encl.h +++ b/arch/x86/kernel/cpu/sgx/encl.h @@ -127,5 +127,6 @@ struct sgx_encl_page *sgx_encl_load_page(struct sgx_encl *encl, unsigned long addr); struct sgx_va_page *sgx_encl_grow(struct sgx_encl *encl, bool reclaim); void sgx_encl_shrink(struct sgx_encl *encl, struct sgx_va_page *va_page); - +vm_fault_t sgx_encl_eaug_page(struct vm_area_struct *vma, + struct sgx_encl *encl, unsigned long addr) #endif /* _X86_ENCL_H */ From patchwork Thu Oct 27 19:45:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haitao Huang X-Patchwork-Id: 13022662 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9EFF6FA3742 for ; Thu, 27 Oct 2022 19:45:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236322AbiJ0Tpj (ORCPT ); Thu, 27 Oct 2022 15:45:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34976 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236656AbiJ0Tph (ORCPT ); Thu, 27 Oct 2022 15:45:37 -0400 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 48C0D543F6 for ; Thu, 27 Oct 2022 12:45:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1666899936; x=1698435936; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=Jxb3RU4ARZMhWNaPGfblwOp/0pKB/qACpU6xOy06vP4=; b=Y58Oeabrl41G4M1EyrcqafT5a9cL67rGP7uqEkYH6Ca1W5JRNzeWjQPu 3I84lxonDYdlnSc/2WrstIuT9ohFSpTP6iw8FA9YwfBEgrCP9+13r8tZw aFtLNjPjssWEJ8D2cX4CQHdHGFYxfGbaKUSJl8Lp9SXBEuc8BwggNH1I3 TaObWCfM0TRHj+eGFjs+o/XtIL/qefhqnbAVlYOGSgBpPeHuwQrycYO7c Hm2ejJmolYMPNwIBcvivfdIxzwvvO0NZKGZQojSkzmiMxJkkIOTGN6r+U US/GjjS2IBsmr+kKQEFZP+oY3ktDMyL4B9vI6s6adxcTmVO6jARif346e A==; X-IronPort-AV: E=McAfee;i="6500,9779,10513"; a="310021412" X-IronPort-AV: E=Sophos;i="5.95,218,1661842800"; d="scan'208";a="310021412" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Oct 2022 12:45:33 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10513"; a="961753293" X-IronPort-AV: E=Sophos;i="5.95,218,1661842800"; d="scan'208";a="961753293" Received: from b4969161e530.jf.intel.com ([10.165.56.46]) by fmsmga005.fm.intel.com with ESMTP; 27 Oct 2022 12:45:33 -0700 From: Haitao Huang To: linux-sgx@vger.kernel.org, jarkko@kernel.org, dave.hansen@linux.intel.com, reinette.chatre@intel.com, vijay.dhanraj@intel.com Subject: [RFC PATCH v2 2/4] x86/sgx: Implement support for MADV_WILLNEED Date: Thu, 27 Oct 2022 12:45:30 -0700 Message-Id: <20221027194532.180053-3-haitao.huang@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221027194532.180053-2-haitao.huang@linux.intel.com> References: <20221027194532.180053-1-haitao.huang@linux.intel.com> <20221027194532.180053-2-haitao.huang@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-sgx@vger.kernel.org Support madvise(..., MADV_WILLNEED) by adding EPC pages with EAUG in the newly added fops->fadvise() callback implementation, sgx_fadvise(). Change the return type and values of the sgx_encl_eaug_page function so that more specific error codes are returned for different treatment by the page fault handler and the fadvise callback. On any error, sgx_fadvise() will discontinue further operations and return as normal. The page fault handler allows a PF retried by returning VM_FAULT_NOPAGE in handling -EBUSY returned from sgx_encl_eaug_page. Signed-off-by: Haitao Huang --- arch/x86/kernel/cpu/sgx/driver.c | 81 ++++++++++++++++++++++++++++++++ arch/x86/kernel/cpu/sgx/encl.c | 46 +++++++++++------- arch/x86/kernel/cpu/sgx/encl.h | 4 +- 3 files changed, 113 insertions(+), 18 deletions(-) diff --git a/arch/x86/kernel/cpu/sgx/driver.c b/arch/x86/kernel/cpu/sgx/driver.c index aa9b8b868867..54b24897605b 100644 --- a/arch/x86/kernel/cpu/sgx/driver.c +++ b/arch/x86/kernel/cpu/sgx/driver.c @@ -2,6 +2,7 @@ /* Copyright(c) 2016-20 Intel Corporation. */ #include +#include #include #include #include @@ -9,6 +10,7 @@ #include #include "driver.h" #include "encl.h" +#include "encls.h" u64 sgx_attributes_reserved_mask; u64 sgx_xfrm_reserved_mask = ~0x3; @@ -97,10 +99,88 @@ static int sgx_mmap(struct file *file, struct vm_area_struct *vma) vma->vm_ops = &sgx_vm_ops; vma->vm_flags |= VM_PFNMAP | VM_DONTEXPAND | VM_DONTDUMP | VM_IO; vma->vm_private_data = encl; + /* Anchor vm_pgoff to the enclave base. + * So offset passed back to sgx_fadvise hook + * is relative to the enclave base + */ + vma->vm_pgoff = (vma->vm_start - encl->base) >> PAGE_SHIFT; return 0; } +/* + * Add new pages to the enclave sequentially with ENCLS[EAUG] for the WILLNEED advice. + * Only do this to existing VMAs in the same enclave and reject the request. + * Returns: 0 if EAUG done with best effort, -EINVAL if any sub-range given + * is not in the enclave, or enclave is not initialized.. + */ +static int sgx_fadvise(struct file *file, loff_t offset, loff_t len, int advice) +{ + struct sgx_encl *encl = file->private_data; + unsigned long start, end, pos; + int ret = -EINVAL; + struct vm_area_struct *vma = NULL; + + /* Only support WILLNEED */ + if (advice != POSIX_FADV_WILLNEED) + return -EINVAL; + if (!encl) + return -EINVAL; + if (!cpu_feature_enabled(X86_FEATURE_SGX2)) + return -EINVAL; + + if (offset + len < offset) + return -EINVAL; + if (encl->base + offset < encl->base) + return -EINVAL; + start = offset + encl->base; + end = start + len; + if (end < start) + return -EINVAL; + if (end > encl->base + encl->size) + return -EINVAL; + + /* EAUG works only for initialized enclaves. */ + if (!test_bit(SGX_ENCL_INITIALIZED, &encl->flags)) + return -EINVAL; + + mmap_read_lock(current->mm); + + vma = find_vma(current->mm, start); + if (!vma) + goto unlock; + if (vma->vm_private_data != encl) + goto unlock; + + pos = start; + if (pos < vma->vm_start || end > vma->vm_end) { + /* Don't allow any gaps */ + goto unlock; + } + /* Here: vm_start <= pos < end <= vm_end */ + while (pos < end) { + if (xa_load(&encl->page_array, PFN_DOWN(pos))) + continue; + if (signal_pending(current)) { + if (pos == start) + ret = -ERESTARTSYS; + else + ret = -EINTR; + goto unlock; + } + ret = sgx_encl_eaug_page(vma, encl, pos); + /* It's OK to not finish */ + if (ret) + break; + pos = pos + PAGE_SIZE; + cond_resched(); + } + ret = 0; +unlock: + mmap_read_unlock(current->mm); + return ret; +} + static unsigned long sgx_get_unmapped_area(struct file *file, unsigned long addr, unsigned long len, @@ -133,6 +213,7 @@ static const struct file_operations sgx_encl_fops = { .compat_ioctl = sgx_compat_ioctl, #endif .mmap = sgx_mmap, + .fadvise = sgx_fadvise, .get_unmapped_area = sgx_get_unmapped_area, }; diff --git a/arch/x86/kernel/cpu/sgx/encl.c b/arch/x86/kernel/cpu/sgx/encl.c index 1abc5e7f2660..c57e60d5a0aa 100644 --- a/arch/x86/kernel/cpu/sgx/encl.c +++ b/arch/x86/kernel/cpu/sgx/encl.c @@ -305,11 +305,11 @@ struct sgx_encl_page *sgx_encl_load_page(struct sgx_encl *encl, * on a SGX2 system then the EPC can be added dynamically via the SGX2 * ENCLS[EAUG] instruction. * - * Returns: Appropriate vm_fault_t: VM_FAULT_NOPAGE when PTE was installed - * successfully, VM_FAULT_SIGBUS or VM_FAULT_OOM as error otherwise. + * Returns: 0 when PTE was installed successfully, -EBUSY for waiting on + * reclaimer to free EPC, -ENOMEM for out of RAM, -EFAULT as error otherwise. */ -vm_fault_t sgx_encl_eaug_page(struct vm_area_struct *vma, - struct sgx_encl *encl, unsigned long addr) +int sgx_encl_eaug_page(struct vm_area_struct *vma, + struct sgx_encl *encl, unsigned long addr) { vm_fault_t vmret = VM_FAULT_SIGBUS; struct sgx_pageinfo pginfo = {0}; @@ -318,10 +318,10 @@ vm_fault_t sgx_encl_eaug_page(struct vm_area_struct *vma, struct sgx_va_page *va_page; unsigned long phys_addr; u64 secinfo_flags; - int ret; + int ret = -EFAULT; if (!test_bit(SGX_ENCL_INITIALIZED, &encl->flags)) - return VM_FAULT_SIGBUS; + return -EFAULT; /* * Ignore internal permission checking for dynamically added pages. @@ -332,21 +332,21 @@ vm_fault_t sgx_encl_eaug_page(struct vm_area_struct *vma, secinfo_flags = SGX_SECINFO_R | SGX_SECINFO_W | SGX_SECINFO_X; encl_page = sgx_encl_page_alloc(encl, addr - encl->base, secinfo_flags); if (IS_ERR(encl_page)) - return VM_FAULT_OOM; + return -ENOMEM; mutex_lock(&encl->lock); epc_page = sgx_alloc_epc_page(encl_page, false); if (IS_ERR(epc_page)) { if (PTR_ERR(epc_page) == -EBUSY) - vmret = VM_FAULT_NOPAGE; + ret = -EBUSY; goto err_out_unlock; } va_page = sgx_encl_grow(encl, false); if (IS_ERR(va_page)) { if (PTR_ERR(va_page) == -EBUSY) - vmret = VM_FAULT_NOPAGE; + ret = -EBUSY; goto err_out_epc; } @@ -359,16 +359,20 @@ vm_fault_t sgx_encl_eaug_page(struct vm_area_struct *vma, * If ret == -EBUSY then page was created in another flow while * running without encl->lock */ - if (ret) + if (ret) { + ret = -EFAULT; goto err_out_shrink; + } pginfo.secs = (unsigned long)sgx_get_epc_virt_addr(encl->secs.epc_page); pginfo.addr = encl_page->desc & PAGE_MASK; pginfo.metadata = 0; ret = __eaug(&pginfo, sgx_get_epc_virt_addr(epc_page)); - if (ret) + if (ret) { + ret = -EFAULT; goto err_out; + } encl_page->encl = encl; encl_page->epc_page = epc_page; @@ -385,10 +389,10 @@ vm_fault_t sgx_encl_eaug_page(struct vm_area_struct *vma, vmret = vmf_insert_pfn(vma, addr, PFN_DOWN(phys_addr)); if (vmret != VM_FAULT_NOPAGE) { mutex_unlock(&encl->lock); - return VM_FAULT_SIGBUS; + return -EFAULT; } mutex_unlock(&encl->lock); - return VM_FAULT_NOPAGE; + return 0; err_out: xa_erase(&encl->page_array, PFN_DOWN(encl_page->desc)); @@ -401,7 +405,7 @@ vm_fault_t sgx_encl_eaug_page(struct vm_area_struct *vma, mutex_unlock(&encl->lock); kfree(encl_page); - return vmret; + return ret; } static vm_fault_t sgx_vma_fault(struct vm_fault *vmf) @@ -431,8 +435,18 @@ static vm_fault_t sgx_vma_fault(struct vm_fault *vmf) * enclave that will be checked for right away. */ if (cpu_feature_enabled(X86_FEATURE_SGX2) && - (!xa_load(&encl->page_array, PFN_DOWN(addr)))) - return sgx_encl_eaug_page(vma, encl, addr); + (!xa_load(&encl->page_array, PFN_DOWN(addr)))) { + switch (sgx_encl_eaug_page(vma, encl, addr)) { + case 0: + case -EBUSY: + return VM_FAULT_NOPAGE; + case -ENOMEM: + return VM_FAULT_OOM; + case -EFAULT: + default: + return VM_FAULT_SIGBUS; + } + } mutex_lock(&encl->lock); diff --git a/arch/x86/kernel/cpu/sgx/encl.h b/arch/x86/kernel/cpu/sgx/encl.h index 500437981161..36059d35e1bc 100644 --- a/arch/x86/kernel/cpu/sgx/encl.h +++ b/arch/x86/kernel/cpu/sgx/encl.h @@ -127,6 +127,6 @@ struct sgx_encl_page *sgx_encl_load_page(struct sgx_encl *encl, unsigned long addr); struct sgx_va_page *sgx_encl_grow(struct sgx_encl *encl, bool reclaim); void sgx_encl_shrink(struct sgx_encl *encl, struct sgx_va_page *va_page); -vm_fault_t sgx_encl_eaug_page(struct vm_area_struct *vma, - struct sgx_encl *encl, unsigned long addr) +int sgx_encl_eaug_page(struct vm_area_struct *vma, + struct sgx_encl *encl, unsigned long addr); #endif /* _X86_ENCL_H */ From patchwork Thu Oct 27 19:45:31 2022 Content-Type: text/plain; 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27 Oct 2022 12:45:33 -0700 From: Haitao Huang To: linux-sgx@vger.kernel.org, jarkko@kernel.org, dave.hansen@linux.intel.com, reinette.chatre@intel.com, vijay.dhanraj@intel.com Subject: [RFC PATCH v2 3/4] selftests/sgx: add len field for EACCEPT op Date: Thu, 27 Oct 2022 12:45:31 -0700 Message-Id: <20221027194532.180053-4-haitao.huang@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221027194532.180053-3-haitao.huang@linux.intel.com> References: <20221027194532.180053-1-haitao.huang@linux.intel.com> <20221027194532.180053-2-haitao.huang@linux.intel.com> <20221027194532.180053-3-haitao.huang@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-sgx@vger.kernel.org So we can EACCEPT multiple pages inside enclave without EEXIT, preparing for testing with MADV_WILLNEED for ranges bigger than a single page. Signed-off-by: Haitao Huang --- tools/testing/selftests/sgx/defines.h | 1 + tools/testing/selftests/sgx/test_encl.c | 20 ++++++++++++++------ 2 files changed, 15 insertions(+), 6 deletions(-) diff --git a/tools/testing/selftests/sgx/defines.h b/tools/testing/selftests/sgx/defines.h index d8587c971941..8578e773d3d8 100644 --- a/tools/testing/selftests/sgx/defines.h +++ b/tools/testing/selftests/sgx/defines.h @@ -60,6 +60,7 @@ struct encl_op_eaccept { struct encl_op_header header; uint64_t epc_addr; uint64_t flags; + uint64_t len; uint64_t ret; }; diff --git a/tools/testing/selftests/sgx/test_encl.c b/tools/testing/selftests/sgx/test_encl.c index c0d6397295e3..fc797385200b 100644 --- a/tools/testing/selftests/sgx/test_encl.c +++ b/tools/testing/selftests/sgx/test_encl.c @@ -35,14 +35,22 @@ static void do_encl_eaccept(void *_op) struct sgx_secinfo secinfo __aligned(sizeof(struct sgx_secinfo)) = {0}; struct encl_op_eaccept *op = _op; int rax; + if (op->len == 0) + op->len = 4096; secinfo.flags = op->flags; - - asm volatile(".byte 0x0f, 0x01, 0xd7" - : "=a" (rax) - : "a" (EACCEPT), - "b" (&secinfo), - "c" (op->epc_addr)); + for (uint64_t addr = op->epc_addr; + addr < op->epc_addr + op->len; addr += 4096) { + asm volatile(".byte 0x0f, 0x01, 0xd7" + : "=a" (rax) + : "a" (EACCEPT), + "b" (&secinfo), + "c" (addr)); + if (rax) { + op->ret = rax; + return; + } + } op->ret = rax; } From patchwork Thu Oct 27 19:45:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haitao Huang X-Patchwork-Id: 13022663 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E0F0CECAAA1 for ; Thu, 27 Oct 2022 19:45:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236298AbiJ0Tpk (ORCPT ); Thu, 27 Oct 2022 15:45:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35008 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236662AbiJ0Tpi (ORCPT ); Thu, 27 Oct 2022 15:45:38 -0400 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 99C3269F74 for ; Thu, 27 Oct 2022 12:45:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1666899937; x=1698435937; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=KWnJFJGkfA7A5GGsnzDAK63MfJBiJ4YYGRMcSk6UlFk=; b=awGlgXQA4NUZnatxmeyG4QK9LuWgSC+XfBL0tNGDPKRjtyhXL7NlgFOc PqbpUXdTvT+eAgKWjo8CcjE/+cW+yWeGnpatMpREc+Bj+mNne8Y6ZgOSH 7Ju+ppKJEvFOOiN6xDbJMciCT56TEYLQQVxEMDtDWS+D1lg2J/ydYvsnD 8yvtNxwlGTBsyaijHAQHG12kEUzAe8+09OdQS6EItwxBAFFMCCYD29W2Y redirKHbj7/lKIE5QtBWLyylPDbT44Bi/HaYlegUshj/+3RLXvtHz/ZCm uaDNE4MIXEgT5DfUrLnmC6eG620gT3s2kQsRJw2lYmxvNkYvsdmmomSLh Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10513"; a="310021416" X-IronPort-AV: E=Sophos;i="5.95,218,1661842800"; d="scan'208";a="310021416" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Oct 2022 12:45:34 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10513"; a="961753299" X-IronPort-AV: E=Sophos;i="5.95,218,1661842800"; d="scan'208";a="961753299" Received: from b4969161e530.jf.intel.com ([10.165.56.46]) by fmsmga005.fm.intel.com with ESMTP; 27 Oct 2022 12:45:33 -0700 From: Haitao Huang To: linux-sgx@vger.kernel.org, jarkko@kernel.org, dave.hansen@linux.intel.com, reinette.chatre@intel.com, vijay.dhanraj@intel.com Subject: [RFC PATCH v2 4/4] selftests/sgx: Add test for madvise(..., WILLNEED) Date: Thu, 27 Oct 2022 12:45:32 -0700 Message-Id: <20221027194532.180053-5-haitao.huang@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221027194532.180053-4-haitao.huang@linux.intel.com> References: <20221027194532.180053-1-haitao.huang@linux.intel.com> <20221027194532.180053-2-haitao.huang@linux.intel.com> <20221027194532.180053-3-haitao.huang@linux.intel.com> <20221027194532.180053-4-haitao.huang@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-sgx@vger.kernel.org Measure and compare run time for EAUG'ing different number of EPC pages with/without madvise(..., WILLNEED) call. Signed-off-by: Haitao Huang --- tools/testing/selftests/sgx/main.c | 167 +++++++++++++++++++++++++++++ 1 file changed, 167 insertions(+) diff --git a/tools/testing/selftests/sgx/main.c b/tools/testing/selftests/sgx/main.c index 48976bb7bd79..7b5f6705716d 100644 --- a/tools/testing/selftests/sgx/main.c +++ b/tools/testing/selftests/sgx/main.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -1358,6 +1359,172 @@ TEST_F_TIMEOUT(enclave, augment_via_eaccept_long, TIMEOUT_DEFAULT) munmap(addr, ENCL_DYNAMIC_SIZE_LONG); } +static int eaccept_range(struct _test_data_enclave *self, void *addr, + unsigned long size, uint64_t flags, + struct __test_metadata *_metadata) +{ + struct encl_op_eaccept eaccept_op; + + self->run.exception_vector = 0; + self->run.exception_error_code = 0; + self->run.exception_addr = 0; + + /* + * Run EACCEPT on every page to trigger the #PF->EAUG->EACCEPT(again + * without a #PF). All should be transparent to userspace. + */ + eaccept_op.flags = flags; + eaccept_op.ret = 0; + eaccept_op.header.type = ENCL_OP_EACCEPT; + eaccept_op.len = size; + eaccept_op.epc_addr = (uint64_t)(addr); + + EXPECT_EQ(ENCL_CALL(&eaccept_op, &self->run, true), 0); + + EXPECT_EQ(self->run.exception_vector, 0); + EXPECT_EQ(self->run.exception_error_code, 0); + EXPECT_EQ(self->run.exception_addr, 0); + ASSERT_EQ(eaccept_op.ret, 0); + ASSERT_EQ(self->run.function, EEXIT); + + return 0; +} + +static int trim_remove_range(struct _test_data_enclave *self, void *addr, + unsigned long size, struct __test_metadata *_metadata) +{ + int ret, errno_save; + struct sgx_enclave_remove_pages remove_ioc; + struct sgx_enclave_modify_types modt_ioc; + unsigned long offset; + unsigned long count; + + if ((uint64_t)addr <= self->encl.encl_base) + return -1; + offset = (uint64_t)addr - self->encl.encl_base; + + memset(&modt_ioc, 0, sizeof(modt_ioc)); + modt_ioc.offset = offset; + modt_ioc.length = size; + modt_ioc.page_type = SGX_PAGE_TYPE_TRIM; + count = 0; + do { + ret = ioctl(self->encl.fd, SGX_IOC_ENCLAVE_MODIFY_TYPES, &modt_ioc); + + errno_save = ret == -1 ? errno : 0; + if (errno_save != EAGAIN) + break; + EXPECT_EQ(modt_ioc.result, 0); + + count += modt_ioc.count; + modt_ioc.offset += modt_ioc.count; + modt_ioc.length -= modt_ioc.count; + modt_ioc.result = 0; + modt_ioc.count = 0; + } while (modt_ioc.length != 0); + + EXPECT_EQ(ret, 0); + EXPECT_EQ(errno_save, 0); + EXPECT_EQ(modt_ioc.result, 0); + count += modt_ioc.count; + EXPECT_EQ(count, size); + + EXPECT_EQ(eaccept_range(self, addr, size, + SGX_SECINFO_TRIM | SGX_SECINFO_MODIFIED, + _metadata), 0); + + /* Complete page removal. */ + memset(&remove_ioc, 0, sizeof(remove_ioc)); + remove_ioc.offset = offset; + remove_ioc.length = size; + count = 0; + do { + ret = ioctl(self->encl.fd, SGX_IOC_ENCLAVE_REMOVE_PAGES, &remove_ioc); + + errno_save = ret == -1 ? errno : 0; + if (errno_save != EAGAIN) + break; + + count += remove_ioc.count; + remove_ioc.offset += remove_ioc.count; + remove_ioc.length -= remove_ioc.count; + remove_ioc.count = 0; + } while (remove_ioc.length != 0); + + EXPECT_EQ(ret, 0); + EXPECT_EQ(errno_save, 0); + count += remove_ioc.count; + EXPECT_EQ(count, size); + + return 0; +} + +/* + * Compare performance with and without madvise call before EACCEPT'ing + * different size of regions. + */ +TEST_F_TIMEOUT(enclave, augment_via_madvise, TIMEOUT_DEFAULT) +{ + unsigned long advise_size = PAGE_SIZE; + unsigned long max_advise_size = get_total_epc_mem() * 3UL; + int speed_up_percent; + clock_t start; + double time_used1, time_used2; + size_t total_size = 0; + unsigned long i; + void *addr; + + if (!sgx2_supported()) + SKIP(return, "SGX2 not supported"); + + ASSERT_TRUE(setup_test_encl_dynamic(ENCL_HEAP_SIZE_DEFAULT, + max_advise_size, &self->encl, _metadata)); + + memset(&self->run, 0, sizeof(self->run)); + self->run.tcs = self->encl.encl_base; + + for (i = 0; i < self->encl.nr_segments; i++) { + struct encl_segment *seg = &self->encl.segment_tbl[i]; + + total_size += seg->size; + } + + for (i = 1; i < 52 && advise_size < max_advise_size; i++) { + addr = mmap((void *)self->encl.encl_base + total_size, advise_size, + PROT_READ | PROT_WRITE, MAP_SHARED | MAP_FIXED, + self->encl.fd, 0); + EXPECT_NE(addr, MAP_FAILED); + + start = clock(); + EXPECT_EQ(eaccept_range(self, addr, advise_size, + SGX_SECINFO_R | SGX_SECINFO_W + | SGX_SECINFO_REG + | SGX_SECINFO_PENDING, + _metadata), 0); + time_used1 = (double)clock() - start; + + EXPECT_EQ(trim_remove_range(self, addr, advise_size, _metadata), 0); + + start = clock(); + EXPECT_EQ(madvise(addr, advise_size, MADV_WILLNEED), 0); + EXPECT_EQ(eaccept_range(self, addr, advise_size, + SGX_SECINFO_R | SGX_SECINFO_W + | SGX_SECINFO_REG + | SGX_SECINFO_PENDING, + _metadata), 0); + time_used2 = (double)clock() - start; + + speed_up_percent = (int)((time_used1 - time_used2) / time_used1 * 100); + TH_LOG("madvise speed up for eaug'ing %10ld pages: %d%%", + advise_size / PAGE_SIZE, speed_up_percent); + EXPECT_GE(speed_up_percent, 0); + EXPECT_EQ(trim_remove_range(self, addr, advise_size, _metadata), 0); + munmap(addr, advise_size); + advise_size = (advise_size << 1UL); + } + encl_delete(&self->encl); +} + /* * SGX2 page type modification test in two phases: * Phase 1: