From patchwork Sat Oct 29 05:14:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13024503 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 305CFC433FE for ; Sat, 29 Oct 2022 05:15:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229717AbiJ2FPO (ORCPT ); Sat, 29 Oct 2022 01:15:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57472 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229842AbiJ2FPL (ORCPT ); Sat, 29 Oct 2022 01:15:11 -0400 Received: from mail-pg1-x535.google.com (mail-pg1-x535.google.com [IPv6:2607:f8b0:4864:20::535]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EB79061701 for ; Fri, 28 Oct 2022 22:15:09 -0700 (PDT) Received: by mail-pg1-x535.google.com with SMTP id 78so6486927pgb.13 for ; Fri, 28 Oct 2022 22:15:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=j1RKtSeGBWRwRID09716W7BxvRPtXtLZIH1JuwC4u5k=; b=ndpS8QyRAYJP0b3/4viVqp4LveScTVv4ndPUVuXsb2l/nSs/V8En6yX1BNbUzYkH89 7+sWqsnsnQ708+LfNZvJLAUHlQV+DrPpb1lMYhmJDoxJ7J9Kyf65NRHEFK217C5geFKH K14o5aeT+6eqX/X6WfgyoJtc8WHz/Vj3QrKFjxHHTTj9dEPS2lqtWhSZWl2aZQfAs6m3 OvK/S9KZ5HNW+FuQWhUgDe92BzNky52aMtxHnc1p6YuGxDnYiBNM0RBu0W2WARcIZ2BI 4jigX1K5ViF3aERS0jBN34aJlauWPxVq+2MyRX3FO7zt6L7dYxhXjohmV+UMnXGgK8PC 3aow== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=j1RKtSeGBWRwRID09716W7BxvRPtXtLZIH1JuwC4u5k=; b=5o4LUSYhPU75WW68FHbfoHyuyBYLr7GYMuRXBC68CSEa3Y73QgArkJ+E8HPcEXenxc KmyvYoJp3GFoK8Yl6gKcGl5cy9zrnxFUzI2IymdnsFUj/jGUZ9+BUUykpjqYoPoe/7o5 nXYlgDBqBlMGq4fXg9hgXA759+/db8kMLzmQziNh1WJ9XWHfFM+CFeLgzzPsA/lDg7DN FENo7BGzZd6Pg3wR06MH6ecauET4ZP3sYownyqA4mHEra2HDSNt3oPXuh6D7TIaM1JM8 VSQsVWrLZIC7KMgtV0arLarSaa4GBp19er7FjQLlt0a4hE8ZN6fAnZVPzowJ1ZSo6pUD HJJg== X-Gm-Message-State: ACrzQf0SIYNtjnoLQ5DlYgcnAyR4AzkJKBUjWinWTdBLp64igu+ohgbA f9GfjCShQBmHGpwCvtqfEQ0g X-Google-Smtp-Source: AMsMyM4YQD+8OjeSOuE0TprlgSLpqBYoWVvkyQ4rqZ+cDJ42uRqnwstxsBwRQRWK1RoB/9Jqk7mMWQ== X-Received: by 2002:a63:91:0:b0:461:f509:2a31 with SMTP id 139-20020a630091000000b00461f5092a31mr2677317pga.108.1667020509410; Fri, 28 Oct 2022 22:15:09 -0700 (PDT) Received: from localhost.localdomain ([59.92.103.167]) by smtp.gmail.com with ESMTPSA id f5-20020a170902ce8500b0017e9b820a1asm363150plg.100.2022.10.28.22.15.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Oct 2022 22:15:08 -0700 (PDT) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, johan+linaro@kernel.org, quic_jprakash@quicinc.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, steev@kali.org, Manivannan Sadhasivam Subject: [PATCH v2 01/12] dt-bindings: iio: qcom: adc7-pm8350: Allow specifying SID for channels Date: Sat, 29 Oct 2022 10:44:38 +0530 Message-Id: <20221029051449.30678-2-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221029051449.30678-1-manivannan.sadhasivam@linaro.org> References: <20221029051449.30678-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org As per the new ADC7 architecture used by the Qualcomm PMICs, each PMIC has the static Slave ID (SID) assigned by default. The primary PMIC PMK8350 is responsible for collecting the temperature/voltage data from the slave PMICs and exposing them via it's registers. For getting the measurements from the slave PMICs, PMK8350 uses the channel ID encoded with the SID of the relevant PMIC. So far, the dt-binding for the slave PMIC PM8350 assumed that there will be only one PM8350 in a system. So it harcoded SID 1 with channel IDs. But this got changed in platforms such as Lenovo X13s where there are a couple of PM8350 PMICs available. So to address multiple PM8350s, change the binding to accept the SID specified by the user and use it for encoding the channel ID. It should be noted that, even though the SID is static it is not globally unique. Only the primary PMIC has the unique SID id 0. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Dmitry Baryshkov Acked-by: Rob Herring Reviewed-by: Krzysztof Kozlowski --- .../bindings/thermal/qcom-spmi-adc-tm5.yaml | 6 +- .../dt-bindings/iio/qcom,spmi-adc7-pm8350.h | 90 +++++++++---------- 2 files changed, 46 insertions(+), 50 deletions(-) diff --git a/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm5.yaml b/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm5.yaml index feb390d50696..d20569b9b763 100644 --- a/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm5.yaml +++ b/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm5.yaml @@ -222,8 +222,8 @@ examples: qcom,hw-settle-time = <200>; }; - conn-therm@47 { - reg = ; + conn-therm@147 { + reg = ; qcom,ratiometric; qcom,hw-settle-time = <200>; }; @@ -247,7 +247,7 @@ examples: conn-therm@1 { reg = <1>; - io-channels = <&pmk8350_vadc PM8350_ADC7_AMUX_THM4_100K_PU>; + io-channels = <&pmk8350_vadc PM8350_ADC7_AMUX_THM4_100K_PU(1)>; qcom,avg-samples = <2>; qcom,ratiometric; qcom,hw-settle-time-us = <200>; diff --git a/include/dt-bindings/iio/qcom,spmi-adc7-pm8350.h b/include/dt-bindings/iio/qcom,spmi-adc7-pm8350.h index 9426f27a1946..09fd169ad18e 100644 --- a/include/dt-bindings/iio/qcom,spmi-adc7-pm8350.h +++ b/include/dt-bindings/iio/qcom,spmi-adc7-pm8350.h @@ -6,62 +6,58 @@ #ifndef _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H #define _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H -#ifndef PM8350_SID -#define PM8350_SID 1 -#endif - /* ADC channels for PM8350_ADC for PMIC7 */ -#define PM8350_ADC7_REF_GND (PM8350_SID << 8 | 0x0) -#define PM8350_ADC7_1P25VREF (PM8350_SID << 8 | 0x01) -#define PM8350_ADC7_VREF_VADC (PM8350_SID << 8 | 0x02) -#define PM8350_ADC7_DIE_TEMP (PM8350_SID << 8 | 0x03) - -#define PM8350_ADC7_AMUX_THM1 (PM8350_SID << 8 | 0x04) -#define PM8350_ADC7_AMUX_THM2 (PM8350_SID << 8 | 0x05) -#define PM8350_ADC7_AMUX_THM3 (PM8350_SID << 8 | 0x06) -#define PM8350_ADC7_AMUX_THM4 (PM8350_SID << 8 | 0x07) -#define PM8350_ADC7_AMUX_THM5 (PM8350_SID << 8 | 0x08) -#define PM8350_ADC7_GPIO1 (PM8350_SID << 8 | 0x0a) -#define PM8350_ADC7_GPIO2 (PM8350_SID << 8 | 0x0b) -#define PM8350_ADC7_GPIO3 (PM8350_SID << 8 | 0x0c) -#define PM8350_ADC7_GPIO4 (PM8350_SID << 8 | 0x0d) +#define PM8350_ADC7_REF_GND(sid) ((sid) << 8 | 0x0) +#define PM8350_ADC7_1P25VREF(sid) ((sid) << 8 | 0x01) +#define PM8350_ADC7_VREF_VADC(sid) ((sid) << 8 | 0x02) +#define PM8350_ADC7_DIE_TEMP(sid) ((sid) << 8 | 0x03) + +#define PM8350_ADC7_AMUX_THM1(sid) ((sid) << 8 | 0x04) +#define PM8350_ADC7_AMUX_THM2(sid) ((sid) << 8 | 0x05) +#define PM8350_ADC7_AMUX_THM3(sid) ((sid) << 8 | 0x06) +#define PM8350_ADC7_AMUX_THM4(sid) ((sid) << 8 | 0x07) +#define PM8350_ADC7_AMUX_THM5(sid) ((sid) << 8 | 0x08) +#define PM8350_ADC7_GPIO1(sid) ((sid) << 8 | 0x0a) +#define PM8350_ADC7_GPIO2(sid) ((sid) << 8 | 0x0b) +#define PM8350_ADC7_GPIO3(sid) ((sid) << 8 | 0x0c) +#define PM8350_ADC7_GPIO4(sid) ((sid) << 8 | 0x0d) /* 30k pull-up1 */ -#define PM8350_ADC7_AMUX_THM1_30K_PU (PM8350_SID << 8 | 0x24) -#define PM8350_ADC7_AMUX_THM2_30K_PU (PM8350_SID << 8 | 0x25) -#define PM8350_ADC7_AMUX_THM3_30K_PU (PM8350_SID << 8 | 0x26) -#define PM8350_ADC7_AMUX_THM4_30K_PU (PM8350_SID << 8 | 0x27) -#define PM8350_ADC7_AMUX_THM5_30K_PU (PM8350_SID << 8 | 0x28) -#define PM8350_ADC7_GPIO1_30K_PU (PM8350_SID << 8 | 0x2a) -#define PM8350_ADC7_GPIO2_30K_PU (PM8350_SID << 8 | 0x2b) -#define PM8350_ADC7_GPIO3_30K_PU (PM8350_SID << 8 | 0x2c) -#define PM8350_ADC7_GPIO4_30K_PU (PM8350_SID << 8 | 0x2d) +#define PM8350_ADC7_AMUX_THM1_30K_PU(sid) ((sid) << 8 | 0x24) +#define PM8350_ADC7_AMUX_THM2_30K_PU(sid) ((sid) << 8 | 0x25) +#define PM8350_ADC7_AMUX_THM3_30K_PU(sid) ((sid) << 8 | 0x26) +#define PM8350_ADC7_AMUX_THM4_30K_PU(sid) ((sid) << 8 | 0x27) +#define PM8350_ADC7_AMUX_THM5_30K_PU(sid) ((sid) << 8 | 0x28) +#define PM8350_ADC7_GPIO1_30K_PU(sid) ((sid) << 8 | 0x2a) +#define PM8350_ADC7_GPIO2_30K_PU(sid) ((sid) << 8 | 0x2b) +#define PM8350_ADC7_GPIO3_30K_PU(sid) ((sid) << 8 | 0x2c) +#define PM8350_ADC7_GPIO4_30K_PU(sid) ((sid) << 8 | 0x2d) /* 100k pull-up2 */ -#define PM8350_ADC7_AMUX_THM1_100K_PU (PM8350_SID << 8 | 0x44) -#define PM8350_ADC7_AMUX_THM2_100K_PU (PM8350_SID << 8 | 0x45) -#define PM8350_ADC7_AMUX_THM3_100K_PU (PM8350_SID << 8 | 0x46) -#define PM8350_ADC7_AMUX_THM4_100K_PU (PM8350_SID << 8 | 0x47) -#define PM8350_ADC7_AMUX_THM5_100K_PU (PM8350_SID << 8 | 0x48) -#define PM8350_ADC7_GPIO1_100K_PU (PM8350_SID << 8 | 0x4a) -#define PM8350_ADC7_GPIO2_100K_PU (PM8350_SID << 8 | 0x4b) -#define PM8350_ADC7_GPIO3_100K_PU (PM8350_SID << 8 | 0x4c) -#define PM8350_ADC7_GPIO4_100K_PU (PM8350_SID << 8 | 0x4d) +#define PM8350_ADC7_AMUX_THM1_100K_PU(sid) ((sid) << 8 | 0x44) +#define PM8350_ADC7_AMUX_THM2_100K_PU(sid) ((sid) << 8 | 0x45) +#define PM8350_ADC7_AMUX_THM3_100K_PU(sid) ((sid) << 8 | 0x46) +#define PM8350_ADC7_AMUX_THM4_100K_PU(sid) ((sid) << 8 | 0x47) +#define PM8350_ADC7_AMUX_THM5_100K_PU(sid) ((sid) << 8 | 0x48) +#define PM8350_ADC7_GPIO1_100K_PU(sid) ((sid) << 8 | 0x4a) +#define PM8350_ADC7_GPIO2_100K_PU(sid) ((sid) << 8 | 0x4b) +#define PM8350_ADC7_GPIO3_100K_PU(sid) ((sid) << 8 | 0x4c) +#define PM8350_ADC7_GPIO4_100K_PU(sid) ((sid) << 8 | 0x4d) /* 400k pull-up3 */ -#define PM8350_ADC7_AMUX_THM1_400K_PU (PM8350_SID << 8 | 0x64) -#define PM8350_ADC7_AMUX_THM2_400K_PU (PM8350_SID << 8 | 0x65) -#define PM8350_ADC7_AMUX_THM3_400K_PU (PM8350_SID << 8 | 0x66) -#define PM8350_ADC7_AMUX_THM4_400K_PU (PM8350_SID << 8 | 0x67) -#define PM8350_ADC7_AMUX_THM5_400K_PU (PM8350_SID << 8 | 0x68) -#define PM8350_ADC7_GPIO1_400K_PU (PM8350_SID << 8 | 0x6a) -#define PM8350_ADC7_GPIO2_400K_PU (PM8350_SID << 8 | 0x6b) -#define PM8350_ADC7_GPIO3_400K_PU (PM8350_SID << 8 | 0x6c) -#define PM8350_ADC7_GPIO4_400K_PU (PM8350_SID << 8 | 0x6d) +#define PM8350_ADC7_AMUX_THM1_400K_PU(sid) ((sid) << 8 | 0x64) +#define PM8350_ADC7_AMUX_THM2_400K_PU(sid) ((sid) << 8 | 0x65) +#define PM8350_ADC7_AMUX_THM3_400K_PU(sid) ((sid) << 8 | 0x66) +#define PM8350_ADC7_AMUX_THM4_400K_PU(sid) ((sid) << 8 | 0x67) +#define PM8350_ADC7_AMUX_THM5_400K_PU(sid) ((sid) << 8 | 0x68) +#define PM8350_ADC7_GPIO1_400K_PU(sid) ((sid) << 8 | 0x6a) +#define PM8350_ADC7_GPIO2_400K_PU(sid) ((sid) << 8 | 0x6b) +#define PM8350_ADC7_GPIO3_400K_PU(sid) ((sid) << 8 | 0x6c) +#define PM8350_ADC7_GPIO4_400K_PU(sid) ((sid) << 8 | 0x6d) /* 1/3 Divider */ -#define PM8350_ADC7_GPIO4_DIV3 (PM8350_SID << 8 | 0x8d) +#define PM8350_ADC7_GPIO4_DIV3(sid) ((sid) << 8 | 0x8d) -#define PM8350_ADC7_VPH_PWR (PM8350_SID << 8 | 0x8e) +#define PM8350_ADC7_VPH_PWR(sid) ((sid) << 8 | 0x8e) #endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H */ From patchwork Sat Oct 29 05:14:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13024504 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from 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linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, steev@kali.org, Manivannan Sadhasivam , Krzysztof Kozlowski Subject: [PATCH v2 02/12] arm64: dts: qcom: sc8280xp-pmics: Add temp alarm for PM8280_{1/2} PMICs Date: Sat, 29 Oct 2022 10:44:39 +0530 Message-Id: <20221029051449.30678-3-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221029051449.30678-1-manivannan.sadhasivam@linaro.org> References: <20221029051449.30678-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add support for temperature alarm feature in the PM8280_{1/2} PMICs. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Manivannan Sadhasivam Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi index 24836b6b9bbc..5de47b1434a4 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi @@ -33,6 +33,13 @@ pmc8280_1: pmic@1 { #address-cells = <1>; #size-cells = <0>; + pm8280_1_temp_alarm: temp-alarm@a00 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0xa00>; + interrupts = <0x1 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells = <0>; + }; + pmc8280_1_gpios: gpio@8800 { compatible = "qcom,pm8350-gpio", "qcom,spmi-gpio"; reg = <0x8800>; @@ -78,6 +85,13 @@ pmc8280_2: pmic@3 { #address-cells = <1>; #size-cells = <0>; + pm8280_2_temp_alarm: temp-alarm@a00 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0xa00>; + interrupts = <0x2 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells = <0>; + }; + pmc8280_2_gpios: gpio@8800 { compatible = "qcom,pm8350-gpio", "qcom,spmi-gpio"; reg = <0x8800>; From patchwork Sat Oct 29 05:14:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13024505 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4FB9AC433FE for ; Sat, 29 Oct 2022 05:15:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229876AbiJ2FP0 (ORCPT ); Sat, 29 Oct 2022 01:15:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57882 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229907AbiJ2FPW (ORCPT ); Sat, 29 Oct 2022 01:15:22 -0400 Received: from mail-pl1-x62b.google.com (mail-pl1-x62b.google.com [IPv6:2607:f8b0:4864:20::62b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6074B72289 for ; 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Temperature trip points are inherited from PM8350 PMIC. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Manivannan Sadhasivam Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi | 44 ++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi index 5de47b1434a4..397ff4995003 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi @@ -7,6 +7,50 @@ #include #include +/ { + thermal-zones { + pm8280_1_thermal: pm8280-1-thermal { + polling-delay-passive = <100>; + polling-delay = <0>; + thermal-sensors = <&pm8280_1_temp_alarm>; + + trips { + trip0 { + temperature = <95000>; + hysteresis = <0>; + type = "passive"; + }; + + trip1 { + temperature = <115000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + + pm8280_2_thermal: pm8280-2-thermal { + polling-delay-passive = <100>; + polling-delay = <0>; + thermal-sensors = <&pm8280_2_temp_alarm>; + + trips { + trip0 { + temperature = <95000>; + hysteresis = <0>; + type = "passive"; + }; + + trip1 { + temperature = <115000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + }; +}; + &spmi_bus { pmk8280: pmic@0 { compatible = "qcom,pmk8350", "qcom,spmi-pmic"; From patchwork Sat Oct 29 05:14:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13024506 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 927B4C38A02 for ; Sat, 29 Oct 2022 05:15:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229943AbiJ2FPm (ORCPT ); Sat, 29 Oct 2022 01:15:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58166 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229904AbiJ2FPa (ORCPT ); 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Fri, 28 Oct 2022 22:15:24 -0700 (PDT) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, johan+linaro@kernel.org, quic_jprakash@quicinc.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, steev@kali.org, Manivannan Sadhasivam , Krzysztof Kozlowski Subject: [PATCH v2 04/12] arm64: dts: qcom: sc8280xp-pmics: Add support for PMK8280 RESIN input Date: Sat, 29 Oct 2022 10:44:41 +0530 Message-Id: <20221029051449.30678-5-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221029051449.30678-1-manivannan.sadhasivam@linaro.org> References: <20221029051449.30678-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The RESIN input can be used to reset the PMK8280 PMIC. Enabling the RESIN block allows the PMK8280 to detect reset input via RESIN_N pin. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Manivannan Sadhasivam Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi index 397ff4995003..4a3464f5e6e9 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi @@ -68,6 +68,12 @@ pmk8280_pon_pwrkey: pwrkey { linux,code = ; status = "disabled"; }; + + pmk8280_pon_resin: resin { + compatible = "qcom,pmk8350-resin"; + interrupts = <0x0 0x13 0x6 IRQ_TYPE_EDGE_BOTH>; + status = "disabled"; + }; }; }; From patchwork Sat Oct 29 05:14:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13024507 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3D6E7C433FE for ; Sat, 29 Oct 2022 05:15:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229500AbiJ2FPt (ORCPT ); Sat, 29 Oct 2022 01:15:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57968 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229911AbiJ2FPe (ORCPT ); Sat, 29 Oct 2022 01:15:34 -0400 Received: from mail-pg1-x52b.google.com (mail-pg1-x52b.google.com [IPv6:2607:f8b0:4864:20::52b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DB0C2D8EFE for ; Fri, 28 Oct 2022 22:15:30 -0700 (PDT) Received: by mail-pg1-x52b.google.com with SMTP id g129so6506158pgc.7 for ; Fri, 28 Oct 2022 22:15:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=dP7gKJEnRLPQX8LHnYkF6JBv/NDORO6b+eeedw/waq8=; b=Axg7TGotGyn7k8aGjCb71M3oWjFr7DHM06AkL471EdFh/1FkXrWac5iEnOfl+/cMXp RE8mklO7EVC9BnDNsiwwn31Z+YJ6Zgkc7cxcwKQvJu5Spcw3t8AZsIbXn5/d2OVgzNR8 9xl1RXVhpoN5Of1ur24IRlpDvR3XC3nNWmoozBfg6QWprIcyYxcToEoH958Sy7Cfolbo IACx5SRpRnqFWOKIpBameVC/QTgxyP60SStvJifZeh2yn13HhbZb2sWHIPEe/ora5IXD uQG6lh1QtKfeJnZpicY7pqcpJt1v21K83OVthxBuTW5yl9Z9R+ulTQynGZPaB01R0cPT LFgA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=dP7gKJEnRLPQX8LHnYkF6JBv/NDORO6b+eeedw/waq8=; b=ZDATYs5Q/xOnUtonsThaGlHJl6SOFlQqh5s2RgTBb8Q0KsjivgQ0Pgr5YKndAxZ2RM 7zBYUecDrwz6DsczaKmugKQoWtj/WrC0dYMly1uxsBQAtVJe7K4qQTd8qGSQXLWAKz55 ORi7QbrQ2ONz6/9QANxwCs2CrXgB1tdNGrAuy0k+vydkmj/NqC5/dhrT4P7CiED7U3gd ubCt1pMWFMQbcLgusimDi/UEeUO4UUcHUqFXtlDsKcwlZGOR1pcxAreRcrAsLYMcbM+2 0QzuhquQEFlY7+WPDE50ldqsnD+PckUr8LFySSzoBH2e1ftvErzeOkLiBEDR/RhFZk4B 3LpA== X-Gm-Message-State: ACrzQf0gGo+pnijFJrH+t0VrkITBi4gx3eMTkFyDPnzw2k7ueOJFubwM 4afucX7bcw0V6VHcFNm0DyV/ X-Google-Smtp-Source: AMsMyM53L8+5me23k36tNwbqKhP5jxGXxdpRgTB0eqtnitZ8clokbB+en/jQ3HVh1qgjp3pi01o7QA== X-Received: by 2002:a65:57cd:0:b0:46e:ca52:f6a9 with SMTP id q13-20020a6557cd000000b0046eca52f6a9mr2621739pgr.269.1667020530129; Fri, 28 Oct 2022 22:15:30 -0700 (PDT) Received: from localhost.localdomain ([59.92.103.167]) by smtp.gmail.com with ESMTPSA id f5-20020a170902ce8500b0017e9b820a1asm363150plg.100.2022.10.28.22.15.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Oct 2022 22:15:29 -0700 (PDT) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, johan+linaro@kernel.org, quic_jprakash@quicinc.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, steev@kali.org, Manivannan Sadhasivam Subject: [PATCH v2 05/12] arm64: dts: qcom: sc8280xp-pmics: Add PMK8280 ADC7 block Date: Sat, 29 Oct 2022 10:44:42 +0530 Message-Id: <20221029051449.30678-6-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221029051449.30678-1-manivannan.sadhasivam@linaro.org> References: <20221029051449.30678-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add support for ADC7 block available in PMK8280 for reading the temperature via the AMUX pins. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Konrad Dybcio Reviewed-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi index 4a3464f5e6e9..3c56e4cb5b5b 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi @@ -75,6 +75,15 @@ pmk8280_pon_resin: resin { status = "disabled"; }; }; + + pmk8280_vadc: adc@3100 { + compatible = "qcom,spmi-adc7"; + reg = <0x3100>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; + #io-channel-cells = <1>; + }; }; pmc8280_1: pmic@1 { From patchwork Sat Oct 29 05:14:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13024508 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 728BDC433FE for ; Sat, 29 Oct 2022 05:16:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229945AbiJ2FQH (ORCPT ); Sat, 29 Oct 2022 01:16:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58588 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229946AbiJ2FPn (ORCPT ); Sat, 29 Oct 2022 01:15:43 -0400 Received: from mail-pf1-x42b.google.com (mail-pf1-x42b.google.com [IPv6:2607:f8b0:4864:20::42b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2B6441974CB for ; Fri, 28 Oct 2022 22:15:35 -0700 (PDT) Received: by mail-pf1-x42b.google.com with SMTP id f140so6469543pfa.1 for ; Fri, 28 Oct 2022 22:15:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ssWG2K/L40ECA7RFYZd0Ssg9F64AzTozxaoR5gGuJ3c=; b=atqrHA5b6gwjGelKryJPqzyTJ/MjFn6RwViURNGVYZkpPqP1WmK64iKvymNtbOQlnZ mbKjZPP+2vpChHNpxOzyySCMtpI5epMG62Op1NivSB8eAPfiHiEDKseMjyCrLlv77Yjt GOVk2vklEAdyMrqx4rJ981aK+5zI13WoYld2Z6MSweGc/avsJG7gL7jj+p7zhB5kQwd7 S+rSk1uN4Orc5P9eoOR4Oiz3F2C3UINaU5Jvr/XYji1FvzcqtJb43FGCFYu3rhyhXub6 B6at9pHCGdJhjDXaVmsrijjlm6O7SIsGuUbwmw/kQd3gcoKs4GG5ai7YSv/0ZYA1vykj uO1g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ssWG2K/L40ECA7RFYZd0Ssg9F64AzTozxaoR5gGuJ3c=; b=JSlNiGtmQxDWgjtMz/78kAOwJhGoBPjMlvDDWsupfv0EezVCulBnoaQNoRpACK1lEE py69EtVOZ+KxkDSsSWZ8mmF2ZLwm2nj8BmWpsk8c760uHk+C8tMHJtQ/+qAxBhmEfkmG MGZBW6GXy5mlu9mvV+pzw8vO//QR+NAsbGGrzQf/0OFkNouaRFr1dY5NMjbFsiAC/BS0 roRjM19GTTqQ7BD93cJOrBFSz0zFUKUcbUxdZlHQu8vXMfI0K2W2QdasICSulWLZSBAY pdKp3HOh1QscygfTCIecmP4eQ3rMsZ7pDID6XSkgd1B9zEbyC2UkShHyykRkh9U4HHcf JmVg== X-Gm-Message-State: ACrzQf30GO/yU3CNfMcD1e7dYSVEf3jSAUiKIEu8zaiRJ2jzDr4fAA9e mg37gm03ACAMQQvPlAxRXYok X-Google-Smtp-Source: AMsMyM45JM3p1b99TdtBq2OT4YrKkPggdXFEOeVTDglVAcZi7VCOqtTii1I4/mPuGvU6kKMfGQHb5A== X-Received: by 2002:a05:6a00:891:b0:565:85a7:a6e with SMTP id q17-20020a056a00089100b0056585a70a6emr2653028pfj.21.1667020535231; Fri, 28 Oct 2022 22:15:35 -0700 (PDT) Received: from localhost.localdomain ([59.92.103.167]) by smtp.gmail.com with ESMTPSA id f5-20020a170902ce8500b0017e9b820a1asm363150plg.100.2022.10.28.22.15.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Oct 2022 22:15:34 -0700 (PDT) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, johan+linaro@kernel.org, quic_jprakash@quicinc.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, steev@kali.org, Manivannan Sadhasivam , Krzysztof Kozlowski Subject: [PATCH v2 06/12] arm64: dts: qcom: sc8280xp-pmics: Add support for TM5 block in PMK8280 Date: Sat, 29 Oct 2022 10:44:43 +0530 Message-Id: <20221029051449.30678-7-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221029051449.30678-1-manivannan.sadhasivam@linaro.org> References: <20221029051449.30678-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Thermal Monitoring block ADC5 (TM5) in PMK8280 can be used to monitor the temperature from secondary PMICs like PM8280. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Manivannan Sadhasivam Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi index 3c56e4cb5b5b..6f95743bf87d 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi @@ -84,6 +84,16 @@ pmk8280_vadc: adc@3100 { interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; #io-channel-cells = <1>; }; + + pmk8280_adc_tm: adc-tm@3400 { + compatible = "qcom,spmi-adc-tm5-gen2"; + reg = <0x3400>; + interrupts = <0x0 0x34 0x0 IRQ_TYPE_EDGE_RISING>; + #address-cells = <1>; + #size-cells = <0>; + #thermal-sensor-cells = <1>; + status = "disabled"; + }; }; pmc8280_1: pmic@1 { From patchwork Sat Oct 29 05:14:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13024509 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E78A2FA3740 for ; Sat, 29 Oct 2022 05:16:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229636AbiJ2FQK (ORCPT ); Sat, 29 Oct 2022 01:16:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57950 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229920AbiJ2FPq (ORCPT ); Sat, 29 Oct 2022 01:15:46 -0400 Received: from mail-pj1-x1029.google.com (mail-pj1-x1029.google.com [IPv6:2607:f8b0:4864:20::1029]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B720A1C97CC for ; Fri, 28 Oct 2022 22:15:40 -0700 (PDT) Received: by mail-pj1-x1029.google.com with SMTP id f5-20020a17090a4a8500b002131bb59d61so9024092pjh.1 for ; Fri, 28 Oct 2022 22:15:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=p0QqRP1D1eQSgHWesXmi0SdTGcBYrL7MF+tNbo4fAQs=; b=cWYOevpbrsYCKJLBBbZ0cVHERCaVHtsvJQDWHVZWQf7TNl6zP1+7pOfFeI41QS9CJP HJjLYtUN8QjFhuLXgDHJ7pqVv6XU0+mQNglkaLnz9jsscd7ODrz6Dj4gd/NyGngvYst/ gMAZOt3mqkmzerFFzEJG1Y4jS7XYia7sHRF167PRssMLvcHpXaAy4y9swN25wFedw2jL znQJT+64KX7BUCVqItMiwVVxep9DV6Lr0M54LaaUFHWJbuHGzPr6C65xigYD26LgvboJ zH3lFExzXPIzZcKK4o3NCFevzkUmGXf6NRJa/vGNxNxg2widx2yMTpNfsnwxq28xvZ04 DucA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=p0QqRP1D1eQSgHWesXmi0SdTGcBYrL7MF+tNbo4fAQs=; b=Et3QFtXYUI96dIXewIqUc0V6DvXYJ1NorERtl3Vi12S3sAlrlceDcYBsKE1bohfhDr 1miY9lGa12uF66+8X0FWkBRPopfI80ljYAkEF6spC5XQMby6yW+LM73kbR+w2oN+HQMB 0i119RIgCJcUv/PacG3KygH+O7R1jXkb8oi8tXQe5G5tZDfGxZq4N1GzberWtdME+GZk JZJ7R/zL1rTNMHL2xzOTsohXphlf4sUmFDy9gdh+MjNW0puUje0D0wD3g4qbdDJcDq+/ bUI3iVDd+5eFFKA8NF/MDY8rz/bQg3mWRQl0BhF/EWTfWLVMN1Sr92QFPfZFa608iRT0 LKzg== X-Gm-Message-State: ACrzQf2Fq3OUjDxlZRyEp8BUF3UeO/17Vjf/6VJQeYnwooLI2NPocKBw m36HkPP4jGecpojKmDQ7uPOr X-Google-Smtp-Source: AMsMyM4u2iT/ElVWUQ1QcsObzIYM57c7Nc+QWSEv8gdwgD5jX67o8GLOl2oOiia90ytkwGVXzYq2AA== X-Received: by 2002:a17:90b:4c84:b0:213:5fe0:6732 with SMTP id my4-20020a17090b4c8400b002135fe06732mr2924359pjb.219.1667020540399; Fri, 28 Oct 2022 22:15:40 -0700 (PDT) Received: from localhost.localdomain ([59.92.103.167]) by smtp.gmail.com with ESMTPSA id f5-20020a170902ce8500b0017e9b820a1asm363150plg.100.2022.10.28.22.15.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Oct 2022 22:15:39 -0700 (PDT) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, johan+linaro@kernel.org, quic_jprakash@quicinc.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, steev@kali.org, Manivannan Sadhasivam , Krzysztof Kozlowski Subject: [PATCH v2 07/12] arm64: dts: qcom: sc8280xp-x13s: Enable PMK8280 RESIN input Date: Sat, 29 Oct 2022 10:44:44 +0530 Message-Id: <20221029051449.30678-8-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221029051449.30678-1-manivannan.sadhasivam@linaro.org> References: <20221029051449.30678-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Enable resetting the PMK8280 through RESIN block in SC8280XP X13s. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Manivannan Sadhasivam Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts index b2b744bb8a53..6aa8cf6d9776 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts @@ -169,6 +169,10 @@ &pmk8280_pon_pwrkey { status = "okay"; }; +&pmk8280_pon_resin { + status = "okay"; +}; + &qup0 { status = "okay"; }; From patchwork Sat Oct 29 05:14:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13024510 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D1A63FA3740 for ; Sat, 29 Oct 2022 05:16:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229510AbiJ2FQX (ORCPT ); Sat, 29 Oct 2022 01:16:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58082 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229862AbiJ2FPv (ORCPT ); Sat, 29 Oct 2022 01:15:51 -0400 Received: from mail-pl1-x62d.google.com (mail-pl1-x62d.google.com [IPv6:2607:f8b0:4864:20::62d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B567C1D2F45 for ; Fri, 28 Oct 2022 22:15:45 -0700 (PDT) Received: by mail-pl1-x62d.google.com with SMTP id l2so6514399pld.13 for ; Fri, 28 Oct 2022 22:15:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=BHFiT+TZb5B1WGujexyeyAlYCgIQjWunzDzNjtB/Zig=; b=JdUNhwrzxVYK2G8LaQKWsqiOd9eEsYUrt0x1ktLfZpKvzCgHclt6lcmdXuATw5K0Zr 9scTUH5/Ya9g5YMYXYw6eQ9N0uBcOb57RsYe09tsJrUXse1Q6Wcg1DNu8aKclocM7pnt OXVL04hgbc5mqCeHoJHcwUp3RfQiVrbacJLQiXgiDS0GkUsJcsYExZ6bq2vKO8gui9nx DjTk3Vtw1Ok3N2K7xDkVTGTCtIEhbFTrfuNCLtI1Qmda4a2+/ngjkOH41FXdhVQ6F3am Dk9PUMUZBfrfaeyML7WtavBCfvU5KTdXMxkEfdKSlAc6jdZSb0LjKFEo16QSG6L4q/h3 w7uQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=BHFiT+TZb5B1WGujexyeyAlYCgIQjWunzDzNjtB/Zig=; b=mhOFMZcgGJakMycQ76RMH12P83HY76o6EPB1jqBE/gwyyA72EyZAQDKKvn9uRDvxDA cPo/U+0RbTRaA11AvH1ZNm65U70FIj21LFoDt3G5uBmiNRsuMDEn/NoJoSGyLIMMGsKN gdENhdoZ6M6OXJqfrs7V8tH5MnHZ9dZiuIYthnE5RmmY+G030IeSWpn51tenDCk/WgQY h2lPWKuZz/F7JeWW+vvUc2nIN9GvcE75Mn6tNC/PQSYYaSDpcflcNCIQSfgsTsU12Rnz fFY9u3yRCTvNjR17ygejGaVpOsNMB6+KLhi6Oio2KB9bA60ryOVdm4OqGrYs9VsnwzSc a71w== X-Gm-Message-State: ACrzQf1ePg2yoviC1JwjvbiC30qdfObPv498b39nXpL7+pPih9zbcJFI vHCb0P3J6Xw/fXV9wVh6otPp X-Google-Smtp-Source: AMsMyM5kQRU46HsVC2D8IYv1AbzOgD3X2Kpm9vKnInBbk6MHkqH2frQT/bbTFNnywZFkOl+M6QQvhQ== X-Received: by 2002:a17:90b:4d0d:b0:20d:6fc0:51 with SMTP id mw13-20020a17090b4d0d00b0020d6fc00051mr19854994pjb.10.1667020545210; Fri, 28 Oct 2022 22:15:45 -0700 (PDT) Received: from localhost.localdomain ([59.92.103.167]) by smtp.gmail.com with ESMTPSA id f5-20020a170902ce8500b0017e9b820a1asm363150plg.100.2022.10.28.22.15.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Oct 2022 22:15:44 -0700 (PDT) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, johan+linaro@kernel.org, quic_jprakash@quicinc.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, steev@kali.org, Manivannan Sadhasivam Subject: [PATCH v2 08/12] arm64: dts: qcom: sc8280xp-x13s: Add PMK8280 VADC channels Date: Sat, 29 Oct 2022 10:44:45 +0530 Message-Id: <20221029051449.30678-9-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221029051449.30678-1-manivannan.sadhasivam@linaro.org> References: <20221029051449.30678-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add VADC channels for measuring the on-chip die temperature and external crystal osciallator temperature of PMK8280. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Konrad Dybcio Reviewed-by: Krzysztof Kozlowski --- .../dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts index 6aa8cf6d9776..18315743313b 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts @@ -7,6 +7,7 @@ /dts-v1/; #include +#include #include #include "sc8280xp.dtsi" @@ -173,6 +174,23 @@ &pmk8280_pon_resin { status = "okay"; }; +&pmk8280_vadc { + status = "okay"; + + pmic-die-temp@3 { + reg = ; + label = "pmk8280_die_temp"; + qcom,pre-scaling = <1 1>; + }; + + xo-therm@44 { + reg = ; + label = "pmk8280_xo_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; +}; + &qup0 { status = "okay"; }; From patchwork Sat Oct 29 05:14:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13024511 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DD8B2C38A02 for ; Sat, 29 Oct 2022 05:16:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230022AbiJ2FQ1 (ORCPT ); Sat, 29 Oct 2022 01:16:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58478 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229932AbiJ2FPy (ORCPT ); Sat, 29 Oct 2022 01:15:54 -0400 Received: from mail-pj1-x1035.google.com (mail-pj1-x1035.google.com [IPv6:2607:f8b0:4864:20::1035]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5C77F5F9A1 for ; Fri, 28 Oct 2022 22:15:50 -0700 (PDT) Received: by mail-pj1-x1035.google.com with SMTP id c15-20020a17090a1d0f00b0021365864446so6197598pjd.4 for ; Fri, 28 Oct 2022 22:15:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=lacf58udOIotYpm9O1+kpxWuSMQ/so9proy5x8qUsKM=; b=BKW2GRUYUcvNwgRC9PoWD+SZ9gBFBHy+flAlJ4Il9EVWFDpcSWj+6BUJz6gmTbGA5x nPJkY6xM+rZxoBxGAx90lS0yhbUXSylCXHy62p3QfWtZUlH4PEprv3e/hKGTFq3CTo2/ QzO0B2TQnH2EkdeMvdsiRNGd5X8VNsyoBXbmeA0OspUNjvT7UkfeIgNBAvTJfUWdB84A JbpdyhcSu+KYYfa8s1S6GuJL0vc4YhHycg7+g9FzfHUruTn68imOC9noU9AY9EwtnBKx U68+u2tjlWThbrUXg5zMLQ0H7P+miUOy9633qv3PXzegq9KTxy5zJuUsA9TQgZAALQOU tfLQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=lacf58udOIotYpm9O1+kpxWuSMQ/so9proy5x8qUsKM=; b=0lFo/KwuLZI9SSVq1JDxoUPumUQYqd1eENp2ztRiGzeBag88L1flfMob/1mfOpe9kv qzL11JAxL/ekIRJO5BXXZeO9tXCIX3pIgAmbtrssn5oIQQDAM+SoERlaaaqBDsM4PrhG 7KHJRI0luJc7q5IPylfPkJPkOkYYQY/wC9TCXENYAUySXArJAbftfm24lonX7IXJ+ybv 0zi/K5/ft8ShEibY79dnbunskfaaSJSYfqreEaEXNh7B6sCa7DCprYlHIOZ9JJ2Qc0pP +wAU3g1UzokGnZMhEqf3Hs2RRs3tEMFnbv+QSiQo05ol+FI8X5s1xHoMXGf8igf6E4MB P6ig== X-Gm-Message-State: ACrzQf2cZb+AX3ZYaG59A1VDpv0sBv/2X8kaNjlUKOmzzn5AN08CtKFv tCOm5mOlQ1XaDr4JguiOohY5 X-Google-Smtp-Source: AMsMyM7OJNpCK0PJHyp8EhfJ/Cik8xFsVLDBJBAL+G2uR+Z7kjOTnIVFJXvehnk5qUWjWaCi7xZMAw== X-Received: by 2002:a17:90b:1d0f:b0:20d:1ec3:f732 with SMTP id on15-20020a17090b1d0f00b0020d1ec3f732mr2980176pjb.84.1667020550291; Fri, 28 Oct 2022 22:15:50 -0700 (PDT) Received: from localhost.localdomain ([59.92.103.167]) by smtp.gmail.com with ESMTPSA id f5-20020a170902ce8500b0017e9b820a1asm363150plg.100.2022.10.28.22.15.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Oct 2022 22:15:49 -0700 (PDT) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, johan+linaro@kernel.org, quic_jprakash@quicinc.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, steev@kali.org, Manivannan Sadhasivam Subject: [PATCH v2 09/12] arm64: dts: qcom: sc8280xp-x13s: Add PM8280_{1/2} VADC channels Date: Sat, 29 Oct 2022 10:44:46 +0530 Message-Id: <20221029051449.30678-10-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221029051449.30678-1-manivannan.sadhasivam@linaro.org> References: <20221029051449.30678-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add VADC channels of PM8280_{1/2} PMICs for measuring the on-chip die temperature and external thermistors connected to the AMUX pins. The measurements are collected by the primary PMIC PMK8280 from the secondary PMICs PM8280_{1/2} and exposed over the PMK8280's VADC channels. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Konrad Dybcio Reviewed-by: Krzysztof Kozlowski --- .../qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 61 +++++++++++++++++++ 1 file changed, 61 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts index 18315743313b..250e1489f029 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts @@ -7,6 +7,7 @@ /dts-v1/; #include +#include #include #include @@ -189,6 +190,66 @@ xo-therm@44 { qcom,ratiometric; qcom,hw-settle-time = <200>; }; + + pmic-die-temp@103 { + reg = ; + label = "pm8280_1_die_temp"; + qcom,pre-scaling = <1 1>; + }; + + sys-therm@144 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + + sys-therm@145 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + + sys-therm@146 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + + sys-therm@147 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + + pmic-die-temp@303 { + reg = ; + label = "pm8250_2_die_temp"; + qcom,pre-scaling = <1 1>; + }; + + sys-therm@344 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + + sys-therm@345 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + + sys-therm@346 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + + sys-therm@347 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; }; &qup0 { From patchwork Sat Oct 29 05:14:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13024512 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 48CCDC38A02 for ; Sat, 29 Oct 2022 05:16:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229938AbiJ2FQe (ORCPT ); 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Fri, 28 Oct 2022 22:15:54 -0700 (PDT) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, johan+linaro@kernel.org, quic_jprakash@quicinc.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, steev@kali.org, Manivannan Sadhasivam Subject: [PATCH v2 10/12] arm64: dts: qcom: sc8280xp-x13s: Add PMR735A VADC channel Date: Sat, 29 Oct 2022 10:44:47 +0530 Message-Id: <20221029051449.30678-11-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221029051449.30678-1-manivannan.sadhasivam@linaro.org> References: <20221029051449.30678-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add VADC channel of PMR735A for measuring the on-chip die temperature. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Konrad Dybcio Reviewed-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts index 250e1489f029..9545b471c2fa 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts @@ -9,6 +9,7 @@ #include #include #include +#include #include #include "sc8280xp.dtsi" @@ -250,6 +251,12 @@ sys-therm@347 { qcom,ratiometric; qcom,hw-settle-time = <200>; }; + + pmic-die-temp@403 { + reg = ; + label = "pmr735a_die_temp"; + qcom,pre-scaling = <1 1>; + }; }; &qup0 { From patchwork Sat Oct 29 05:14:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13024513 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B6D1BC38A02 for ; Sat, 29 Oct 2022 05:16:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230043AbiJ2FQo (ORCPT ); Sat, 29 Oct 2022 01:16:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58312 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229917AbiJ2FQK (ORCPT ); Sat, 29 Oct 2022 01:16:10 -0400 Received: from mail-pj1-x102a.google.com (mail-pj1-x102a.google.com [IPv6:2607:f8b0:4864:20::102a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BB4751D4423 for ; Fri, 28 Oct 2022 22:16:00 -0700 (PDT) Received: by mail-pj1-x102a.google.com with SMTP id h14so6285156pjv.4 for ; Fri, 28 Oct 2022 22:16:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=TzuhQnk+/5ipgdw10iW10n80y2XME509RyIjOUqWTgg=; b=Q/BIg5COsaTyRa/nKSpieFWtqi2CwAglz87e5KBzp9qRXtyTKyg8+dl8LNWihwEYc+ jrKl+BxcFx6OIc/HEEI1dbn3Ggs6/EmR+rcKqcFvC1PCMpI9aZ+y/I60xbOrKnfxj2gY C5AVyekl5RFExSQEwX+5sU7wyp2054ZOZm+/7LNHL/iE+FZU7pRiGDjn9Y+WF69O99Vw 4tZLGzVabUT2RxmynSt+d4d+fhtuJaKkjyloHQjYAH0KdutGr0yY61ZHx2uZGRL3okch Xh+9b6xpmtbhp93lPg+9AVTcic6T7iaYynAh+20VrZtywIHNOAF6OK8xhjsOkkv4N+vG B9eg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=TzuhQnk+/5ipgdw10iW10n80y2XME509RyIjOUqWTgg=; b=HkmVPF8MclVgPTzIcp+kQSqkX3Bcc3mS0ftDIEXtHOwLl10J9R1Rvj8xsQBtVUIWVM vXqS9l5OxWRDf/pYrJNzWHwkABHFmzoq1NhFGhz3b4CfphZ7z+eodKfLZ5V5uOAmEKmC jJ8k3AjRQ2UwRYsehHMkEjCfxOk4ThTqa+QdrdNPElWqyHZCbI/kWBi+vMfwk9ct2Ere fPtMPW6kv4Pjt10sbhdyoaPkWO37rDs9oV49SE49erA5bKBw+mVxrp9EtCMRFekEVFZg XZn+E0RsJaYVrGKvPlifEqSNhHtVb60xu13Esr3OeIQeKn9NzT4S/BYohH/DeP6SkPWl hAqQ== X-Gm-Message-State: ACrzQf1+BiFqNEqznEXXPccWXPI8TzlgAiMGlL6XUUsNMBYN6BnkE3Mp jlB8pGZwbQqrof09XUqyMMd8 X-Google-Smtp-Source: AMsMyM51EcnSu8SmAU5H22tbZyUpDOrpoB/bA5eyczaarbEF042GxN62w11JJMiPx/29rH6Z/zdi0Q== X-Received: by 2002:a17:90a:1150:b0:213:a42b:a734 with SMTP id d16-20020a17090a115000b00213a42ba734mr3010837pje.163.1667020560232; Fri, 28 Oct 2022 22:16:00 -0700 (PDT) Received: from localhost.localdomain ([59.92.103.167]) by smtp.gmail.com with ESMTPSA id f5-20020a170902ce8500b0017e9b820a1asm363150plg.100.2022.10.28.22.15.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Oct 2022 22:15:59 -0700 (PDT) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, johan+linaro@kernel.org, quic_jprakash@quicinc.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, steev@kali.org, Manivannan Sadhasivam Subject: [PATCH v2 11/12] arm64: dts: qcom: sc8280xp-x13s: Add PM8280_{1/2} ADC_TM5 channels Date: Sat, 29 Oct 2022 10:44:48 +0530 Message-Id: <20221029051449.30678-12-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221029051449.30678-1-manivannan.sadhasivam@linaro.org> References: <20221029051449.30678-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add ADC_TM5 channels of PM8280_{1/2} for monitoring the temperature from external thermistors connected to AMUX pins. The temperture measurements are collected from the PMK8280's VADC channels that expose the measurements from secondary PMICs PM8280_{1/2}. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Konrad Dybcio Reviewed-by: Krzysztof Kozlowski --- .../qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 68 +++++++++++++++++++ 1 file changed, 68 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts index 9545b471c2fa..ca77c19c6d0d 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts @@ -259,6 +259,74 @@ pmic-die-temp@403 { }; }; +&pmk8280_adc_tm { + status = "okay"; + + sys-therm@0 { + reg = <0>; + io-channels = <&pmk8280_vadc PM8350_ADC7_AMUX_THM1_100K_PU(1)>; + qcom,avg-samples = <2>; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; + + sys-therm@1 { + reg = <1>; + io-channels = <&pmk8280_vadc PM8350_ADC7_AMUX_THM2_100K_PU(1)>; + qcom,avg-samples = <2>; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; + + sys-therm@2 { + reg = <2>; + io-channels = <&pmk8280_vadc PM8350_ADC7_AMUX_THM3_100K_PU(1)>; + qcom,avg-samples = <2>; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; + + sys-therm@3 { + reg = <3>; + io-channels = <&pmk8280_vadc PM8350_ADC7_AMUX_THM4_100K_PU(1)>; + qcom,avg-samples = <2>; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; + + sys-therm@4 { + reg = <4>; + io-channels = <&pmk8280_vadc PM8350_ADC7_AMUX_THM1_100K_PU(3)>; + qcom,avg-samples = <2>; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; + + sys-therm@5 { + reg = <5>; + io-channels = <&pmk8280_vadc PM8350_ADC7_AMUX_THM2_100K_PU(3)>; + qcom,avg-samples = <2>; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; + + sys-therm@6 { + reg = <6>; + io-channels = <&pmk8280_vadc PM8350_ADC7_AMUX_THM3_100K_PU(3)>; + qcom,avg-samples = <2>; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; + + sys-therm@7 { + reg = <7>; + io-channels = <&pmk8280_vadc PM8350_ADC7_AMUX_THM4_100K_PU(3)>; + qcom,avg-samples = <2>; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; +}; + &qup0 { status = "okay"; }; From patchwork Sat Oct 29 05:14:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13024514 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5FADEFA3740 for ; Sat, 29 Oct 2022 05:16:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229982AbiJ2FQs (ORCPT ); Sat, 29 Oct 2022 01:16:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58746 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229875AbiJ2FQW (ORCPT ); Sat, 29 Oct 2022 01:16:22 -0400 Received: from mail-pl1-x630.google.com (mail-pl1-x630.google.com [IPv6:2607:f8b0:4864:20::630]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8D4941D4608 for ; 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Based on experiments, this thermistor seems to reflect the actual surface temperature of the laptop. For the cooling device, all BIG CPU cores are throttle down to keep the temperature at a sane level. Signed-off-by: Manivannan Sadhasivam --- .../qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 46 +++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts index ca77c19c6d0d..96e2fa72f782 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts @@ -29,6 +29,52 @@ backlight { pinctrl-0 = <&edp_bl_en>, <&edp_bl_pwm>; }; + thermal-zones { + skin-temp-thermal { + polling-delay-passive = <250>; + polling-delay = <0>; + thermal-sensors = <&pmk8280_adc_tm 5>; + + trips { + skin_temp_alert0: trip-point0 { + temperature = <55000>; + hysteresis = <1000>; + type = "passive"; + }; + + skin_temp_alert1: trip-point1 { + temperature = <58000>; + hysteresis = <1000>; + type = "passive"; + }; + + skin-temp-crit { + temperature = <73000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&skin_temp_alert0>; + cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + + map1 { + trip = <&skin_temp_alert1>; + cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + }; + vreg_edp_bl: regulator-edp-bl { compatible = "regulator-fixed";