From patchwork Mon Oct 31 13:25:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiaxun Yang X-Patchwork-Id: 13025922 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B2436ECAAA1 for ; Mon, 31 Oct 2022 13:26:17 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1opUnh-0006cn-Lx; Mon, 31 Oct 2022 09:26:01 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1opUnR-0006KE-IW for qemu-devel@nongnu.org; Mon, 31 Oct 2022 09:25:47 -0400 Received: from out2-smtp.messagingengine.com ([66.111.4.26]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1opUnP-0007jZ-SI for qemu-devel@nongnu.org; Mon, 31 Oct 2022 09:25:45 -0400 Received: from compute1.internal (compute1.nyi.internal [10.202.2.41]) by mailout.nyi.internal (Postfix) with ESMTP id 7102F5C014D; Mon, 31 Oct 2022 09:25:41 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute1.internal (MEProxy); Mon, 31 Oct 2022 09:25:41 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=flygoat.com; h= cc:cc:content-transfer-encoding:date:date:from:from:in-reply-to :in-reply-to:message-id:mime-version:references:reply-to:sender :subject:subject:to:to; s=fm1; t=1667222741; x=1667309141; bh=4l bP/pTyQ/NHtBGeRHSb+F/+b964vgJ/W7GPaDlyUNk=; b=OLyODfDLEbSoOQRXQ9 PJC/yLx4p1cgwiEkrTuxeyi7ei5cCgIyKwYqfxgosy8ji9bMexaqFsQCGXdAAsJc aaFw5EW1F1LZZJROM15S1rrntzHKIEInKBjiYFqyhWmuteiMxB62AOgTDpVsgowa myHZKOdzbCQzoc+2Dce+l9evsJZbmmyBBSA9c5o52Glq0QcTD81RQuNUF8OAftfp oTxLfJm7IXA2wkGvQ/ZFwzhXZA6mSXL3fpJp+C3EBf/feoL7RmQTxSIsmbNAAgoh lcoAbZ0vFfCjVT1RyU/taMXiZeuwU9zbOf+WML9Uf/Hf5pUMjJnRXAJEAuphFY1r DtNw== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding:date:date :feedback-id:feedback-id:from:from:in-reply-to:in-reply-to :message-id:mime-version:references:reply-to:sender:subject :subject:to:to:x-me-proxy:x-me-proxy:x-me-sender:x-me-sender :x-sasl-enc; s=fm3; t=1667222741; x=1667309141; bh=4lbP/pTyQ/NHt BGeRHSb+F/+b964vgJ/W7GPaDlyUNk=; b=iZa8MdE8BRFmjB58cNj/k0VjfAjAt 2qY3MfNy6EgbUyGiVmYknEYdf3QZw3ILvdUpQ506WCAj98X47ms/61D7TDNaZq1K hIiphvOHYL5QlbaizHggZItfifNK+EFQygGLVLK82ysQ0kE0uf0xN/uszWbx8T3L FKCoxplQakwCiIOqZn1H/IzqF00vh+iAb3YynDzS0CLFvj9W+hKk13I1GW0e+2Vm InKzPgTXiErewB1eQOF3ZMl7AXggmISicOUzUA7SiYFyoY76UtNtegmJ3mbP2ML4 Rgj3H/ncbXyKaeqt+qPjVWJ922HkpMVlI7Ijm4F+s6a8yok4nv5YOe05g== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvgedrudefgdehudcutefuodetggdotefrodftvf curfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfghnecu uegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenuc fjughrpefhvfevufffkffojghfggfgsedtkeertdertddtnecuhfhrohhmpeflihgrgihu nhcujggrnhhguceojhhirgiguhhnrdihrghnghesfhhlhihgohgrthdrtghomheqnecugg ftrfgrthhtvghrnhepfeeludefheegvdeuvddvgeekgfdvtdettdelieeihfegtedugeek hfdvhfejfedtnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrh homhepjhhirgiguhhnrdihrghnghesfhhlhihgohgrthdrtghomh X-ME-Proxy: Feedback-ID: ifd894703:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Mon, 31 Oct 2022 09:25:40 -0400 (EDT) From: Jiaxun Yang To: qemu-devel@nongnu.org Cc: f4bug@amsat.org, pavel.dovgalyuk@ispras.ru, Jiaxun Yang , Richard Henderson Subject: [PATCH v2 1/3] target/mips: Set CP0St_{KX, SX, UX} for Loongson-2F Date: Mon, 31 Oct 2022 13:25:29 +0000 Message-Id: <20221031132531.18122-2-jiaxun.yang@flygoat.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221031132531.18122-1-jiaxun.yang@flygoat.com> References: <20221031132531.18122-1-jiaxun.yang@flygoat.com> MIME-Version: 1.0 Received-SPF: pass client-ip=66.111.4.26; envelope-from=jiaxun.yang@flygoat.com; helo=out2-smtp.messagingengine.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Qemu-devel" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org+qemu-devel=archiver.kernel.org@nongnu.org As per an unpublished document, in later reversion of chips CP0St_{KX, SX, UX} is not writeable and hardcoded to 1. Without those bits set, kernel is unable to access XKPHYS address segmant. So just set them up on CPU reset. Signed-off-by: Jiaxun Yang Acked-by: Richard Henderson --- v2: Rewording to point out the document is unpublished --- target/mips/cpu.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/target/mips/cpu.c b/target/mips/cpu.c index d0a76b95f7..a870901bfa 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -304,6 +304,12 @@ static void mips_cpu_reset(DeviceState *dev) env->CP0_EntryHi_ASID_mask = (env->CP0_Config5 & (1 << CP0C5_MI)) ? 0x0 : (env->CP0_Config4 & (1 << CP0C4_AE)) ? 0x3ff : 0xff; env->CP0_Status = (1 << CP0St_BEV) | (1 << CP0St_ERL); + if (env->insn_flags & INSN_LOONGSON2F) { + /* Loongson-2F has those bits hardcoded to 1 */ + env->CP0_Status |= (1 << CP0St_KX) | (1 << CP0St_SX) | + (1 << CP0St_UX); + } + /* * Vectored interrupts not implemented, timer on int 7, * no performance counters. From patchwork Mon Oct 31 13:25:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jiaxun Yang X-Patchwork-Id: 13025927 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2F6C0FA3742 for ; Mon, 31 Oct 2022 13:27:21 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1opUng-0006bQ-SA; Mon, 31 Oct 2022 09:26:00 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1opUnQ-0006K3-BY for qemu-devel@nongnu.org; Mon, 31 Oct 2022 09:25:45 -0400 Received: from out2-smtp.messagingengine.com ([66.111.4.26]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1opUnO-0007jg-SZ for qemu-devel@nongnu.org; Mon, 31 Oct 2022 09:25:44 -0400 Received: from compute1.internal (compute1.nyi.internal [10.202.2.41]) by mailout.nyi.internal (Postfix) with ESMTP id 725A55C012D; Mon, 31 Oct 2022 09:25:42 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute1.internal (MEProxy); Mon, 31 Oct 2022 09:25:42 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=flygoat.com; h= cc:cc:content-transfer-encoding:date:date:from:from:in-reply-to :in-reply-to:message-id:mime-version:references:reply-to:sender :subject:subject:to:to; s=fm1; t=1667222742; x=1667309142; bh=xW WmlZqKiSO1F01j+4qKscub1x7utoknBLquo34mzSU=; b=JIWQJ3DzfxTA0Xl3O6 irO3PuvA3l559LF0W8A1V25dr1tHuj9OBpgA7qbi0udYhusC4Nv6zBaynR3MlGO7 rZTyNLhgYM6MlckWKE2odxuCQJGIUpoqRR2FpMd9BwnvTsTgW6R5xxdwBJy9cgEv zhwmyKZ+vqYfQVQ1KBSFXnv4bnGKruzkyfe6mOXGqwLOLWaQfEcQybZioUFg44Mn iOLP8AA3nizrA7fBD9AOs9ikHycO2MAfLe7T4Ay8ZBIJII/fu9zNHfny8CEaLBCo jtK81STYAzh3zqwi+vTbNebVRPJd2Qf77Eg3QSCLcPDuRoJAJy5HAiXKFrCJO+Ee PyKA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding:date:date :feedback-id:feedback-id:from:from:in-reply-to:in-reply-to :message-id:mime-version:references:reply-to:sender:subject :subject:to:to:x-me-proxy:x-me-proxy:x-me-sender:x-me-sender :x-sasl-enc; s=fm3; t=1667222742; x=1667309142; bh=xWWmlZqKiSO1F 01j+4qKscub1x7utoknBLquo34mzSU=; b=Lm3clRIT58W4cBqvV8OWpZcuOPDKx mBQF/xFpjXdaQVpgu5niXkyIfNdmvXAPa6F+iJlD28N/A2xDln9PkRgfdL1sN4RR lyRT1XMicqcgh6AMvl8quKvGvnR7hsFV01ySXIZg5Ma98tMnvDTTF0xFH6jPs4xo 68xihlyur/UL2G9SF1/QUW3rYAqDxqLgHtKiIGMRPCOGo78NWM3uYmWL0eBZXyQI Fa/UJylqP0J69ISe+jFA9ovl9S/+/i0pgr12zWrlqPJblZ/++vwgIvQSTeo6CPgy gDq9lYufhPMkKDOeL8uzsXnOMklItPla+61PH6nnKxHXoUhkYQsqEn0qQ== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvgedrudefgdehudcutefuodetggdotefrodftvf curfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfghnecu uegrihhlohhuthemuceftddtnecunecujfgurhephffvvefufffkofgjfhgggfestdekre dtredttdenucfhrhhomheplfhirgiguhhnucgjrghnghcuoehjihgrgihunhdrhigrnhhg sehflhihghhorghtrdgtohhmqeenucggtffrrghtthgvrhhnpeefledufeehgedvuedvvd egkefgvddttedtleeiiefhgeetudegkefhvdfhjeeftdenucevlhhushhtvghrufhiiigv pedtnecurfgrrhgrmhepmhgrihhlfhhrohhmpehjihgrgihunhdrhigrnhhgsehflhihgh horghtrdgtohhm X-ME-Proxy: Feedback-ID: ifd894703:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Mon, 31 Oct 2022 09:25:41 -0400 (EDT) From: Jiaxun Yang To: qemu-devel@nongnu.org Cc: f4bug@amsat.org, pavel.dovgalyuk@ispras.ru, Jiaxun Yang Subject: [PATCH v2 2/3] target/mips: Cast offset field of Octeon BBIT to int16_t Date: Mon, 31 Oct 2022 13:25:30 +0000 Message-Id: <20221031132531.18122-3-jiaxun.yang@flygoat.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221031132531.18122-1-jiaxun.yang@flygoat.com> References: <20221031132531.18122-1-jiaxun.yang@flygoat.com> MIME-Version: 1.0 Received-SPF: pass client-ip=66.111.4.26; envelope-from=jiaxun.yang@flygoat.com; helo=out2-smtp.messagingengine.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Qemu-devel" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org+qemu-devel=archiver.kernel.org@nongnu.org As per "Cavium Networks OCTEON Plus CN50XX Hardware Reference Manual" offset field is signed 16 bit value. However arg_BBIT.offset is unsigned. We need to cast it as signed to do address calculation. Signed-off-by: Jiaxun Yang Acked-by: Pavel Dovgalyuk Reviewed-by: Philippe Mathieu-Daudé --- v2: Do casting in decodetree. (philmd) --- target/mips/tcg/octeon.decode | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/mips/tcg/octeon.decode b/target/mips/tcg/octeon.decode index 8929ad088e..0c787cb498 100644 --- a/target/mips/tcg/octeon.decode +++ b/target/mips/tcg/octeon.decode @@ -12,7 +12,7 @@ # BBIT132 111110 ..... ..... ................ %bbit_p 28:1 16:5 -BBIT 11 set:1 . 10 rs:5 ..... offset:16 p=%bbit_p +BBIT 11 set:1 . 10 rs:5 ..... offset:s16 p=%bbit_p # Arithmetic # BADDU rd, rs, rt From patchwork Mon Oct 31 13:25:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiaxun Yang X-Patchwork-Id: 13025921 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 875C0FA3742 for ; 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Mon, 31 Oct 2022 09:25:42 -0400 (EDT) From: Jiaxun Yang To: qemu-devel@nongnu.org Cc: f4bug@amsat.org, pavel.dovgalyuk@ispras.ru, Jiaxun Yang , Richard Henderson Subject: [PATCH v2 3/3] target/mips: Disable DSP ASE for Octeon68XX Date: Mon, 31 Oct 2022 13:25:31 +0000 Message-Id: <20221031132531.18122-4-jiaxun.yang@flygoat.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221031132531.18122-1-jiaxun.yang@flygoat.com> References: <20221031132531.18122-1-jiaxun.yang@flygoat.com> MIME-Version: 1.0 Received-SPF: pass client-ip=66.111.4.26; envelope-from=jiaxun.yang@flygoat.com; helo=out2-smtp.messagingengine.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Qemu-devel" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org+qemu-devel=archiver.kernel.org@nongnu.org I don't have access to Octeon68XX hardware but accroading to my investigation Octeon never had DSP ASE support. As per "Cavium Networks OCTEON Plus CN50XX Hardware Reference Manual" CP0C3_DSPP is reserved bit and read as 0. Also I do have access to a Ubiquiti Edgerouter 4 which has Octeon CN7130 processor and I can confirm CP0C3_DSPP is read as 0 on that processor. Further more, in linux kernel: arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h cpu_has_dsp is overridden as 0. So I believe we shouldn't emulate DSP in QEMU as well. Signed-off-by: Jiaxun Yang Acked-by: Richard Henderson Reviewed-by: Pavel Dovgalyuk --- target/mips/cpu-defs.c.inc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/mips/cpu-defs.c.inc b/target/mips/cpu-defs.c.inc index 7f53c94ec8..480e60aeec 100644 --- a/target/mips/cpu-defs.c.inc +++ b/target/mips/cpu-defs.c.inc @@ -934,7 +934,7 @@ const mips_def_t mips_defs[] = (1 << CP0C1_DS) | (4 << CP0C1_DL) | (1 << CP0C1_DA) | (1 << CP0C1_PC) | (1 << CP0C1_WR) | (1 << CP0C1_EP), .CP0_Config2 = MIPS_CONFIG2, - .CP0_Config3 = MIPS_CONFIG3 | (1 << CP0C3_LPA) | (1 << CP0C3_DSPP) , + .CP0_Config3 = MIPS_CONFIG3 | (1 << CP0C3_LPA), .CP0_Config4 = MIPS_CONFIG4 | (1U << CP0C4_M) | (0x3c << CP0C4_KScrExist) | (1U << CP0C4_MMUExtDef) | (3U << CP0C4_MMUSizeExt), @@ -946,7 +946,7 @@ const mips_def_t mips_defs[] = .CP0_Status_rw_bitmask = 0x12F8FFFF, .SEGBITS = 42, .PABITS = 49, - .insn_flags = CPU_MIPS64R2 | INSN_OCTEON | ASE_DSP, + .insn_flags = CPU_MIPS64R2 | INSN_OCTEON, .mmu_type = MMU_TYPE_R4000, },