From patchwork Wed Nov 2 21:57:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 13029039 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 081B0C4321E for ; Wed, 2 Nov 2022 21:57:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229548AbiKBV5x (ORCPT ); Wed, 2 Nov 2022 17:57:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48506 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229553AbiKBV5w (ORCPT ); Wed, 2 Nov 2022 17:57:52 -0400 Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CACAF63B4; Wed, 2 Nov 2022 14:57:50 -0700 (PDT) Received: from tr.lan (ip-86-49-120-218.bb.vodafone.cz [86.49.120.218]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: marex@denx.de) by phobos.denx.de (Postfix) with ESMTPSA id 8714B841F5; Wed, 2 Nov 2022 22:57:48 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1667426268; bh=6fg3wZ0v2xlX9DYAwWKFSLZnHpC+I+xLcARHRsY2t+U=; h=From:To:Cc:Subject:Date:From; b=xxjsFXluTaVB4EP+8TIzNLSDpBgXHEyF1s/inhVtozhMW/oghNkbyeYCPednz3zYU fq4tWeiqJ2Qv9GLH83ZKaZ/xKvCwIECsWbo/i0EZxWAclPZaHzMBKOEyVxkbmy69z0 W0Iu8pFU6294B0jWmVUS3pxoRqBTL8j+idQyORiyMMMrQY6QZk2kEdMSTKq+K0sMlD 5+WMKjeF8Lu4JnHEjwggYE2OZS5gqzV8NoR7gihvX7kmxdgHrXkyGNdHjKz+QfXW3w Muy1RX/piPbSpJYwSXIndzjLz7UXctBuCQhK+m7vzfgUy2Rld34pjf9+18Lf9saakr ig8O3Ngh3qVIA== From: Marek Vasut To: devicetree@vger.kernel.org Cc: linux-pci@vger.kernel.org, Marek Vasut , Fabio Estevam , Lucas Stach , Richard Zhu , Rob Herring , Shawn Guo , linux-arm-kernel@lists.infradead.org, NXP Linux Team Subject: [PATCH 1/3] dt-bindings: imx6q-pcie: Handle various clock configurations Date: Wed, 2 Nov 2022 22:57:27 +0100 Message-Id: <20221102215729.147335-1-marex@denx.de> X-Mailer: git-send-email 2.35.1 MIME-Version: 1.0 X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The i.MX SoCs have various clock configurations routed into the PCIe IP, the list of clock is below. Document all those configurations in the DT binding document. All SoCs: pcie, pcie_bus 6QDL, 7D: + pcie_phy 6SX: + pcie_phy pcie_inbound_axi 8MQ: + pcie_phy pcie_aux 8MM, 8MP: + pcie_aux Signed-off-by: Marek Vasut Acked-by: Alexander Stein --- Cc: Fabio Estevam Cc: Lucas Stach Cc: Richard Zhu Cc: Rob Herring Cc: Shawn Guo Cc: linux-arm-kernel@lists.infradead.org Cc: NXP Linux Team To: devicetree@vger.kernel.org --- .../bindings/pci/fsl,imx6q-pcie.yaml | 74 +++++++++++++++++-- 1 file changed, 69 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml index 376e739bcad40..1cfea8ca72576 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml @@ -14,9 +14,6 @@ description: |+ This PCIe host controller is based on the Synopsys DesignWare PCIe IP and thus inherits all the common properties defined in snps,dw-pcie.yaml. -allOf: - - $ref: /schemas/pci/snps,dw-pcie.yaml# - properties: compatible: enum: @@ -60,8 +57,8 @@ properties: items: - const: pcie - const: pcie_bus - - const: pcie_phy - - const: pcie_inbound_axi for imx6sx-pcie, pcie_aux for imx8mq-pcie + - enum: [pcie_phy, pcie_aux] + - enum: [pcie_inbound_axi, pcie_aux] num-lanes: const: 1 @@ -177,6 +174,73 @@ required: unevaluatedProperties: false +allOf: + - $ref: /schemas/pci/snps,dw-pcie.yaml# + + - if: + properties: + compatible: + contains: + enum: + - fsl,imx6sx-pcie + - fsl,imx8mq-pcie + then: + properties: + clocks: + maxItems: 4 + clock-names: + maxItems: 4 + + - if: + properties: + compatible: + contains: + const: fsl,imx6sx-pcie + then: + properties: + clock-names: + items: + - const: pcie + - const: pcie_bus + - const: pcie_phy + - const: pcie_inbound_axi + else: + if: + properties: + compatible: + contains: + const: fsl,imx8mq-pcie + then: + properties: + clock-names: + items: + - const: pcie + - const: pcie_bus + - const: pcie_phy + - const: pcie_aux + else: + if: + properties: + compatible: + contains: + enum: + - fsl,imx8mm-pcie + - fsl,imx8mp-pcie + then: + properties: + clock-names: + items: + - const: pcie + - const: pcie_bus + - const: pcie_aux + else: + properties: + clock-names: + items: + - const: pcie + - const: pcie_bus + - const: pcie_phy + examples: - | #include From patchwork Wed Nov 2 21:57:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 13029040 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D6466C4167B for ; Wed, 2 Nov 2022 21:57:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229553AbiKBV5y (ORCPT ); Wed, 2 Nov 2022 17:57:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48508 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229637AbiKBV5w (ORCPT ); Wed, 2 Nov 2022 17:57:52 -0400 Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5148B6574; Wed, 2 Nov 2022 14:57:51 -0700 (PDT) Received: from tr.lan (ip-86-49-120-218.bb.vodafone.cz [86.49.120.218]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: marex@denx.de) by phobos.denx.de (Postfix) with ESMTPSA id E57E98438C; Wed, 2 Nov 2022 22:57:48 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1667426269; bh=Lqx6hts9OjI3paHi8t4kB2hUAQZNlsQVsGVhVYLo56Y=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Y9zRojoZvoEhRQ315T7LkNxWEJTBnEWQMdF3SfCFpGXd/GYdXJQo4Wrp41lv8FZR8 9aynLdfyi9uH/lzPRQPel+9TTgCqr+Cnon8FccnC2p7yF2E4Ies8+bMTguqTDqKOYV IZ/5XHRok5d1roVXC/ITkNIwXSAUZ9VSKZQdPVRRjRk4GeuiSzUxlYGL835O7QEUad TESyt9EWTZpiAyj12KzQ6KioD0xaU/saLIpXYDwv7XiA3fnjaakGHL+0i6Lr8u3MmP 1ukd8zcMKvNhASp15coYWA3yjq4MvmqogeKEQOC/cxiSo7T7wEJXWcNftuLgCVolBz vPnAO9ToJcQ0w== From: Marek Vasut To: devicetree@vger.kernel.org Cc: linux-pci@vger.kernel.org, Marek Vasut , Fabio Estevam , Lucas Stach , Richard Zhu , Rob Herring , Shawn Guo , linux-arm-kernel@lists.infradead.org, NXP Linux Team Subject: [PATCH 2/3] dt-bindings: imx6q-pcie: Handle various PD configurations Date: Wed, 2 Nov 2022 22:57:28 +0100 Message-Id: <20221102215729.147335-2-marex@denx.de> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221102215729.147335-1-marex@denx.de> References: <20221102215729.147335-1-marex@denx.de> MIME-Version: 1.0 X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The i.MX SoCs have various power domain configurations routed into the PCIe IP. MX6SX is the only one which contains 2 domains and also uses power-domain-names. MX6QDL do not use any domains. All the rest uses one domain and does not use power-domain-names anymore. Document all those configurations in the DT binding document. Signed-off-by: Marek Vasut --- Cc: Fabio Estevam Cc: Lucas Stach Cc: Richard Zhu Cc: Rob Herring Cc: Shawn Guo Cc: linux-arm-kernel@lists.infradead.org Cc: NXP Linux Team To: devicetree@vger.kernel.org --- .../bindings/pci/fsl,imx6q-pcie.yaml | 47 ++++++++++++++----- 1 file changed, 34 insertions(+), 13 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml index 1cfea8ca72576..fc8d4d7b80b38 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml @@ -68,19 +68,6 @@ properties: description: A phandle to an fsl,imx7d-pcie-phy node. Additional required properties for imx7d-pcie and imx8mq-pcie. - power-domains: - items: - - description: The phandle pointing to the DISPLAY domain for - imx6sx-pcie, to PCIE_PHY power domain for imx7d-pcie and - imx8mq-pcie. - - description: The phandle pointing to the PCIE_PHY power domains - for imx6sx-pcie. - - power-domain-names: - items: - - const: pcie - - const: pcie_phy - resets: maxItems: 3 description: Phandles to PCIe-related reset lines exposed by SRC @@ -241,6 +228,40 @@ allOf: - const: pcie_bus - const: pcie_phy + - if: + properties: + compatible: + contains: + const: fsl,imx6sx-pcie + then: + properties: + power-domains: + items: + - description: The phandle pointing to the DISPLAY domain for + imx6sx-pcie, to PCIE_PHY power domain for imx7d-pcie and + imx8mq-pcie. + - description: The phandle pointing to the PCIE_PHY power domains + for imx6sx-pcie. + power-domain-names: + items: + - const: pcie + - const: pcie_phy + else: + if: + not: + properties: + compatible: + contains: + enum: + - fsl,imx6q-pcie + - fsl,imx6qp-pcie + then: + properties: + power-domains: + description: | + The phandle pointing to the DISPLAY domain for imx6sx-pcie, to + PCIE_PHY power domain for imx7d-pcie and imx8mq-pcie. + examples: - | #include From patchwork Wed Nov 2 21:57:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 13029038 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 20BCBC4332F for ; Wed, 2 Nov 2022 21:57:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229688AbiKBV5w (ORCPT ); Wed, 2 Nov 2022 17:57:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48504 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229548AbiKBV5w (ORCPT ); Wed, 2 Nov 2022 17:57:52 -0400 Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 56F06DF1A; Wed, 2 Nov 2022 14:57:51 -0700 (PDT) Received: from tr.lan (ip-86-49-120-218.bb.vodafone.cz [86.49.120.218]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: marex@denx.de) by phobos.denx.de (Postfix) with ESMTPSA id 4949385087; Wed, 2 Nov 2022 22:57:49 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1667426269; bh=pOflOZxdJSm/WBBfigL88V8kiLJCuonMLusq12XCQ5M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=kt4Ot33hrw3uV36AIbR7+ABGridXE+r4OHHmtF8WsmgL5D1zza+91FqIxQv1mqMth /UJbOGzVTpgcsyJikSL3MVBvXQ/jm+eVAKJbNGT3UdnpitD/eaJdpQnsDNVPqdkOb2 8hI9aBjMjbYv7CRotbyOdzgsFIXfsN2n4/Jao6MSKPTAqc/WsKbAJsNvbSkFUhk/Qn j1quVhS7wVxBox4gbbvsi8qUPikaLBU5JwGUGOJTRs9EeLwIBn1BlzgtsBD7y2FN9x 69n/RNGvZz1Sqo8DEghOXOcXC3wYBc0QB2G7LfEnz0d24Nzxbgh3Ao6qVQifCBGCAc C2Uww1JEC6QkQ== From: Marek Vasut To: devicetree@vger.kernel.org Cc: linux-pci@vger.kernel.org, Marek Vasut , Fabio Estevam , Lucas Stach , Richard Zhu , Rob Herring , Shawn Guo , linux-arm-kernel@lists.infradead.org, NXP Linux Team Subject: [PATCH 3/3] dt-bindings: imx6q-pcie: Handle more resets on legacy platforms Date: Wed, 2 Nov 2022 22:57:29 +0100 Message-Id: <20221102215729.147335-3-marex@denx.de> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221102215729.147335-1-marex@denx.de> References: <20221102215729.147335-1-marex@denx.de> MIME-Version: 1.0 X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The i.MX6 and i.MX7D does not use block controller to toggle PCIe reset, hence the PCIe DT description contains three reset entries on these older SoCs. Add this exception into the binding document. Signed-off-by: Marek Vasut --- Cc: Fabio Estevam Cc: Lucas Stach Cc: Richard Zhu Cc: Rob Herring Cc: Shawn Guo Cc: linux-arm-kernel@lists.infradead.org Cc: NXP Linux Team To: devicetree@vger.kernel.org --- .../bindings/pci/fsl,imx6q-pcie.yaml | 22 +++++++++++++++++-- 1 file changed, 20 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml index fc8d4d7b80b38..12c7baba489aa 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml @@ -69,13 +69,12 @@ properties: required properties for imx7d-pcie and imx8mq-pcie. resets: - maxItems: 3 + maxItems: 2 description: Phandles to PCIe-related reset lines exposed by SRC IP block. Additional required by imx7d-pcie and imx8mq-pcie. reset-names: items: - - const: pciephy - const: apps - const: turnoff @@ -262,6 +261,25 @@ allOf: The phandle pointing to the DISPLAY domain for imx6sx-pcie, to PCIE_PHY power domain for imx7d-pcie and imx8mq-pcie. + - if: + properties: + compatible: + contains: + enum: + - fsl,imx6q-pcie + - fsl,imx6sx-pcie + - fsl,imx6qp-pcie + - fsl,imx7d-pcie + then: + properties: + resets: + maxItems: 3 + reset-names: + items: + - const: pciephy + - const: apps + - const: turnoff + examples: - | #include