From patchwork Thu Nov 3 09:57:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13029831 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D3AE3C433FE for ; Thu, 3 Nov 2022 09:58:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231246AbiKCJ6g (ORCPT ); Thu, 3 Nov 2022 05:58:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36106 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231280AbiKCJ6e (ORCPT ); Thu, 3 Nov 2022 05:58:34 -0400 Received: from mail-pf1-x436.google.com (mail-pf1-x436.google.com [IPv6:2607:f8b0:4864:20::436]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BEFE810544 for ; Thu, 3 Nov 2022 02:58:29 -0700 (PDT) Received: by mail-pf1-x436.google.com with SMTP id y13so1127955pfp.7 for ; Thu, 03 Nov 2022 02:58:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=40naVKARUr+08oYaE5GmKk3fIXihHaNmVzCWvDtQ9NA=; b=HtXcUyDXF2l6MVPIoreRjch0o5k0ZSFGH29ToD0h7Z4evGEqo9Fefir6X9o0h/nIwj IPlgn5NK7DGoa0pWMVqFkCcCLUQfpzNvCoS427CKHLXUtqbel8XgEHmPtz93gPDI85ys QKv/++AiCOyJaZdFQzfunl7VeV7Mm+RPphLHhpI0JHBPs+giHzV/vU3q+31/nQcpcTK3 C/XWCWYiDsz1KM6dgHbOPZOn5eSGEZWNHKc3zDSLIdIgjiCzDnKj4KEpwaZQd32tnwMh uShbikcit6kW0plmz6lkiewPKlsHmGnbNSarZxZsYu7mEJy+HPogW0wQL++UxbNwZYqv Bldw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=40naVKARUr+08oYaE5GmKk3fIXihHaNmVzCWvDtQ9NA=; b=bu9CNJND/66Mwld+JAfHDWzuHK5NGN1s7Vy6HjXH4s4sqNC1D8akT46Rr7G4OomV1z Dm0TlGOjw7pc3zmegmktshi7COhaiXYJeU2963C+mWTF9IR8grdwMw60Ku6+JAzPzRk2 XqiqV6G7AL03PWgA9deaScD/Wse8zrAwU+lRIEepoBg9SDHD4gNSkJupLV30E95o7W3n jqFC/6hv7tJAAsLoxBx6wcl3QB67O6BPSDmW8PkjMZx1MfpuTwNmBOID6wKVqhK0EXKd r5Y5X66xIdCsJzBqIHvcKGqkdGw0odx3frRgZjbPf3kq9f9nHM+UBUvYC9ULjF/QNSqk j26Q== X-Gm-Message-State: ACrzQf2L34vORtzWvRI0FZKzIB1w4EVhsKqdL9Po2DezksMsnbPQikFo HAzPUqKTs9ZW8N5T/U5g62GW X-Google-Smtp-Source: AMsMyM7vjyvS/2kAmBJZMMwio3+yVdtp1wvIu2ss4yihraFJiEvnnlPUDItDhCMETWa90fsgAayLJw== X-Received: by 2002:a65:5242:0:b0:46e:9bac:178 with SMTP id q2-20020a655242000000b0046e9bac0178mr25506910pgp.300.1667469509032; Thu, 03 Nov 2022 02:58:29 -0700 (PDT) Received: from localhost.localdomain ([117.193.208.64]) by smtp.gmail.com with ESMTPSA id n6-20020a170902e54600b00186c54188b4sm161670plf.240.2022.11.03.02.58.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Nov 2022 02:58:28 -0700 (PDT) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, johan+linaro@kernel.org, quic_jprakash@quicinc.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, steev@kali.org, Manivannan Sadhasivam , Dmitry Baryshkov , Krzysztof Kozlowski , Rob Herring Subject: [PATCH v4 01/12] dt-bindings: iio: qcom: adc7-pm8350: Allow specifying SID for channels Date: Thu, 3 Nov 2022 15:27:59 +0530 Message-Id: <20221103095810.64606-2-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221103095810.64606-1-manivannan.sadhasivam@linaro.org> References: <20221103095810.64606-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org As per the new ADC7 architecture used by the Qualcomm PMICs, each PMIC has the static Slave ID (SID) assigned by default. The primary PMIC PMK8350 is responsible for collecting the temperature/voltage data from the slave PMICs and exposing them via it's registers. For getting the measurements from the slave PMICs, PMK8350 uses the channel ID encoded with the SID of the relevant PMIC. So far, the dt-binding for the slave PMIC PM8350 assumed that there will be only one PM8350 in a system. So it harcoded SID 1 with channel IDs. But this got changed in platforms such as Lenovo X13s where there are a couple of PM8350 PMICs available. So to address multiple PM8350s, change the binding to accept the SID specified by the user and use it for encoding the channel ID. It should be noted that, even though the SID is static it is not globally unique. Only the primary PMIC has the unique SID id 0. Reviewed-by: Dmitry Baryshkov Reviewed-by: Krzysztof Kozlowski Acked-by: Rob Herring Signed-off-by: Manivannan Sadhasivam --- .../bindings/thermal/qcom-spmi-adc-tm5.yaml | 6 +- .../dt-bindings/iio/qcom,spmi-adc7-pm8350.h | 90 +++++++++---------- 2 files changed, 46 insertions(+), 50 deletions(-) diff --git a/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm5.yaml b/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm5.yaml index feb390d50696..d20569b9b763 100644 --- a/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm5.yaml +++ b/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm5.yaml @@ -222,8 +222,8 @@ examples: qcom,hw-settle-time = <200>; }; - conn-therm@47 { - reg = ; + conn-therm@147 { + reg = ; qcom,ratiometric; qcom,hw-settle-time = <200>; }; @@ -247,7 +247,7 @@ examples: conn-therm@1 { reg = <1>; - io-channels = <&pmk8350_vadc PM8350_ADC7_AMUX_THM4_100K_PU>; + io-channels = <&pmk8350_vadc PM8350_ADC7_AMUX_THM4_100K_PU(1)>; qcom,avg-samples = <2>; qcom,ratiometric; qcom,hw-settle-time-us = <200>; diff --git a/include/dt-bindings/iio/qcom,spmi-adc7-pm8350.h b/include/dt-bindings/iio/qcom,spmi-adc7-pm8350.h index 9426f27a1946..09fd169ad18e 100644 --- a/include/dt-bindings/iio/qcom,spmi-adc7-pm8350.h +++ b/include/dt-bindings/iio/qcom,spmi-adc7-pm8350.h @@ -6,62 +6,58 @@ #ifndef _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H #define _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H -#ifndef PM8350_SID -#define PM8350_SID 1 -#endif - /* ADC channels for PM8350_ADC for PMIC7 */ -#define PM8350_ADC7_REF_GND (PM8350_SID << 8 | 0x0) -#define PM8350_ADC7_1P25VREF (PM8350_SID << 8 | 0x01) -#define PM8350_ADC7_VREF_VADC (PM8350_SID << 8 | 0x02) -#define PM8350_ADC7_DIE_TEMP (PM8350_SID << 8 | 0x03) - -#define PM8350_ADC7_AMUX_THM1 (PM8350_SID << 8 | 0x04) -#define PM8350_ADC7_AMUX_THM2 (PM8350_SID << 8 | 0x05) -#define PM8350_ADC7_AMUX_THM3 (PM8350_SID << 8 | 0x06) -#define PM8350_ADC7_AMUX_THM4 (PM8350_SID << 8 | 0x07) -#define PM8350_ADC7_AMUX_THM5 (PM8350_SID << 8 | 0x08) -#define PM8350_ADC7_GPIO1 (PM8350_SID << 8 | 0x0a) -#define PM8350_ADC7_GPIO2 (PM8350_SID << 8 | 0x0b) -#define PM8350_ADC7_GPIO3 (PM8350_SID << 8 | 0x0c) -#define PM8350_ADC7_GPIO4 (PM8350_SID << 8 | 0x0d) +#define PM8350_ADC7_REF_GND(sid) ((sid) << 8 | 0x0) +#define PM8350_ADC7_1P25VREF(sid) ((sid) << 8 | 0x01) +#define PM8350_ADC7_VREF_VADC(sid) ((sid) << 8 | 0x02) +#define PM8350_ADC7_DIE_TEMP(sid) ((sid) << 8 | 0x03) + +#define PM8350_ADC7_AMUX_THM1(sid) ((sid) << 8 | 0x04) +#define PM8350_ADC7_AMUX_THM2(sid) ((sid) << 8 | 0x05) +#define PM8350_ADC7_AMUX_THM3(sid) ((sid) << 8 | 0x06) +#define PM8350_ADC7_AMUX_THM4(sid) ((sid) << 8 | 0x07) +#define PM8350_ADC7_AMUX_THM5(sid) ((sid) << 8 | 0x08) +#define PM8350_ADC7_GPIO1(sid) ((sid) << 8 | 0x0a) +#define PM8350_ADC7_GPIO2(sid) ((sid) << 8 | 0x0b) +#define PM8350_ADC7_GPIO3(sid) ((sid) << 8 | 0x0c) +#define PM8350_ADC7_GPIO4(sid) ((sid) << 8 | 0x0d) /* 30k pull-up1 */ -#define PM8350_ADC7_AMUX_THM1_30K_PU (PM8350_SID << 8 | 0x24) -#define PM8350_ADC7_AMUX_THM2_30K_PU (PM8350_SID << 8 | 0x25) -#define PM8350_ADC7_AMUX_THM3_30K_PU (PM8350_SID << 8 | 0x26) -#define PM8350_ADC7_AMUX_THM4_30K_PU (PM8350_SID << 8 | 0x27) -#define PM8350_ADC7_AMUX_THM5_30K_PU (PM8350_SID << 8 | 0x28) -#define PM8350_ADC7_GPIO1_30K_PU (PM8350_SID << 8 | 0x2a) -#define PM8350_ADC7_GPIO2_30K_PU (PM8350_SID << 8 | 0x2b) -#define PM8350_ADC7_GPIO3_30K_PU (PM8350_SID << 8 | 0x2c) -#define PM8350_ADC7_GPIO4_30K_PU (PM8350_SID << 8 | 0x2d) +#define PM8350_ADC7_AMUX_THM1_30K_PU(sid) ((sid) << 8 | 0x24) +#define PM8350_ADC7_AMUX_THM2_30K_PU(sid) ((sid) << 8 | 0x25) +#define PM8350_ADC7_AMUX_THM3_30K_PU(sid) ((sid) << 8 | 0x26) +#define PM8350_ADC7_AMUX_THM4_30K_PU(sid) ((sid) << 8 | 0x27) +#define PM8350_ADC7_AMUX_THM5_30K_PU(sid) ((sid) << 8 | 0x28) +#define PM8350_ADC7_GPIO1_30K_PU(sid) ((sid) << 8 | 0x2a) +#define PM8350_ADC7_GPIO2_30K_PU(sid) ((sid) << 8 | 0x2b) +#define PM8350_ADC7_GPIO3_30K_PU(sid) ((sid) << 8 | 0x2c) +#define PM8350_ADC7_GPIO4_30K_PU(sid) ((sid) << 8 | 0x2d) /* 100k pull-up2 */ -#define PM8350_ADC7_AMUX_THM1_100K_PU (PM8350_SID << 8 | 0x44) -#define PM8350_ADC7_AMUX_THM2_100K_PU (PM8350_SID << 8 | 0x45) -#define PM8350_ADC7_AMUX_THM3_100K_PU (PM8350_SID << 8 | 0x46) -#define PM8350_ADC7_AMUX_THM4_100K_PU (PM8350_SID << 8 | 0x47) -#define PM8350_ADC7_AMUX_THM5_100K_PU (PM8350_SID << 8 | 0x48) -#define PM8350_ADC7_GPIO1_100K_PU (PM8350_SID << 8 | 0x4a) -#define PM8350_ADC7_GPIO2_100K_PU (PM8350_SID << 8 | 0x4b) -#define PM8350_ADC7_GPIO3_100K_PU (PM8350_SID << 8 | 0x4c) -#define PM8350_ADC7_GPIO4_100K_PU (PM8350_SID << 8 | 0x4d) +#define PM8350_ADC7_AMUX_THM1_100K_PU(sid) ((sid) << 8 | 0x44) +#define PM8350_ADC7_AMUX_THM2_100K_PU(sid) ((sid) << 8 | 0x45) +#define PM8350_ADC7_AMUX_THM3_100K_PU(sid) ((sid) << 8 | 0x46) +#define PM8350_ADC7_AMUX_THM4_100K_PU(sid) ((sid) << 8 | 0x47) +#define PM8350_ADC7_AMUX_THM5_100K_PU(sid) ((sid) << 8 | 0x48) +#define PM8350_ADC7_GPIO1_100K_PU(sid) ((sid) << 8 | 0x4a) +#define PM8350_ADC7_GPIO2_100K_PU(sid) ((sid) << 8 | 0x4b) +#define PM8350_ADC7_GPIO3_100K_PU(sid) ((sid) << 8 | 0x4c) +#define PM8350_ADC7_GPIO4_100K_PU(sid) ((sid) << 8 | 0x4d) /* 400k pull-up3 */ -#define PM8350_ADC7_AMUX_THM1_400K_PU (PM8350_SID << 8 | 0x64) -#define PM8350_ADC7_AMUX_THM2_400K_PU (PM8350_SID << 8 | 0x65) -#define PM8350_ADC7_AMUX_THM3_400K_PU (PM8350_SID << 8 | 0x66) -#define PM8350_ADC7_AMUX_THM4_400K_PU (PM8350_SID << 8 | 0x67) -#define PM8350_ADC7_AMUX_THM5_400K_PU (PM8350_SID << 8 | 0x68) -#define PM8350_ADC7_GPIO1_400K_PU (PM8350_SID << 8 | 0x6a) -#define PM8350_ADC7_GPIO2_400K_PU (PM8350_SID << 8 | 0x6b) -#define PM8350_ADC7_GPIO3_400K_PU (PM8350_SID << 8 | 0x6c) -#define PM8350_ADC7_GPIO4_400K_PU (PM8350_SID << 8 | 0x6d) +#define PM8350_ADC7_AMUX_THM1_400K_PU(sid) ((sid) << 8 | 0x64) +#define PM8350_ADC7_AMUX_THM2_400K_PU(sid) ((sid) << 8 | 0x65) +#define PM8350_ADC7_AMUX_THM3_400K_PU(sid) ((sid) << 8 | 0x66) +#define PM8350_ADC7_AMUX_THM4_400K_PU(sid) ((sid) << 8 | 0x67) +#define PM8350_ADC7_AMUX_THM5_400K_PU(sid) ((sid) << 8 | 0x68) +#define PM8350_ADC7_GPIO1_400K_PU(sid) ((sid) << 8 | 0x6a) +#define PM8350_ADC7_GPIO2_400K_PU(sid) ((sid) << 8 | 0x6b) +#define PM8350_ADC7_GPIO3_400K_PU(sid) ((sid) << 8 | 0x6c) +#define PM8350_ADC7_GPIO4_400K_PU(sid) ((sid) << 8 | 0x6d) /* 1/3 Divider */ -#define PM8350_ADC7_GPIO4_DIV3 (PM8350_SID << 8 | 0x8d) +#define PM8350_ADC7_GPIO4_DIV3(sid) ((sid) << 8 | 0x8d) -#define PM8350_ADC7_VPH_PWR (PM8350_SID << 8 | 0x8e) +#define PM8350_ADC7_VPH_PWR(sid) ((sid) << 8 | 0x8e) #endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H */ From patchwork Thu Nov 3 09:58:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13029832 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from 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linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, steev@kali.org, Manivannan Sadhasivam , Krzysztof Kozlowski Subject: [PATCH v4 02/12] arm64: dts: qcom: sc8280xp-pmics: Add temp alarm for PM8280_{1/2} PMICs Date: Thu, 3 Nov 2022 15:28:00 +0530 Message-Id: <20221103095810.64606-3-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221103095810.64606-1-manivannan.sadhasivam@linaro.org> References: <20221103095810.64606-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add support for temperature alarm feature in the PM8280_{1/2} PMICs. Reviewed-by: Konrad Dybcio Reviewed-by: Krzysztof Kozlowski Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi index 24836b6b9bbc..5de47b1434a4 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi @@ -33,6 +33,13 @@ pmc8280_1: pmic@1 { #address-cells = <1>; #size-cells = <0>; + pm8280_1_temp_alarm: temp-alarm@a00 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0xa00>; + interrupts = <0x1 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells = <0>; + }; + pmc8280_1_gpios: gpio@8800 { compatible = "qcom,pm8350-gpio", "qcom,spmi-gpio"; reg = <0x8800>; @@ -78,6 +85,13 @@ pmc8280_2: pmic@3 { #address-cells = <1>; #size-cells = <0>; + pm8280_2_temp_alarm: temp-alarm@a00 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0xa00>; + interrupts = <0x2 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells = <0>; + }; + pmc8280_2_gpios: gpio@8800 { compatible = "qcom,pm8350-gpio", "qcom,spmi-gpio"; reg = <0x8800>; From patchwork Thu Nov 3 09:58:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13029833 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AE799C433FE for ; Thu, 3 Nov 2022 09:59:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229826AbiKCJ67 (ORCPT ); Thu, 3 Nov 2022 05:58:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36384 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231302AbiKCJ6o (ORCPT ); Thu, 3 Nov 2022 05:58:44 -0400 Received: from mail-pj1-x102e.google.com (mail-pj1-x102e.google.com [IPv6:2607:f8b0:4864:20::102e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7E5022667 for ; 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Temperature trip points are inherited from PM8350 PMIC. Reviewed-by: Konrad Dybcio Reviewed-by: Krzysztof Kozlowski Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi | 44 ++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi index 5de47b1434a4..397ff4995003 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi @@ -7,6 +7,50 @@ #include #include +/ { + thermal-zones { + pm8280_1_thermal: pm8280-1-thermal { + polling-delay-passive = <100>; + polling-delay = <0>; + thermal-sensors = <&pm8280_1_temp_alarm>; + + trips { + trip0 { + temperature = <95000>; + hysteresis = <0>; + type = "passive"; + }; + + trip1 { + temperature = <115000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + + pm8280_2_thermal: pm8280-2-thermal { + polling-delay-passive = <100>; + polling-delay = <0>; + thermal-sensors = <&pm8280_2_temp_alarm>; + + trips { + trip0 { + temperature = <95000>; + hysteresis = <0>; + type = "passive"; + }; + + trip1 { + temperature = <115000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + }; +}; + &spmi_bus { pmk8280: pmic@0 { compatible = "qcom,pmk8350", "qcom,spmi-pmic"; From patchwork Thu Nov 3 09:58:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13029834 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BE651C4332F for ; Thu, 3 Nov 2022 09:59:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231458AbiKCJ7B (ORCPT ); Thu, 3 Nov 2022 05:59:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36056 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229643AbiKCJ6y (ORCPT ); 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Thu, 03 Nov 2022 02:58:44 -0700 (PDT) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, johan+linaro@kernel.org, quic_jprakash@quicinc.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, steev@kali.org, Manivannan Sadhasivam , Krzysztof Kozlowski Subject: [PATCH v4 04/12] arm64: dts: qcom: sc8280xp-pmics: Add support for PMK8280 RESIN input Date: Thu, 3 Nov 2022 15:28:02 +0530 Message-Id: <20221103095810.64606-5-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221103095810.64606-1-manivannan.sadhasivam@linaro.org> References: <20221103095810.64606-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The RESIN input can be used to reset the PMK8280 PMIC. Enabling the RESIN block allows the PMK8280 to detect reset input via RESIN_N pin. Reviewed-by: Konrad Dybcio Reviewed-by: Krzysztof Kozlowski Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi index 397ff4995003..4a3464f5e6e9 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi @@ -68,6 +68,12 @@ pmk8280_pon_pwrkey: pwrkey { linux,code = ; status = "disabled"; }; + + pmk8280_pon_resin: resin { + compatible = "qcom,pmk8350-resin"; + interrupts = <0x0 0x13 0x6 IRQ_TYPE_EDGE_BOTH>; + status = "disabled"; + }; }; }; From patchwork Thu Nov 3 09:58:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13029835 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E3C65C433FE for ; Thu, 3 Nov 2022 09:59:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231288AbiKCJ7N (ORCPT ); Thu, 3 Nov 2022 05:59:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36386 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231296AbiKCJ66 (ORCPT ); Thu, 3 Nov 2022 05:58:58 -0400 Received: from mail-pl1-x62d.google.com (mail-pl1-x62d.google.com [IPv6:2607:f8b0:4864:20::62d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D79D910B7B for ; Thu, 3 Nov 2022 02:58:51 -0700 (PDT) Received: by mail-pl1-x62d.google.com with SMTP id d20so364774plr.10 for ; Thu, 03 Nov 2022 02:58:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=JthYgOPJ8wLY+kJmpPo6YRkYw++3oIBC9/8kQpa43wk=; b=FChLrILXUt2JHcjmGWmNaim/jgluYBgB4g7I3ODBmDXnIa64hh+wj8SeqLzI62ZaMV UnG4Cpyd9qERPGX5Ec1/LU8tSI2dZ4HEh7eNJYdHRGXelfA5STnHoiQZZpGnDo9wuije 7dHa5gNgx/JykzXoYzvP+2AvI2H1d2YvsXrNz7q4E9Tn90kDv8Ze8SAMHIn9tty/u87X LFYIvTmlBQx5CHRgooNzzjcHK01L56Cpkyc8MEWjWQc9BO1lxWcuP7UMeKZlfcSUskft RcxVMMZhzp2amfK3g5rksjdbVrQQApVzQvZDa5l8Gut6LPk9OPEg6RY4iesjbdehDfFc s35w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=JthYgOPJ8wLY+kJmpPo6YRkYw++3oIBC9/8kQpa43wk=; b=IRXCJq9Hb/641zxRIxfX6MFUPtBE0toJ/RCyfDA2Q7fengF62BffLyJNtjsQHF6FYu d9vxDj2szH2raC3YLEO8/9WDHyll1aSKDS/yzoU5YMhexSH93XC/+A2ebJCunhMYv9Lr SPz+SWQJa40pEvrBCPlzqj+OGadRIzWuQAs1jJ1+egu6Pe3UItTG5/MgNlScVOV03DKU M1h/AsBK1xwNeqSUaXOZXjH4DP1YPVCJ6cjxYBDoLLYxSChMbaeDr/KXl/8rJAxVpsYY +ToMMfBofCmbgYfYPIcX3PokAfkS6Nsb5JtpdSIvV8GkxdNB0ElgCgRqjd+ZCZO67Lrr ZR5A== X-Gm-Message-State: ACrzQf0hXL6vuGQlkzB1m+ZuIBFUkpiH6UMssFqiomweQn72DtgO+3T+ F5KnylNzlIyGSHHI8nMZ/Ror X-Google-Smtp-Source: AMsMyM7TNdJOMVLEdLol9zNx8c9WKHh9jy3vdt6Yb5ctWHlB1yLL75m7lT6QGQXyCdmkkS8m1wd5Dg== X-Received: by 2002:a17:90a:de8e:b0:214:1066:9229 with SMTP id n14-20020a17090ade8e00b0021410669229mr13069311pjv.223.1667469531332; Thu, 03 Nov 2022 02:58:51 -0700 (PDT) Received: from localhost.localdomain ([117.193.208.64]) by smtp.gmail.com with ESMTPSA id n6-20020a170902e54600b00186c54188b4sm161670plf.240.2022.11.03.02.58.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Nov 2022 02:58:50 -0700 (PDT) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, johan+linaro@kernel.org, quic_jprakash@quicinc.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, steev@kali.org, Manivannan Sadhasivam , Krzysztof Kozlowski Subject: [PATCH v4 05/12] arm64: dts: qcom: sc8280xp-pmics: Add PMK8280 ADC7 block Date: Thu, 3 Nov 2022 15:28:03 +0530 Message-Id: <20221103095810.64606-6-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221103095810.64606-1-manivannan.sadhasivam@linaro.org> References: <20221103095810.64606-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add support for ADC7 block available in PMK8280 for reading the temperature via the AMUX pins. Reviewed-by: Krzysztof Kozlowski Reviewed-by: Konrad Dybcio Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi index 4a3464f5e6e9..b1cdde2f7861 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi @@ -75,6 +75,16 @@ pmk8280_pon_resin: resin { status = "disabled"; }; }; + + pmk8280_vadc: adc@3100 { + compatible = "qcom,spmi-adc7"; + reg = <0x3100>; + interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; + #address-cells = <1>; + #size-cells = <0>; + #io-channel-cells = <1>; + status = "disabled"; + }; }; pmc8280_1: pmic@1 { From patchwork Thu Nov 3 09:58:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13029836 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 33AB4C433FE for ; Thu, 3 Nov 2022 09:59:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231312AbiKCJ7Z (ORCPT ); Thu, 3 Nov 2022 05:59:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36838 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231253AbiKCJ7B (ORCPT ); Thu, 3 Nov 2022 05:59:01 -0400 Received: from mail-pj1-x102e.google.com (mail-pj1-x102e.google.com [IPv6:2607:f8b0:4864:20::102e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 08FAB26DA for ; Thu, 3 Nov 2022 02:58:57 -0700 (PDT) Received: by mail-pj1-x102e.google.com with SMTP id f5-20020a17090a4a8500b002131bb59d61so5126304pjh.1 for ; Thu, 03 Nov 2022 02:58:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ZeYJbVuqGDHsqyzLjF7twJNYqifLyyH6qytnIHxb/r8=; b=TlHdsmUsbQTX+8RUr7LDQ9Nmjh1YY6/jN4twIOVT7W6kZk7/N6NgTFR6gM+846Jlqv V7woKLUFkxTuWEDE3E/SZoPJdNYAxlLpaaGSIHDItwFFxjiQiLRjd35Q0sZE02QslK7v Nvr7dkLO1IMwLaNxd6syj4UqR9LYHk0OuxUzHJTNTltk+vrFov6gZnptYa2SRylY+A7o U7O+scY/UO8JtVawcfbixLrCBJJKZEfJHF4zKidTZVg38juwpj8Q9vxN4FyiJE5k6TPC dZ/nKsW5R7bg/7wnfDbVOiPc7mDGRMyol6VgCynI3Lqy+s29w4mKL9k+L21ly0yII3Bd ANhg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ZeYJbVuqGDHsqyzLjF7twJNYqifLyyH6qytnIHxb/r8=; b=zVy+Ol3PPO0hxjxkT6uuYunKdZzvDcAkYXQkecjXm04TmyuTIPZ4CJAabkMfGXX727 F28m9Bf9ctE7++kbNahSFpeO3duo4nR18a7oqr62dMxvvAYjmC2hT2l/fbsxkbqgn3l9 UrVLJSW95L5oaHHQxndZrXsezyss0nL82TeQPO9JBqD6QgIVLlsZIMWivsOBc2hNstSf h2FQwngWW+L4r5NNmIYwZBaJqdZ0eDF46/4m9Jui/AQwNdxuiV0bZrAs6m4EqhFbz//f SFJeTGO57OLm4GvGZvKaHPN4ljRalZM0q65zWSS94d33nOnTEsvJdVyqX+H9cVK5o+Gu Q5cA== X-Gm-Message-State: ACrzQf1dRrwqQzltAcKIFnc5seYn1udo4Y5bRnPsEUyVdKDN7am6SGRD /nRr9U8X6TXnSTxnRCJwgN/KNdPRo/mO X-Google-Smtp-Source: AMsMyM7ANYMLT4destN4DCR37dCq6zAu6QGsrlnUHAivO2i1lwZPF0m5qixqkf6et0S1Hqq+YMFjAw== X-Received: by 2002:a17:902:dac3:b0:186:a437:f4b9 with SMTP id q3-20020a170902dac300b00186a437f4b9mr29006746plx.29.1667469536694; Thu, 03 Nov 2022 02:58:56 -0700 (PDT) Received: from localhost.localdomain ([117.193.208.64]) by smtp.gmail.com with ESMTPSA id n6-20020a170902e54600b00186c54188b4sm161670plf.240.2022.11.03.02.58.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Nov 2022 02:58:55 -0700 (PDT) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, johan+linaro@kernel.org, quic_jprakash@quicinc.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, steev@kali.org, Manivannan Sadhasivam , Krzysztof Kozlowski Subject: [PATCH v4 06/12] arm64: dts: qcom: sc8280xp-pmics: Add support for TM5 block in PMK8280 Date: Thu, 3 Nov 2022 15:28:04 +0530 Message-Id: <20221103095810.64606-7-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221103095810.64606-1-manivannan.sadhasivam@linaro.org> References: <20221103095810.64606-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Thermal Monitoring block ADC5 (TM5) in PMK8280 can be used to monitor the temperature from secondary PMICs like PM8280. Reviewed-by: Konrad Dybcio Reviewed-by: Krzysztof Kozlowski Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi index b1cdde2f7861..f2c0b71b5d8e 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi @@ -85,6 +85,16 @@ pmk8280_vadc: adc@3100 { #io-channel-cells = <1>; status = "disabled"; }; + + pmk8280_adc_tm: adc-tm@3400 { + compatible = "qcom,spmi-adc-tm5-gen2"; + reg = <0x3400>; + interrupts = <0x0 0x34 0x0 IRQ_TYPE_EDGE_RISING>; + #address-cells = <1>; + #size-cells = <0>; + #thermal-sensor-cells = <1>; + status = "disabled"; + }; }; pmc8280_1: pmic@1 { From patchwork Thu Nov 3 09:58:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13029837 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3FCFAC433FE for ; Thu, 3 Nov 2022 09:59:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229694AbiKCJ7a (ORCPT ); Thu, 3 Nov 2022 05:59:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36340 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231336AbiKCJ7E (ORCPT ); Thu, 3 Nov 2022 05:59:04 -0400 Received: from mail-pf1-x431.google.com (mail-pf1-x431.google.com [IPv6:2607:f8b0:4864:20::431]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2270CBE3C for ; Thu, 3 Nov 2022 02:59:03 -0700 (PDT) Received: by mail-pf1-x431.google.com with SMTP id y203so1136706pfb.4 for ; Thu, 03 Nov 2022 02:59:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=vFJpBjb6QP5w8jom1mD9aX3bwJzFPKeDTupRGJObZls=; b=GPyvqSiEiv7CDnFXCQebtzu42nMnmronzlVeq0HyyGG+67EgFq8XuQqFisBJ9VMtlj fzM55rgS1L+vG2BkCNC2Ks2AAoNaTI7n4jl/A42fpcLxjfOwGQDseqBRL8Th7fs07yLV Q7447FBwhgZm87ODQpLa7aDDBxkyDh/N7/WKERxZcYhTyynJz3L/F+2kPd3lQ+DBrvqJ 54rWM/0cwUcwLXhhORmgjFaf5P1mknW7xVeujQ00MYNxEGj2KZ14f0Icuap1o9EgJn4p 6hDYXPCnHi6w5AbjpKMwRsKLEX1sxCCsUSxk/PEJH3Hv/VcgQF8ZcNd/KOyrLqNRm6Ku A3GQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=vFJpBjb6QP5w8jom1mD9aX3bwJzFPKeDTupRGJObZls=; b=kjmYUw2ATy7goXM3pl+oMpOh/fC+YQwjBvo2WWvg6SU2VFU+9AEb4t9jdDqn3HN6No e3jRUte5NOHInhxiIGrRQrFiKbPIS/LJDwtgS7aTIC1CfFi0NYL6Zj9FE/KUtudWxbIu NNb2JiyOTDUTjBh5ElLMhKaYNQ/uh3oPXdKKOs3r1Ah3wk1CmtdTHS9Sg1PzAtENH81X u8rqXzaGxmB9kWDQBa1/5IxS377zmUW62CUgdQ7gU8MUrETbYP1wpflRoh/V5rEwacHz 8LFNfod+R1da0GF8nKACYmCo/QakG1heBXhUouOpSA5Wm8xjUnurC1Jsp7uMb3m4Zsgk 5s3w== X-Gm-Message-State: ACrzQf0cVSgXM3u+W3w4ftbftxjH6s/KckHW18+3/FhNwFSwsHEfpBVG UzuLNOYuj1LVQauzl1eFBb0p X-Google-Smtp-Source: AMsMyM7uNucJzy/u8Hy9a3AFwkRjwXVdJKw+xrWgi8fiXd08XTQ2W2tfuMW4U3Jt+MPSJi/TjAA8bQ== X-Received: by 2002:a05:6a00:450d:b0:56d:9ec6:4ddd with SMTP id cw13-20020a056a00450d00b0056d9ec64dddmr17165048pfb.62.1667469542595; Thu, 03 Nov 2022 02:59:02 -0700 (PDT) Received: from localhost.localdomain ([117.193.208.64]) by smtp.gmail.com with ESMTPSA id n6-20020a170902e54600b00186c54188b4sm161670plf.240.2022.11.03.02.58.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Nov 2022 02:59:01 -0700 (PDT) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, johan+linaro@kernel.org, quic_jprakash@quicinc.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, steev@kali.org, Manivannan Sadhasivam , Krzysztof Kozlowski Subject: [PATCH v4 07/12] arm64: dts: qcom: sc8280xp-x13s: Enable PMK8280 RESIN input Date: Thu, 3 Nov 2022 15:28:05 +0530 Message-Id: <20221103095810.64606-8-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221103095810.64606-1-manivannan.sadhasivam@linaro.org> References: <20221103095810.64606-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Enable resetting the PMK8280 through RESIN block in SC8280XP X13s. Reviewed-by: Konrad Dybcio Reviewed-by: Krzysztof Kozlowski Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts index b2b744bb8a53..6aa8cf6d9776 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts @@ -169,6 +169,10 @@ &pmk8280_pon_pwrkey { status = "okay"; }; +&pmk8280_pon_resin { + status = "okay"; +}; + &qup0 { status = "okay"; }; From patchwork Thu Nov 3 09:58:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13029838 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 544EFC4332F for ; Thu, 3 Nov 2022 09:59:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231493AbiKCJ7d (ORCPT ); Thu, 3 Nov 2022 05:59:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36964 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231347AbiKCJ7K (ORCPT ); Thu, 3 Nov 2022 05:59:10 -0400 Received: from mail-pg1-x52e.google.com (mail-pg1-x52e.google.com [IPv6:2607:f8b0:4864:20::52e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BEA2010555 for ; Thu, 3 Nov 2022 02:59:08 -0700 (PDT) Received: by mail-pg1-x52e.google.com with SMTP id e129so1212149pgc.9 for ; Thu, 03 Nov 2022 02:59:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=armaKSmpSTh8RxIedmjX+VLdFnheOMOEqRVNaKfmRgQ=; b=hT/ik8gKBFkvZAAdFsi1VGucXUWf4gjYU0GBEnUDjuJfIHXHnjZ6AnSKSHn0NGwKOe xCSLTitQ9fP0hhW1XTOxqtZpymST7RBvVb7o8YtdRE3LVUb/cFncxN1N4o8CbjLGWys0 ppNNV0ICbhN8Vmpy4gfQJ01Zp855ZIgyXPUBY2iTzsDP2dq4EISeMoqg+ACWubjHFJoW vuBBnX7LC+nB0tlelTi2SnDsw1a38L8ygwO19dR/YY18aEffuKKHa2bSWd/0kxHK6dYC 64CCqFsEc+xPcCxupuGROq/JJvEaPsl4uFTQU9qFymfVzfCgu2DjDqZwkT0UvB1+qSGi +jbQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=armaKSmpSTh8RxIedmjX+VLdFnheOMOEqRVNaKfmRgQ=; b=arHoMy3knOS22w7/StnSzoZNXweYWm5NdqRAkE1zek8bbURnKVVFPCNtHsejVSE022 Ud1SkOr+K54erRJe+p6yZ5j6ca/pnfPvn6PHHY2uI/620jJy3IDBIw0ADdqvbVnEVUi2 1DCbHrFoYXaOKKnpOYyU2LwFnvyhtSncLas/SUd0eozrTVr+oyWB5D0iEc3EjzN4N8mM FH6F0w4+HwPuSxqyAiaHcz4OOJoi2ebDkw785N2IMH1+URj1MJjsFPZwrxNLaVdHi71i 2nvUhEwS1O7THBX6tz5Cd5lfUuOAOEJrraF92tm93D+W1po6oD9AEPsdpKmzizytYbfr j3Mg== X-Gm-Message-State: ACrzQf0gZcrA8VoIzCt1LT473v/h2h7VR4VjHQarb/1rTN87GKzXmLoc /z6QdrGRTfEmKKreypss/fz+ X-Google-Smtp-Source: AMsMyM7AaGbDh5mf+GqJWyENh/4pyPecDLXdZcI4wewi3P4UQFH/jIK1OOQfV6IX8+h6r6a/YxgjOw== X-Received: by 2002:a63:544e:0:b0:46f:7b0e:e4f with SMTP id e14-20020a63544e000000b0046f7b0e0e4fmr25825627pgm.92.1667469548276; Thu, 03 Nov 2022 02:59:08 -0700 (PDT) Received: from localhost.localdomain ([117.193.208.64]) by smtp.gmail.com with ESMTPSA id n6-20020a170902e54600b00186c54188b4sm161670plf.240.2022.11.03.02.59.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Nov 2022 02:59:07 -0700 (PDT) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, johan+linaro@kernel.org, quic_jprakash@quicinc.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, steev@kali.org, Manivannan Sadhasivam , Krzysztof Kozlowski Subject: [PATCH v4 08/12] arm64: dts: qcom: sc8280xp-x13s: Add PMK8280 VADC channels Date: Thu, 3 Nov 2022 15:28:06 +0530 Message-Id: <20221103095810.64606-9-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221103095810.64606-1-manivannan.sadhasivam@linaro.org> References: <20221103095810.64606-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add VADC channels for measuring the on-chip die temperature and external crystal osciallator temperature of PMK8280. Reviewed-by: Krzysztof Kozlowski Reviewed-by: Konrad Dybcio Signed-off-by: Manivannan Sadhasivam --- .../dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts index 6aa8cf6d9776..9e1180b468d4 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts @@ -7,6 +7,7 @@ /dts-v1/; #include +#include #include #include "sc8280xp.dtsi" @@ -173,6 +174,21 @@ &pmk8280_pon_resin { status = "okay"; }; +&pmk8280_vadc { + status = "okay"; + + pmic-die-temp@3 { + reg = ; + qcom,pre-scaling = <1 1>; + }; + + xo-therm@44 { + reg = ; + qcom,hw-settle-time = <200>; + qcom,ratiometric; + }; +}; + &qup0 { status = "okay"; }; From patchwork Thu Nov 3 09:58:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13029839 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D2072C43219 for ; Thu, 3 Nov 2022 09:59:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229548AbiKCJ7k (ORCPT ); Thu, 3 Nov 2022 05:59:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36108 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231334AbiKCJ7P (ORCPT ); Thu, 3 Nov 2022 05:59:15 -0400 Received: from mail-pf1-x42b.google.com (mail-pf1-x42b.google.com [IPv6:2607:f8b0:4864:20::42b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 90DE310565 for ; Thu, 3 Nov 2022 02:59:14 -0700 (PDT) Received: by mail-pf1-x42b.google.com with SMTP id d10so1128250pfh.6 for ; Thu, 03 Nov 2022 02:59:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=YII9cg1fVVnSoFc32Vc9IXlnm9vxUa2VGvtzY01BHFI=; b=MOLANO4HdTBe1eA8p/H2RLLJZ5QH3mr7wlyCfto2l6A66EUNRQQ3w692pZymsiSIG+ gup6aAMDGeXKW9ZS1uTuTeVTUB/dAOoCm+po2SO6us2x3OkguvUNAOhHHlFTxg6eb7Gq jrB3CqvOs+25k2/Nv2StH/HrcZ0oOLR3Fmsw01qJZz3xgKkyVfxiOzIKs2yAYCMFT82N 1mCCe5Jbx5Tq7+3Z/H6hlAMNwiEJJntssv5D+Jeg9No7MSavd+mWsaemyhKWDz5m0lLc 9skiGN2yFQWsoDQY0h8pptXyJbyL4fvH8lZBGxAmOE/x+DdYnLu8M35vONZ8q2F1KvYb Dp3Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=YII9cg1fVVnSoFc32Vc9IXlnm9vxUa2VGvtzY01BHFI=; b=57eTCYFT17mstsez9VBFXjzHdkituGmhDzRsc+zFKsxJHx16GZD6wLRF4r9DKh21Aj V323nyvrxrGQX2oACRgIx/UEnY4WVWMs90BIoxxzNAhClc9GorgwuRoDRNyxJ3gBjDY/ YoOkGIqt+dUGEkPDtLE7snvP4mnVbd5eDtMQnq3Z3SdDk3DPUiJvKQdj5NTj5/OiD/st Wf6t5zwTdoX5LoXqRUxBIeZ6z9twQgtGggJSlrsF+ZP8AWdiLhq4xss4sI0dJBZJjgu0 beJ8GAI5+GyJ05hizXMOvdt3T8oiARGisGMzmE6n5KepXWsHVZjU7xRnwACYjdRqi0zw 0FPA== X-Gm-Message-State: ACrzQf260B/rNb7CX/ugzLtqDYbT2jTzF+Y3wk8KkfDPjo2qR8H6opeK kKEK01m9s/KSv6dH7lbCWB19 X-Google-Smtp-Source: AMsMyM6Yk9IXmeCCltSBM5lj46sC8OOZOjS+7TwyuByxvOT0Vn7TEQFc0lYMPbMla8bSjgVurJ18kg== X-Received: by 2002:aa7:8d12:0:b0:56d:5de0:100b with SMTP id j18-20020aa78d12000000b0056d5de0100bmr21659092pfe.18.1667469554210; Thu, 03 Nov 2022 02:59:14 -0700 (PDT) Received: from localhost.localdomain ([117.193.208.64]) by smtp.gmail.com with ESMTPSA id n6-20020a170902e54600b00186c54188b4sm161670plf.240.2022.11.03.02.59.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Nov 2022 02:59:12 -0700 (PDT) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, johan+linaro@kernel.org, quic_jprakash@quicinc.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, steev@kali.org, Manivannan Sadhasivam , Krzysztof Kozlowski Subject: [PATCH v4 09/12] arm64: dts: qcom: sc8280xp-x13s: Add PM8280_{1/2} VADC channels Date: Thu, 3 Nov 2022 15:28:07 +0530 Message-Id: <20221103095810.64606-10-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221103095810.64606-1-manivannan.sadhasivam@linaro.org> References: <20221103095810.64606-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add VADC channels of PM8280_{1/2} PMICs for measuring the on-chip die temperature and external thermistors connected to the AMUX pins. The measurements are collected by the primary PMIC PMK8280 from the secondary PMICs PM8280_{1/2} and exposed over the PMK8280's VADC channels. Reviewed-by: Konrad Dybcio Reviewed-by: Krzysztof Kozlowski Signed-off-by: Manivannan Sadhasivam --- .../qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 59 +++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts index 9e1180b468d4..807d74026fab 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts @@ -7,6 +7,7 @@ /dts-v1/; #include +#include #include #include @@ -187,6 +188,64 @@ xo-therm@44 { qcom,hw-settle-time = <200>; qcom,ratiometric; }; + + pmic-die-temp@103 { + reg = ; + qcom,pre-scaling = <1 1>; + }; + + sys-therm@144 { + reg = ; + qcom,hw-settle-time = <200>; + qcom,ratiometric; + }; + + sys-therm@145 { + reg = ; + qcom,hw-settle-time = <200>; + qcom,ratiometric; + }; + + sys-therm@146 { + reg = ; + qcom,hw-settle-time = <200>; + qcom,ratiometric; + }; + + sys-therm@147 { + reg = ; + qcom,hw-settle-time = <200>; + qcom,ratiometric; + }; + + pmic-die-temp@303 { + reg = ; + qcom,pre-scaling = <1 1>; + }; + + sys-therm@344 { + reg = ; + qcom,hw-settle-time = <200>; + qcom,ratiometric; + }; + + sys-therm@345 { + reg = ; + qcom,hw-settle-time = <200>; + qcom,ratiometric; + }; + + sys-therm@346 { + reg = ; + qcom,hw-settle-time = <200>; + qcom,ratiometric; + }; + + sys-therm@347 { + reg = ; + qcom,hw-settle-time = <200>; + qcom,ratiometric; + }; }; &qup0 { From patchwork Thu Nov 3 09:58:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13029840 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 06B74C43217 for ; Thu, 3 Nov 2022 09:59:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231400AbiKCJ7o (ORCPT ); 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Thu, 03 Nov 2022 02:59:18 -0700 (PDT) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, johan+linaro@kernel.org, quic_jprakash@quicinc.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, steev@kali.org, Manivannan Sadhasivam , Krzysztof Kozlowski Subject: [PATCH v4 10/12] arm64: dts: qcom: sc8280xp-x13s: Add PMR735A VADC channel Date: Thu, 3 Nov 2022 15:28:08 +0530 Message-Id: <20221103095810.64606-11-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221103095810.64606-1-manivannan.sadhasivam@linaro.org> References: <20221103095810.64606-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add VADC channel of PMR735A for measuring the on-chip die temperature. Reviewed-by: Krzysztof Kozlowski Reviewed-by: Konrad Dybcio Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts index 807d74026fab..7677fe5cf28e 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts @@ -9,6 +9,7 @@ #include #include #include +#include #include #include "sc8280xp.dtsi" @@ -246,6 +247,11 @@ sys-therm@347 { qcom,hw-settle-time = <200>; qcom,ratiometric; }; + + pmic-die-temp@403 { + reg = ; + qcom,pre-scaling = <1 1>; + }; }; &qup0 { From patchwork Thu Nov 3 09:58:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13029841 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 394A4C433FE for ; Thu, 3 Nov 2022 10:00:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231571AbiKCKAA (ORCPT ); Thu, 3 Nov 2022 06:00:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36694 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231470AbiKCJ73 (ORCPT ); Thu, 3 Nov 2022 05:59:29 -0400 Received: from mail-pl1-x633.google.com (mail-pl1-x633.google.com [IPv6:2607:f8b0:4864:20::633]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5118D1098 for ; Thu, 3 Nov 2022 02:59:26 -0700 (PDT) Received: by mail-pl1-x633.google.com with SMTP id 4so1474795pli.0 for ; Thu, 03 Nov 2022 02:59:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=GG1lGFZlW12z0E7EjoO28XPdhPu8bfYpc89EkhncBPQ=; b=AvSVp1tTk9nmbMjrBtWu6mzCoUgTZu+OsLV+mm4Dc6NdAPsjtq1lZMi2EWcWMUo0WS /uqUQFVCtWSY+0pCKoQExYfAmiLcbfCPx43Xnru5lLrUriGDjNXA6b0Pe83/2z2RUd9A hDYpFMttqKDWDUezmkvHsYRGWm2PwKgZFd093mSR25BtfHXNF+wYUBbKYQKeIWQFOpfI 5fAir1UL9IKYApGFPI/MA6r6tqbNyzKBYtDzDkw9bPLvWgukEpz8w3iHlIi0B27Ij2m6 +8sFWBP/HpdajoXNRIX9g0UsLjtRCuTGLcWK0SvyaEvGKvjmxGY9OisKhUQ+a012s02v Wsng== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=GG1lGFZlW12z0E7EjoO28XPdhPu8bfYpc89EkhncBPQ=; b=3kCrv/C6aZQERA8j5ZdMfm8I8W6WUsPqdrjGhzBDgDJvP3C+tpjWwXRdb+fsVabmg8 Lbff8wKk6YTVhXx05msO9uEpmb9EJDtuwEAr5LDDD+SaBO4Wv1Yju4kfNcwO27p6sePs gRq6gXHlbtdE9criBrkxnqDy4k0ElQWphcDF8PKflF78uHvEfIzeaXLa2bsJWdWtAaiH FuLpTPjOt3gYxLwAAQm0OUAyn2FnVQYdOfIG3+2u/rzvuYFuHQMYW8OLsYtf3uQyMeUe WvQizG+h0quoTwzLkRR1d4xKnih8FuZ3pYcjfJ29TOZVnw7dO+pkh2CqjXhiLR105fIo 1cOA== X-Gm-Message-State: ACrzQf2BwliMpkMPIQ5XAvY4EUAn8fMN6SCezLSEIwilZC+Ir0T3kpxu VfXPoVL4sJZFj67/rcWch76O X-Google-Smtp-Source: AMsMyM7KIVvt6KX6gWV3+5hPzF6RgLUbZg8Vz08JLkio8pX/IrJF2g+WAAIsks1JqYoJHIrSiPB5cw== X-Received: by 2002:a17:902:e803:b0:187:3a52:d262 with SMTP id u3-20020a170902e80300b001873a52d262mr12016427plg.85.1667469565624; Thu, 03 Nov 2022 02:59:25 -0700 (PDT) Received: from localhost.localdomain ([117.193.208.64]) by smtp.gmail.com with ESMTPSA id n6-20020a170902e54600b00186c54188b4sm161670plf.240.2022.11.03.02.59.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Nov 2022 02:59:24 -0700 (PDT) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, johan+linaro@kernel.org, quic_jprakash@quicinc.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, steev@kali.org, Manivannan Sadhasivam , Krzysztof Kozlowski Subject: [PATCH v4 11/12] arm64: dts: qcom: sc8280xp-x13s: Add PM8280_{1/2} ADC_TM5 channels Date: Thu, 3 Nov 2022 15:28:09 +0530 Message-Id: <20221103095810.64606-12-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221103095810.64606-1-manivannan.sadhasivam@linaro.org> References: <20221103095810.64606-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add ADC_TM5 channels of PM8280_{1/2} for monitoring the temperature from external thermistors connected to AMUX pins. The temperature measurements are collected from the PMK8280's VADC channels that expose the measurements from secondary PMICs PM8280_{1/2}. Reviewed-by: Krzysztof Kozlowski Reviewed-by: Konrad Dybcio Signed-off-by: Manivannan Sadhasivam --- .../qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 68 +++++++++++++++++++ 1 file changed, 68 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts index 7677fe5cf28e..bdaacf1abf9f 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts @@ -254,6 +254,74 @@ pmic-die-temp@403 { }; }; +&pmk8280_adc_tm { + status = "okay"; + + sys-therm@0 { + reg = <0>; + io-channels = <&pmk8280_vadc PM8350_ADC7_AMUX_THM1_100K_PU(1)>; + qcom,hw-settle-time-us = <200>; + qcom,avg-samples = <2>; + qcom,ratiometric; + }; + + sys-therm@1 { + reg = <1>; + io-channels = <&pmk8280_vadc PM8350_ADC7_AMUX_THM2_100K_PU(1)>; + qcom,hw-settle-time-us = <200>; + qcom,avg-samples = <2>; + qcom,ratiometric; + }; + + sys-therm@2 { + reg = <2>; + io-channels = <&pmk8280_vadc PM8350_ADC7_AMUX_THM3_100K_PU(1)>; + qcom,hw-settle-time-us = <200>; + qcom,avg-samples = <2>; + qcom,ratiometric; + }; + + sys-therm@3 { + reg = <3>; + io-channels = <&pmk8280_vadc PM8350_ADC7_AMUX_THM4_100K_PU(1)>; + qcom,hw-settle-time-us = <200>; + qcom,avg-samples = <2>; + qcom,ratiometric; + }; + + sys-therm@4 { + reg = <4>; + io-channels = <&pmk8280_vadc PM8350_ADC7_AMUX_THM1_100K_PU(3)>; + qcom,hw-settle-time-us = <200>; + qcom,avg-samples = <2>; + qcom,ratiometric; + }; + + sys-therm@5 { + reg = <5>; + io-channels = <&pmk8280_vadc PM8350_ADC7_AMUX_THM2_100K_PU(3)>; + qcom,hw-settle-time-us = <200>; + qcom,avg-samples = <2>; + qcom,ratiometric; + }; + + sys-therm@6 { + reg = <6>; + io-channels = <&pmk8280_vadc PM8350_ADC7_AMUX_THM3_100K_PU(3)>; + qcom,hw-settle-time-us = <200>; + qcom,avg-samples = <2>; + qcom,ratiometric; + }; + + sys-therm@7 { + reg = <7>; + io-channels = <&pmk8280_vadc PM8350_ADC7_AMUX_THM4_100K_PU(3)>; + qcom,hw-settle-time-us = <200>; + qcom,avg-samples = <2>; + qcom,ratiometric; + }; +}; + &qup0 { status = "okay"; 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Based on experiments, this thermistor seems to reflect the actual surface temperature of the laptop. For the cooling device, all BIG CPU cores are throttled down to keep the temperature at a sane level. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Konrad Dybcio --- .../qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 46 +++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts index bdaacf1abf9f..60dbc736f4d7 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts @@ -29,6 +29,52 @@ backlight { pinctrl-0 = <&edp_bl_en>, <&edp_bl_pwm>; }; + thermal-zones { + skin-temp-thermal { + polling-delay-passive = <250>; + polling-delay = <0>; + thermal-sensors = <&pmk8280_adc_tm 5>; + + trips { + skin_temp_alert0: trip-point0 { + temperature = <55000>; + hysteresis = <1000>; + type = "passive"; + }; + + skin_temp_alert1: trip-point1 { + temperature = <58000>; + hysteresis = <1000>; + type = "passive"; + }; + + skin-temp-crit { + temperature = <73000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&skin_temp_alert0>; + cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + + map1 { + trip = <&skin_temp_alert1>; + cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + }; + vreg_edp_bl: regulator-edp-bl { compatible = "regulator-fixed";