From patchwork Fri Nov 4 13:10:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 13031738 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 83196C4332F for ; Fri, 4 Nov 2022 13:12:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=Yg6pxuWf2QD1Amq4X6z/aK/kLmVkCkVzPAyG+TKQ5D4=; b=eQ1SapnARXzgws EDC5G1/UbXiHMBXHDdDqTfzMPJBedH7n3eMVN4/aBVvMXGy0XbxYXXrYXnTSz8bs8w5ioFZz37Ybg aQTUyo04sx4eF8e+FD+W3v6yusTVPsCa+bf5K/uqks+VGRbCtW62JmHuWb2GovbGfhfhwafBef6Jg ixmkOe7e6Ds0uFCknMuGqFqv80DhWwYbV1dtL2yNm9fGuj29fiYWPFQqlSmNLXPzhAKkv+K3AoEtx 8iXuQfRhGxQjoj3EjO3Jq2i6T5yM3CXsDZ3IjTLiz6A9leGlWDqArUY1IE9tJ4Qw6B1hTq9GJ4Ioy lCYNT6Q9F5rn5hJuv8Ow==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oqwTL-003a7U-Tz; Fri, 04 Nov 2022 13:11:00 +0000 Received: from phobos.denx.de ([2a01:238:438b:c500:173d:9f52:ddab:ee01]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oqwTI-003a50-3x for linux-arm-kernel@lists.infradead.org; Fri, 04 Nov 2022 13:10:57 +0000 Received: from tr.lan (ip-86-49-120-218.bb.vodafone.cz [86.49.120.218]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: marex@denx.de) by phobos.denx.de (Postfix) with ESMTPSA id C5F1285254; Fri, 4 Nov 2022 14:10:53 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1667567454; bh=tMg9K516CfccNf6cWrvZ6LFkekaMn5LxRoQ/KGHmSPM=; h=From:To:Cc:Subject:Date:From; b=rYv5vTicuUWH/Mn/yelpuNn+aD3poXQuh/wBzRdb2M7yZCLR60YtfiLvIKmdd1ICM AByBbUqAwHIIYAsfF9S9hoQCIq1AIAhbtm7Ek5nAP8/D5sdm2RZjBEBzBHJcIJIDwH eUoM2QJxVQXyNIHP3GuaS+aAj4gaR7AygRWR41zbazQhOgf2wSgJ+/AZs3SsjtjBAy SGuNaB06IirUk3IfhHA0avCKMzcAanr9B2PfXIGX2mMX/nA/maNN+E4u920Db0X0T6 4+vZMQKz8c619Q595ztkQEkAwg4Mvie88SR0f//6+gKNBQU3b6QZMAS7jcrwihjG39 leC2lv/UlKEgA== From: Marek Vasut To: devicetree@vger.kernel.org Cc: Marek Vasut , Alexander Stein , Fabio Estevam , Krzysztof Kozlowski , Lucas Stach , Richard Zhu , Rob Herring , Shawn Guo , linux-arm-kernel@lists.infradead.org, NXP Linux Team Subject: [PATCH v2 1/3] dt-bindings: imx6q-pcie: Handle various clock configurations Date: Fri, 4 Nov 2022 14:10:42 +0100 Message-Id: <20221104131044.103241-1-marex@denx.de> X-Mailer: git-send-email 2.35.1 MIME-Version: 1.0 X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221104_061056_481608_E4483346 X-CRM114-Status: GOOD ( 12.02 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The i.MX SoCs have various clock configurations routed into the PCIe IP, the list of clock is below. Document all those configurations in the DT binding document. All SoCs: pcie, pcie_bus 6QDL, 7D: + pcie_phy 6SX: + pcie_phy pcie_inbound_axi 8MQ: + pcie_phy pcie_aux 8MM, 8MP: + pcie_aux Acked-by: Alexander Stein Signed-off-by: Marek Vasut --- Cc: Fabio Estevam Cc: Krzysztof Kozlowski Cc: Lucas Stach Cc: Richard Zhu Cc: Rob Herring Cc: Shawn Guo Cc: linux-arm-kernel@lists.infradead.org Cc: NXP Linux Team To: devicetree@vger.kernel.org --- V2: - Add AB from Alex --- .../bindings/pci/fsl,imx6q-pcie.yaml | 74 +++++++++++++++++-- 1 file changed, 69 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml index 376e739bcad40..1cfea8ca72576 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml @@ -14,9 +14,6 @@ description: |+ This PCIe host controller is based on the Synopsys DesignWare PCIe IP and thus inherits all the common properties defined in snps,dw-pcie.yaml. -allOf: - - $ref: /schemas/pci/snps,dw-pcie.yaml# - properties: compatible: enum: @@ -60,8 +57,8 @@ properties: items: - const: pcie - const: pcie_bus - - const: pcie_phy - - const: pcie_inbound_axi for imx6sx-pcie, pcie_aux for imx8mq-pcie + - enum: [pcie_phy, pcie_aux] + - enum: [pcie_inbound_axi, pcie_aux] num-lanes: const: 1 @@ -177,6 +174,73 @@ required: unevaluatedProperties: false +allOf: + - $ref: /schemas/pci/snps,dw-pcie.yaml# + + - if: + properties: + compatible: + contains: + enum: + - fsl,imx6sx-pcie + - fsl,imx8mq-pcie + then: + properties: + clocks: + maxItems: 4 + clock-names: + maxItems: 4 + + - if: + properties: + compatible: + contains: + const: fsl,imx6sx-pcie + then: + properties: + clock-names: + items: + - const: pcie + - const: pcie_bus + - const: pcie_phy + - const: pcie_inbound_axi + else: + if: + properties: + compatible: + contains: + const: fsl,imx8mq-pcie + then: + properties: + clock-names: + items: + - const: pcie + - const: pcie_bus + - const: pcie_phy + - const: pcie_aux + else: + if: + properties: + compatible: + contains: + enum: + - fsl,imx8mm-pcie + - fsl,imx8mp-pcie + then: + properties: + clock-names: + items: + - const: pcie + - const: pcie_bus + - const: pcie_aux + else: + properties: + clock-names: + items: + - const: pcie + - const: pcie_bus + - const: pcie_phy + examples: - | #include From patchwork Fri Nov 4 13:10:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 13031739 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B6441C4332F for ; Fri, 4 Nov 2022 13:12:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=mRieJTFH2dsP3N2Eu6vEUcOFgz1GFNOaYipFM2BqFGs=; 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Fri, 4 Nov 2022 14:10:54 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1667567455; bh=2LwOAEieZo3MqA8rsVebJ1dxgxWLrruXPLT2wPYblLQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GIOb5OCGSv2kMBCfivQ2l6zyhXbItAMg5ldRhw2mjOil7smblR7aLBmaesCFWdU6m HAPO8C1NURnWYn39JqWN4JnxEq9pM/yQzic2EWho2s3RWW5NBAZ+Cl9mUXyQIJTPYw TvBdKJ+7WjWtc9slQ5I8IeronprbV+eobopyYN7n5qrvBkdwAWobCSMZ1xUmQ54U5X mSKxmI4gEc4agOybwsRwyoV7bYhKaAnqQBZu6KBdv9+i1x4ly9SBx2Oo419S81VMKt kdjTnLkVZuU9KqJWnI0Ic+Td7I2mepI2v8yB+qqlr0dCDv2bi/n473LkLhUiyNiRyi 6ka7lJdlKL6rQ== From: Marek Vasut To: devicetree@vger.kernel.org Cc: Marek Vasut , Fabio Estevam , Krzysztof Kozlowski , Lucas Stach , Richard Zhu , Rob Herring , Shawn Guo , linux-arm-kernel@lists.infradead.org, NXP Linux Team Subject: [PATCH v2 2/3] dt-bindings: imx6q-pcie: Handle various PD configurations Date: Fri, 4 Nov 2022 14:10:43 +0100 Message-Id: <20221104131044.103241-2-marex@denx.de> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221104131044.103241-1-marex@denx.de> References: <20221104131044.103241-1-marex@denx.de> MIME-Version: 1.0 X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221104_061057_084854_B27C9932 X-CRM114-Status: GOOD ( 12.91 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The i.MX SoCs have various power domain configurations routed into the PCIe IP. MX6SX is the only one which contains 2 domains and also uses power-domain-names. MX6QDL do not use any domains. All the rest uses one domain and does not use power-domain-names anymore. Document all those configurations in the DT binding document. Signed-off-by: Marek Vasut --- Cc: Fabio Estevam Cc: Krzysztof Kozlowski Cc: Lucas Stach Cc: Richard Zhu Cc: Rob Herring Cc: Shawn Guo Cc: linux-arm-kernel@lists.infradead.org Cc: NXP Linux Team To: devicetree@vger.kernel.org --- V2: - Keep the power-domains description in the main section --- .../bindings/pci/fsl,imx6q-pcie.yaml | 55 ++++++++++++++----- 1 file changed, 42 insertions(+), 13 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml index 1cfea8ca72576..2087dab95d679 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml @@ -68,19 +68,6 @@ properties: description: A phandle to an fsl,imx7d-pcie-phy node. Additional required properties for imx7d-pcie and imx8mq-pcie. - power-domains: - items: - - description: The phandle pointing to the DISPLAY domain for - imx6sx-pcie, to PCIE_PHY power domain for imx7d-pcie and - imx8mq-pcie. - - description: The phandle pointing to the PCIE_PHY power domains - for imx6sx-pcie. - - power-domain-names: - items: - - const: pcie - - const: pcie_phy - resets: maxItems: 3 description: Phandles to PCIe-related reset lines exposed by SRC @@ -132,6 +119,19 @@ properties: phy-names: const: pcie-phy + power-domains: + minItems: 1 + items: + - description: The phandle pointing to the DISPLAY domain for + imx6sx-pcie, to PCIE_PHY power domain for imx7d-pcie and + imx8mq-pcie. + - description: The phandle pointing to the PCIE_PHY power domains + for imx6sx-pcie. + power-domain-names: + items: + - const: pcie + - const: pcie_phy + reset-gpio: description: Should specify the GPIO for controlling the PCI bus device reset signal. It's not polarity aware and defaults to active-low reset @@ -241,6 +241,35 @@ allOf: - const: pcie_bus - const: pcie_phy + - if: + properties: + compatible: + contains: + const: fsl,imx6sx-pcie + then: + properties: + power-domains: + minItems: 2 + maxItems: 2 + power-domain-names: + minItems: 2 + maxItems: 2 + else: + if: + not: + properties: + compatible: + contains: + enum: + - fsl,imx6q-pcie + - fsl,imx6qp-pcie + then: + properties: + power-domains: + minItems: 1 + maxItems: 1 + power-domain-names: false + examples: - | #include From patchwork Fri Nov 4 13:10:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 13031740 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A8C19C433FE for ; Fri, 4 Nov 2022 13:12:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=5l6PPTxwq0I4Ok1YPa7MRqFEPCHZgpyhubiPjp9RReo=; b=oPiUYBD7GPUUlH DshqxyJ6Jhn0sZTyAZCxDtQWR4uO81vlsxk5lExuw9J3IbFFp4RUG8HPAtmZFj55d3CMMHAlkGxwf gJe2+2hWgmmM/rFZZcZS1l5OWZBxr7qoOitkRIzLp91zivwRwhPFzTAbfPKTVFGtt6dEey695zzMp WoOc3Ke/nOqp6NqgG2V4ul5EbBShtsSrL64Aa/VqSVKBT4H8396FDrp7aOo25NitQe/OOWV9vhTKu zYamz3p6yfFvEItTTpuARhE7SvMqm7T8E1s4nJQ4ofMJd4AyhOptJ6S1+YBYsUqA+pHokGKnREmBJ ol6cLO1xbE/YhJfCgaKg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oqwTg-003aEJ-QJ; Fri, 04 Nov 2022 13:11:20 +0000 Received: from phobos.denx.de ([85.214.62.61]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oqwTJ-003a5L-Lh for linux-arm-kernel@lists.infradead.org; Fri, 04 Nov 2022 13:10:59 +0000 Received: from tr.lan (ip-86-49-120-218.bb.vodafone.cz [86.49.120.218]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: marex@denx.de) by phobos.denx.de (Postfix) with ESMTPSA id 48E1385257; Fri, 4 Nov 2022 14:10:55 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1667567455; bh=IaHDSmq+yS0i1fvikq744Z4F1ikkf/U8WfGkfOAf/Yo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=CvH/g6GhaTCFinzTZoB22lfYv1A91BAfJjD59zRZQLlvh7XT791oFWTKPtBETIlsL 4oxxILKk1Px6dfqFe+FlKEQ4Zph5vfx7aj0MjHhMnuvtz3XneP5bdvXtUeeGiRQh7V iJ+UCAoOBI2nNk+Lh3vQmcBZwopF4v70rN3ugkEryYXZvArBA7f0TIsHIjTi1doZHr 5ct1jr7VGzXub4OzKmWD7siCWu3OTyUFVySPLpAhXuelVutzoU+650fisfyn9qgpvA UKoaPmigBvVRfkDHasFkltRB2LByCo6N+Oi33kk19THM/UG5yTXnPGSu4sIefqNNzx uUImhjKXBbAiQ== From: Marek Vasut To: devicetree@vger.kernel.org Cc: Marek Vasut , Fabio Estevam , Krzysztof Kozlowski , Lucas Stach , Richard Zhu , Rob Herring , Shawn Guo , linux-arm-kernel@lists.infradead.org, NXP Linux Team Subject: [PATCH v2 3/3] dt-bindings: imx6q-pcie: Handle more resets on legacy platforms Date: Fri, 4 Nov 2022 14:10:44 +0100 Message-Id: <20221104131044.103241-3-marex@denx.de> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221104131044.103241-1-marex@denx.de> References: <20221104131044.103241-1-marex@denx.de> MIME-Version: 1.0 X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221104_061058_061908_CDFAD023 X-CRM114-Status: GOOD ( 10.50 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The i.MX6 and i.MX7D does not use block controller to toggle PCIe reset, hence the PCIe DT description contains three reset entries on these older SoCs. Add this exception into the binding document. Signed-off-by: Marek Vasut --- Cc: Fabio Estevam Cc: Krzysztof Kozlowski Cc: Lucas Stach Cc: Richard Zhu Cc: Rob Herring Cc: Shawn Guo Cc: linux-arm-kernel@lists.infradead.org Cc: NXP Linux Team To: devicetree@vger.kernel.org --- V2: - Add mx8mq to 3-reset PCIe core variant - Handle the resets in allOf section --- .../bindings/pci/fsl,imx6q-pcie.yaml | 35 +++++++++++++++---- 1 file changed, 28 insertions(+), 7 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml index 2087dab95d679..f461ee2cd5c84 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml @@ -69,16 +69,9 @@ properties: required properties for imx7d-pcie and imx8mq-pcie. resets: - maxItems: 3 description: Phandles to PCIe-related reset lines exposed by SRC IP block. Additional required by imx7d-pcie and imx8mq-pcie. - reset-names: - items: - - const: pciephy - - const: apps - - const: turnoff - fsl,tx-deemph-gen1: description: Gen1 De-emphasis value (optional required). $ref: /schemas/types.yaml#/definitions/uint32 @@ -270,6 +263,34 @@ allOf: maxItems: 1 power-domain-names: false + - if: + properties: + compatible: + contains: + enum: + - fsl,imx6q-pcie + - fsl,imx6sx-pcie + - fsl,imx6qp-pcie + - fsl,imx7d-pcie + - fsl,imx8mq-pcie + then: + properties: + resets: + maxItems: 3 + reset-names: + items: + - const: pciephy + - const: apps + - const: turnoff + else: + properties: + resets: + maxItems: 2 + reset-names: + items: + - const: apps + - const: turnoff + examples: - | #include