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[211.75.219.201]) by smtp.gmail.com with ESMTPSA id w27-20020aa79a1b000000b00562ef28aac6sm698138pfj.185.2022.11.05.00.23.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 05 Nov 2022 00:23:41 -0700 (PDT) From: Leo Yan To: Marc Zyngier , James Morse , Alexandru Elisei , Suzuki K Poulose , Oliver Upton , Catalin Marinas , Will Deacon , Arnaldo Carvalho de Melo , John Garry , James Clark , Mike Leach , Peter Zijlstra , Ingo Molnar , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org Cc: Leo Yan Subject: [PATCH v1 1/3] KVM: arm64: Dynamically register callback for tracepoints Date: Sat, 5 Nov 2022 07:23:09 +0000 Message-Id: <20221105072311.8214-2-leo.yan@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221105072311.8214-1-leo.yan@linaro.org> References: <20221105072311.8214-1-leo.yan@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221105_002342_778055_48348069 X-CRM114-Status: GOOD ( 17.94 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This commit doesn't change any functionality but only refactoring. It registers callbacks for tracepoints dynamically, with this way, the existed trace events (in this case kvm_entry and kvm_exit) are kept. This is a preparation to add new trace events in later patch. Signed-off-by: Leo Yan --- arch/arm64/kvm/Makefile | 2 +- arch/arm64/kvm/arm.c | 4 ++-- arch/arm64/kvm/trace.c | 29 +++++++++++++++++++++++++++++ arch/arm64/kvm/trace_arm.h | 8 ++++++++ 4 files changed, 40 insertions(+), 3 deletions(-) create mode 100644 arch/arm64/kvm/trace.c diff --git a/arch/arm64/kvm/Makefile b/arch/arm64/kvm/Makefile index 5e33c2d4645a..4e641d2df7ad 100644 --- a/arch/arm64/kvm/Makefile +++ b/arch/arm64/kvm/Makefile @@ -14,7 +14,7 @@ kvm-y += arm.o mmu.o mmio.o psci.o hypercalls.o pvtime.o \ inject_fault.o va_layout.o handle_exit.o \ guest.o debug.o reset.o sys_regs.o stacktrace.o \ vgic-sys-reg-v3.o fpsimd.o pkvm.o \ - arch_timer.o trng.o vmid.o \ + arch_timer.o trng.o vmid.o trace.o \ vgic/vgic.o vgic/vgic-init.o \ vgic/vgic-irqfd.o vgic/vgic-v2.o \ vgic/vgic-v3.o vgic/vgic-v4.o \ diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c index 94d33e296e10..03ed5f6c92bc 100644 --- a/arch/arm64/kvm/arm.c +++ b/arch/arm64/kvm/arm.c @@ -917,7 +917,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu) /************************************************************** * Enter the guest */ - trace_kvm_entry(*vcpu_pc(vcpu)); + trace_kvm_entry_tp(vcpu); guest_timing_enter_irqoff(); ret = kvm_arm_vcpu_enter_exit(vcpu); @@ -974,7 +974,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu) local_irq_enable(); - trace_kvm_exit(ret, kvm_vcpu_trap_get_class(vcpu), *vcpu_pc(vcpu)); + trace_kvm_exit_tp(ret, vcpu); /* Exit types that need handling before we can be preempted */ handle_exit_early(vcpu, ret); diff --git a/arch/arm64/kvm/trace.c b/arch/arm64/kvm/trace.c new file mode 100644 index 000000000000..d25a3db994e2 --- /dev/null +++ b/arch/arm64/kvm/trace.c @@ -0,0 +1,29 @@ +// SPDX-License-Identifier: GPL-2.0 +#include +#include + +#include + +#include "trace_arm.h" + +static void kvm_entry_tp(void *data, struct kvm_vcpu *vcpu) +{ + if (trace_kvm_entry_enabled()) + trace_kvm_entry(*vcpu_pc(vcpu)); +} + +static void kvm_exit_tp(void *data, int ret, struct kvm_vcpu *vcpu) +{ + if (trace_kvm_exit_enabled()) + trace_kvm_exit(ret, kvm_vcpu_trap_get_class(vcpu), + *vcpu_pc(vcpu)); +} + +static int __init kvm_tp_init(void) +{ + register_trace_kvm_entry_tp(kvm_entry_tp, NULL); + register_trace_kvm_exit_tp(kvm_exit_tp, NULL); + return 0; +} + +core_initcall(kvm_tp_init) diff --git a/arch/arm64/kvm/trace_arm.h b/arch/arm64/kvm/trace_arm.h index 33e4e7dd2719..ef02ae93b28b 100644 --- a/arch/arm64/kvm/trace_arm.h +++ b/arch/arm64/kvm/trace_arm.h @@ -11,6 +11,10 @@ /* * Tracepoints for entry/exit to guest */ +DECLARE_TRACE(kvm_entry_tp, + TP_PROTO(struct kvm_vcpu *vcpu), + TP_ARGS(vcpu)); + TRACE_EVENT(kvm_entry, TP_PROTO(unsigned long vcpu_pc), TP_ARGS(vcpu_pc), @@ -26,6 +30,10 @@ TRACE_EVENT(kvm_entry, TP_printk("PC: 0x%016lx", __entry->vcpu_pc) ); +DECLARE_TRACE(kvm_exit_tp, + TP_PROTO(int ret, struct kvm_vcpu *vcpu), + TP_ARGS(ret, vcpu)); + TRACE_EVENT(kvm_exit, TP_PROTO(int ret, unsigned int esr_ec, unsigned long vcpu_pc), TP_ARGS(ret, esr_ec, vcpu_pc), From patchwork Sat Nov 5 07:23:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Yan X-Patchwork-Id: 13032960 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4B78CC4332F for ; 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[211.75.219.201]) by smtp.gmail.com with ESMTPSA id w27-20020aa79a1b000000b00562ef28aac6sm698138pfj.185.2022.11.05.00.23.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 05 Nov 2022 00:23:48 -0700 (PDT) From: Leo Yan To: Marc Zyngier , James Morse , Alexandru Elisei , Suzuki K Poulose , Oliver Upton , Catalin Marinas , Will Deacon , Arnaldo Carvalho de Melo , John Garry , James Clark , Mike Leach , Peter Zijlstra , Ingo Molnar , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org Cc: Leo Yan Subject: [PATCH v1 2/3] KVM: arm64: Add trace events with field 'vcpu_id' Date: Sat, 5 Nov 2022 07:23:10 +0000 Message-Id: <20221105072311.8214-3-leo.yan@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221105072311.8214-1-leo.yan@linaro.org> References: <20221105072311.8214-1-leo.yan@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221105_002349_649326_30238A1A X-CRM114-Status: GOOD ( 15.93 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The existed trace events kvm_entry and kvm_exit don't contain the info for virtual CPU id, thus the perf tool has no chance to do statistics based on virtual CPU wise; and the trace events are ABI and we cannot change it to avoid ABI breakage. For above reasons, this patch adds two trace events kvm_entry_v2 and kvm_exit_v2 with a new field 'vcpu_id'. To support both the old and new events, we use the tracepoint callback to check if any event is enabled or not, if it's enabled then the callback will invoke the corresponding trace event. Signed-off-by: Leo Yan --- arch/arm64/kvm/trace.c | 6 +++++ arch/arm64/kvm/trace_arm.h | 45 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 51 insertions(+) diff --git a/arch/arm64/kvm/trace.c b/arch/arm64/kvm/trace.c index d25a3db994e2..d9b2587c77c3 100644 --- a/arch/arm64/kvm/trace.c +++ b/arch/arm64/kvm/trace.c @@ -10,6 +10,9 @@ static void kvm_entry_tp(void *data, struct kvm_vcpu *vcpu) { if (trace_kvm_entry_enabled()) trace_kvm_entry(*vcpu_pc(vcpu)); + + if (trace_kvm_entry_v2_enabled()) + trace_kvm_entry_v2(vcpu); } static void kvm_exit_tp(void *data, int ret, struct kvm_vcpu *vcpu) @@ -17,6 +20,9 @@ static void kvm_exit_tp(void *data, int ret, struct kvm_vcpu *vcpu) if (trace_kvm_exit_enabled()) trace_kvm_exit(ret, kvm_vcpu_trap_get_class(vcpu), *vcpu_pc(vcpu)); + + if (trace_kvm_exit_v2_enabled()) + trace_kvm_exit_v2(ret, vcpu); } static int __init kvm_tp_init(void) diff --git a/arch/arm64/kvm/trace_arm.h b/arch/arm64/kvm/trace_arm.h index ef02ae93b28b..932c9d0c36f3 100644 --- a/arch/arm64/kvm/trace_arm.h +++ b/arch/arm64/kvm/trace_arm.h @@ -4,6 +4,7 @@ #include #include +#include #undef TRACE_SYSTEM #define TRACE_SYSTEM kvm @@ -30,6 +31,23 @@ TRACE_EVENT(kvm_entry, TP_printk("PC: 0x%016lx", __entry->vcpu_pc) ); +TRACE_EVENT(kvm_entry_v2, + TP_PROTO(struct kvm_vcpu *vcpu), + TP_ARGS(vcpu), + + TP_STRUCT__entry( + __field( unsigned int, vcpu_id ) + __field( unsigned long, vcpu_pc ) + ), + + TP_fast_assign( + __entry->vcpu_id = vcpu->vcpu_id; + __entry->vcpu_pc = *vcpu_pc(vcpu); + ), + + TP_printk("vcpu: %u PC: 0x%016lx", __entry->vcpu_id, __entry->vcpu_pc) +); + DECLARE_TRACE(kvm_exit_tp, TP_PROTO(int ret, struct kvm_vcpu *vcpu), TP_ARGS(ret, vcpu)); @@ -57,6 +75,33 @@ TRACE_EVENT(kvm_exit, __entry->vcpu_pc) ); +TRACE_EVENT(kvm_exit_v2, + TP_PROTO(int ret, struct kvm_vcpu *vcpu), + TP_ARGS(ret, vcpu), + + TP_STRUCT__entry( + __field( unsigned int, vcpu_id ) + __field( int, ret ) + __field( unsigned int, esr_ec ) + __field( unsigned long, vcpu_pc ) + ), + + TP_fast_assign( + __entry->vcpu_id = vcpu->vcpu_id; + __entry->ret = ARM_EXCEPTION_CODE(ret); + __entry->esr_ec = ARM_EXCEPTION_IS_TRAP(ret) ? + kvm_vcpu_trap_get_class(vcpu): 0; + __entry->vcpu_pc = *vcpu_pc(vcpu); + ), + + TP_printk("%s: vcpu: %u HSR_EC: 0x%04x (%s), PC: 0x%016lx", + __print_symbolic(__entry->ret, kvm_arm_exception_type), + __entry->vcpu_id, + __entry->esr_ec, + __print_symbolic(__entry->esr_ec, kvm_arm_exception_class), + __entry->vcpu_pc) +); + TRACE_EVENT(kvm_guest_fault, TP_PROTO(unsigned long vcpu_pc, unsigned long hsr, unsigned long hxfar, From patchwork Sat Nov 5 07:23:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Yan X-Patchwork-Id: 13032961 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 55957C433FE for ; Sat, 5 Nov 2022 07:25:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Fo5QivKKtHkmsTQ+qgigKlxJRvZ4GRANlubIRxQFfhg=; b=JAk3w3YYGWVHEd LaFro1ih+EiNCwx69ZsRNTTpQ2VuWeL7tTPfAF/Ch6MyJrujlwgn6FxTh4BRB0tAMHSwnkDMt5Z0p 1b/fr+rh0km6yog83iGOrLAHRm257zqfybwmX4NwYdJ6q0VkiqWA8Gu/rD18b0hDoLBlde47vaC/u f+f9PqDtqSPJ3BiEm6FKzn472HGiHhDhCn4KN6X9imlhPRiYSrjExyX+0dflk2E5/hT1cuXxMjjez HQto8vsnCGUnsAD7wVnidvxSFmdthIOGoVH+0lCWmyIDL3HOejgcIG0hH4ypXb1Usx8LyzlrduH7z 827ncC799z1Bb8LpAO2Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1orDXD-005zhv-7W; Sat, 05 Nov 2022 07:24:07 +0000 Received: from mail-pj1-x1029.google.com ([2607:f8b0:4864:20::1029]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1orDX1-005zej-DW for linux-arm-kernel@lists.infradead.org; Sat, 05 Nov 2022 07:23:56 +0000 Received: by mail-pj1-x1029.google.com with SMTP id h14so6337516pjv.4 for ; Sat, 05 Nov 2022 00:23:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=S8CxQ8M2QM9sBIlwmPDF3sO4KY64cCnbt7okAkRcIdI=; b=c0dlly7hwTw7JU56MQSd2/9OjXdPEB8Z/l2dmasIIKMvsyZHc8sBbN5UJQtR7mVC09 q1RR61V+SDTO2DuU2hQynG5H3e4yn4CM6fXf36AcT70kPYKmFbcQCH7SXXZkg4VyVfhu EPFrH9rYmLzLRfPkGFi1Qz02uF9/Zt1E3vUw0+DG9adou/Lc4Ndq83SCfiSm6MmDRz8s s1D/JRn7aWkc58Nrswu24cJ8DSKi/vsbmPgm6gAHhajuLe1RWjCt6XzHurTyatoUKKtT 7iVtd1ml8i5VhcahkoMggu5Al7bKaRASIgh9v83JNHCWiqAvE+xNgcz8FYTpsyBAMetU 3/EQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=S8CxQ8M2QM9sBIlwmPDF3sO4KY64cCnbt7okAkRcIdI=; b=Gr/IiPcBU93Gh4eiztI5X85XoLzGQxWQwNizurLvO88Bo+eiysJSIlF/1RPxQjk/vZ 49JyquH2XhNAss4Rjs6xYarZDQ829oXpF0r/7PmNkgHNrmG9qgfOaYnZTOrdAZpFNkF1 2YwTHYjHvvr6rk7mtD0PESJx2d8J8VdhaKd3JmjXQ6K/Hg5rE3CC59So2mtczuc4QcGl jDUg7E6ykrKNMHBX8jht0inxbd9KWWs64gDrq/gcDumEgRPTLFID0kptEaQ/PkmTFCxC F5E4t1EesdAiaqG1CGH/7+KRRGb1d1M57WbYN3m6SwLo6LcPDM8Zuvy7y0sKPWSVNlvj sPDQ== X-Gm-Message-State: ACrzQf2NRhFuvAPUmf84NGQYYb+xcEXaxQMtspZ4xlzqwp7VvBM51mc4 F0j/+xN9cB6oPsj645RtBniYCQ== X-Google-Smtp-Source: AMsMyM5leRTjPX8cC2BZ8OxRg1qLemGZp+/Aqexr9F666mTxh2xSMl5cDCaV8E5Oxa1vtL+dJHRYXA== X-Received: by 2002:a17:902:ec92:b0:186:9fc6:868c with SMTP id x18-20020a170902ec9200b001869fc6868cmr39074139plg.12.1667633034808; Sat, 05 Nov 2022 00:23:54 -0700 (PDT) Received: from leoy-huangpu.lan (211-75-219-201.hinet-ip.hinet.net. [211.75.219.201]) by smtp.gmail.com with ESMTPSA id w27-20020aa79a1b000000b00562ef28aac6sm698138pfj.185.2022.11.05.00.23.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 05 Nov 2022 00:23:54 -0700 (PDT) From: Leo Yan To: Marc Zyngier , James Morse , Alexandru Elisei , Suzuki K Poulose , Oliver Upton , Catalin Marinas , Will Deacon , Arnaldo Carvalho de Melo , John Garry , James Clark , Mike Leach , Peter Zijlstra , Ingo Molnar , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org Cc: Leo Yan Subject: [PATCH v1 3/3] perf arm64: Support virtual CPU ID for kvm-stat Date: Sat, 5 Nov 2022 07:23:11 +0000 Message-Id: <20221105072311.8214-4-leo.yan@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221105072311.8214-1-leo.yan@linaro.org> References: <20221105072311.8214-1-leo.yan@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221105_002355_480946_D17B57C7 X-CRM114-Status: GOOD ( 18.53 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Since the two trace events kvm_entry_v2/kvm_exit_v2 are added, we can use the field "vcpu_id" in the events to get to know the virtual CPU ID. To keep backward compatibility, we still need to rely on the trace events kvm_entry/kvm_exit for old kernels. This patch adds Arm64's functions setup_kvm_events_tp() and arm64__setup_kvm_tp(), by detecting the nodes under sysfs folder, it can dynamically register trace events kvm_entry_v2/kvm_exit_v2 when the kernel has provided them, otherwise, it rolls back to use events kvm_entry/kvm_exit for backward compatibility. Let cpu_isa_init() to invoke arm64__setup_kvm_tp(), this can allow the command "perf kvm stat report" also to dynamically setup trace events. Before: # perf kvm stat report --vcpu 27 Analyze events for all VMs, VCPU 27: VM-EXIT Samples Samples% Time% Min Time Max Time Avg time Total Samples:0, Total events handled time:0.00us. After: # perf kvm stat report --vcpu 27 Analyze events for all VMs, VCPU 27: VM-EXIT Samples Samples% Time% Min Time Max Time Avg time SYS64 808 98.54% 91.24% 0.00us 303.76us 3.46us ( +- 13.54% ) WFx 10 1.22% 7.79% 0.00us 69.48us 23.91us ( +- 25.91% ) IRQ 2 0.24% 0.97% 0.00us 22.64us 14.82us ( +- 52.77% ) Total Samples:820, Total events handled time:3068.28us. Signed-off-by: Leo Yan --- tools/perf/arch/arm64/util/kvm-stat.c | 54 ++++++++++++++++++++++++--- 1 file changed, 49 insertions(+), 5 deletions(-) diff --git a/tools/perf/arch/arm64/util/kvm-stat.c b/tools/perf/arch/arm64/util/kvm-stat.c index 73d18e0ed6f6..1ba54ce3d7d8 100644 --- a/tools/perf/arch/arm64/util/kvm-stat.c +++ b/tools/perf/arch/arm64/util/kvm-stat.c @@ -3,6 +3,7 @@ #include #include "../../../util/evsel.h" #include "../../../util/kvm-stat.h" +#include "../../../util/tracepoint.h" #include "arm64_exception_types.h" #include "debug.h" @@ -10,18 +11,28 @@ define_exit_reasons_table(arm64_exit_reasons, kvm_arm_exception_type); define_exit_reasons_table(arm64_trap_exit_reasons, kvm_arm_exception_class); const char *kvm_trap_exit_reason = "esr_ec"; -const char *vcpu_id_str = "id"; +const char *vcpu_id_str = "vcpu_id"; const int decode_str_len = 20; const char *kvm_exit_reason = "ret"; -const char *kvm_entry_trace = "kvm:kvm_entry"; -const char *kvm_exit_trace = "kvm:kvm_exit"; +const char *kvm_entry_trace; +const char *kvm_exit_trace; -const char *kvm_events_tp[] = { +#define NR_TPS 2 + +static const char *kvm_events_tp_v1[NR_TPS + 1] = { "kvm:kvm_entry", "kvm:kvm_exit", NULL, }; +static const char *kvm_events_tp_v2[NR_TPS + 1] = { + "kvm:kvm_entry_v2", + "kvm:kvm_exit_v2", + NULL, +}; + +const char *kvm_events_tp[NR_TPS + 1]; + static void event_get_key(struct evsel *evsel, struct perf_sample *sample, struct event_key *key) @@ -78,8 +89,41 @@ const char * const kvm_skip_events[] = { NULL, }; -int cpu_isa_init(struct perf_kvm_stat *kvm, const char *cpuid __maybe_unused) +static int arm64__setup_kvm_tp(struct perf_kvm_stat *kvm) { + const char **kvm_events, **events_ptr; + int i, nr_tp = 0; + + if (is_valid_tracepoint("kvm:kvm_entry_v2")) { + kvm_events = kvm_events_tp_v2; + kvm_entry_trace = "kvm:kvm_entry_v2"; + kvm_exit_trace = "kvm:kvm_exit_v2"; + } else { + kvm_events = kvm_events_tp_v1; + kvm_entry_trace = "kvm:kvm_entry"; + kvm_exit_trace = "kvm:kvm_exit"; + } + + for (events_ptr = kvm_events; *events_ptr; events_ptr++) { + if (!is_valid_tracepoint(*events_ptr)) + return -1; + nr_tp++; + } + + for (i = 0; i < nr_tp; i++) + kvm_events_tp[i] = kvm_events[i]; + kvm_events_tp[i] = NULL; + kvm->exit_reasons_isa = "arm64"; return 0; } + +int setup_kvm_events_tp(struct perf_kvm_stat *kvm) +{ + return arm64__setup_kvm_tp(kvm); +} + +int cpu_isa_init(struct perf_kvm_stat *kvm, const char *cpuid __maybe_unused) +{ + return arm64__setup_kvm_tp(kvm); +}