From patchwork Wed Nov 9 00:24:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 13036991 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AF7D3C4332F for ; Wed, 9 Nov 2022 00:26:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=4ejxBJ/v9DpnifRxN+RA1qNFB4bDpj/58MgwnstGtAE=; b=x3nWaV1OvGSC3y lD3CoX7nRJa2H2UVEmySx8Tgae49Tn3Uu6O2RfZZc7Iq+sBH+KiygUL3J9aBJjWxDSCOO0/aNMzxv 4n94SNOywyjcPI9k/7kjoC22diJIL/uWeHzGm3A0E+gvB2JPbwsBXImLK5RE7JK9McKMC+rxFu9SC 3X/k8dDT3nlpRorqdbZAHlWmRs2QVVSB7y45AM4Zv0to5pTreZxXUq23HBXTe8Bfs0Z33qWVh+1jg dIEsrHcsJJf6s9XHUgBMwvHCiIn4nZVnD6oRQX4P4WXkSG6oM/6COdYlOVHWUaEO0UGkdZ2ww6ias ao2urTmoFqTjkDnYyycA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1osYuH-009OWb-2Y; Wed, 09 Nov 2022 00:25:29 +0000 Received: from phobos.denx.de ([85.214.62.61]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1osYtz-009ORq-9c for linux-arm-kernel@lists.infradead.org; Wed, 09 Nov 2022 00:25:13 +0000 Received: from tr.lan (ip-86-49-120-218.bb.vodafone.cz [86.49.120.218]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: marex@denx.de) by phobos.denx.de (Postfix) with ESMTPSA id 51EC581F4E; Wed, 9 Nov 2022 01:25:06 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1667953506; bh=ZV95BSPcVTsW2iFwCJUUR0/M7YCxElOvlzOdZ1PDxRU=; h=From:To:Cc:Subject:Date:From; b=GrAPqOumLU7w6KesCNVRx+m3PcSZXlH7pdRdeb7uqqbZsizieMY42XQHzvffGfVmm h4d0+QSBozh1wPcTSLTySB/F73Tq6y5L75sw47Jo+unouFmOpvr2b4gDo45uWA+H3b msgEnAyuGpKP5Oa2GUh2BzzETYJcbFHapAczIVduV+jQ5orL9CAY+QPhrcbz0L6FHk Q9INyvCSQd8GGOCVBh1f0RNaCyYyvOcy2MgO+8XFIjKba7q4kmP5zEnxJWKe9bx8VI BkQ/X7eYl62tWCHpikc82y4xr5jCcmiDU7dJPBDcvw3Mh1gLst/gdKapAAvLLyCdTg ZGQcIlx8xnFIw== From: Marek Vasut To: devicetree@vger.kernel.org Cc: Marek Vasut , Alexander Stein , Fabio Estevam , Krzysztof Kozlowski , Lucas Stach , Richard Zhu , Rob Herring , Shawn Guo , linux-arm-kernel@lists.infradead.org, NXP Linux Team Subject: [PATCH v5 1/3] dt-bindings: imx6q-pcie: Handle various clock configurations Date: Wed, 9 Nov 2022 01:24:47 +0100 Message-Id: <20221109002449.35936-1-marex@denx.de> X-Mailer: git-send-email 2.35.1 MIME-Version: 1.0 X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221108_162511_662125_0E1FB192 X-CRM114-Status: GOOD ( 13.62 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The i.MX SoCs have various clock configurations routed into the PCIe IP, the list of clock is below. Document all those configurations in the DT binding document. All SoCs: pcie, pcie_bus 6QDL, 7D: + pcie_phy 6SX: + pcie_phy pcie_inbound_axi 8MQ: + pcie_phy pcie_aux 8MM, 8MP: + pcie_aux Acked-by: Alexander Stein Signed-off-by: Marek Vasut Reviewed-by: Rob Herring --- Cc: Fabio Estevam Cc: Krzysztof Kozlowski Cc: Lucas Stach Cc: Richard Zhu Cc: Rob Herring Cc: Shawn Guo Cc: linux-arm-kernel@lists.infradead.org Cc: NXP Linux Team To: devicetree@vger.kernel.org --- V2: - Add AB from Alex V3: - Duplicate clock-names maxItems to mx6sx and mx8mq compatibles - Flatten the if-else structure - The validation no longer works and introduces errors like these: arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dahlia.dtb: pcie@33800000: clock-names:2: 'pcie_phy' was expected V4: - Reinstate minItems: for clock-names in main section, turn the last two clock-names items into enums to cover all IP variants. - Add another allOf entry for mx6q/mx6qp/mx7d clock-names list. - Adjust clock maxItems in the allOf section. V5: - No change --- .../bindings/pci/fsl,imx6q-pcie.yaml | 73 +++++++++++++++++-- 1 file changed, 68 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml index 376e739bcad40..2df73be0ffbea 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml @@ -14,9 +14,6 @@ description: |+ This PCIe host controller is based on the Synopsys DesignWare PCIe IP and thus inherits all the common properties defined in snps,dw-pcie.yaml. -allOf: - - $ref: /schemas/pci/snps,dw-pcie.yaml# - properties: compatible: enum: @@ -60,8 +57,8 @@ properties: items: - const: pcie - const: pcie_bus - - const: pcie_phy - - const: pcie_inbound_axi for imx6sx-pcie, pcie_aux for imx8mq-pcie + - enum: [ pcie_phy, pcie_aux ] + - enum: [ pcie_aux, pcie_inbound_axi ] num-lanes: const: 1 @@ -177,6 +174,72 @@ required: unevaluatedProperties: false +allOf: + - $ref: /schemas/pci/snps,dw-pcie.yaml# + + - if: + properties: + compatible: + contains: + enum: + - fsl,imx6q-pcie + - fsl,imx6qp-pcie + - fsl,imx7d-pcie + then: + properties: + clocks: + maxItems: 3 + clock-names: + items: + - const: pcie + - const: pcie_bus + - const: pcie_phy + + - if: + properties: + compatible: + contains: + const: fsl,imx6sx-pcie + then: + properties: + clock-names: + items: + - const: pcie + - const: pcie_bus + - const: pcie_phy + - const: pcie_inbound_axi + + - if: + properties: + compatible: + contains: + const: fsl,imx8mq-pcie + then: + properties: + clock-names: + items: + - const: pcie + - const: pcie_bus + - const: pcie_phy + - const: pcie_aux + + - if: + properties: + compatible: + contains: + enum: + - fsl,imx8mm-pcie + - fsl,imx8mp-pcie + then: + properties: + clocks: + maxItems: 3 + clock-names: + items: + - const: pcie + - const: pcie_bus + - const: pcie_aux + examples: - | #include From patchwork Wed Nov 9 00:24:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 13036989 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CED96C4332F for ; Wed, 9 Nov 2022 00:26:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Sb4UNNqBwFnGbc//yg7HDwQIZDcEUcJfO62nm6qMhs8=; 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Wed, 9 Nov 2022 01:25:06 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1667953507; bh=4wMjYp7bVpBOoU+DcIkJJXPh5+Jl47yQYn92CLwQGV0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=phPORB+AU/3LslyAN/faXXZCyLlr8sV/cJoxtR25NxADuMx2MpKNj+jfpSi9U5wDJ 2XR290t6bbqq6DKisz0vtjFQTqGm/AmeTWXNGwX4EYZTIj6/gmLJh1D1hxJNhY7Nlr 6lUjMCmnIGJ7odw2uX0yQYZMly+3pBRQbWthF+LmB8aGt6HIQxD2jlkkRyiWtsurhv GNT5zxNOxBU7udCs04wUeo63zLfDMLsiVDYntZSbTrptQtizIdtAqIojjt5GhjmjGg Ak/fwlsT7DLS6mzvAio2o5GxcwHomSFeXZnNIpqHjjoLDTQY39UvpOB6g9o4EVWHXg 9zVlKPu/VTdJA== From: Marek Vasut To: devicetree@vger.kernel.org Cc: Marek Vasut , Krzysztof Kozlowski , Fabio Estevam , Krzysztof Kozlowski , Lucas Stach , Richard Zhu , Rob Herring , Shawn Guo , linux-arm-kernel@lists.infradead.org, NXP Linux Team Subject: [PATCH v5 2/3] dt-bindings: imx6q-pcie: Handle various PD configurations Date: Wed, 9 Nov 2022 01:24:48 +0100 Message-Id: <20221109002449.35936-2-marex@denx.de> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221109002449.35936-1-marex@denx.de> References: <20221109002449.35936-1-marex@denx.de> MIME-Version: 1.0 X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221108_162508_805626_959AB6A4 X-CRM114-Status: GOOD ( 12.62 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The i.MX SoCs have various power domain configurations routed into the PCIe IP. MX6SX is the only one which contains 2 domains and also uses power-domain-names. MX6QDL do not use any domains. All the rest uses one domain and does not use power-domain-names anymore. Document all those configurations in the DT binding document. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Marek Vasut --- Cc: Fabio Estevam Cc: Krzysztof Kozlowski Cc: Lucas Stach Cc: Richard Zhu Cc: Rob Herring Cc: Shawn Guo Cc: linux-arm-kernel@lists.infradead.org Cc: NXP Linux Team To: devicetree@vger.kernel.org --- V2: - Keep the power-domains description in the main section V3: - Move power-domains back where they were originally (fixes V2) - Do not use else: in allOf section V4: - Special-case MX6Q and MX6QP in allOf section since they dont use PDs - Drop minItems: from power-domains main section - Handle anything which is not MX6SX,MX6Q,MX6QP as having one PD V5: - Add RB from Krzysztof --- .../bindings/pci/fsl,imx6q-pcie.yaml | 43 +++++++++++++++++++ 1 file changed, 43 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml index 2df73be0ffbea..b14c12a47cc1c 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml @@ -69,6 +69,7 @@ properties: required properties for imx7d-pcie and imx8mq-pcie. power-domains: + minItems: 1 items: - description: The phandle pointing to the DISPLAY domain for imx6sx-pcie, to PCIE_PHY power domain for imx7d-pcie and @@ -77,6 +78,7 @@ properties: for imx6sx-pcie. power-domain-names: + minItems: 1 items: - const: pcie - const: pcie_phy @@ -240,6 +242,47 @@ allOf: - const: pcie_bus - const: pcie_aux + - if: + properties: + compatible: + contains: + const: fsl,imx6sx-pcie + then: + properties: + power-domains: + minItems: 2 + maxItems: 2 + power-domain-names: + minItems: 2 + maxItems: 2 + + - if: + properties: + compatible: + contains: + enum: + - fsl,imx6q-pcie + - fsl,imx6qp-pcie + then: + properties: + power-domains: false + power-domain-names: false + + - if: + not: + properties: + compatible: + contains: + enum: + - fsl,imx6sx-pcie + - fsl,imx6q-pcie + - fsl,imx6qp-pcie + then: + properties: + power-domains: + maxItems: 1 + power-domain-names: false + examples: - | #include From patchwork Wed Nov 9 00:24:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 13036990 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 58EA0C4332F for ; Wed, 9 Nov 2022 00:26:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Zf4XiFt3cwbxINUVvgaZCEheG9OyQCNqnxiHZ0Ee8Sk=; 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Wed, 9 Nov 2022 01:25:07 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1667953507; bh=arF2B5xrX7p9DkE0BfZr5UJuQ7U3WT2ORvkKxa69bi4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=aT9JlYwiM9RPP0ioij6bU53Knb/mvkSB3OZmPQEwmQH4yJv6bpip5E0sWyL/BVSku wI7vdME9nxXMU/v+SqxNORXbDR3qp8leNL+b8LR+H3/oNcFgudg5Xcy4ZAhFEQ55Nn K/9L/igUYcbO6ci0dGs0SHWjOGL8lNC+6/FSsT2JhqduCSI6gmSoH0eQc9SU/kQ48n tEu/aptwUDGmlsPCDmtJUJMDBcc4gTwnfMdgytYGa6wfdf1XSuYFUDfLFltaN6VffA YNL8JCk+kFhmmgIaKh+36KL9FYYov7yb9DuXIZeOTUENXrFCkZ+V1pAKtHyfqq79SO 3+vPp7dV3vK0w== From: Marek Vasut To: devicetree@vger.kernel.org Cc: Marek Vasut , Fabio Estevam , Krzysztof Kozlowski , Lucas Stach , Richard Zhu , Rob Herring , Shawn Guo , linux-arm-kernel@lists.infradead.org, NXP Linux Team Subject: [PATCH v5 3/3] dt-bindings: imx6q-pcie: Handle more resets on legacy platforms Date: Wed, 9 Nov 2022 01:24:49 +0100 Message-Id: <20221109002449.35936-3-marex@denx.de> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221109002449.35936-1-marex@denx.de> References: <20221109002449.35936-1-marex@denx.de> MIME-Version: 1.0 X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221108_162511_660970_187EE40A X-CRM114-Status: GOOD ( 11.04 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The i.MX6 and i.MX7D does not use block controller to toggle PCIe reset, hence the PCIe DT description contains three reset entries on these older SoCs. Add this exception into the binding document. Signed-off-by: Marek Vasut Reviewed-by: Krzysztof Kozlowski --- Cc: Fabio Estevam Cc: Krzysztof Kozlowski Cc: Lucas Stach Cc: Richard Zhu Cc: Rob Herring Cc: Shawn Guo Cc: linux-arm-kernel@lists.infradead.org Cc: NXP Linux Team To: devicetree@vger.kernel.org --- V2: - Add mx8mq to 3-reset PCIe core variant - Handle the resets in allOf section V3: - Reinstate reset: maxItems:3 and add minItems:2 - Move reset-names back to main section - The validation no longer works and introduces errors like these: arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dahlia.dtb: pcie@33800000: reset-names:0: 'pciephy' was expected V4: - Reinstate reset minItems and maxItems - Turn the first two reset-names items into enums to cover all the various name combinations, sort the rest in allOf section V5: - Drop items from main section reset-names and add maxItems:3 --- .../bindings/pci/fsl,imx6q-pcie.yaml | 35 ++++++++++++++++--- 1 file changed, 31 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml index b14c12a47cc1c..b6c2c87d00712 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml @@ -84,15 +84,14 @@ properties: - const: pcie_phy resets: + minItems: 2 maxItems: 3 description: Phandles to PCIe-related reset lines exposed by SRC IP block. Additional required by imx7d-pcie and imx8mq-pcie. reset-names: - items: - - const: pciephy - - const: apps - - const: turnoff + minItems: 2 + maxItems: 3 fsl,tx-deemph-gen1: description: Gen1 De-emphasis value (optional required). @@ -283,6 +282,34 @@ allOf: maxItems: 1 power-domain-names: false + - if: + properties: + compatible: + contains: + enum: + - fsl,imx6q-pcie + - fsl,imx6sx-pcie + - fsl,imx6qp-pcie + - fsl,imx7d-pcie + - fsl,imx8mq-pcie + then: + properties: + resets: + minItems: 3 + reset-names: + items: + - const: pciephy + - const: apps + - const: turnoff + else: + properties: + resets: + maxItems: 2 + reset-names: + items: + - const: apps + - const: turnoff + examples: - | #include