From patchwork Wed Nov 9 23:09:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jacob Keller X-Patchwork-Id: 13038139 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 54121C433FE for ; Wed, 9 Nov 2022 23:09:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231738AbiKIXJ4 (ORCPT ); Wed, 9 Nov 2022 18:09:56 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59010 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229691AbiKIXJz (ORCPT ); Wed, 9 Nov 2022 18:09:55 -0500 Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C5AEB20998 for ; Wed, 9 Nov 2022 15:09:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1668035394; x=1699571394; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=bEfO6W0k1pOqr2DtdVzP6JGSnzhsSppcSCRhqDDTqdk=; b=aiig2M/l7M7S5VNB24pBVqdj2mfIhO8AEJqI1sbE8ApDdEvnUXeFQYNi L+pZNYL9sUlzmI1kvU1Nd+b/Yd/0woQpqcDHYh1KNnGWzBiQqg6Ago3QV Uod2XHDeaEFNcQ3XmCfBNveQF93nZYmoj5TdDQdRa43EKGO/1WP697zJP WBAz1PqpHwlTHhsXtWZdaPmBUJORNQYTcgHanaYlqgTf1/jFxog75Fddc XQxOi2/HG56ue/lRYigIvuKMDmnR7kPRh4DLCk6v02ursP67wuutT1NW6 WJrsmGJ7MB4i/UEmjmf6Ih6INm8ELW2INGR8CB3OoRx3+9++aXriZIICE A==; X-IronPort-AV: E=McAfee;i="6500,9779,10526"; a="309860520" X-IronPort-AV: E=Sophos;i="5.96,152,1665471600"; d="scan'208";a="309860520" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Nov 2022 15:09:53 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10526"; a="636930542" X-IronPort-AV: E=Sophos;i="5.96,152,1665471600"; d="scan'208";a="636930542" Received: from jekeller-desk.amr.corp.intel.com (HELO jekeller-desk.jekeller.internal) ([10.166.241.7]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Nov 2022 15:09:53 -0800 From: Jacob Keller To: netdev@vger.kernel.org, Jakub Kicinski Cc: Richard Cochran , Jacob Keller Subject: [PATCH net-next 1/9] ptp_phc: convert .adjfreq to .adjfine Date: Wed, 9 Nov 2022 15:09:37 -0800 Message-Id: <20221109230945.545440-2-jacob.e.keller@intel.com> X-Mailer: git-send-email 2.38.0.83.gd420dda05763 In-Reply-To: <20221109230945.545440-1-jacob.e.keller@intel.com> References: <20221109230945.545440-1-jacob.e.keller@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org The ptp_phc implementation of .adjfreq is implemented in terms of a straight forward "base * ppb / 1 billion" calculation. Convert this to the newer .adjfine, updating the driver to use the recently introduced adjust_by_scaled_ppm helper function. Signed-off-by: Jacob Keller Cc: Richard Cochran --- drivers/ptp/ptp_pch.c | 19 ++++--------------- 1 file changed, 4 insertions(+), 15 deletions(-) diff --git a/drivers/ptp/ptp_pch.c b/drivers/ptp/ptp_pch.c index 7d4da9e605ef..33355d5eb033 100644 --- a/drivers/ptp/ptp_pch.c +++ b/drivers/ptp/ptp_pch.c @@ -336,24 +336,13 @@ static irqreturn_t isr(int irq, void *priv) * PTP clock operations */ -static int ptp_pch_adjfreq(struct ptp_clock_info *ptp, s32 ppb) +static int ptp_pch_adjfine(struct ptp_clock_info *ptp, long scaled_ppm) { - u64 adj; - u32 diff, addend; - int neg_adj = 0; + u32 addend; struct pch_dev *pch_dev = container_of(ptp, struct pch_dev, caps); struct pch_ts_regs __iomem *regs = pch_dev->regs; - if (ppb < 0) { - neg_adj = 1; - ppb = -ppb; - } - addend = DEFAULT_ADDEND; - adj = addend; - adj *= ppb; - diff = div_u64(adj, 1000000000ULL); - - addend = neg_adj ? addend - diff : addend + diff; + addend = adjust_by_scaled_ppm(DEFAULT_ADDEND, scaled_ppm); iowrite32(addend, ®s->addend); @@ -440,7 +429,7 @@ static const struct ptp_clock_info ptp_pch_caps = { .n_ext_ts = N_EXT_TS, .n_pins = 0, .pps = 0, - .adjfreq = ptp_pch_adjfreq, + .adjfine = ptp_pch_adjfine, .adjtime = ptp_pch_adjtime, .gettime64 = ptp_pch_gettime, .settime64 = ptp_pch_settime, From patchwork Wed Nov 9 23:09:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jacob Keller X-Patchwork-Id: 13038140 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BB6F6C43217 for ; Wed, 9 Nov 2022 23:09:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231557AbiKIXJ5 (ORCPT ); Wed, 9 Nov 2022 18:09:57 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59018 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229865AbiKIXJz (ORCPT ); Wed, 9 Nov 2022 18:09:55 -0500 Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2106A27DC5 for ; Wed, 9 Nov 2022 15:09:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1668035395; x=1699571395; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=9r9FjA5Ub+cE4J7eTCanTKKrZF/QPKEs9ZaBi/BDjRw=; b=XfRCET+QIXruJyx9tu7FlTHndOrgHGt2unj3P5kXBy4gL7xmUkxH/Yxp IbKBHb0ueCPxMP0OtiYmI/YZ/fxgQU8/c6T6JCB6mlcED+GBGRf9ulo3a AE6dU72GhWfvykQgLmRlTUBWpLsOheE8GRmkrB+yL6eKd7qcT+/TikOji SH9MpTH3aiE5unlLrsmydfg9CotmfpieOhPdmYpQh3pMb08wVLM8sCaq7 6ThPhRRkrImQR5BS3DkOWAw1ZVVIfOMY6Snxvn/2bYIO7f9c6LnKOyOIb YowwRV++x1MgpLvZtsILPogo0Hjm5rQvUG3gGojHv4/bx5ByW2EmtagME A==; X-IronPort-AV: E=McAfee;i="6500,9779,10526"; a="309860522" X-IronPort-AV: E=Sophos;i="5.96,152,1665471600"; d="scan'208";a="309860522" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Nov 2022 15:09:54 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10526"; a="636930545" X-IronPort-AV: E=Sophos;i="5.96,152,1665471600"; d="scan'208";a="636930545" Received: from jekeller-desk.amr.corp.intel.com (HELO jekeller-desk.jekeller.internal) ([10.166.241.7]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Nov 2022 15:09:53 -0800 From: Jacob Keller To: netdev@vger.kernel.org, Jakub Kicinski Cc: Richard Cochran , Jacob Keller , Paolo Abeni , Linus Walleij Subject: [PATCH net-next 2/9] ptp_ixp46x: convert .adjfreq to .adjfine Date: Wed, 9 Nov 2022 15:09:38 -0800 Message-Id: <20221109230945.545440-3-jacob.e.keller@intel.com> X-Mailer: git-send-email 2.38.0.83.gd420dda05763 In-Reply-To: <20221109230945.545440-1-jacob.e.keller@intel.com> References: <20221109230945.545440-1-jacob.e.keller@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org The ptp_ixp46x implementation of .adjfreq is implemented in terms of a straight forward "base * ppb / 1 billion" calculation. Convert this to the newer .adjfine, using the recently added adjust_by_scaled_ppm helper function. Signed-off-by: Jacob Keller Cc: Paolo Abeni Cc: Richard Cochran Cc: Linus Walleij Reviewed-by: Linus Walleij --- drivers/net/ethernet/xscale/ptp_ixp46x.c | 19 ++++--------------- 1 file changed, 4 insertions(+), 15 deletions(-) diff --git a/drivers/net/ethernet/xscale/ptp_ixp46x.c b/drivers/net/ethernet/xscale/ptp_ixp46x.c index 9abbdb71e629..94203eb46e6b 100644 --- a/drivers/net/ethernet/xscale/ptp_ixp46x.c +++ b/drivers/net/ethernet/xscale/ptp_ixp46x.c @@ -120,24 +120,13 @@ static irqreturn_t isr(int irq, void *priv) * PTP clock operations */ -static int ptp_ixp_adjfreq(struct ptp_clock_info *ptp, s32 ppb) +static int ptp_ixp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm) { - u64 adj; - u32 diff, addend; - int neg_adj = 0; + u32 addend; struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps); struct ixp46x_ts_regs *regs = ixp_clock->regs; - if (ppb < 0) { - neg_adj = 1; - ppb = -ppb; - } - addend = DEFAULT_ADDEND; - adj = addend; - adj *= ppb; - diff = div_u64(adj, 1000000000ULL); - - addend = neg_adj ? addend - diff : addend + diff; + addend = adjust_by_scaled_ppm(DEFAULT_ADDEND, scaled_ppm); __raw_writel(addend, ®s->addend); @@ -230,7 +219,7 @@ static const struct ptp_clock_info ptp_ixp_caps = { .n_ext_ts = N_EXT_TS, .n_pins = 0, .pps = 0, - .adjfreq = ptp_ixp_adjfreq, + .adjfine = ptp_ixp_adjfine, .adjtime = ptp_ixp_adjtime, .gettime64 = ptp_ixp_gettime, .settime64 = ptp_ixp_settime, From patchwork Wed Nov 9 23:09:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jacob Keller X-Patchwork-Id: 13038143 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AEFE2C433FE for ; Wed, 9 Nov 2022 23:10:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231799AbiKIXKF (ORCPT ); Wed, 9 Nov 2022 18:10:05 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59028 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231497AbiKIXJz (ORCPT ); Wed, 9 Nov 2022 18:09:55 -0500 Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5D5A8647D for ; Wed, 9 Nov 2022 15:09:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1668035395; x=1699571395; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=z78p2vv+3X5SoWl+Nu5vNhZJ4qt7rft+H5qonFEKf/k=; b=WLkZnmsL1cBfJGgQOPO4THw5g3a22LtGR8+8T3kVza5ZgRtcAChFxTR1 IG7vPm3triH6NzjbjIw/GdHalGiwxrqB3CwkLgEaRvOa5fWevB82irqJn rmc631drctiag/u5AOn/ik0FYGFpwjHd+D3Esl76gXcmG5gKvFtbom/1u P+6kgMTRROTh3XrWVymdP3PnhY5ojjjkv59kUQ6/mQuMxgni/22XW+UQX e/9z1MQ1jISSs7C7DfXASntq0B96CC0R3Wowue+NKqgC35ZWOE11w9X8x TprSW9O30B5mUYn0ad3x62kLvXwcVUinDNzPJkbZJEmCoBJ89AVSMDjqk Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10526"; a="309860525" X-IronPort-AV: E=Sophos;i="5.96,152,1665471600"; d="scan'208";a="309860525" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Nov 2022 15:09:54 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10526"; a="636930548" X-IronPort-AV: E=Sophos;i="5.96,152,1665471600"; d="scan'208";a="636930548" Received: from jekeller-desk.amr.corp.intel.com (HELO jekeller-desk.jekeller.internal) ([10.166.241.7]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Nov 2022 15:09:53 -0800 From: Jacob Keller To: netdev@vger.kernel.org, Jakub Kicinski Cc: Richard Cochran , Jacob Keller , Siva Reddy Kallam , Prashant Sreedharan , Michael Chan Subject: [PATCH net-next 3/9] ptp: tg3: convert .adjfreq to .adjfine Date: Wed, 9 Nov 2022 15:09:39 -0800 Message-Id: <20221109230945.545440-4-jacob.e.keller@intel.com> X-Mailer: git-send-email 2.38.0.83.gd420dda05763 In-Reply-To: <20221109230945.545440-1-jacob.e.keller@intel.com> References: <20221109230945.545440-1-jacob.e.keller@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org The tg3 implementation of .adjfreq is implemented in terms of a straight forward "base * ppb / 1 billion" calculation. Convert this to the newer .adjfine, using the recently added diff_by_scaled_ppm helper function to calculate the difference and direction of the adjustment. Signed-off-by: Jacob Keller Cc: Siva Reddy Kallam Cc: Prashant Sreedharan Cc: Michael Chan Cc: Richard Cochran Reviewed-by: Pavan Chebbi --- drivers/net/ethernet/broadcom/tg3.c | 22 +++++++--------------- 1 file changed, 7 insertions(+), 15 deletions(-) diff --git a/drivers/net/ethernet/broadcom/tg3.c b/drivers/net/ethernet/broadcom/tg3.c index 4179a12fc881..59debdc344a5 100644 --- a/drivers/net/ethernet/broadcom/tg3.c +++ b/drivers/net/ethernet/broadcom/tg3.c @@ -6179,34 +6179,26 @@ static int tg3_get_ts_info(struct net_device *dev, struct ethtool_ts_info *info) return 0; } -static int tg3_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb) +static int tg3_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm) { struct tg3 *tp = container_of(ptp, struct tg3, ptp_info); - bool neg_adj = false; - u32 correction = 0; - - if (ppb < 0) { - neg_adj = true; - ppb = -ppb; - } + u64 correction; + bool neg_adj; /* Frequency adjustment is performed using hardware with a 24 bit * accumulator and a programmable correction value. On each clk, the * correction value gets added to the accumulator and when it * overflows, the time counter is incremented/decremented. - * - * So conversion from ppb to correction value is - * ppb * (1 << 24) / 1000000000 */ - correction = div_u64((u64)ppb * (1 << 24), 1000000000ULL) & - TG3_EAV_REF_CLK_CORRECT_MASK; + neg_adj = diff_by_scaled_ppm(1 << 24, scaled_ppm, &correction); tg3_full_lock(tp, 0); if (correction) tw32(TG3_EAV_REF_CLK_CORRECT_CTL, TG3_EAV_REF_CLK_CORRECT_EN | - (neg_adj ? TG3_EAV_REF_CLK_CORRECT_NEG : 0) | correction); + (neg_adj ? TG3_EAV_REF_CLK_CORRECT_NEG : 0) | + ((u32)correction & TG3_EAV_REF_CLK_CORRECT_MASK)); else tw32(TG3_EAV_REF_CLK_CORRECT_CTL, 0); @@ -6330,7 +6322,7 @@ static const struct ptp_clock_info tg3_ptp_caps = { .n_per_out = 1, .n_pins = 0, .pps = 0, - .adjfreq = tg3_ptp_adjfreq, + .adjfine = tg3_ptp_adjfine, .adjtime = tg3_ptp_adjtime, .gettimex64 = tg3_ptp_gettimex, .settime64 = tg3_ptp_settime, From patchwork Wed Nov 9 23:09:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jacob Keller X-Patchwork-Id: 13038142 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 322CEC4332F for ; Wed, 9 Nov 2022 23:10:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231940AbiKIXKB (ORCPT ); Wed, 9 Nov 2022 18:10:01 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59034 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231726AbiKIXJ4 (ORCPT ); Wed, 9 Nov 2022 18:09:56 -0500 Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BD05420998 for ; Wed, 9 Nov 2022 15:09:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1668035395; x=1699571395; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=HhyuWp1djKhF0l+MG8SdU38rTCjQAo5qeR0UCV5QgQM=; b=dVW2g496DQCP7YGuCE8HYp2bxYVhy1OV+Wij5mcIGU3T/NH+Sl+MD5Di y2BUgBdehVbRZrhRGWzQ3qdDSd6zr5RngYe5XOeYKtq6Y/8fawSIpp+Mo vUzpcEV0LGqvar1fbCBNZyy04tAyeNw7RB7P7cBawG+oIlwe/0oyv2etv F3aFSvY6WZ2XM7EqetHdI1tyUoGMW/KV/uQBBob6KKDAY5NQFL8BrZ+gI EnTTjj7CUFFtVZns6w9jgvY7z6Op8RMltNuptpnTJoNURbJSvy8jK3zlG mrbllRS8qH0pcCGlZ9QuTwxaLf1jtJzeMpUQ+9bnSpFPKBKjl2Rt4JhdO w==; X-IronPort-AV: E=McAfee;i="6500,9779,10526"; a="309860526" X-IronPort-AV: E=Sophos;i="5.96,152,1665471600"; d="scan'208";a="309860526" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Nov 2022 15:09:54 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10526"; a="636930551" X-IronPort-AV: E=Sophos;i="5.96,152,1665471600"; d="scan'208";a="636930551" Received: from jekeller-desk.amr.corp.intel.com (HELO jekeller-desk.jekeller.internal) ([10.166.241.7]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Nov 2022 15:09:53 -0800 From: Jacob Keller To: netdev@vger.kernel.org, Jakub Kicinski Cc: Richard Cochran , Jacob Keller , Yisen Zhuang , Salil Mehta Subject: [PATCH net-next 4/9] ptp: hclge: convert .adjfreq to .adjfine Date: Wed, 9 Nov 2022 15:09:40 -0800 Message-Id: <20221109230945.545440-5-jacob.e.keller@intel.com> X-Mailer: git-send-email 2.38.0.83.gd420dda05763 In-Reply-To: <20221109230945.545440-1-jacob.e.keller@intel.com> References: <20221109230945.545440-1-jacob.e.keller@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org The hclge implementation of .adjfreq is implemented in terms of a straight forward "base * ppb / 1 billion" calculation. Convert this to the newer .adjfine, using the recently added adjust_by_scaled_ppm helper function. Signed-off-by: Jacob Keller Cc: Yisen Zhuang Cc: Salil Mehta Cc: Richard Cochran --- .../hisilicon/hns3/hns3pf/hclge_ptp.c | 22 +++++-------------- 1 file changed, 5 insertions(+), 17 deletions(-) diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c index a40b1583f114..80a2a0073d97 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c @@ -22,28 +22,16 @@ static int hclge_ptp_get_cycle(struct hclge_dev *hdev) return 0; } -static int hclge_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb) +static int hclge_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm) { struct hclge_dev *hdev = hclge_ptp_get_hdev(ptp); struct hclge_ptp_cycle *cycle = &hdev->ptp->cycle; - u64 adj_val, adj_base, diff; + u64 adj_val, adj_base; unsigned long flags; - bool is_neg = false; u32 quo, numerator; - if (ppb < 0) { - ppb = -ppb; - is_neg = true; - } - adj_base = (u64)cycle->quo * (u64)cycle->den + (u64)cycle->numer; - adj_val = adj_base * ppb; - diff = div_u64(adj_val, 1000000000ULL); - - if (is_neg) - adj_val = adj_base - diff; - else - adj_val = adj_base + diff; + adj_val = adjust_by_scaled_ppm(adj_base, scaled_ppm); /* This clock cycle is defined by three part: quotient, numerator * and denominator. For example, 2.5ns, the quotient is 2, @@ -446,7 +434,7 @@ static int hclge_ptp_create_clock(struct hclge_dev *hdev) ptp->info.max_adj = HCLGE_PTP_CYCLE_ADJ_MAX; ptp->info.n_ext_ts = 0; ptp->info.pps = 0; - ptp->info.adjfreq = hclge_ptp_adjfreq; + ptp->info.adjfine = hclge_ptp_adjfine; ptp->info.adjtime = hclge_ptp_adjtime; ptp->info.gettimex64 = hclge_ptp_gettimex; ptp->info.settime64 = hclge_ptp_settime; @@ -504,7 +492,7 @@ int hclge_ptp_init(struct hclge_dev *hdev) goto out; set_bit(HCLGE_PTP_FLAG_EN, &hdev->ptp->flags); - ret = hclge_ptp_adjfreq(&hdev->ptp->info, 0); + ret = hclge_ptp_adjfine(&hdev->ptp->info, 0); if (ret) { dev_err(&hdev->pdev->dev, "failed to init freq, ret = %d\n", ret); From patchwork Wed Nov 9 23:09:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jacob Keller X-Patchwork-Id: 13038146 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4F14EC433FE for ; Wed, 9 Nov 2022 23:10:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232009AbiKIXKK (ORCPT ); Wed, 9 Nov 2022 18:10:10 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59046 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231837AbiKIXJ5 (ORCPT ); Wed, 9 Nov 2022 18:09:57 -0500 Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5409127DC5 for ; Wed, 9 Nov 2022 15:09:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1668035396; x=1699571396; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=TvYOrX5BR9uxLa7XLgkQZK+kzapPn5V5RZeEjslel8U=; b=l9xKcEgzmMkGUF3qT4qB641sys9+BZOYFtopZHkmKXaOAxk0LxQ4cm7F O/0XI/9cSrP4VcCPEW5cGQpXMGWXG5MXCEDILBGBjwGghRP/n4JqPgAF9 9h1sogwLFRIR52whRw7v7/5A2MNuLWQXySkTh9B7turwTL/0U3sKY1RMC 45UZ7xuj7VBiegeSH+W6aeh16fngPuXllhe5MuLHNDf/NrvYeGErMGz2g Sx6a46H6ufensorlzV5/3f6LT9LdNLiIVu51w8bkxXf9Xref2CnV2M+Nc qJSvbO3k1iL6FJ+bsiu/9YwDwB66cWdseAJ1q4npYefN5YbnaNt37aCGN w==; X-IronPort-AV: E=McAfee;i="6500,9779,10526"; a="309860528" X-IronPort-AV: E=Sophos;i="5.96,152,1665471600"; d="scan'208";a="309860528" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Nov 2022 15:09:54 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10526"; a="636930554" X-IronPort-AV: E=Sophos;i="5.96,152,1665471600"; d="scan'208";a="636930554" Received: from jekeller-desk.amr.corp.intel.com (HELO jekeller-desk.jekeller.internal) ([10.166.241.7]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Nov 2022 15:09:53 -0800 From: Jacob Keller To: netdev@vger.kernel.org, Jakub Kicinski Cc: Richard Cochran , Jacob Keller , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu Subject: [PATCH net-next 5/9] ptp: stmac: convert .adjfreq to .adjfine Date: Wed, 9 Nov 2022 15:09:41 -0800 Message-Id: <20221109230945.545440-6-jacob.e.keller@intel.com> X-Mailer: git-send-email 2.38.0.83.gd420dda05763 In-Reply-To: <20221109230945.545440-1-jacob.e.keller@intel.com> References: <20221109230945.545440-1-jacob.e.keller@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org The stmac implementation of .adjfreq is implemented in terms of a straight forward "base * ppb / 1 billion" calculation. Convert this to the newer .adjfine, using the recently added adjust_by_scaled_ppm helper function. Signed-off-by: Jacob Keller Cc: Giuseppe Cavallaro Cc: Alexandre Torgue Cc: Jose Abreu Cc: Richard Cochran --- .../net/ethernet/stmicro/stmmac/stmmac_ptp.c | 23 ++++++------------- 1 file changed, 7 insertions(+), 16 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c index 4d11980dcd64..fc06ddeac0d5 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c @@ -15,29 +15,20 @@ * stmmac_adjust_freq * * @ptp: pointer to ptp_clock_info structure - * @ppb: desired period change in parts ber billion + * @scaled_ppm: desired period change in scaled parts per million * * Description: this function will adjust the frequency of hardware clock. + * + * Scaled parts per million is ppm with a 16-bit binary fractional field. */ -static int stmmac_adjust_freq(struct ptp_clock_info *ptp, s32 ppb) +static int stmmac_adjust_freq(struct ptp_clock_info *ptp, long scaled_ppm) { struct stmmac_priv *priv = container_of(ptp, struct stmmac_priv, ptp_clock_ops); unsigned long flags; - u32 diff, addend; - int neg_adj = 0; - u64 adj; + u32 addend; - if (ppb < 0) { - neg_adj = 1; - ppb = -ppb; - } - - addend = priv->default_addend; - adj = addend; - adj *= ppb; - diff = div_u64(adj, 1000000000ULL); - addend = neg_adj ? (addend - diff) : (addend + diff); + addend = adjust_by_scaled_ppm(priv->default_addend, scaled_ppm); write_lock_irqsave(&priv->ptp_lock, flags); stmmac_config_addend(priv, priv->ptpaddr, addend); @@ -269,7 +260,7 @@ static struct ptp_clock_info stmmac_ptp_clock_ops = { .n_per_out = 0, /* will be overwritten in stmmac_ptp_register */ .n_pins = 0, .pps = 0, - .adjfreq = stmmac_adjust_freq, + .adjfine = stmmac_adjust_freq, .adjtime = stmmac_adjust_time, .gettime64 = stmmac_get_time, .settime64 = stmmac_set_time, From patchwork Wed Nov 9 23:09:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jacob Keller X-Patchwork-Id: 13038147 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D4244C43219 for ; Wed, 9 Nov 2022 23:10:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231704AbiKIXKL (ORCPT ); Wed, 9 Nov 2022 18:10:11 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59050 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231830AbiKIXJ5 (ORCPT ); Wed, 9 Nov 2022 18:09:57 -0500 Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7845F28715 for ; Wed, 9 Nov 2022 15:09:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1668035396; x=1699571396; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=UvbZ6Ud4/jSwcvvgrDh9d8fdbVqGk9hFGK/aAcZ2qY4=; b=BgeEZ8988hR5u6nOX0+OKkp4SKoMSF2OgmCQtlHih4JqxFuGo3KgCaxB DBbhEyc+emUrrcQlk7HbPIMOuyklxaW6avPns+jwQfQb2f4PXfyLfgwJb +vlfAeJeFBBP9hkWfbTQsHH9Ep5P0n0Pc+pmeB2fi84H/PZK2WjGfYJtz GeLoVIWiv7DPM4V/7/WudKHJ8trtT0DDujhnz7YqxzXk0+ebnoeTuCYyy fby1+FZRAOdoxscRyMcnPhnz+jA8St/mJk1GLgSOttZkK9kAh5alUcQ10 yazlHOG1qtSqoqiTS5V6s1i7eIa6kcRi9NJ6gvLGRzg/PHjoVP8SDU08m w==; X-IronPort-AV: E=McAfee;i="6500,9779,10526"; a="309860531" X-IronPort-AV: E=Sophos;i="5.96,152,1665471600"; d="scan'208";a="309860531" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Nov 2022 15:09:54 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10526"; a="636930557" X-IronPort-AV: E=Sophos;i="5.96,152,1665471600"; d="scan'208";a="636930557" Received: from jekeller-desk.amr.corp.intel.com (HELO jekeller-desk.jekeller.internal) ([10.166.241.7]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Nov 2022 15:09:53 -0800 From: Jacob Keller To: netdev@vger.kernel.org, Jakub Kicinski Cc: Richard Cochran , Jacob Keller Subject: [PATCH net-next 6/9] ptp: cpts: convert .adjfreq to .adjfine Date: Wed, 9 Nov 2022 15:09:42 -0800 Message-Id: <20221109230945.545440-7-jacob.e.keller@intel.com> X-Mailer: git-send-email 2.38.0.83.gd420dda05763 In-Reply-To: <20221109230945.545440-1-jacob.e.keller@intel.com> References: <20221109230945.545440-1-jacob.e.keller@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org The cpts implementation of .adjfreq is implemented in terms of a straight forward "base * ppb / 1 billion" calculation. Convert this to the newer .adjfine, using the recently added adjust_by_scaled_ppm helper function. Signed-off-by: Jacob Keller Richard Cochran --- drivers/net/ethernet/ti/cpts.c | 20 ++++---------------- 1 file changed, 4 insertions(+), 16 deletions(-) diff --git a/drivers/net/ethernet/ti/cpts.c b/drivers/net/ethernet/ti/cpts.c index 92ca739fac01..bcccf43d368b 100644 --- a/drivers/net/ethernet/ti/cpts.c +++ b/drivers/net/ethernet/ti/cpts.c @@ -213,25 +213,13 @@ static void cpts_update_cur_time(struct cpts *cpts, int match, /* PTP clock operations */ -static int cpts_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb) +static int cpts_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm) { struct cpts *cpts = container_of(ptp, struct cpts, info); - int neg_adj = 0; - u32 diff, mult; - u64 adj; - - if (ppb < 0) { - neg_adj = 1; - ppb = -ppb; - } - mult = cpts->cc_mult; - adj = mult; - adj *= ppb; - diff = div_u64(adj, 1000000000ULL); mutex_lock(&cpts->ptp_clk_mutex); - cpts->mult_new = neg_adj ? mult - diff : mult + diff; + cpts->mult_new = adjust_by_scaled_ppm(cpts->cc_mult, scaled_ppm); cpts_update_cur_time(cpts, CPTS_EV_PUSH, NULL); @@ -435,7 +423,7 @@ static const struct ptp_clock_info cpts_info = { .n_ext_ts = 0, .n_pins = 0, .pps = 0, - .adjfreq = cpts_ptp_adjfreq, + .adjfine = cpts_ptp_adjfine, .adjtime = cpts_ptp_adjtime, .gettimex64 = cpts_ptp_gettimeex, .settime64 = cpts_ptp_settime, @@ -794,7 +782,7 @@ struct cpts *cpts_create(struct device *dev, void __iomem *regs, cpts_calc_mult_shift(cpts); /* save cc.mult original value as it can be modified - * by cpts_ptp_adjfreq(). + * by cpts_ptp_adjfine(). */ cpts->cc_mult = cpts->cc.mult; From patchwork Wed Nov 9 23:09:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jacob Keller X-Patchwork-Id: 13038141 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D6F97C4332F for ; Wed, 9 Nov 2022 23:10:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229967AbiKIXJ7 (ORCPT ); Wed, 9 Nov 2022 18:09:59 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59016 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231387AbiKIXJz (ORCPT ); Wed, 9 Nov 2022 18:09:55 -0500 Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F30252124F for ; Wed, 9 Nov 2022 15:09:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1668035394; x=1699571394; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=D1OeIv0Ww5+t7YO4CAwE81SDUaeH1KtUvCAK7bPB/I8=; b=OPrfpfMW45g0KXQP09Lev82o8dtn7+WO5tApcvjrDvUYYj3tif1jUItN r1TNvfg/JDmUnaHfDiZ1Ejs3k1uOZQBp3fx3mxuWP47H0q/NM7GB0Mh72 HgbQ+Z2y9iybqrhyIUyTw+BTkto7fhahZrvSWkSGiWlFDfZbKgwX2xsr6 +8L1LdfTwJKK0gkApo8ZRjp8shZ9U6onk3AfQDGKT0opm98AXxh8us832 YJB1Gw1zjuOCCffrs25wiCWJtosknWyJgrgxZIxx2KYbYDcGdNSrB5oOe qCOojOOhB/cCde76691bebL148WixzswRiHoqOVDrq1e9kbbN6jTlgLP1 w==; X-IronPort-AV: E=McAfee;i="6500,9779,10526"; a="290867573" X-IronPort-AV: E=Sophos;i="5.96,152,1665471600"; d="scan'208";a="290867573" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Nov 2022 15:09:54 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10526"; a="636930560" X-IronPort-AV: E=Sophos;i="5.96,152,1665471600"; d="scan'208";a="636930560" Received: from jekeller-desk.amr.corp.intel.com (HELO jekeller-desk.jekeller.internal) ([10.166.241.7]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Nov 2022 15:09:53 -0800 From: Jacob Keller To: netdev@vger.kernel.org, Jakub Kicinski Cc: Richard Cochran , Jacob Keller , Michael Chan Subject: [PATCH net-next 7/9] ptp: bnxt: convert .adjfreq to .adjfine Date: Wed, 9 Nov 2022 15:09:43 -0800 Message-Id: <20221109230945.545440-8-jacob.e.keller@intel.com> X-Mailer: git-send-email 2.38.0.83.gd420dda05763 In-Reply-To: <20221109230945.545440-1-jacob.e.keller@intel.com> References: <20221109230945.545440-1-jacob.e.keller@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org When the BNXT_FW_CAP_PTP_RTC flag is not set, the bnxt driver implements .adjfreq on a cyclecounter in terms of the straightforward "base * ppb / 1 billion" calculation. When BNXT_FW_CAP_PTP_RTC is set, the driver forwards the ppb value to firmware for configuration. Convert the driver to the newer .adjfine interface, updating the cyclecounter calculation to use adjust_by_scaled_ppm to perform the calculation. Use scaled_ppm_to_ppb when forwarding the correction to firmware. Signed-off-by: Jacob Keller Cc: Michael Chan Cc: Richard Cochran Reviewed-by: Pavan Chebbi --- drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c | 22 +++++-------------- 1 file changed, 6 insertions(+), 16 deletions(-) diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c b/drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c index 460cb20599f6..4ec8bba18cdd 100644 --- a/drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c +++ b/drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c @@ -205,7 +205,7 @@ static int bnxt_ptp_adjtime(struct ptp_clock_info *ptp_info, s64 delta) return 0; } -static int bnxt_ptp_adjfreq(struct ptp_clock_info *ptp_info, s32 ppb) +static int bnxt_ptp_adjfine(struct ptp_clock_info *ptp_info, long scaled_ppm) { struct bnxt_ptp_cfg *ptp = container_of(ptp_info, struct bnxt_ptp_cfg, ptp_info); @@ -214,23 +214,13 @@ static int bnxt_ptp_adjfreq(struct ptp_clock_info *ptp_info, s32 ppb) int rc = 0; if (!(ptp->bp->fw_cap & BNXT_FW_CAP_PTP_RTC)) { - int neg_adj = 0; - u32 diff; - u64 adj; - - if (ppb < 0) { - neg_adj = 1; - ppb = -ppb; - } - adj = ptp->cmult; - adj *= ppb; - diff = div_u64(adj, 1000000000ULL); - spin_lock_bh(&ptp->ptp_lock); timecounter_read(&ptp->tc); - ptp->cc.mult = neg_adj ? ptp->cmult - diff : ptp->cmult + diff; + ptp->cc.mult = adjust_by_scaled_ppm(ptp->cmult, scaled_ppm); spin_unlock_bh(&ptp->ptp_lock); } else { + s32 ppb = scaled_ppm_to_ppb(scaled_ppm); + rc = hwrm_req_init(bp, req, HWRM_PORT_MAC_CFG); if (rc) return rc; @@ -240,7 +230,7 @@ static int bnxt_ptp_adjfreq(struct ptp_clock_info *ptp_info, s32 ppb) rc = hwrm_req_send(ptp->bp, req); if (rc) netdev_err(ptp->bp->dev, - "ptp adjfreq failed. rc = %d\n", rc); + "ptp adjfine failed. rc = %d\n", rc); } return rc; } @@ -769,7 +759,7 @@ static const struct ptp_clock_info bnxt_ptp_caps = { .n_per_out = 0, .n_pins = 0, .pps = 0, - .adjfreq = bnxt_ptp_adjfreq, + .adjfine = bnxt_ptp_adjfine, .adjtime = bnxt_ptp_adjtime, .do_aux_work = bnxt_ptp_ts_aux_work, .gettimex64 = bnxt_ptp_gettimex, From patchwork Wed Nov 9 23:09:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jacob Keller X-Patchwork-Id: 13038144 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5A513C4332F for ; Wed, 9 Nov 2022 23:10:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231950AbiKIXKH (ORCPT ); Wed, 9 Nov 2022 18:10:07 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59044 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231769AbiKIXJ5 (ORCPT ); Wed, 9 Nov 2022 18:09:57 -0500 Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AB3881D300 for ; Wed, 9 Nov 2022 15:09:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1668035395; x=1699571395; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=jPXwQksNwg+ulctwJ6MlI3YOaaIPeOJZj5BxqFv51cI=; b=cJlFHTAqftgcFetHfi3OPGnhkNwL6dPpKm7yCzXB/1xDlvk634wWvvSd oZ0eyY7TOSHuv83r2mY9xVheaAwgpAbrH62YhdqdjiAgLYb89VZsJfIpr dEBt5rI3KBRI4ev+Jkv5T6IPMMSZTgzUl5WQ/4BHfjcox3bfm9W7yCvU3 /A3Ps8Ydxe8NE+8Q6EitxtoVZRJMyVCDDhQgyPzQnjaHlkwqL9vbsAkGv YbTbwQDhwi917N5a3r2UCqJoFTdksViLV0f9pg147/zaddp8nN9hr7Ffg WnudO9aOvDqZ7vZ6RtSbSjTshZBJdXvLT+v/u8xAQsj4wv1ZPRcn/KsJG Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10526"; a="290867574" X-IronPort-AV: E=Sophos;i="5.96,152,1665471600"; d="scan'208";a="290867574" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Nov 2022 15:09:54 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10526"; a="636930563" X-IronPort-AV: E=Sophos;i="5.96,152,1665471600"; d="scan'208";a="636930563" Received: from jekeller-desk.amr.corp.intel.com (HELO jekeller-desk.jekeller.internal) ([10.166.241.7]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Nov 2022 15:09:53 -0800 From: Jacob Keller To: netdev@vger.kernel.org, Jakub Kicinski Cc: Richard Cochran , Jacob Keller , Ariel Elior , Sudarsana Kalluru , Manish Chopra , Derek Chickles , Satanand Burla , Felix Manlunas , Raju Rangoju , Joakim Zhang , Edward Cree , Martin Habets Subject: [PATCH net-next 8/9] ptp: convert remaining drivers to adjfine interface Date: Wed, 9 Nov 2022 15:09:44 -0800 Message-Id: <20221109230945.545440-9-jacob.e.keller@intel.com> X-Mailer: git-send-email 2.38.0.83.gd420dda05763 In-Reply-To: <20221109230945.545440-1-jacob.e.keller@intel.com> References: <20221109230945.545440-1-jacob.e.keller@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Convert all remaining drivers that still use .adjfreq to the newer .adjfine implementation. These drivers are not straightforward, as they use non-standard methods of programming their hardware. They are all converted to use scaled_ppm_to_ppb to get the parts per billion value that their logic depends on. Signed-off-by: Jacob Keller Cc: Ariel Elior Cc: Sudarsana Kalluru Cc: Manish Chopra Cc: Derek Chickles Cc: Satanand Burla Cc: Felix Manlunas Cc: Raju Rangoju Cc: Joakim Zhang Cc: Edward Cree Cc: Martin Habets Cc: Richard Cochran --- drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c | 9 +++++---- drivers/net/ethernet/cavium/liquidio/lio_main.c | 11 +++++++---- drivers/net/ethernet/chelsio/cxgb4/cxgb4_ptp.c | 13 ++++++++----- drivers/net/ethernet/freescale/fec_ptp.c | 13 ++++++++----- drivers/net/ethernet/qlogic/qede/qede_ptp.c | 13 ++++++++----- drivers/net/ethernet/sfc/ptp.c | 7 ++++--- drivers/net/ethernet/sfc/siena/ptp.c | 7 ++++--- drivers/net/ethernet/ti/am65-cpts.c | 5 +++-- drivers/ptp/ptp_dte.c | 5 +++-- 9 files changed, 50 insertions(+), 33 deletions(-) diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c index 51b1690fd045..5d1e4fe335aa 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c @@ -13671,19 +13671,20 @@ static int bnx2x_send_update_drift_ramrod(struct bnx2x *bp, int drift_dir, return bnx2x_func_state_change(bp, &func_params); } -static int bnx2x_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb) +static int bnx2x_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm) { struct bnx2x *bp = container_of(ptp, struct bnx2x, ptp_clock_info); int rc; int drift_dir = 1; int val, period, period1, period2, dif, dif1, dif2; int best_dif = BNX2X_MAX_PHC_DRIFT, best_period = 0, best_val = 0; + s32 ppb = scaled_ppm_to_ppb(scaled_ppm); - DP(BNX2X_MSG_PTP, "PTP adjfreq called, ppb = %d\n", ppb); + DP(BNX2X_MSG_PTP, "PTP adjfine called, ppb = %d\n", ppb); if (!netif_running(bp->dev)) { DP(BNX2X_MSG_PTP, - "PTP adjfreq called while the interface is down\n"); + "PTP adjfine called while the interface is down\n"); return -ENETDOWN; } @@ -13818,7 +13819,7 @@ void bnx2x_register_phc(struct bnx2x *bp) bp->ptp_clock_info.n_ext_ts = 0; bp->ptp_clock_info.n_per_out = 0; bp->ptp_clock_info.pps = 0; - bp->ptp_clock_info.adjfreq = bnx2x_ptp_adjfreq; + bp->ptp_clock_info.adjfine = bnx2x_ptp_adjfine; bp->ptp_clock_info.adjtime = bnx2x_ptp_adjtime; bp->ptp_clock_info.gettime64 = bnx2x_ptp_gettime; bp->ptp_clock_info.settime64 = bnx2x_ptp_settime; diff --git a/drivers/net/ethernet/cavium/liquidio/lio_main.c b/drivers/net/ethernet/cavium/liquidio/lio_main.c index d312bd594935..cc88e743d963 100644 --- a/drivers/net/ethernet/cavium/liquidio/lio_main.c +++ b/drivers/net/ethernet/cavium/liquidio/lio_main.c @@ -1512,14 +1512,17 @@ static void free_netsgbuf_with_resp(void *buf) } /** - * liquidio_ptp_adjfreq - Adjust ptp frequency + * liquidio_ptp_adjfine - Adjust ptp frequency * @ptp: PTP clock info - * @ppb: how much to adjust by, in parts-per-billion + * @scaled_ppm: how much to adjust by, in scaled parts-per-million + * + * Scaled parts per million is ppm with a 16-bit binary fractional field. */ -static int liquidio_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb) +static int liquidio_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm) { struct lio *lio = container_of(ptp, struct lio, ptp_info); struct octeon_device *oct = (struct octeon_device *)lio->oct_dev; + s32 ppb = scaled_ppm_to_ppb(scaled_ppm); u64 comp, delta; unsigned long flags; bool neg_adj = false; @@ -1643,7 +1646,7 @@ static void oct_ptp_open(struct net_device *netdev) lio->ptp_info.n_ext_ts = 0; lio->ptp_info.n_per_out = 0; lio->ptp_info.pps = 0; - lio->ptp_info.adjfreq = liquidio_ptp_adjfreq; + lio->ptp_info.adjfine = liquidio_ptp_adjfine; lio->ptp_info.adjtime = liquidio_ptp_adjtime; lio->ptp_info.gettime64 = liquidio_ptp_gettime; lio->ptp_info.settime64 = liquidio_ptp_settime; diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_ptp.c b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_ptp.c index 5bf117d2179f..cbd06d9b95d4 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_ptp.c +++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_ptp.c @@ -194,17 +194,20 @@ int cxgb4_ptp_redirect_rx_packet(struct adapter *adapter, struct port_info *pi) } /** - * cxgb4_ptp_adjfreq - Adjust frequency of PHC cycle counter + * cxgb4_ptp_adjfine - Adjust frequency of PHC cycle counter * @ptp: ptp clock structure - * @ppb: Desired frequency change in parts per billion + * @scaled_ppm: Desired frequency in scaled parts per billion * - * Adjust the frequency of the PHC cycle counter by the indicated ppb from + * Adjust the frequency of the PHC cycle counter by the indicated amount from * the base frequency. + * + * Scaled parts per million is ppm with a 16-bit binary fractional field. */ -static int cxgb4_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb) +static int cxgb4_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm) { struct adapter *adapter = (struct adapter *)container_of(ptp, struct adapter, ptp_clock_info); + s32 ppb = scaled_ppm_to_ppb(scaled_ppm); struct fw_ptp_cmd c; int err; @@ -404,7 +407,7 @@ static const struct ptp_clock_info cxgb4_ptp_clock_info = { .n_ext_ts = 0, .n_per_out = 0, .pps = 0, - .adjfreq = cxgb4_ptp_adjfreq, + .adjfine = cxgb4_ptp_adjfine, .adjtime = cxgb4_ptp_adjtime, .gettime64 = cxgb4_ptp_gettime, .settime64 = cxgb4_ptp_settime, diff --git a/drivers/net/ethernet/freescale/fec_ptp.c b/drivers/net/ethernet/freescale/fec_ptp.c index 67aa694a62ec..ab86bb8562ef 100644 --- a/drivers/net/ethernet/freescale/fec_ptp.c +++ b/drivers/net/ethernet/freescale/fec_ptp.c @@ -338,18 +338,21 @@ void fec_ptp_start_cyclecounter(struct net_device *ndev) } /** - * fec_ptp_adjfreq - adjust ptp cycle frequency + * fec_ptp_adjfine - adjust ptp cycle frequency * @ptp: the ptp clock structure - * @ppb: parts per billion adjustment from base + * @scaled_ppm: scaled parts per million adjustment from base * * Adjust the frequency of the ptp cycle counter by the - * indicated ppb from the base frequency. + * indicated amount from the base frequency. + * + * Scaled parts per million is ppm with a 16-bit binary fractional field. * * Because ENET hardware frequency adjust is complex, * using software method to do that. */ -static int fec_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb) +static int fec_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm) { + s32 ppb = scaled_ppm_to_ppb(scaled_ppm); unsigned long flags; int neg_adj = 0; u32 i, tmp; @@ -742,7 +745,7 @@ void fec_ptp_init(struct platform_device *pdev, int irq_idx) fep->ptp_caps.n_per_out = 1; fep->ptp_caps.n_pins = 0; fep->ptp_caps.pps = 1; - fep->ptp_caps.adjfreq = fec_ptp_adjfreq; + fep->ptp_caps.adjfine = fec_ptp_adjfine; fep->ptp_caps.adjtime = fec_ptp_adjtime; fep->ptp_caps.gettime64 = fec_ptp_gettime; fep->ptp_caps.settime64 = fec_ptp_settime; diff --git a/drivers/net/ethernet/qlogic/qede/qede_ptp.c b/drivers/net/ethernet/qlogic/qede/qede_ptp.c index c9c8225f04d6..747cc5e2bb78 100644 --- a/drivers/net/ethernet/qlogic/qede/qede_ptp.c +++ b/drivers/net/ethernet/qlogic/qede/qede_ptp.c @@ -28,16 +28,19 @@ struct qede_ptp { }; /** - * qede_ptp_adjfreq() - Adjust the frequency of the PTP cycle counter. + * qede_ptp_adjfine() - Adjust the frequency of the PTP cycle counter. * * @info: The PTP clock info structure. - * @ppb: Parts per billion adjustment from base. + * @scaled_ppm: Scaled parts per million adjustment from base. + * + * Scaled parts per million is ppm with a 16-bit binary fractional field. * * Return: Zero on success, negative errno otherwise. */ -static int qede_ptp_adjfreq(struct ptp_clock_info *info, s32 ppb) +static int qede_ptp_adjfine(struct ptp_clock_info *info, long scaled_ppm) { struct qede_ptp *ptp = container_of(info, struct qede_ptp, clock_info); + s32 ppb = scaled_ppm_to_ppb(scaled_ppm); struct qede_dev *edev = ptp->edev; int rc; @@ -47,7 +50,7 @@ static int qede_ptp_adjfreq(struct ptp_clock_info *info, s32 ppb) rc = ptp->ops->adjfreq(edev->cdev, ppb); spin_unlock_bh(&ptp->lock); } else { - DP_ERR(edev, "PTP adjfreq called while interface is down\n"); + DP_ERR(edev, "PTP adjfine called while interface is down\n"); rc = -EFAULT; } __qede_unlock(edev); @@ -462,7 +465,7 @@ int qede_ptp_enable(struct qede_dev *edev) ptp->clock_info.n_ext_ts = 0; ptp->clock_info.n_per_out = 0; ptp->clock_info.pps = 0; - ptp->clock_info.adjfreq = qede_ptp_adjfreq; + ptp->clock_info.adjfine = qede_ptp_adjfine; ptp->clock_info.adjtime = qede_ptp_adjtime; ptp->clock_info.gettime64 = qede_ptp_gettime; ptp->clock_info.settime64 = qede_ptp_settime; diff --git a/drivers/net/ethernet/sfc/ptp.c b/drivers/net/ethernet/sfc/ptp.c index eaef4a15008a..9f07e1ba7780 100644 --- a/drivers/net/ethernet/sfc/ptp.c +++ b/drivers/net/ethernet/sfc/ptp.c @@ -351,7 +351,7 @@ struct efx_ptp_data { void (*xmit_skb)(struct efx_nic *efx, struct sk_buff *skb); }; -static int efx_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta); +static int efx_phc_adjfine(struct ptp_clock_info *ptp, long scaled_ppm); static int efx_phc_adjtime(struct ptp_clock_info *ptp, s64 delta); static int efx_phc_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts); static int efx_phc_settime(struct ptp_clock_info *ptp, @@ -1508,7 +1508,7 @@ static const struct ptp_clock_info efx_phc_clock_info = { .n_per_out = 0, .n_pins = 0, .pps = 1, - .adjfreq = efx_phc_adjfreq, + .adjfine = efx_phc_adjfine, .adjtime = efx_phc_adjtime, .gettime64 = efx_phc_gettime, .settime64 = efx_phc_settime, @@ -2137,11 +2137,12 @@ void __efx_rx_skb_attach_timestamp(struct efx_channel *channel, ptp->ts_corrections.general_rx); } -static int efx_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta) +static int efx_phc_adjfine(struct ptp_clock_info *ptp, long scaled_ppm) { struct efx_ptp_data *ptp_data = container_of(ptp, struct efx_ptp_data, phc_clock_info); + s32 delta = scaled_ppm_to_ppb(scaled_ppm); struct efx_nic *efx = ptp_data->efx; MCDI_DECLARE_BUF(inadj, MC_CMD_PTP_IN_ADJUST_LEN); s64 adjustment_ns; diff --git a/drivers/net/ethernet/sfc/siena/ptp.c b/drivers/net/ethernet/sfc/siena/ptp.c index 7c46752e6eae..38e666561bcd 100644 --- a/drivers/net/ethernet/sfc/siena/ptp.c +++ b/drivers/net/ethernet/sfc/siena/ptp.c @@ -347,7 +347,7 @@ struct efx_ptp_data { void (*xmit_skb)(struct efx_nic *efx, struct sk_buff *skb); }; -static int efx_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta); +static int efx_phc_adjfine(struct ptp_clock_info *ptp, long scaled_ppm); static int efx_phc_adjtime(struct ptp_clock_info *ptp, s64 delta); static int efx_phc_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts); static int efx_phc_settime(struct ptp_clock_info *ptp, @@ -1429,7 +1429,7 @@ static const struct ptp_clock_info efx_phc_clock_info = { .n_per_out = 0, .n_pins = 0, .pps = 1, - .adjfreq = efx_phc_adjfreq, + .adjfine = efx_phc_adjfine, .adjtime = efx_phc_adjtime, .gettime64 = efx_phc_gettime, .settime64 = efx_phc_settime, @@ -2044,11 +2044,12 @@ void __efx_siena_rx_skb_attach_timestamp(struct efx_channel *channel, ptp->ts_corrections.general_rx); } -static int efx_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta) +static int efx_phc_adjfine(struct ptp_clock_info *ptp, long scaled_ppm) { struct efx_ptp_data *ptp_data = container_of(ptp, struct efx_ptp_data, phc_clock_info); + s32 delta = scaled_ppm_to_ppb(scaled_ppm); struct efx_nic *efx = ptp_data->efx; MCDI_DECLARE_BUF(inadj, MC_CMD_PTP_IN_ADJUST_LEN); s64 adjustment_ns; diff --git a/drivers/net/ethernet/ti/am65-cpts.c b/drivers/net/ethernet/ti/am65-cpts.c index 7f928c343426..9535396b28cd 100644 --- a/drivers/net/ethernet/ti/am65-cpts.c +++ b/drivers/net/ethernet/ti/am65-cpts.c @@ -391,9 +391,10 @@ static irqreturn_t am65_cpts_interrupt(int irq, void *dev_id) } /* PTP clock operations */ -static int am65_cpts_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb) +static int am65_cpts_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm) { struct am65_cpts *cpts = container_of(ptp, struct am65_cpts, ptp_info); + s32 ppb = scaled_ppm_to_ppb(scaled_ppm); int neg_adj = 0; u64 adj_period; u32 val; @@ -625,7 +626,7 @@ static long am65_cpts_ts_work(struct ptp_clock_info *ptp); static struct ptp_clock_info am65_ptp_info = { .owner = THIS_MODULE, .name = "CTPS timer", - .adjfreq = am65_cpts_ptp_adjfreq, + .adjfine = am65_cpts_ptp_adjfine, .adjtime = am65_cpts_ptp_adjtime, .gettimex64 = am65_cpts_ptp_gettimex, .settime64 = am65_cpts_ptp_settime, diff --git a/drivers/ptp/ptp_dte.c b/drivers/ptp/ptp_dte.c index 8641fd060491..7cc5a00e625b 100644 --- a/drivers/ptp/ptp_dte.c +++ b/drivers/ptp/ptp_dte.c @@ -134,8 +134,9 @@ static s64 dte_read_nco_with_ovf(struct ptp_dte *ptp_dte) return ns; } -static int ptp_dte_adjfreq(struct ptp_clock_info *ptp, s32 ppb) +static int ptp_dte_adjfine(struct ptp_clock_info *ptp, long scaled_ppm) { + s32 ppb = scaled_ppm_to_ppb(scaled_ppm); u32 nco_incr; unsigned long flags; struct ptp_dte *ptp_dte = container_of(ptp, struct ptp_dte, caps); @@ -219,7 +220,7 @@ static const struct ptp_clock_info ptp_dte_caps = { .n_ext_ts = 0, .n_pins = 0, .pps = 0, - .adjfreq = ptp_dte_adjfreq, + .adjfine = ptp_dte_adjfine, .adjtime = ptp_dte_adjtime, .gettime64 = ptp_dte_gettime, .settime64 = ptp_dte_settime, From patchwork Wed Nov 9 23:09:45 2022 Content-Type: text/plain; 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09 Nov 2022 15:09:53 -0800 From: Jacob Keller To: netdev@vger.kernel.org, Jakub Kicinski Cc: Richard Cochran , Jacob Keller Subject: [PATCH net-next 9/9] ptp: remove the .adjfreq interface function Date: Wed, 9 Nov 2022 15:09:45 -0800 Message-Id: <20221109230945.545440-10-jacob.e.keller@intel.com> X-Mailer: git-send-email 2.38.0.83.gd420dda05763 In-Reply-To: <20221109230945.545440-1-jacob.e.keller@intel.com> References: <20221109230945.545440-1-jacob.e.keller@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Now that all drivers have been converted to .adjfine, we can remove the .adjfreq from the interface structure. Signed-off-by: Jacob Keller Cc: Richard Cochran --- drivers/ptp/ptp_clock.c | 5 +---- include/linux/ptp_clock_kernel.h | 7 ------- 2 files changed, 1 insertion(+), 11 deletions(-) diff --git a/drivers/ptp/ptp_clock.c b/drivers/ptp/ptp_clock.c index 51cae72bb6db..62d4d29e7c05 100644 --- a/drivers/ptp/ptp_clock.c +++ b/drivers/ptp/ptp_clock.c @@ -131,10 +131,7 @@ static int ptp_clock_adjtime(struct posix_clock *pc, struct __kernel_timex *tx) long ppb = scaled_ppm_to_ppb(tx->freq); if (ppb > ops->max_adj || ppb < -ops->max_adj) return -ERANGE; - if (ops->adjfine) - err = ops->adjfine(ops, tx->freq); - else - err = ops->adjfreq(ops, ppb); + err = ops->adjfine(ops, tx->freq); ptp->dialed_frequency = tx->freq; } else if (tx->modes & ADJ_OFFSET) { if (ops->adjphase) { diff --git a/include/linux/ptp_clock_kernel.h b/include/linux/ptp_clock_kernel.h index f4781c5766d6..fdffa6a98d79 100644 --- a/include/linux/ptp_clock_kernel.h +++ b/include/linux/ptp_clock_kernel.h @@ -77,12 +77,6 @@ struct ptp_system_timestamp { * nominal frequency in parts per million, but with a * 16 bit binary fractional field. * - * @adjfreq: Adjusts the frequency of the hardware clock. - * This method is deprecated. New drivers should implement - * the @adjfine method instead. - * parameter delta: Desired frequency offset from nominal frequency - * in parts per billion - * * @adjphase: Adjusts the phase offset of the hardware clock. * parameter delta: Desired change in nanoseconds. * @@ -174,7 +168,6 @@ struct ptp_clock_info { int pps; struct ptp_pin_desc *pin_config; int (*adjfine)(struct ptp_clock_info *ptp, long scaled_ppm); - int (*adjfreq)(struct ptp_clock_info *ptp, s32 delta); int (*adjphase)(struct ptp_clock_info *ptp, s32 phase); int (*adjtime)(struct ptp_clock_info *ptp, s64 delta); int (*gettime64)(struct ptp_clock_info *ptp, struct timespec64 *ts);