From patchwork Fri Nov 11 13:54:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 13040334 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ADC1AC4332F for ; Fri, 11 Nov 2022 13:54:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233237AbiKKNyT (ORCPT ); Fri, 11 Nov 2022 08:54:19 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57692 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231300AbiKKNyS (ORCPT ); Fri, 11 Nov 2022 08:54:18 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 328F8450A0; Fri, 11 Nov 2022 05:54:18 -0800 (PST) Message-ID: <20221111122013.653556720@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668174856; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=coIIhyuiXnYLFo01pBIKB6JYTvWHpv/omCaoVJDpJVg=; b=s/U6Zaar7ls0H2qsLwsr8aiLFHuaVuhBicdGJQADmCq0O1hvJG7u/w86lF2pDffDWPTkcK gh8pG+58CQS0JvliEiWZUIO1OP4VoMfKp7GIDpkbtmTydLSos0uJJgDnN/82RrN+m008Kt pcwRsAEtTCkDN13TliZ7P5bqc8kQ5lCR1U2UuWXy9DlSHjPbnsBlUUYlCt04j2jwTsqa3m 9GphyvrVWAYxNrMF8zid+S1JgBioKKpAd0OFleA65Swb5lIVMH3c8mMR4C+u/t0s9BUSSG xoJAFwa/EQettO0NoV+mbrN0EtHCiVpqcGAhEt6tg8oZ6PY6ayrjDrl4po72Xg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668174856; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=coIIhyuiXnYLFo01pBIKB6JYTvWHpv/omCaoVJDpJVg=; b=dp0qPLUFHHtY136HpcXF3x8yJlJhKmtWn4q1Z9ZhO7otN+4+TDH5MHXbJ5zxxaIjm2DPmE huK/q0vb/nufNPDA== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , Michael Ellerman , Christophe Leroy , linuxppc-dev@lists.ozlabs.org, "Ahmed S. Darwish" , Reinette Chatre Subject: [patch 01/39] PCI/MSI: Check for MSI enabled in __pci_msix_enable() References: <20221111120501.026511281@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:54:15 +0100 (CET) Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org PCI/MSI and PCI/MSI-X are mutually exclusive, but the MSI-X enable code lacks a check for already enabled MSI. Signed-off-by: Thomas Gleixner Reviewed-by: Ashok Raj Acked-by: Bjorn Helgaas Reviewed-by: Jason Gunthorpe --- drivers/pci/msi/msi.c | 5 +++++ 1 file changed, 5 insertions(+) --- a/drivers/pci/msi/msi.c +++ b/drivers/pci/msi/msi.c @@ -935,6 +935,11 @@ static int __pci_enable_msix_range(struc if (maxvec < minvec) return -ERANGE; + if (dev->msi_enabled) { + pci_info(dev, "can't enable MSI-X (MSI already enabled)\n"); + return -EINVAL; + } + if (WARN_ON_ONCE(dev->msix_enabled)) return -EINVAL; From patchwork Fri Nov 11 13:54:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 13040336 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3E09AC4332F for ; Fri, 11 Nov 2022 13:54:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233067AbiKKNyV (ORCPT ); Fri, 11 Nov 2022 08:54:21 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57704 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233395AbiKKNyT (ORCPT ); Fri, 11 Nov 2022 08:54:19 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4B35849B45; Fri, 11 Nov 2022 05:54:19 -0800 (PST) Message-ID: <20221111122013.713848846@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668174857; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=lEZvgy6HHUzbXINFeZhEm07cTVI+tuFx6PeXgAOnbxo=; b=d/SC/+T3CdcHrZ8MbLToM6SSgF7cmkTyPqkaOcSGfaaP5mtPj0fjgr8rnBLbwbwdHmYuYk 7SKAOEcT6nKblCt9++hnKZvd+jnkTl1ZCW97zgckpAOxOBJmCDcHjFZupqhfm+PjbkhQpC Ckkz+Hj5GFVPZ1huA0zuyZ4hM4+gKcRlEFFA6OkAyaW7XRBfOils813Wxb61S8hx7uF8YS FPIL8fs5LmFd8YyN/0q1ix84xHIH4WCefuDCyBQmTAKbmEhRdRl4r/t8EE8uoiDCjoenXT EZBdsG29ygGfSFeQEzfgGUkF5RfcjPEM2Ne/1LcpX0GDjhCM/BBOezUEg+g0jQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668174857; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=lEZvgy6HHUzbXINFeZhEm07cTVI+tuFx6PeXgAOnbxo=; b=eImqZwzolHHQM3N4D4bpfBwXxwGdxDtOGKetRv0eo1dAL0/gfurg2TqhJroXzqv0ZskPkU k56t5cHRVmzfcUCQ== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , Michael Ellerman , Christophe Leroy , linuxppc-dev@lists.ozlabs.org, "Ahmed S. Darwish" , Reinette Chatre Subject: [patch 02/39] iommu/vt-d: Remove bogus check for multi MSI-X References: <20221111120501.026511281@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:54:17 +0100 (CET) Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org PCI/Multi-MSI is MSI specific and not supported for MSI-X. Signed-off-by: Thomas Gleixner Reviewed-by: Ashok Raj --- drivers/iommu/intel/irq_remapping.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) --- a/drivers/iommu/intel/irq_remapping.c +++ b/drivers/iommu/intel/irq_remapping.c @@ -1334,8 +1334,7 @@ static int intel_irq_remapping_alloc(str if (!info || !iommu) return -EINVAL; - if (nr_irqs > 1 && info->type != X86_IRQ_ALLOC_TYPE_PCI_MSI && - info->type != X86_IRQ_ALLOC_TYPE_PCI_MSIX) + if (nr_irqs > 1 && info->type != X86_IRQ_ALLOC_TYPE_PCI_MSI) return -EINVAL; /* From patchwork Fri Nov 11 13:54:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 13040337 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 406FEC433FE for ; Fri, 11 Nov 2022 13:54:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233390AbiKKNyX (ORCPT ); Fri, 11 Nov 2022 08:54:23 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57746 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233466AbiKKNyV (ORCPT ); Fri, 11 Nov 2022 08:54:21 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E1EFF657E6; Fri, 11 Nov 2022 05:54:20 -0800 (PST) Message-ID: <20221111122013.772447165@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668174859; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=A5gxwhjOfYDDe9pKor0TACcvTNvwKPr4BmNEQMHYUXM=; b=2Fw81I21MoAKaeHMvY8ErYps4l1IO750NK6h0Rw5RZWIkRe1THjaR3X9HOgWaw0l0mTY3s Ll/dD746mdb0yAlQ0ov5sWM+AUpitCcs3HH2sgJgDOjn4vJMHJ7fU7zVpfvS6ftBxmpMqN 3lNkZB4zUY5dQCXSdvJRx9miYjQo5pscOVVZiUT43KjB5ToV7Gf6LBOoyJeBaDHV34hPBt Kov5aUw/Nj5pOGw+zbQh01L3MNB9F/dqZYgM8k0EV9pZZdCg7t9WZLyUA2eNreUXI3U/Xg YGxOHz7tgOcX14fftMFVLmC0ys4b/FRIRn7D0mnNGwj+0dhV8PWJeucTy3fKZg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668174859; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=A5gxwhjOfYDDe9pKor0TACcvTNvwKPr4BmNEQMHYUXM=; b=nfZOapQueWw+bWDWb8DtO7mx9RdWBuPX7UZNwtQUy7EXN7HJhuDTmRaao/o2kWTcYU4fDr 5a1Y5VotFiqrI7Bg== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , Michael Ellerman , Christophe Leroy , linuxppc-dev@lists.ozlabs.org, "Ahmed S. Darwish" , Reinette Chatre Subject: [patch 03/39] iommu/amd: Remove bogus check for multi MSI-X References: <20221111120501.026511281@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:54:19 +0100 (CET) Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org PCI/Multi-MSI is MSI specific and not supported for MSI-X Signed-off-by: Thomas Gleixner --- drivers/iommu/amd/iommu.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) --- a/drivers/iommu/amd/iommu.c +++ b/drivers/iommu/amd/iommu.c @@ -3294,8 +3294,7 @@ static int irq_remapping_alloc(struct ir if (!info) return -EINVAL; - if (nr_irqs > 1 && info->type != X86_IRQ_ALLOC_TYPE_PCI_MSI && - info->type != X86_IRQ_ALLOC_TYPE_PCI_MSIX) + if (nr_irqs > 1 && info->type != X86_IRQ_ALLOC_TYPE_PCI_MSI) return -EINVAL; /* From patchwork Fri Nov 11 13:54:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 13040338 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7EC52C43217 for ; Fri, 11 Nov 2022 13:54:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233502AbiKKNyY (ORCPT ); Fri, 11 Nov 2022 08:54:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57812 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233483AbiKKNyX (ORCPT ); Fri, 11 Nov 2022 08:54:23 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 849DD6B380; Fri, 11 Nov 2022 05:54:22 -0800 (PST) Message-ID: <20221111122013.831151822@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668174861; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=hXGyAAuT/IU9qjkYv54P57CF8Kg9D2gsGu3taE3+4kw=; b=Q+w7rfhi1CD/id8ozBrg2Q21W5nVKor55fq9WBt8lCSQOVHcaMdncE2KL8ROw5Fn3DJ9Wy C6Gq/MFoG/TdPdL4180NCcfok/4hREfFzaUBJ2BmjZ4CE+WN7WxTwWtSOLaJ3+LD9kYY1j TeMFKUGxFAbHhfzCAwnA3C119hea+KSW+lcpY1H4pdCjjM97PrlqTIGom3CT1l9I0ocFXD G10ovxb7yJ25ZsdRupfmuMU0Sra+dE3GF4bYWQ/7cPGDS+UTUyJkHMxazfENu7wjY2KpoV n9hEYT+9jQQ5Lr1oLQSUrUgQfs9mO1k5gyzHqyjF8kOdb1h0q7MIXG+o1lSBMA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668174861; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=hXGyAAuT/IU9qjkYv54P57CF8Kg9D2gsGu3taE3+4kw=; b=cdP8Z8xVU6B5EEH8jHzk7TfeiPxnZMmWed+TgxJS3tdmgdVHc4X28EdbDT2icsz8tJCHaq CTp0kZmpTRg7YJAA== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , Michael Ellerman , Christophe Leroy , linuxppc-dev@lists.ozlabs.org, "Ahmed S. Darwish" , Reinette Chatre Subject: [patch 04/39] genirq/msi: Use MSI_DESC_ALL in msi_add_simple_msi_descs() References: <20221111120501.026511281@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:54:20 +0100 (CET) Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org There are no associated MSI descriptors in the requested range when the MSI descriptor allocation fails. Use MSI_DESC_ALL as the filter which prepares the next step to get rid of the filter for freeing. Signed-off-by: Thomas Gleixner Reviewed-by: Ashok Raj Reviewed-by: Jason Gunthorpe --- kernel/irq/msi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) --- a/kernel/irq/msi.c +++ b/kernel/irq/msi.c @@ -120,7 +120,7 @@ static int msi_add_simple_msi_descs(stru fail_mem: ret = -ENOMEM; fail: - msi_free_msi_descs_range(dev, MSI_DESC_NOTASSOCIATED, index, last); + msi_free_msi_descs_range(dev, MSI_DESC_ALL, index, last); return ret; } From patchwork Fri Nov 11 13:54:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 13040339 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0C10FC4332F for ; Fri, 11 Nov 2022 13:54:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233644AbiKKNyw (ORCPT ); Fri, 11 Nov 2022 08:54:52 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57854 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233518AbiKKNyY (ORCPT ); Fri, 11 Nov 2022 08:54:24 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2220F654F6; Fri, 11 Nov 2022 05:54:24 -0800 (PST) Message-ID: <20221111122013.888850936@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668174862; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=efOtDMgGZtrOq2C93xDB3bkE3dnMFMUi6PhL2K3F+Xc=; b=OGgspOZeBC55SSE4L/03t3Yj8kEAUvaCDyesgMfIQ/8qhXJLoIiwTqSD0usnmt+jNWsGxe jJQIhOK2glpk+B7OSR+bSxnJRrGYjm7l6+v8O35MDAj8CaLu4GeF+phCjLDtbCTxh5572M +ZpPJAvMXeUjr0mPgIt+9+snp1r51HIvN8aPT4w0auBrP/NkfAAUYZzp759bwdCn1Kq78A lb32ySTfELSWx1/+L0w3PdN47RZdW50J4E5gvQQfzie7ob1/CZlWpi2e3Wn5ebKYWS0ZtB zSBgFrBCzs8wHVGv86iPTFC38nFfQbhWVVsDO/a8gXoX8MLGY2aFp0qzQ9nWRA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668174862; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=efOtDMgGZtrOq2C93xDB3bkE3dnMFMUi6PhL2K3F+Xc=; b=sIAyS0gBMPiZE7rx+h8POgBoJq70Rx877SA8g16n791fowonYh2meMpqEAwdbzM0ajaQbK ljBVTKfudKOlfWCg== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , Michael Ellerman , Christophe Leroy , linuxppc-dev@lists.ozlabs.org, "Ahmed S. Darwish" , Reinette Chatre Subject: [patch 05/39] genirq/msi: Remove filter from msi_free_descs_free_range() References: <20221111120501.026511281@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:54:22 +0100 (CET) Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org When a range of descriptors is freed then all of them are not associated to a linux interrupt. Remove the filter and add a warning to the free function. Signed-off-by: Thomas Gleixner Reviewed-by: Jason Gunthorpe Tested-by: Miquel Raynal --- drivers/base/platform-msi.c | 2 +- include/linux/msi.h | 5 ++--- kernel/irq/msi.c | 19 ++++++++++--------- 3 files changed, 13 insertions(+), 13 deletions(-) --- a/drivers/base/platform-msi.c +++ b/drivers/base/platform-msi.c @@ -325,7 +325,7 @@ void platform_msi_device_domain_free(str msi_lock_descs(data->dev); irq_domain_free_irqs_common(domain, virq, nr_irqs); - msi_free_msi_descs_range(data->dev, MSI_DESC_ALL, virq, virq + nr_irqs - 1); + msi_free_msi_descs_range(data->dev, virq, virq + nr_irqs - 1); msi_unlock_descs(data->dev); } --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -247,8 +247,7 @@ static inline void pci_write_msi_msg(uns #endif /* CONFIG_PCI_MSI */ int msi_add_msi_desc(struct device *dev, struct msi_desc *init_desc); -void msi_free_msi_descs_range(struct device *dev, enum msi_desc_filter filter, - unsigned int first_index, unsigned int last_index); +void msi_free_msi_descs_range(struct device *dev, unsigned int first_index, unsigned int last_index); /** * msi_free_msi_descs - Free MSI descriptors of a device @@ -256,7 +255,7 @@ void msi_free_msi_descs_range(struct dev */ static inline void msi_free_msi_descs(struct device *dev) { - msi_free_msi_descs_range(dev, MSI_DESC_ALL, 0, MSI_MAX_INDEX); + msi_free_msi_descs_range(dev, 0, MSI_MAX_INDEX); } void __pci_read_msi_msg(struct msi_desc *entry, struct msi_msg *msg); --- a/kernel/irq/msi.c +++ b/kernel/irq/msi.c @@ -120,7 +120,7 @@ static int msi_add_simple_msi_descs(stru fail_mem: ret = -ENOMEM; fail: - msi_free_msi_descs_range(dev, MSI_DESC_ALL, index, last); + msi_free_msi_descs_range(dev, index, last); return ret; } @@ -141,12 +141,11 @@ static bool msi_desc_match(struct msi_de /** * msi_free_msi_descs_range - Free MSI descriptors of a device * @dev: Device to free the descriptors - * @filter: Descriptor state filter * @first_index: Index to start freeing from * @last_index: Last index to be freed */ -void msi_free_msi_descs_range(struct device *dev, enum msi_desc_filter filter, - unsigned int first_index, unsigned int last_index) +void msi_free_msi_descs_range(struct device *dev, unsigned int first_index, + unsigned int last_index) { struct xarray *xa = &dev->msi.data->__store; struct msi_desc *desc; @@ -155,10 +154,12 @@ void msi_free_msi_descs_range(struct dev lockdep_assert_held(&dev->msi.data->mutex); xa_for_each_range(xa, idx, desc, first_index, last_index) { - if (msi_desc_match(desc, filter)) { - xa_erase(xa, idx); - msi_free_desc(desc); - } + xa_erase(xa, idx); + + /* Leak the descriptor when it is still referenced */ + if (WARN_ON_ONCE(msi_desc_match(desc, MSI_DESC_ASSOCIATED))) + continue; + msi_free_desc(desc); } } @@ -739,7 +740,7 @@ int msi_domain_populate_irqs(struct irq_ fail: for (--virq; virq >= virq_base; virq--) irq_domain_free_irqs_common(domain, virq, 1); - msi_free_msi_descs_range(dev, MSI_DESC_ALL, virq_base, virq_base + nvec - 1); + msi_free_msi_descs_range(dev, virq_base, virq_base + nvec - 1); unlock: msi_unlock_descs(dev); return ret; From patchwork Fri Nov 11 13:54:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 13040340 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 93B74C433FE for ; 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a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668174864; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=DzwMVitVEwpsnJRYX1GqcWllvAqc3k0vBxAI8Er+FBs=; b=61OFjcySwk55/wM8ZG3QX632+240BfUAoDJeeBKxzaHUj49wFuflEH1l5zdnt0rEJuHj6f WudG4TZAewxnW2BQ== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , Michael Ellerman , Christophe Leroy , linuxppc-dev@lists.ozlabs.org, "Ahmed S. Darwish" , Reinette Chatre Subject: [patch 06/39] genirq/msi: Add missing kernel doc to msi_next_desc() References: <20221111120501.026511281@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:54:23 +0100 (CET) Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org W=1 complains about this. Signed-off-by: Thomas Gleixner Reviewed-by: Jason Gunthorpe --- kernel/irq/msi.c | 1 + 1 file changed, 1 insertion(+) --- a/kernel/irq/msi.c +++ b/kernel/irq/msi.c @@ -282,6 +282,7 @@ EXPORT_SYMBOL_GPL(msi_first_desc); /** * msi_next_desc - Get the next MSI descriptor of a device * @dev: Device to operate on + * @filter: Descriptor state filter * * The first invocation of msi_next_desc() has to be preceeded by a * successful invocation of __msi_first_desc(). Consecutive invocations are From patchwork Fri Nov 11 13:54:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 13040341 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D2AF6C43217 for ; Fri, 11 Nov 2022 13:54:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233511AbiKKNyz (ORCPT ); Fri, 11 Nov 2022 08:54:55 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57858 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233593AbiKKNyv (ORCPT ); Fri, 11 Nov 2022 08:54:51 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4FC8C6F366; Fri, 11 Nov 2022 05:54:27 -0800 (PST) Message-ID: <20221111122014.004725919@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668174866; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=GAKiePxBwA26UOzSRlo0ofGhAo2Fb7Jw45XwvXqJzKU=; b=Yu6U84ia9FLugctorieny+7ozdDKY9K4yqqmT77rPtFmjIsYVb+xbI+H5owKByCTwabGFi XSUP3+twnj3K2LOXu5MGeCAk5Fqc95LTtwvoNYzKrFPOlHQMT38RZvffj79o/PUIffICyR Jw4JMo25Fr0VI6ucEf2SRxIGXBk5fNUjPRXoubLhcl+2CXsZWT11nLZF51xi1yvuNx3JzV vLMM+vvz4a8LfnKYX3C/JE+uy3X/nEjWc4GtcwLcypC9JiCo0kd0nnPqlNus4OEuGchKBA /pQVvyBdbBupRB6uqKjHCKGo5tVWIdNOeHLUIvsxZS9dpIQyB+6Of8k52fhTUg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668174866; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=GAKiePxBwA26UOzSRlo0ofGhAo2Fb7Jw45XwvXqJzKU=; b=oM7mFTR/BDMFIdSFauwnokPDjh6lKKffIIiPbVtB8cy6c9N5UGO9yua+3dqGd7aiCGwFmW BpQKABGh9Jg8x2DA== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , Michael Ellerman , Christophe Leroy , linuxppc-dev@lists.ozlabs.org, "Ahmed S. Darwish" , Reinette Chatre Subject: [patch 07/39] genirq/msi: Make __msi_domain_alloc_irqs() static References: <20221111120501.026511281@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:54:25 +0100 (CET) Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Nothing outside of the core code requires this. Signed-off-by: Thomas Gleixner Reviewed-by: Jason Gunthorpe --- include/linux/msi.h | 7 ++----- kernel/irq/msi.c | 6 ++++-- 2 files changed, 6 insertions(+), 7 deletions(-) --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -334,9 +334,8 @@ struct msi_domain_info; * MSI_FLAG_USE_DEF_DOM_OPS is not set to avoid breaking existing users and * because these callbacks are obviously mandatory. * - * This is NOT meant to be abused, but it can be useful to build wrappers - * for specialized MSI irq domains which need extra work before and after - * calling __msi_domain_alloc_irqs()/__msi_domain_free_irqs(). + * __msi_domain_free_irqs() is exposed for PPC pseries to handle extra + * work after all interrupts and descriptors have been freed. */ struct msi_domain_ops { irq_hw_number_t (*get_hwirq)(struct msi_domain_info *info, @@ -425,8 +424,6 @@ int msi_domain_set_affinity(struct irq_d struct irq_domain *msi_create_irq_domain(struct fwnode_handle *fwnode, struct msi_domain_info *info, struct irq_domain *parent); -int __msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev, - int nvec); int msi_domain_alloc_irqs_descs_locked(struct irq_domain *domain, struct device *dev, int nvec); int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev, --- a/kernel/irq/msi.c +++ b/kernel/irq/msi.c @@ -462,6 +462,8 @@ static inline void msi_sysfs_remove_desc #endif /* !CONFIG_SYSFS */ #ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN +static int __msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev, int nvec); + static inline void irq_chip_write_msi_msg(struct irq_data *data, struct msi_msg *msg) { @@ -852,8 +854,8 @@ static int msi_init_virq(struct irq_doma return 0; } -int __msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev, - int nvec) +static int __msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev, + int nvec) { struct msi_domain_info *info = domain->host_data; struct msi_domain_ops *ops = info->ops; From patchwork Fri Nov 11 13:54:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 13040342 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A4E2BC433FE for ; Fri, 11 Nov 2022 13:55:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233752AbiKKNzG (ORCPT ); Fri, 11 Nov 2022 08:55:06 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57846 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233655AbiKKNyx (ORCPT ); Fri, 11 Nov 2022 08:54:53 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D4C167018C; Fri, 11 Nov 2022 05:54:28 -0800 (PST) Message-ID: <20221111122014.063153448@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668174867; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=pIvr9Rr0WHVjkSJi7bxH/bI9Rim62Flb8AM+4v5YvL4=; b=whjvZ1hGnpGUhhkqm9I0JMcNO4qtQO27s2DQH8Oz9beyGWo7DUQsr+41f0+cZiGoF9CSwx vy50S9pzw9A2kbFhsoMOktYg78PizaWs9IR3KZshscuyc2m56wjLCpqJFSZBll2eH6V8nU MFd9D8/wAHhHSsTq9hOhTwRl6vK+7OlKxNjL0jjqxx5Jpk/xWBNusgl4nofXeNU4sGa2Jp 4xxBlfu+GgVENgM2JLDzwXreETXKAUYT3oNe/e3Yp7Pby/icgOzh/0FpdMoIZobV0qz8X0 +eNahDWVvyqLmTEvfdcUV0DxSloKi+SoF3/VjpwVitY04LcMpyXhGyF/Qz4d6A== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668174867; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=pIvr9Rr0WHVjkSJi7bxH/bI9Rim62Flb8AM+4v5YvL4=; b=wxPrtb03zedDnlK+TXh2gy6+0tXIlW3ThKc+ATDQcqkU5payjRpOO+xzL6leSmWxWqt9sy poWzdm2Y5IW7krDQ== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , Michael Ellerman , Christophe Leroy , linuxppc-dev@lists.ozlabs.org, "Ahmed S. Darwish" , Reinette Chatre Subject: [patch 08/39] genirq/msi: Provide msi_domain_ops::post_free() References: <20221111120501.026511281@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:54:27 +0100 (CET) Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org To prepare for removing the exposure of __msi_domain_free_irqs() provide a post_free() callback in the MSI domain ops which can be used to solve the problem of the only user of __msi_domain_free_irqs() in arch/powerpc. Signed-off-by: Thomas Gleixner Reviewed-by: Jason Gunthorpe --- include/linux/msi.h | 4 ++++ kernel/irq/msi.c | 2 ++ 2 files changed, 6 insertions(+) --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -315,6 +315,8 @@ struct msi_domain_info; * function. * @domain_free_irqs: Optional function to override the default free * function. + * @msi_post_free: Optional function which is invoked after freeing + * all interrupts. * * @get_hwirq, @msi_init and @msi_free are callbacks used by the underlying * irqdomain. @@ -359,6 +361,8 @@ struct msi_domain_ops { struct device *dev, int nvec); void (*domain_free_irqs)(struct irq_domain *domain, struct device *dev); + void (*msi_post_free)(struct irq_domain *domain, + struct device *dev); }; /** --- a/kernel/irq/msi.c +++ b/kernel/irq/msi.c @@ -1026,6 +1026,8 @@ void msi_domain_free_irqs_descs_locked(s lockdep_assert_held(&dev->msi.data->mutex); ops->domain_free_irqs(domain, dev); + if (ops->msi_post_free) + ops->msi_post_free(domain, dev); msi_domain_free_msi_descs(info, dev); } From patchwork Fri Nov 11 13:54:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 13040343 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5D789C4332F for ; Fri, 11 Nov 2022 13:55:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233708AbiKKNzU (ORCPT ); Fri, 11 Nov 2022 08:55:20 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58900 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233592AbiKKNyy (ORCPT ); Fri, 11 Nov 2022 08:54:54 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6610270183; Fri, 11 Nov 2022 05:54:30 -0800 (PST) Message-ID: <20221111122014.120489922@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668174869; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=uAK7e6YKYfE3NKk9044qCaJfhx6qFWH6i8PscALcCkU=; b=bhdG0eo2d5cR5NUOFj3Ienrsw5VPaTNHp3Q9tmXe+N2uBx5Zp/1epSUs7hD/C0G7eLrHaV +C8SctVO+X4BrGfCIZMTE0ojXzDO8B42XGVZas3NbDPd0Q/HPETWT9XKnO9F2VmwX6OV9S V668vy8p1CUipfcobFboZ4vTtAxDWK63IStDKwrOKRaBdhZFOak3Blp+nwAEE7pjT3xpcw ZLBLGCh74g5FftekR3u7YTxhlQ16TIYo++JJjAD0y7eaEOF/5GUbQq9RCpuQSBLyXzaAzV C/+4MDauiberZ+DV2mcdIIvqMMOnfOqSzRFvFsw2nuyv9tz7FHZ0r4CKPbYqkA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668174869; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=uAK7e6YKYfE3NKk9044qCaJfhx6qFWH6i8PscALcCkU=; b=CdnfXWBvUOFJUQvenC/sG/RoCl0EBsTovXNlHbcYl5w55OTi8OHqj96pgDXVqDNddziMC5 Q0FyhLFGFQVlnUCw== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , Michael Ellerman , Christophe Leroy , linuxppc-dev@lists.ozlabs.org, "Ahmed S. Darwish" , Reinette Chatre Subject: [patch 09/39] powerpc/pseries/msi: Use msi_domain_ops::msi_post_free() References: <20221111120501.026511281@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:54:28 +0100 (CET) Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Use the new msi_post_free() callback which is invoked after the interrupts have been freed to tell the hypervisor about the shutdown. This allows to remove the exposure of __msi_domain_free_irqs(). Signed-off-by: Thomas Gleixner Cc: Michael Ellerman Cc: Christophe Leroy Cc: linuxppc-dev@lists.ozlabs.org Reviewed-by: Jason Gunthorpe --- arch/powerpc/platforms/pseries/msi.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) --- a/arch/powerpc/platforms/pseries/msi.c +++ b/arch/powerpc/platforms/pseries/msi.c @@ -447,21 +447,18 @@ static void pseries_msi_ops_msi_free(str * RTAS can not disable one MSI at a time. It's all or nothing. Do it * at the end after all IRQs have been freed. */ -static void pseries_msi_domain_free_irqs(struct irq_domain *domain, - struct device *dev) +static void pseries_msi_post_free(struct irq_domain *domain, struct device *dev) { if (WARN_ON_ONCE(!dev_is_pci(dev))) return; - __msi_domain_free_irqs(domain, dev); - rtas_disable_msi(to_pci_dev(dev)); } static struct msi_domain_ops pseries_pci_msi_domain_ops = { .msi_prepare = pseries_msi_ops_prepare, .msi_free = pseries_msi_ops_msi_free, - .domain_free_irqs = pseries_msi_domain_free_irqs, + .msi_post_free = pseries_msi_post_free, }; static void pseries_msi_shutdown(struct irq_data *d) From patchwork Fri Nov 11 13:54:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 13040344 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AC996C43217 for ; Fri, 11 Nov 2022 13:55:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233844AbiKKNzW (ORCPT ); Fri, 11 Nov 2022 08:55:22 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58950 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233204AbiKKNy4 (ORCPT ); Fri, 11 Nov 2022 08:54:56 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7D19165863; Fri, 11 Nov 2022 05:54:32 -0800 (PST) Message-ID: <20221111122014.179595843@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668174871; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=oY+wTD07UJdZe/4apbDgNNcex5cwO56TFt4SFwForIc=; b=XKH6NEiB67Xn3bODoK1UFNxfG2Caz8t/SVVKnrvUY4TysvhYRo1CTn8qB9QRn9RXgGnOUn ZlbsPVdXWbPeRr+WmykWCafK8bLI9q2+VQe4v5gBp0//TxvsSvxCpPxquAuRMxNEgtM/2N FxObd8tB3rxUW6wBz7mLBiKynGG5OmxeXo5buw0kruHyiYCT7q3lsatjITlV+OIRMqapgo /ZgLE9xBM91qCV2tv5mSnn5R76PdySctgB00+MO+fIVUWs9O5o7hYp6u+FWK6+yL40MA1E eIxjf8p9VQYpJPcp119zLp2e+qHu7Ls8pywkEyFDGq1LVZW6sAQAPyCaxlhp7w== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668174871; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=oY+wTD07UJdZe/4apbDgNNcex5cwO56TFt4SFwForIc=; b=DEHoveL7w/ktG5ghiwXKDZHBT8EPqXrrOFE5Ik9fSJifrawkey+Jqom1hnjX29gXiW58gk NcPL/Y06TjJtq6Cg== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , Michael Ellerman , Christophe Leroy , linuxppc-dev@lists.ozlabs.org, "Ahmed S. Darwish" , Reinette Chatre Subject: [patch 10/39] genirq/msi: Make __msi_domain_free_irqs() static References: <20221111120501.026511281@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:54:30 +0100 (CET) Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Now that the last user is gone, confine it to the core code. Signed-off-by: Thomas Gleixner Reviewed-by: Jason Gunthorpe --- include/linux/msi.h | 4 ---- kernel/irq/msi.c | 3 ++- 2 files changed, 2 insertions(+), 5 deletions(-) --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -335,9 +335,6 @@ struct msi_domain_info; * are set to the default implementation if NULL and even when * MSI_FLAG_USE_DEF_DOM_OPS is not set to avoid breaking existing users and * because these callbacks are obviously mandatory. - * - * __msi_domain_free_irqs() is exposed for PPC pseries to handle extra - * work after all interrupts and descriptors have been freed. */ struct msi_domain_ops { irq_hw_number_t (*get_hwirq)(struct msi_domain_info *info, @@ -432,7 +429,6 @@ int msi_domain_alloc_irqs_descs_locked(s int nvec); int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev, int nvec); -void __msi_domain_free_irqs(struct irq_domain *domain, struct device *dev); void msi_domain_free_irqs_descs_locked(struct irq_domain *domain, struct device *dev); void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev); struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain); --- a/kernel/irq/msi.c +++ b/kernel/irq/msi.c @@ -463,6 +463,7 @@ static inline void msi_sysfs_remove_desc #ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN static int __msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev, int nvec); +static void __msi_domain_free_irqs(struct irq_domain *domain, struct device *dev); static inline void irq_chip_write_msi_msg(struct irq_data *data, struct msi_msg *msg) @@ -978,7 +979,7 @@ int msi_domain_alloc_irqs(struct irq_dom return ret; } -void __msi_domain_free_irqs(struct irq_domain *domain, struct device *dev) +static void __msi_domain_free_irqs(struct irq_domain *domain, struct device *dev) { struct msi_domain_info *info = domain->host_data; struct irq_data *irqd; From patchwork Fri Nov 11 13:54:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 13040345 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 10E95C43217 for ; Fri, 11 Nov 2022 13:55:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230303AbiKKNz2 (ORCPT ); Fri, 11 Nov 2022 08:55:28 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58850 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233678AbiKKNzN (ORCPT ); Fri, 11 Nov 2022 08:55:13 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4B03A7299D; Fri, 11 Nov 2022 05:54:34 -0800 (PST) Message-ID: <20221111122014.237221143@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668174872; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=i6lv85ZNUn8jbTiqiaOVEezDOQ2OYDxW2lkZxbSQfPs=; b=43XNu7V6lxNjeSplgzaxAS44tgV1Hxus/MQ0Rod85yoWEU9uzoUV0/Gvo4MbkhRTwi9Tzn K+wX7sK78xcXVDD899/v4pK5j+RLz0Ao3nSp2UCpEepJa70aoQnMHmpP19VhP2+pwR4qww 0tGVylR7vtiM38R3uV3EvetHi2nC3skf1+FL3cNo1DnnGoJtSoTvvwyivArsgTeJicRErs l1UHy/+fO39St2quL4Q1Hy4tm4W1uszLlCgDZRMWKSkBfgmRsWXid7/6U9QZn+s1br0VHF drP8Q36KtsFNrJNa9PZHRRkcIy1K7rYVmLVVutyERWy8ViXgAtWWWRTnnNlHgA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668174872; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=i6lv85ZNUn8jbTiqiaOVEezDOQ2OYDxW2lkZxbSQfPs=; b=r6FLcQ/XkDdVENpg6jrJnxOUENgvyAqRux+b2LWEAUoE54RxJtQQhVavaj2vznzl/JqrCy KnNE4MphZHlzBvCQ== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , Michael Ellerman , Christophe Leroy , linuxppc-dev@lists.ozlabs.org, "Ahmed S. Darwish" , Reinette Chatre Subject: [patch 11/39] genirq/irqdomain: Move bus token enum into a seperate header References: <20221111120501.026511281@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:54:32 +0100 (CET) Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Split the bus token defines out into a seperate header file to avoid inclusion of irqdomain.h in msi.h. Signed-off-by: Thomas Gleixner Reviewed-by: Ashok Raj Reviewed-by: Jason Gunthorpe --- include/linux/irqdomain.h | 22 +--------------------- include/linux/irqdomain_defs.h | 26 ++++++++++++++++++++++++++ 2 files changed, 27 insertions(+), 21 deletions(-) --- a/include/linux/irqdomain.h +++ b/include/linux/irqdomain.h @@ -31,6 +31,7 @@ #define _LINUX_IRQDOMAIN_H #include +#include #include #include #include @@ -68,27 +69,6 @@ struct irq_fwspec { void of_phandle_args_to_fwspec(struct device_node *np, const u32 *args, unsigned int count, struct irq_fwspec *fwspec); -/* - * Should several domains have the same device node, but serve - * different purposes (for example one domain is for PCI/MSI, and the - * other for wired IRQs), they can be distinguished using a - * bus-specific token. Most domains are expected to only carry - * DOMAIN_BUS_ANY. - */ -enum irq_domain_bus_token { - DOMAIN_BUS_ANY = 0, - DOMAIN_BUS_WIRED, - DOMAIN_BUS_GENERIC_MSI, - DOMAIN_BUS_PCI_MSI, - DOMAIN_BUS_PLATFORM_MSI, - DOMAIN_BUS_NEXUS, - DOMAIN_BUS_IPI, - DOMAIN_BUS_FSL_MC_MSI, - DOMAIN_BUS_TI_SCI_INTA_MSI, - DOMAIN_BUS_WAKEUP, - DOMAIN_BUS_VMD_MSI, -}; - /** * struct irq_domain_ops - Methods for irq_domain objects * @match: Match an interrupt controller device node to a host, returns --- /dev/null +++ b/include/linux/irqdomain_defs.h @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef _LINUX_IRQDOMAIN_DEFS_H +#define _LINUX_IRQDOMAIN_DEFS_H + +/* + * Should several domains have the same device node, but serve + * different purposes (for example one domain is for PCI/MSI, and the + * other for wired IRQs), they can be distinguished using a + * bus-specific token. Most domains are expected to only carry + * DOMAIN_BUS_ANY. + */ +enum irq_domain_bus_token { + DOMAIN_BUS_ANY = 0, + DOMAIN_BUS_WIRED, + DOMAIN_BUS_GENERIC_MSI, + DOMAIN_BUS_PCI_MSI, + DOMAIN_BUS_PLATFORM_MSI, + DOMAIN_BUS_NEXUS, + DOMAIN_BUS_IPI, + DOMAIN_BUS_FSL_MC_MSI, + DOMAIN_BUS_TI_SCI_INTA_MSI, + DOMAIN_BUS_WAKEUP, + DOMAIN_BUS_VMD_MSI, +}; + +#endif /* _LINUX_IRQDOMAIN_DEFS_H */ From patchwork Fri Nov 11 13:54:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 13040346 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3F57AC433FE for ; Fri, 11 Nov 2022 13:55:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233681AbiKKNzl (ORCPT ); Fri, 11 Nov 2022 08:55:41 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58804 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233688AbiKKNzT (ORCPT ); Fri, 11 Nov 2022 08:55:19 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A4414742D2; Fri, 11 Nov 2022 05:54:35 -0800 (PST) Message-ID: <20221111122014.294554462@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668174874; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=bJxkwerKAjiWe6cHbEqN33xS2DP9tmAemXhkKdu0gyY=; b=QLffNtOU+BM9Q6v/Z8H95R6LwiMPRmhfbmoj75MKEHMyuvoWkxB4RbZv0LOe8zConFdPn3 FoUFDUYVoPhjPiUz6C+xwY6wbZBS5lKJg3/Gsu3284EwPDC+c//3QKxn3kDkoOFde3hYQC +pd/Xgm/h8dGs8OjV+shpssdUDGjerTJOwD/8mC4GG/L0S4ZPt/7rL+PeupLgtvUpTDE1N Un9QztBWeePvOOGEhy8v40+sFh0e4oCbUYoSJSn1XhDvUlTbCyxiOgkrR743ROQ9a0ADqn +HbdIbRhYeOip7Q6YM6FLWMKuOVt6JtuB76/8dQyT2nLcE1Cab8xY9yYhSPJGw== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668174874; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=bJxkwerKAjiWe6cHbEqN33xS2DP9tmAemXhkKdu0gyY=; b=REJ8yjGkmRMaCMvX4cw1m2qo8vf54uF9WaXNDdGlD7gTrIZa0CONrZEpNhXpv0sciserxB AcKM8IQKL5Qmr3BQ== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , "Ahmed S. Darwish" , Reinette Chatre , Michael Ellerman , Christophe Leroy , linuxppc-dev@lists.ozlabs.org Subject: [patch 12/39] genirq/msi: Add bus token to struct msi_domain_info References: <20221111120501.026511281@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:54:33 +0100 (CET) Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Ahmed S. Darwish Add a bus token member to struct msi_domain_info and let msi_create_irq_domain() set the bus token. That allows to remove the bus token updates at the call sites. Suggested-by: Thomas Gleixner Signed-off-by: Ahmed S. Darwish Signed-off-by: Thomas Gleixner Reviewed-by: Jason Gunthorpe --- include/linux/msi.h | 19 +++++++++++-------- kernel/irq/msi.c | 7 +++++-- 2 files changed, 16 insertions(+), 10 deletions(-) --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -16,6 +16,7 @@ * abuse. The only function which is relevant for drivers is msi_get_virq(). */ +#include #include #include #include @@ -365,6 +366,7 @@ struct msi_domain_ops { /** * struct msi_domain_info - MSI interrupt domain data * @flags: Flags to decribe features and capabilities + * @bus_token: The domain bus token * @ops: The callback data structure * @chip: Optional: associated interrupt chip * @chip_data: Optional: associated interrupt chip data @@ -374,14 +376,15 @@ struct msi_domain_ops { * @data: Optional: domain specific data */ struct msi_domain_info { - u32 flags; - struct msi_domain_ops *ops; - struct irq_chip *chip; - void *chip_data; - irq_flow_handler_t handler; - void *handler_data; - const char *handler_name; - void *data; + u32 flags; + enum irq_domain_bus_token bus_token; + struct msi_domain_ops *ops; + struct irq_chip *chip; + void *chip_data; + irq_flow_handler_t handler; + void *handler_data; + const char *handler_name; + void *data; }; /* Flags for msi_domain_info */ --- a/kernel/irq/msi.c +++ b/kernel/irq/msi.c @@ -694,8 +694,11 @@ struct irq_domain *msi_create_irq_domain domain = irq_domain_create_hierarchy(parent, IRQ_DOMAIN_FLAG_MSI, 0, fwnode, &msi_domain_ops, info); - if (domain && !domain->name && info->chip) - domain->name = info->chip->name; + if (domain) { + if (!domain->name && info->chip) + domain->name = info->chip->name; + irq_domain_update_bus_token(domain, info->bus_token); + } return domain; } From patchwork Fri Nov 11 13:54:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 13040347 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 81DDEC4332F for ; Fri, 11 Nov 2022 13:55:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233695AbiKKNzr (ORCPT ); Fri, 11 Nov 2022 08:55:47 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59624 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233702AbiKKNzU (ORCPT ); Fri, 11 Nov 2022 08:55:20 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 521B1748CE; Fri, 11 Nov 2022 05:54:37 -0800 (PST) Message-ID: <20221111122014.352437595@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668174875; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=SR+JTKB3rKiZ73e/G+mgOLVXr9oQkVaEjTjLGttb2Gk=; b=cquks9wvdwGZvfTVGMseDqonmMru5Jvd1Wp80d+QA7r+OPUBjVQ33nkUC2zM/Xj1+O8fPG vtb671Sgwa26sjZk08mR0d6Khag9L+dcgpdaaiX3gijScukZ+VHAfliD2IMtv3iaBOUF0H z/MslAY6PXFpX332pOy1ThF73fCI+4dA58/e9E/htDuO/wELj5pOCP8hkEbevCn9g05Q6e Dc8lugCbNGIQGIngKhOUPod5JqprevnRQk8hF+mBQQn/l8M/1bzTmQzN7g8pOmzecptGGk /UJmMPp34YQm20YaIUWb6Ef0Mc9mjvia3FKyyNDWpMCxHg3It/xaV2cgV2oHEA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668174875; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=SR+JTKB3rKiZ73e/G+mgOLVXr9oQkVaEjTjLGttb2Gk=; b=upJdg7cKT2Y7T72CwaobIKCBWj/eDCRfZapw31fhp5ESPdWoHIOrAME2ohvtTWo1VMweL7 27ljumxd1t7PlDBA== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , "Ahmed S. Darwish" , Reinette Chatre , Michael Ellerman , Christophe Leroy , linuxppc-dev@lists.ozlabs.org Subject: [patch 13/39] PCI/MSI: Use msi_domain_info::bus_token References: <20221111120501.026511281@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:54:35 +0100 (CET) Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Ahmed S. Darwish Set the bus token in the msi_domain_info structure and let the core code handle the update. Signed-off-by: Ahmed S. Darwish Signed-off-by: Thomas Gleixner Acked-by: Bjorn Helgaas Reviewed-by: Jason Gunthorpe --- drivers/pci/msi/irqdomain.c | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) --- a/drivers/pci/msi/irqdomain.c +++ b/drivers/pci/msi/irqdomain.c @@ -162,8 +162,6 @@ struct irq_domain *pci_msi_create_irq_do struct msi_domain_info *info, struct irq_domain *parent) { - struct irq_domain *domain; - if (WARN_ON(info->flags & MSI_FLAG_LEVEL_CAPABLE)) info->flags &= ~MSI_FLAG_LEVEL_CAPABLE; @@ -178,13 +176,10 @@ struct irq_domain *pci_msi_create_irq_do /* PCI-MSI is oneshot-safe */ info->chip->flags |= IRQCHIP_ONESHOT_SAFE; + /* Let the core update the bus token */ + info->bus_token = DOMAIN_BUS_PCI_MSI; - domain = msi_create_irq_domain(fwnode, info, parent); - if (!domain) - return NULL; - - irq_domain_update_bus_token(domain, DOMAIN_BUS_PCI_MSI); - return domain; + return msi_create_irq_domain(fwnode, info, parent); } EXPORT_SYMBOL_GPL(pci_msi_create_irq_domain); From patchwork Fri Nov 11 13:54:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 13040348 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5509DC43217 for ; Fri, 11 Nov 2022 13:55:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233906AbiKKNzs (ORCPT ); Fri, 11 Nov 2022 08:55:48 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59638 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233817AbiKKNzU (ORCPT ); Fri, 11 Nov 2022 08:55:20 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E48C077E4A; Fri, 11 Nov 2022 05:54:38 -0800 (PST) Message-ID: <20221111122014.409654736@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668174877; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=ihQb1Hr2tFB57KaqSJ6TMuVbBaKbPYZLQeHvg5ugyrc=; b=KIxoGLm3fdgX8mVYTA3gqrUlF6RwTtW90vYGHTzR9LA4zR9jAvDQ3Mz275nIl+k1FsCVo8 BDasSMGgRPumnK+XCfXPGjj7fbt46WHiGID8auAQfUb2Fb1FPhMqiq4S5Vfu8sZEu1C9Y8 MQnr0/wDyfTzrL68KxmtWwLyR/P+t79hViR57xRScUXMobFg6K+I2h8IV+wgT+yxvAvOM7 7uVe7yokIXo/LjW9ONZit1EjWi5RuhSl2zMdJxNHQ3BUemd1RxyK5J0d706hKkPPOlSxn2 x/CvdueaKYFaZ+eSmgX5gR3aO6NPOicaxHiLhYOGfhjwy5k+jQQsoBWV8i2oLA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668174877; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=ihQb1Hr2tFB57KaqSJ6TMuVbBaKbPYZLQeHvg5ugyrc=; b=uMHNBoXC2VwEdIAQL/VEAVQGgdOqIQAKBY94YN3/zPMpA2g+0keRMDIAeVH1iiSVA9XOms zwnFBQCZgvigUJCQ== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , "Ahmed S. Darwish" , Reinette Chatre , Michael Ellerman , Christophe Leroy , linuxppc-dev@lists.ozlabs.org Subject: [patch 14/39] PCI/MSI: Let the MSI core free descriptors References: <20221111120501.026511281@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:54:37 +0100 (CET) Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Ahmed S. Darwish Let the core do the freeing of descriptors and just keep it around for the legacy case. Signed-off-by: Ahmed S. Darwish Signed-off-by: Thomas Gleixner Acked-by: Bjorn Helgaas Reviewed-by: Jason Gunthorpe --- drivers/pci/msi/irqdomain.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) --- a/drivers/pci/msi/irqdomain.c +++ b/drivers/pci/msi/irqdomain.c @@ -24,11 +24,12 @@ void pci_msi_teardown_msi_irqs(struct pc struct irq_domain *domain; domain = dev_get_msi_domain(&dev->dev); - if (domain && irq_domain_is_hierarchy(domain)) + if (domain && irq_domain_is_hierarchy(domain)) { msi_domain_free_irqs_descs_locked(domain, &dev->dev); - else + } else { pci_msi_legacy_teardown_msi_irqs(dev); - msi_free_msi_descs(&dev->dev); + msi_free_msi_descs(&dev->dev); + } } /** @@ -170,6 +171,9 @@ struct irq_domain *pci_msi_create_irq_do if (info->flags & MSI_FLAG_USE_DEF_CHIP_OPS) pci_msi_domain_update_chip_ops(info); + /* Let the core code free MSI descriptors when freeing interrupts */ + info->flags |= MSI_FLAG_FREE_MSI_DESCS; + info->flags |= MSI_FLAG_ACTIVATE_EARLY | MSI_FLAG_DEV_SYSFS; if (IS_ENABLED(CONFIG_GENERIC_IRQ_RESERVATION_MODE)) info->flags |= MSI_FLAG_MUST_REACTIVATE; From patchwork Fri Nov 11 13:54:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 13040349 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3D677C4332F for ; Fri, 11 Nov 2022 13:56:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233728AbiKKN4C (ORCPT ); Fri, 11 Nov 2022 08:56:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58976 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233856AbiKKNzX (ORCPT ); Fri, 11 Nov 2022 08:55:23 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 92F5777E7D; Fri, 11 Nov 2022 05:54:40 -0800 (PST) Message-ID: <20221111122014.467556921@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668174879; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=5A7Hp3XooT8XFfSy8bD+z0GIWEX9YLOligSHPn52djI=; b=iWL4l2OvhkPUWALd1814ZNr/gBhu0qEaVl9fSSzsJZIcWUG2YXvbdIoclzl8rW6a6FgMWE eh0qylJadkJaTWW+uqDyv5XnRmsA1j1VbxqHAJyLNVaAIkKv+y5BiX+lI2WKQ9p4+tJ9HE P9kKEWR/XqgF5zZ1KA26AjGgkDpVApxwsl40T7f/yp4z8fQIpv3qXKb+6F5BPO2lgDFrRC m/3U7mPfEtw5HDLGpTUEUZgbSVh62PYg6NLnVEcYRXDnvkOrBxcM1z41RkcVbXb6Bzp8bn j0rtJzOMSZ5BIvGIDGRVsJjN/DomHYf+7QVslyZwYopRLbo5u928E5HbQocehA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668174879; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=5A7Hp3XooT8XFfSy8bD+z0GIWEX9YLOligSHPn52djI=; b=rit8bAKYvhVCKVUhHQidI0ex1MExnTBgg5dic01XJKyhNARkljhCWg4Wvu7CwvCUz84tta NK5ou3RdG3d7Z2DA== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , Michael Ellerman , Christophe Leroy , linuxppc-dev@lists.ozlabs.org, "Ahmed S. Darwish" , Reinette Chatre Subject: [patch 15/39] PCI/MSI: Get rid of PCI_MSI_IRQ_DOMAIN References: <20221111120501.026511281@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:54:38 +0100 (CET) Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org What a zoo: PCI_MSI select GENERIC_MSI_IRQ PCI_MSI_IRQ_DOMAIN def_bool y depends on PCI_MSI select GENERIC_MSI_IRQ_DOMAIN Ergo PCI_MSI enables PCI_MSI_IRQ_DOMAIN which in turn selects GENERIC_MSI_IRQ_DOMAIN. So all the dependencies on PCI_MSI_IRQ_DOMAIN are just an indirection to PCI_MSI. Match the reality and just admit that PCI_MSI requires GENERIC_MSI_IRQ_DOMAIN. Signed-off-by: Thomas Gleixner Acked-by: Bjorn Helgaas Reviewed-by: Jason Gunthorpe --- arch/um/drivers/Kconfig | 1 arch/um/include/asm/pci.h | 2 - arch/x86/Kconfig | 1 arch/x86/include/asm/pci.h | 4 +- drivers/pci/Kconfig | 8 +---- drivers/pci/controller/Kconfig | 30 +++++++++----------- drivers/pci/controller/dwc/Kconfig | 48 ++++++++++++++++---------------- drivers/pci/controller/mobiveil/Kconfig | 6 ++-- drivers/pci/msi/Makefile | 2 - drivers/pci/probe.c | 2 - include/linux/msi.h | 32 ++++++--------------- 11 files changed, 56 insertions(+), 80 deletions(-) --- a/arch/um/drivers/Kconfig +++ b/arch/um/drivers/Kconfig @@ -381,7 +381,6 @@ config UML_PCI_OVER_VIRTIO select UML_IOMEM_EMULATION select UML_DMA_EMULATION select PCI_MSI - select PCI_MSI_IRQ_DOMAIN select PCI_LOCKLESS_CONFIG config UML_PCI_OVER_VIRTIO_DEVICE_ID --- a/arch/um/include/asm/pci.h +++ b/arch/um/include/asm/pci.h @@ -7,7 +7,7 @@ /* Generic PCI */ #include -#ifdef CONFIG_PCI_MSI_IRQ_DOMAIN +#ifdef CONFIG_PCI_MSI /* * This is a bit of an annoying hack, and it assumes we only have * the virt-pci (if anything). Which is true, but still. --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -1109,7 +1109,6 @@ config X86_LOCAL_APIC def_bool y depends on X86_64 || SMP || X86_32_NON_STANDARD || X86_UP_APIC || PCI_MSI select IRQ_DOMAIN_HIERARCHY - select PCI_MSI_IRQ_DOMAIN if PCI_MSI config X86_IO_APIC def_bool y --- a/arch/x86/include/asm/pci.h +++ b/arch/x86/include/asm/pci.h @@ -21,7 +21,7 @@ struct pci_sysdata { #ifdef CONFIG_X86_64 void *iommu; /* IOMMU private data */ #endif -#ifdef CONFIG_PCI_MSI_IRQ_DOMAIN +#ifdef CONFIG_PCI_MSI void *fwnode; /* IRQ domain for MSI assignment */ #endif #if IS_ENABLED(CONFIG_VMD) @@ -52,7 +52,7 @@ static inline int pci_proc_domain(struct } #endif -#ifdef CONFIG_PCI_MSI_IRQ_DOMAIN +#ifdef CONFIG_PCI_MSI static inline void *_pci_root_bus_fwnode(struct pci_bus *bus) { return to_pci_sysdata(bus)->fwnode; --- a/drivers/pci/Kconfig +++ b/drivers/pci/Kconfig @@ -38,6 +38,7 @@ source "drivers/pci/pcie/Kconfig" config PCI_MSI bool "Message Signaled Interrupts (MSI and MSI-X)" + select GENERIC_MSI_IRQ_DOMAIN select GENERIC_MSI_IRQ help This allows device drivers to enable MSI (Message Signaled @@ -51,11 +52,6 @@ config PCI_MSI If you don't know what to do here, say Y. -config PCI_MSI_IRQ_DOMAIN - def_bool y - depends on PCI_MSI - select GENERIC_MSI_IRQ_DOMAIN - config PCI_MSI_ARCH_FALLBACKS bool @@ -192,7 +188,7 @@ config PCI_LABEL config PCI_HYPERV tristate "Hyper-V PCI Frontend" - depends on ((X86 && X86_64) || ARM64) && HYPERV && PCI_MSI && PCI_MSI_IRQ_DOMAIN && SYSFS + depends on ((X86 && X86_64) || ARM64) && HYPERV && PCI_MSI && SYSFS select PCI_HYPERV_INTERFACE help The PCI device frontend driver allows the kernel to import arbitrary --- a/drivers/pci/controller/Kconfig +++ b/drivers/pci/controller/Kconfig @@ -19,7 +19,7 @@ config PCI_AARDVARK tristate "Aardvark PCIe controller" depends on (ARCH_MVEBU && ARM64) || COMPILE_TEST depends on OF - depends on PCI_MSI_IRQ_DOMAIN + depends on PCI_MSI select PCI_BRIDGE_EMUL help Add support for Aardvark 64bit PCIe Host Controller. This @@ -29,7 +29,7 @@ config PCI_AARDVARK config PCIE_XILINX_NWL bool "NWL PCIe Core" depends on ARCH_ZYNQMP || COMPILE_TEST - depends on PCI_MSI_IRQ_DOMAIN + depends on PCI_MSI help Say 'Y' here if you want kernel support for Xilinx NWL PCIe controller. The controller can act as Root Port @@ -53,7 +53,7 @@ config PCI_IXP4XX config PCI_TEGRA bool "NVIDIA Tegra PCIe controller" depends on ARCH_TEGRA || COMPILE_TEST - depends on PCI_MSI_IRQ_DOMAIN + depends on PCI_MSI help Say Y here if you want support for the PCIe host controller found on NVIDIA Tegra SoCs. @@ -70,7 +70,7 @@ config PCI_RCAR_GEN2 config PCIE_RCAR_HOST bool "Renesas R-Car PCIe host controller" depends on ARCH_RENESAS || COMPILE_TEST - depends on PCI_MSI_IRQ_DOMAIN + depends on PCI_MSI help Say Y here if you want PCIe controller support on R-Car SoCs in host mode. @@ -99,7 +99,7 @@ config PCI_HOST_GENERIC config PCIE_XILINX bool "Xilinx AXI PCIe host bridge support" depends on OF || COMPILE_TEST - depends on PCI_MSI_IRQ_DOMAIN + depends on PCI_MSI help Say 'Y' here if you want kernel to support the Xilinx AXI PCIe Host Bridge driver. @@ -124,7 +124,7 @@ config PCI_XGENE config PCI_XGENE_MSI bool "X-Gene v1 PCIe MSI feature" depends on PCI_XGENE - depends on PCI_MSI_IRQ_DOMAIN + depends on PCI_MSI default y help Say Y here if you want PCIe MSI support for the APM X-Gene v1 SoC. @@ -170,7 +170,7 @@ config PCIE_IPROC_BCMA config PCIE_IPROC_MSI bool "Broadcom iProc PCIe MSI support" depends on PCIE_IPROC_PLATFORM || PCIE_IPROC_BCMA - depends on PCI_MSI_IRQ_DOMAIN + depends on PCI_MSI default ARCH_BCM_IPROC help Say Y here if you want to enable MSI support for Broadcom's iProc @@ -186,7 +186,7 @@ config PCIE_ALTERA config PCIE_ALTERA_MSI tristate "Altera PCIe MSI feature" depends on PCIE_ALTERA - depends on PCI_MSI_IRQ_DOMAIN + depends on PCI_MSI help Say Y here if you want PCIe MSI support for the Altera FPGA. This MSI driver supports Altera MSI to GIC controller IP. @@ -215,7 +215,7 @@ config PCIE_ROCKCHIP_HOST tristate "Rockchip PCIe host controller" depends on ARCH_ROCKCHIP || COMPILE_TEST depends on OF - depends on PCI_MSI_IRQ_DOMAIN + depends on PCI_MSI select MFD_SYSCON select PCIE_ROCKCHIP help @@ -239,7 +239,7 @@ config PCIE_MEDIATEK tristate "MediaTek PCIe controller" depends on ARCH_AIROHA || ARCH_MEDIATEK || COMPILE_TEST depends on OF - depends on PCI_MSI_IRQ_DOMAIN + depends on PCI_MSI help Say Y here if you want to enable PCIe controller support on MediaTek SoCs. @@ -247,7 +247,7 @@ config PCIE_MEDIATEK config PCIE_MEDIATEK_GEN3 tristate "MediaTek Gen3 PCIe controller" depends on ARCH_MEDIATEK || COMPILE_TEST - depends on PCI_MSI_IRQ_DOMAIN + depends on PCI_MSI help Adds support for PCIe Gen3 MAC controller for MediaTek SoCs. This PCIe controller is compatible with Gen3, Gen2 and Gen1 speed, @@ -277,7 +277,7 @@ config PCIE_BRCMSTB depends on ARCH_BRCMSTB || ARCH_BCM2835 || ARCH_BCMBCA || \ BMIPS_GENERIC || COMPILE_TEST depends on OF - depends on PCI_MSI_IRQ_DOMAIN + depends on PCI_MSI default ARCH_BRCMSTB || BMIPS_GENERIC help Say Y here to enable PCIe host controller support for @@ -285,7 +285,7 @@ config PCIE_BRCMSTB config PCI_HYPERV_INTERFACE tristate "Hyper-V PCI Interface" - depends on ((X86 && X86_64) || ARM64) && HYPERV && PCI_MSI && PCI_MSI_IRQ_DOMAIN + depends on ((X86 && X86_64) || ARM64) && HYPERV && PCI_MSI && PCI_MSI help The Hyper-V PCI Interface is a helper driver allows other drivers to have a common interface with the Hyper-V PCI frontend driver. @@ -303,8 +303,6 @@ config PCI_LOONGSON config PCIE_MICROCHIP_HOST bool "Microchip AXI PCIe host bridge support" depends on PCI_MSI && OF - select PCI_MSI_IRQ_DOMAIN - select GENERIC_MSI_IRQ_DOMAIN select PCI_HOST_COMMON help Say Y here if you want kernel to support the Microchip AXI PCIe @@ -326,7 +324,7 @@ config PCIE_APPLE tristate "Apple PCIe controller" depends on ARCH_APPLE || COMPILE_TEST depends on OF - depends on PCI_MSI_IRQ_DOMAIN + depends on PCI_MSI select PCI_HOST_COMMON help Say Y here if you want to enable PCIe controller support on Apple --- a/drivers/pci/controller/dwc/Kconfig +++ b/drivers/pci/controller/dwc/Kconfig @@ -21,7 +21,7 @@ config PCI_DRA7XX_HOST tristate "TI DRA7xx PCIe controller Host Mode" depends on SOC_DRA7XX || COMPILE_TEST depends on OF && HAS_IOMEM && TI_PIPE3 - depends on PCI_MSI_IRQ_DOMAIN + depends on PCI_MSI select PCIE_DW_HOST select PCI_DRA7XX default y if SOC_DRA7XX @@ -53,7 +53,7 @@ config PCIE_DW_PLAT config PCIE_DW_PLAT_HOST bool "Platform bus based DesignWare PCIe Controller - Host mode" - depends on PCI_MSI_IRQ_DOMAIN + depends on PCI_MSI select PCIE_DW_HOST select PCIE_DW_PLAT help @@ -67,7 +67,7 @@ config PCIE_DW_PLAT_HOST config PCIE_DW_PLAT_EP bool "Platform bus based DesignWare PCIe Controller - Endpoint mode" - depends on PCI && PCI_MSI_IRQ_DOMAIN + depends on PCI && PCI_MSI depends on PCI_ENDPOINT select PCIE_DW_EP select PCIE_DW_PLAT @@ -83,7 +83,7 @@ config PCIE_DW_PLAT_EP config PCI_EXYNOS tristate "Samsung Exynos PCIe controller" depends on ARCH_EXYNOS || COMPILE_TEST - depends on PCI_MSI_IRQ_DOMAIN + depends on PCI_MSI select PCIE_DW_HOST help Enables support for the PCIe controller in the Samsung Exynos SoCs @@ -94,13 +94,13 @@ config PCI_EXYNOS config PCI_IMX6 bool "Freescale i.MX6/7/8 PCIe controller" depends on ARCH_MXC || COMPILE_TEST - depends on PCI_MSI_IRQ_DOMAIN + depends on PCI_MSI select PCIE_DW_HOST config PCIE_SPEAR13XX bool "STMicroelectronics SPEAr PCIe controller" depends on ARCH_SPEAR13XX || COMPILE_TEST - depends on PCI_MSI_IRQ_DOMAIN + depends on PCI_MSI select PCIE_DW_HOST help Say Y here if you want PCIe support on SPEAr13XX SoCs. @@ -111,7 +111,7 @@ config PCI_KEYSTONE config PCI_KEYSTONE_HOST bool "PCI Keystone Host Mode" depends on ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST - depends on PCI_MSI_IRQ_DOMAIN + depends on PCI_MSI select PCIE_DW_HOST select PCI_KEYSTONE help @@ -135,7 +135,7 @@ config PCI_KEYSTONE_EP config PCI_LAYERSCAPE bool "Freescale Layerscape PCIe controller - Host mode" depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST) - depends on PCI_MSI_IRQ_DOMAIN + depends on PCI_MSI select PCIE_DW_HOST select MFD_SYSCON help @@ -160,7 +160,7 @@ config PCI_LAYERSCAPE_EP config PCI_HISI depends on OF && (ARM64 || COMPILE_TEST) bool "HiSilicon Hip05 and Hip06 SoCs PCIe controllers" - depends on PCI_MSI_IRQ_DOMAIN + depends on PCI_MSI select PCIE_DW_HOST select PCI_HOST_COMMON help @@ -170,7 +170,7 @@ config PCI_HISI config PCIE_QCOM bool "Qualcomm PCIe controller" depends on OF && (ARCH_QCOM || COMPILE_TEST) - depends on PCI_MSI_IRQ_DOMAIN + depends on PCI_MSI select PCIE_DW_HOST select CRC8 help @@ -191,7 +191,7 @@ config PCIE_QCOM_EP config PCIE_ARMADA_8K bool "Marvell Armada-8K PCIe controller" depends on ARCH_MVEBU || COMPILE_TEST - depends on PCI_MSI_IRQ_DOMAIN + depends on PCI_MSI select PCIE_DW_HOST help Say Y here if you want to enable PCIe controller support on @@ -205,7 +205,7 @@ config PCIE_ARTPEC6 config PCIE_ARTPEC6_HOST bool "Axis ARTPEC-6 PCIe controller Host Mode" depends on MACH_ARTPEC6 || COMPILE_TEST - depends on PCI_MSI_IRQ_DOMAIN + depends on PCI_MSI select PCIE_DW_HOST select PCIE_ARTPEC6 help @@ -226,7 +226,7 @@ config PCIE_ROCKCHIP_DW_HOST bool "Rockchip DesignWare PCIe controller" select PCIE_DW select PCIE_DW_HOST - depends on PCI_MSI_IRQ_DOMAIN + depends on PCI_MSI depends on ARCH_ROCKCHIP || COMPILE_TEST depends on OF help @@ -236,7 +236,7 @@ config PCIE_ROCKCHIP_DW_HOST config PCIE_INTEL_GW bool "Intel Gateway PCIe host controller support" depends on OF && (X86 || COMPILE_TEST) - depends on PCI_MSI_IRQ_DOMAIN + depends on PCI_MSI select PCIE_DW_HOST help Say 'Y' here to enable PCIe Host controller support on Intel @@ -250,7 +250,7 @@ config PCIE_KEEMBAY config PCIE_KEEMBAY_HOST bool "Intel Keem Bay PCIe controller - Host mode" depends on ARCH_KEEMBAY || COMPILE_TEST - depends on PCI && PCI_MSI_IRQ_DOMAIN + depends on PCI_MSI select PCIE_DW_HOST select PCIE_KEEMBAY help @@ -262,7 +262,7 @@ config PCIE_KEEMBAY_HOST config PCIE_KEEMBAY_EP bool "Intel Keem Bay PCIe controller - Endpoint mode" depends on ARCH_KEEMBAY || COMPILE_TEST - depends on PCI && PCI_MSI_IRQ_DOMAIN + depends on PCI_MSI depends on PCI_ENDPOINT select PCIE_DW_EP select PCIE_KEEMBAY @@ -275,7 +275,7 @@ config PCIE_KEEMBAY_EP config PCIE_KIRIN depends on OF && (ARM64 || COMPILE_TEST) tristate "HiSilicon Kirin series SoCs PCIe controllers" - depends on PCI_MSI_IRQ_DOMAIN + depends on PCI_MSI select PCIE_DW_HOST help Say Y here if you want PCIe controller support @@ -284,7 +284,7 @@ config PCIE_KIRIN config PCIE_HISI_STB bool "HiSilicon STB SoCs PCIe controllers" depends on ARCH_HISI || COMPILE_TEST - depends on PCI_MSI_IRQ_DOMAIN + depends on PCI_MSI select PCIE_DW_HOST help Say Y here if you want PCIe controller support on HiSilicon STB SoCs @@ -292,7 +292,7 @@ config PCIE_HISI_STB config PCI_MESON tristate "MESON PCIe controller" default m if ARCH_MESON - depends on PCI_MSI_IRQ_DOMAIN + depends on PCI_MSI select PCIE_DW_HOST help Say Y here if you want to enable PCI controller support on Amlogic @@ -306,7 +306,7 @@ config PCIE_TEGRA194 config PCIE_TEGRA194_HOST tristate "NVIDIA Tegra194 (and later) PCIe controller - Host Mode" depends on ARCH_TEGRA_194_SOC || COMPILE_TEST - depends on PCI_MSI_IRQ_DOMAIN + depends on PCI_MSI select PCIE_DW_HOST select PHY_TEGRA194_P2U select PCIE_TEGRA194 @@ -336,7 +336,7 @@ config PCIE_TEGRA194_EP config PCIE_VISCONTI_HOST bool "Toshiba Visconti PCIe controllers" depends on ARCH_VISCONTI || COMPILE_TEST - depends on PCI_MSI_IRQ_DOMAIN + depends on PCI_MSI select PCIE_DW_HOST help Say Y here if you want PCIe controller support on Toshiba Visconti SoC. @@ -346,7 +346,7 @@ config PCIE_UNIPHIER bool "Socionext UniPhier PCIe host controllers" depends on ARCH_UNIPHIER || COMPILE_TEST depends on OF && HAS_IOMEM - depends on PCI_MSI_IRQ_DOMAIN + depends on PCI_MSI select PCIE_DW_HOST help Say Y here if you want PCIe host controller support on UniPhier SoCs. @@ -365,7 +365,7 @@ config PCIE_UNIPHIER_EP config PCIE_AL bool "Amazon Annapurna Labs PCIe controller" depends on OF && (ARM64 || COMPILE_TEST) - depends on PCI_MSI_IRQ_DOMAIN + depends on PCI_MSI select PCIE_DW_HOST select PCI_ECAM help @@ -377,7 +377,7 @@ config PCIE_AL config PCIE_FU740 bool "SiFive FU740 PCIe host controller" - depends on PCI_MSI_IRQ_DOMAIN + depends on PCI_MSI depends on SOC_SIFIVE || COMPILE_TEST select PCIE_DW_HOST help --- a/drivers/pci/controller/mobiveil/Kconfig +++ b/drivers/pci/controller/mobiveil/Kconfig @@ -8,14 +8,14 @@ config PCIE_MOBIVEIL config PCIE_MOBIVEIL_HOST bool - depends on PCI_MSI_IRQ_DOMAIN + depends on PCI_MSI select PCIE_MOBIVEIL config PCIE_MOBIVEIL_PLAT bool "Mobiveil AXI PCIe controller" depends on ARCH_ZYNQMP || COMPILE_TEST depends on OF - depends on PCI_MSI_IRQ_DOMAIN + depends on PCI_MSI select PCIE_MOBIVEIL_HOST help Say Y here if you want to enable support for the Mobiveil AXI PCIe @@ -25,7 +25,7 @@ config PCIE_MOBIVEIL_PLAT config PCIE_LAYERSCAPE_GEN4 bool "Freescale Layerscape PCIe Gen4 controller" depends on ARCH_LAYERSCAPE || COMPILE_TEST - depends on PCI_MSI_IRQ_DOMAIN + depends on PCI_MSI select PCIE_MOBIVEIL_HOST help Say Y here if you want PCIe Gen4 controller support on --- a/drivers/pci/msi/Makefile +++ b/drivers/pci/msi/Makefile @@ -3,5 +3,5 @@ # Makefile for the PCI/MSI obj-$(CONFIG_PCI) += pcidev_msi.o obj-$(CONFIG_PCI_MSI) += msi.o -obj-$(CONFIG_PCI_MSI_IRQ_DOMAIN) += irqdomain.o +obj-$(CONFIG_PCI_MSI) += irqdomain.o obj-$(CONFIG_PCI_MSI_ARCH_FALLBACKS) += legacy.o --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -842,7 +842,6 @@ static struct irq_domain *pci_host_bridg if (!d) d = pci_host_bridge_acpi_msi_domain(bus); -#ifdef CONFIG_PCI_MSI_IRQ_DOMAIN /* * If no IRQ domain was found via the OF tree, try looking it up * directly through the fwnode_handle. @@ -854,7 +853,6 @@ static struct irq_domain *pci_host_bridg d = irq_find_matching_fwnode(fwnode, DOMAIN_BUS_PCI_MSI); } -#endif return d; } --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -238,15 +238,6 @@ static inline void msi_desc_set_iommu_co } #endif -#ifdef CONFIG_PCI_MSI -struct pci_dev *msi_desc_to_pci_dev(struct msi_desc *desc); -void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg); -#else /* CONFIG_PCI_MSI */ -static inline void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg) -{ -} -#endif /* CONFIG_PCI_MSI */ - int msi_add_msi_desc(struct device *dev, struct msi_desc *init_desc); void msi_free_msi_descs_range(struct device *dev, unsigned int first_index, unsigned int last_index); @@ -259,12 +250,6 @@ static inline void msi_free_msi_descs(st msi_free_msi_descs_range(dev, 0, MSI_MAX_INDEX); } -void __pci_read_msi_msg(struct msi_desc *entry, struct msi_msg *msg); -void __pci_write_msi_msg(struct msi_desc *entry, struct msi_msg *msg); - -void pci_msi_mask_irq(struct irq_data *data); -void pci_msi_unmask_irq(struct irq_data *data); - /* * The arch hooks to setup up msi irqs. Default functions are implemented * as weak symbols so that they /can/ be overriden by architecture specific @@ -466,20 +451,21 @@ int platform_msi_device_domain_alloc(str void platform_msi_device_domain_free(struct irq_domain *domain, unsigned int virq, unsigned int nvec); void *platform_msi_get_host_data(struct irq_domain *domain); -#endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */ -#ifdef CONFIG_PCI_MSI_IRQ_DOMAIN +/* PCI specific interfaces */ +struct pci_dev *msi_desc_to_pci_dev(struct msi_desc *desc); +void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg); +void __pci_read_msi_msg(struct msi_desc *entry, struct msi_msg *msg); +void __pci_write_msi_msg(struct msi_desc *entry, struct msi_msg *msg); +void pci_msi_mask_irq(struct irq_data *data); +void pci_msi_unmask_irq(struct irq_data *data); struct irq_domain *pci_msi_create_irq_domain(struct fwnode_handle *fwnode, struct msi_domain_info *info, struct irq_domain *parent); u32 pci_msi_domain_get_msi_rid(struct irq_domain *domain, struct pci_dev *pdev); struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev); bool pci_dev_has_special_msi_domain(struct pci_dev *pdev); -#else -static inline struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev) -{ - return NULL; -} -#endif /* CONFIG_PCI_MSI_IRQ_DOMAIN */ + +#endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */ #endif /* LINUX_MSI_H */ From patchwork Fri Nov 11 13:54:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 13040350 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BEC2DC433FE for ; Fri, 11 Nov 2022 13:56:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233931AbiKKN4E (ORCPT ); Fri, 11 Nov 2022 08:56:04 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59184 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233742AbiKKNz0 (ORCPT ); Fri, 11 Nov 2022 08:55:26 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6E58478787; Fri, 11 Nov 2022 05:54:42 -0800 (PST) Message-ID: <20221111122014.524842979@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668174881; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=nX/kiLyWbr8sCZk981ReIZHgMoXYScRSLUvvPHFhr+I=; b=u+KdizKIt0qM9c1mNxNUainFe4cGSOxc3N7pjkIEmS03JsV/DWdst/DT7IplYSztLzsVzU UPERaAB4cQbJQN0rmoya/Mop8w5AUrc179VezSEsaHCbmr2wDiCy9wrleD1L5rUfGr0JPj n4CHbvKTkVKCfwHr7eGPRgT54TSzmsIAXAMYrs9K2Id69TQxBfRD6c0leeXX4bIDR8bOoJ NR1svsLag9E2s6kkeFuyi/FRh7yJeVXWUjGbLHzwm01HqZ4MCmDg3wkmFq0XxYP8ejzWhO ZXbyaI2SYu53F+1vf/U+PMA6gYfbS8P7uGDsYtnXhtiU3dQlg9LFaVUKSW8KsQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668174881; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=nX/kiLyWbr8sCZk981ReIZHgMoXYScRSLUvvPHFhr+I=; b=/gV9HPvtDrFTGv71bnYr6Mkzio2kV8KLKv7kYe2p3/RNpbT1YL7VYB6F+i6XmG4yWYIND2 57yVqfg7L8qDwiBQ== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , Michael Ellerman , Christophe Leroy , linuxppc-dev@lists.ozlabs.org, "Ahmed S. Darwish" , Reinette Chatre Subject: [patch 16/39] genirq: Get rid of GENERIC_MSI_IRQ_DOMAIN References: <20221111120501.026511281@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:54:40 +0100 (CET) Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Adjust to reality and remove another layer of pointless Kconfig indirection. CONFIG_GENERIC_MSI_IRQ is good enough to serve all purposes. Signed-off-by: Thomas Gleixner Reviewed-by: Jason Gunthorpe --- drivers/base/Makefile | 2 +- drivers/bus/fsl-mc/Kconfig | 2 +- drivers/dma/Kconfig | 2 +- drivers/dma/qcom/hidma.c | 8 ++++---- drivers/iommu/Kconfig | 2 +- drivers/irqchip/Kconfig | 6 +++--- drivers/mailbox/Kconfig | 2 +- drivers/pci/Kconfig | 1 - drivers/perf/Kconfig | 2 +- drivers/soc/ti/Kconfig | 2 +- include/asm-generic/msi.h | 4 ++-- include/linux/device.h | 8 +++----- include/linux/gpio/driver.h | 2 +- include/linux/msi.h | 10 ++-------- kernel/irq/Kconfig | 7 +------ kernel/irq/msi.c | 3 --- 16 files changed, 23 insertions(+), 40 deletions(-) --- a/drivers/base/Makefile +++ b/drivers/base/Makefile @@ -22,7 +22,7 @@ obj-$(CONFIG_REGMAP) += regmap/ obj-$(CONFIG_SOC_BUS) += soc.o obj-$(CONFIG_PINCTRL) += pinctrl.o obj-$(CONFIG_DEV_COREDUMP) += devcoredump.o -obj-$(CONFIG_GENERIC_MSI_IRQ_DOMAIN) += platform-msi.o +obj-$(CONFIG_GENERIC_MSI_IRQ) += platform-msi.o obj-$(CONFIG_GENERIC_ARCH_TOPOLOGY) += arch_topology.o obj-$(CONFIG_GENERIC_ARCH_NUMA) += arch_numa.o obj-$(CONFIG_ACPI) += physical_location.o --- a/drivers/bus/fsl-mc/Kconfig +++ b/drivers/bus/fsl-mc/Kconfig @@ -8,7 +8,7 @@ config FSL_MC_BUS bool "QorIQ DPAA2 fsl-mc bus driver" depends on OF && (ARCH_LAYERSCAPE || (COMPILE_TEST && (ARM || ARM64 || X86_LOCAL_APIC || PPC))) - select GENERIC_MSI_IRQ_DOMAIN + select GENERIC_MSI_IRQ help Driver to enable the bus infrastructure for the QorIQ DPAA2 architecture. The fsl-mc bus driver handles discovery of --- a/drivers/dma/Kconfig +++ b/drivers/dma/Kconfig @@ -462,7 +462,7 @@ config MV_XOR_V2 select DMA_ENGINE select DMA_ENGINE_RAID select ASYNC_TX_ENABLE_CHANNEL_SWITCH - select GENERIC_MSI_IRQ_DOMAIN + select GENERIC_MSI_IRQ help Enable support for the Marvell version 2 XOR engine. --- a/drivers/dma/qcom/hidma.c +++ b/drivers/dma/qcom/hidma.c @@ -610,7 +610,7 @@ static irqreturn_t hidma_chirq_handler(i return hidma_ll_inthandler(chirq, lldev); } -#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN +#ifdef CONFIG_GENERIC_MSI_IRQ static irqreturn_t hidma_chirq_handler_msi(int chirq, void *arg) { struct hidma_lldev **lldevp = arg; @@ -671,7 +671,7 @@ static int hidma_sysfs_init(struct hidma return device_create_file(dev->ddev.dev, dev->chid_attrs); } -#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN +#ifdef CONFIG_GENERIC_MSI_IRQ static void hidma_write_msi_msg(struct msi_desc *desc, struct msi_msg *msg) { struct device *dev = msi_desc_to_dev(desc); @@ -687,7 +687,7 @@ static void hidma_write_msi_msg(struct m static void hidma_free_msis(struct hidma_dev *dmadev) { -#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN +#ifdef CONFIG_GENERIC_MSI_IRQ struct device *dev = dmadev->ddev.dev; int i, virq; @@ -704,7 +704,7 @@ static void hidma_free_msis(struct hidma static int hidma_request_msi(struct hidma_dev *dmadev, struct platform_device *pdev) { -#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN +#ifdef CONFIG_GENERIC_MSI_IRQ int rc, i, virq; rc = platform_msi_domain_alloc_irqs(&pdev->dev, HIDMA_MSI_INTS, --- a/drivers/iommu/Kconfig +++ b/drivers/iommu/Kconfig @@ -389,7 +389,7 @@ config ARM_SMMU_V3 depends on ARM64 select IOMMU_API select IOMMU_IO_PGTABLE_LPAE - select GENERIC_MSI_IRQ_DOMAIN + select GENERIC_MSI_IRQ help Support for implementations of the ARM System MMU architecture version 3 providing translation support to a PCIe root complex. --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -38,7 +38,7 @@ config ARM_GIC_V3 config ARM_GIC_V3_ITS bool - select GENERIC_MSI_IRQ_DOMAIN + select GENERIC_MSI_IRQ default ARM_GIC_V3 config ARM_GIC_V3_ITS_PCI @@ -375,7 +375,7 @@ config MVEBU_ICU config MVEBU_ODMI bool - select GENERIC_MSI_IRQ_DOMAIN + select GENERIC_MSI_IRQ config MVEBU_PIC bool @@ -488,7 +488,7 @@ config IMX_MU_MSI default m if ARCH_MXC select IRQ_DOMAIN select IRQ_DOMAIN_HIERARCHY - select GENERIC_MSI_IRQ_DOMAIN + select GENERIC_MSI_IRQ help Provide a driver for the i.MX Messaging Unit block used as a CPU-to-CPU MSI controller. This requires a specially crafted DT --- a/drivers/mailbox/Kconfig +++ b/drivers/mailbox/Kconfig @@ -223,7 +223,7 @@ config BCM_FLEXRM_MBOX tristate "Broadcom FlexRM Mailbox" depends on ARM64 depends on ARCH_BCM_IPROC || COMPILE_TEST - select GENERIC_MSI_IRQ_DOMAIN + select GENERIC_MSI_IRQ default m if ARCH_BCM_IPROC help Mailbox implementation of the Broadcom FlexRM ring manager, --- a/drivers/pci/Kconfig +++ b/drivers/pci/Kconfig @@ -38,7 +38,6 @@ source "drivers/pci/pcie/Kconfig" config PCI_MSI bool "Message Signaled Interrupts (MSI and MSI-X)" - select GENERIC_MSI_IRQ_DOMAIN select GENERIC_MSI_IRQ help This allows device drivers to enable MSI (Message Signaled --- a/drivers/perf/Kconfig +++ b/drivers/perf/Kconfig @@ -93,7 +93,7 @@ config ARM_PMU_ACPI config ARM_SMMU_V3_PMU tristate "ARM SMMUv3 Performance Monitors Extension" depends on (ARM64 && ACPI) || (COMPILE_TEST && 64BIT) - depends on GENERIC_MSI_IRQ_DOMAIN + depends on GENERIC_MSI_IRQ help Provides support for the ARM SMMUv3 Performance Monitor Counter Groups (PMCG), which provide monitoring of transactions passing --- a/drivers/soc/ti/Kconfig +++ b/drivers/soc/ti/Kconfig @@ -98,6 +98,6 @@ endif # SOC_TI config TI_SCI_INTA_MSI_DOMAIN bool - select GENERIC_MSI_IRQ_DOMAIN + select GENERIC_MSI_IRQ help Driver to enable Interrupt Aggregator specific MSI Domain. --- a/include/asm-generic/msi.h +++ b/include/asm-generic/msi.h @@ -4,7 +4,7 @@ #include -#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN +#ifdef CONFIG_GENERIC_MSI_IRQ #ifndef NUM_MSI_ALLOC_SCRATCHPAD_REGS # define NUM_MSI_ALLOC_SCRATCHPAD_REGS 2 @@ -36,6 +36,6 @@ typedef struct msi_alloc_info { #define GENERIC_MSI_DOMAIN_OPS 1 -#endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */ +#endif /* CONFIG_GENERIC_MSI_IRQ */ #endif --- a/include/linux/device.h +++ b/include/linux/device.h @@ -378,10 +378,8 @@ struct dev_links_info { * @data: Pointer to MSI device data */ struct dev_msi_info { -#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN - struct irq_domain *domain; -#endif #ifdef CONFIG_GENERIC_MSI_IRQ + struct irq_domain *domain; struct msi_device_data *data; #endif }; @@ -742,7 +740,7 @@ static inline void set_dev_node(struct d static inline struct irq_domain *dev_get_msi_domain(const struct device *dev) { -#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN +#ifdef CONFIG_GENERIC_MSI_IRQ return dev->msi.domain; #else return NULL; @@ -751,7 +749,7 @@ static inline struct irq_domain *dev_get static inline void dev_set_msi_domain(struct device *dev, struct irq_domain *d) { -#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN +#ifdef CONFIG_GENERIC_MSI_IRQ dev->msi.domain = d; #endif } --- a/include/linux/gpio/driver.h +++ b/include/linux/gpio/driver.h @@ -27,7 +27,7 @@ struct gpio_chip; union gpio_irq_fwspec { struct irq_fwspec fwspec; -#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN +#ifdef CONFIG_GENERIC_MSI_IRQ msi_alloc_info_t msiinfo; #endif }; --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -76,13 +76,7 @@ struct platform_msi_priv_data; struct device_attribute; void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg); -#ifdef CONFIG_GENERIC_MSI_IRQ void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg); -#else -static inline void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg) -{ -} -#endif typedef void (*irq_write_msi_msg_t)(struct msi_desc *desc, struct msi_msg *msg); @@ -278,7 +272,7 @@ static inline void msi_device_destroy_sy */ bool arch_restore_msi_irqs(struct pci_dev *dev); -#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN +#ifdef CONFIG_GENERIC_MSI_IRQ #include @@ -466,6 +460,6 @@ u32 pci_msi_domain_get_msi_rid(struct ir struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev); bool pci_dev_has_special_msi_domain(struct pci_dev *pdev); -#endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */ +#endif /* CONFIG_GENERIC_MSI_IRQ */ #endif /* LINUX_MSI_H */ --- a/kernel/irq/Kconfig +++ b/kernel/irq/Kconfig @@ -86,15 +86,10 @@ config GENERIC_IRQ_IPI depends on SMP select IRQ_DOMAIN_HIERARCHY -# Generic MSI interrupt support -config GENERIC_MSI_IRQ - bool - # Generic MSI hierarchical interrupt domain support -config GENERIC_MSI_IRQ_DOMAIN +config GENERIC_MSI_IRQ bool select IRQ_DOMAIN_HIERARCHY - select GENERIC_MSI_IRQ config IRQ_MSI_IOMMU bool --- a/kernel/irq/msi.c +++ b/kernel/irq/msi.c @@ -461,7 +461,6 @@ static inline int msi_sysfs_populate_des static inline void msi_sysfs_remove_desc(struct device *dev, struct msi_desc *desc) { } #endif /* !CONFIG_SYSFS */ -#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN static int __msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev, int nvec); static void __msi_domain_free_irqs(struct irq_domain *domain, struct device *dev); @@ -1058,5 +1057,3 @@ struct msi_domain_info *msi_get_domain_i { return (struct msi_domain_info *)domain->host_data; } - -#endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */ From patchwork Fri Nov 11 13:54:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 13040351 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 10648C43219 for ; Fri, 11 Nov 2022 13:56:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233938AbiKKN4F (ORCPT ); Fri, 11 Nov 2022 08:56:05 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57858 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233779AbiKKNzb (ORCPT ); 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Darwish" , Reinette Chatre , Michael Ellerman , Christophe Leroy , linuxppc-dev@lists.ozlabs.org Subject: [patch 17/39] PCI/MSI: Get rid of externs in msi.h References: <20221111120501.026511281@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:54:42 +0100 (CET) Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Ahmed S. Darwish Follow the style of Signed-off-by: Ahmed S. Darwish Signed-off-by: Thomas Gleixner Acked-by: Bjorn Helgaas Reviewed-by: Jason Gunthorpe --- drivers/pci/msi/msi.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) --- a/drivers/pci/msi/msi.h +++ b/drivers/pci/msi/msi.h @@ -5,12 +5,12 @@ #define msix_table_size(flags) ((flags & PCI_MSIX_FLAGS_QSIZE) + 1) -extern int pci_msi_setup_msi_irqs(struct pci_dev *dev, int nvec, int type); -extern void pci_msi_teardown_msi_irqs(struct pci_dev *dev); +int pci_msi_setup_msi_irqs(struct pci_dev *dev, int nvec, int type); +void pci_msi_teardown_msi_irqs(struct pci_dev *dev); #ifdef CONFIG_PCI_MSI_ARCH_FALLBACKS -extern int pci_msi_legacy_setup_msi_irqs(struct pci_dev *dev, int nvec, int type); -extern void pci_msi_legacy_teardown_msi_irqs(struct pci_dev *dev); +int pci_msi_legacy_setup_msi_irqs(struct pci_dev *dev, int nvec, int type); +void pci_msi_legacy_teardown_msi_irqs(struct pci_dev *dev); #else static inline int pci_msi_legacy_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) { From patchwork Fri Nov 11 13:54:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 13040352 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6AEE1C433FE for ; Fri, 11 Nov 2022 13:56:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233680AbiKKN4H (ORCPT ); Fri, 11 Nov 2022 08:56:07 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59582 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233801AbiKKNzl (ORCPT ); Fri, 11 Nov 2022 08:55:41 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1BF8778312; Fri, 11 Nov 2022 05:54:45 -0800 (PST) Message-ID: <20221111122014.640052354@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668174884; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=kRlEyVKKnxgc8wl62QvRU5nn9b1AZrPtWorLrgk375w=; b=ryg7ebz1ONkJp0BcF1tctqW/uo0TmYwk0M6DtUb4Qn1AD8mgQ8aFowTJsj/fYjtGqjKQ6Y 8pJ7TqZ5qm8LAYIPzt4XY2dea7aga7xIjPc/Gsr9KpqpHe2CjrS/7+ERr3KWCSzV/0A3+o cMavcFEzD5YtUPC6WgiK3TmqbNwhS4cWxO6S/w4fRL3w3GUHOtsmWyaoCGfI2kGsoW6Ebj f1zDZpAisWpCM5Vsxq+vr8maslsCRDHK1+2+7nG6eVFf93aDVuyNHvIdE5TNkzxEDun/Cc mU4CkGo/PQPzwlKHrGs9gY1ar04p8XRxdmoxmwkgEiyPWZeJekQ36NPz6A/4ug== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668174884; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=kRlEyVKKnxgc8wl62QvRU5nn9b1AZrPtWorLrgk375w=; b=ofJHjiRin0h7f5PMtU9l0xr54GINmGaThK/QZV+71VLlJINnxO9w97aT1aoGQ5bQKcTog+ aFDIPBRjC7itWZBw== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , "Ahmed S. Darwish" , Reinette Chatre , Michael Ellerman , Christophe Leroy , linuxppc-dev@lists.ozlabs.org Subject: [patch 18/39] PCI/MSI: Move mask and unmask helpers to msi.h References: <20221111120501.026511281@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:54:43 +0100 (CET) Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Ahmed S. Darwish The upcoming support for per device MSI interrupt domains needs to share some of the inline helpers with the MSI implementation. Move them to the header file. Signed-off-by: Ahmed S. Darwish Signed-off-by: Thomas Gleixner Acked-by: Bjorn Helgaas Reviewed-by: Jason Gunthorpe --- drivers/pci/msi/msi.c | 61 +-------------------------------------- drivers/pci/msi/msi.h | 83 +++++++++++++++++++++++++++++++++++++++++++++------- 2 files changed, 74 insertions(+), 70 deletions(-) --- diff --git a/drivers/pci/msi/msi.c b/drivers/pci/msi/msi.c index 160af9f01669..5c310df55d0d 100644 --- a/drivers/pci/msi/msi.c +++ b/drivers/pci/msi/msi.c @@ -16,7 +16,7 @@ static int pci_msi_enable = 1; int pci_msi_ignore_mask; -static noinline void pci_msi_update_mask(struct msi_desc *desc, u32 clear, u32 set) +void pci_msi_update_mask(struct msi_desc *desc, u32 clear, u32 set) { raw_spinlock_t *lock = &to_pci_dev(desc->dev)->msi_lock; unsigned long flags; @@ -32,65 +32,6 @@ static noinline void pci_msi_update_mask(struct msi_desc *desc, u32 clear, u32 s raw_spin_unlock_irqrestore(lock, flags); } -static inline void pci_msi_mask(struct msi_desc *desc, u32 mask) -{ - pci_msi_update_mask(desc, 0, mask); -} - -static inline void pci_msi_unmask(struct msi_desc *desc, u32 mask) -{ - pci_msi_update_mask(desc, mask, 0); -} - -static inline void __iomem *pci_msix_desc_addr(struct msi_desc *desc) -{ - return desc->pci.mask_base + desc->msi_index * PCI_MSIX_ENTRY_SIZE; -} - -/* - * This internal function does not flush PCI writes to the device. All - * users must ensure that they read from the device before either assuming - * that the device state is up to date, or returning out of this file. - * It does not affect the msi_desc::msix_ctrl cache either. Use with care! - */ -static void pci_msix_write_vector_ctrl(struct msi_desc *desc, u32 ctrl) -{ - void __iomem *desc_addr = pci_msix_desc_addr(desc); - - if (desc->pci.msi_attrib.can_mask) - writel(ctrl, desc_addr + PCI_MSIX_ENTRY_VECTOR_CTRL); -} - -static inline void pci_msix_mask(struct msi_desc *desc) -{ - desc->pci.msix_ctrl |= PCI_MSIX_ENTRY_CTRL_MASKBIT; - pci_msix_write_vector_ctrl(desc, desc->pci.msix_ctrl); - /* Flush write to device */ - readl(desc->pci.mask_base); -} - -static inline void pci_msix_unmask(struct msi_desc *desc) -{ - desc->pci.msix_ctrl &= ~PCI_MSIX_ENTRY_CTRL_MASKBIT; - pci_msix_write_vector_ctrl(desc, desc->pci.msix_ctrl); -} - -static void __pci_msi_mask_desc(struct msi_desc *desc, u32 mask) -{ - if (desc->pci.msi_attrib.is_msix) - pci_msix_mask(desc); - else - pci_msi_mask(desc, mask); -} - -static void __pci_msi_unmask_desc(struct msi_desc *desc, u32 mask) -{ - if (desc->pci.msi_attrib.is_msix) - pci_msix_unmask(desc); - else - pci_msi_unmask(desc, mask); -} - /** * pci_msi_mask_irq - Generic IRQ chip callback to mask PCI/MSI interrupts * @data: pointer to irqdata associated to that interrupt diff --git a/drivers/pci/msi/msi.h b/drivers/pci/msi/msi.h index fc92603b33e1..d8f62d911f08 100644 --- a/drivers/pci/msi/msi.h +++ b/drivers/pci/msi/msi.h @@ -8,21 +8,67 @@ int pci_msi_setup_msi_irqs(struct pci_dev *dev, int nvec, int type); void pci_msi_teardown_msi_irqs(struct pci_dev *dev); -#ifdef CONFIG_PCI_MSI_ARCH_FALLBACKS -int pci_msi_legacy_setup_msi_irqs(struct pci_dev *dev, int nvec, int type); -void pci_msi_legacy_teardown_msi_irqs(struct pci_dev *dev); -#else -static inline int pci_msi_legacy_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) +/* Mask/unmask helpers */ +void pci_msi_update_mask(struct msi_desc *desc, u32 clear, u32 set); + +static inline void pci_msi_mask(struct msi_desc *desc, u32 mask) { - WARN_ON_ONCE(1); - return -ENODEV; + pci_msi_update_mask(desc, 0, mask); } -static inline void pci_msi_legacy_teardown_msi_irqs(struct pci_dev *dev) +static inline void pci_msi_unmask(struct msi_desc *desc, u32 mask) { - WARN_ON_ONCE(1); + pci_msi_update_mask(desc, mask, 0); +} + +static inline void __iomem *pci_msix_desc_addr(struct msi_desc *desc) +{ + return desc->pci.mask_base + desc->msi_index * PCI_MSIX_ENTRY_SIZE; +} + +/* + * This internal function does not flush PCI writes to the device. All + * users must ensure that they read from the device before either assuming + * that the device state is up to date, or returning out of this file. + * It does not affect the msi_desc::msix_ctrl cache either. Use with care! + */ +static inline void pci_msix_write_vector_ctrl(struct msi_desc *desc, u32 ctrl) +{ + void __iomem *desc_addr = pci_msix_desc_addr(desc); + + if (desc->pci.msi_attrib.can_mask) + writel(ctrl, desc_addr + PCI_MSIX_ENTRY_VECTOR_CTRL); +} + +static inline void pci_msix_mask(struct msi_desc *desc) +{ + desc->pci.msix_ctrl |= PCI_MSIX_ENTRY_CTRL_MASKBIT; + pci_msix_write_vector_ctrl(desc, desc->pci.msix_ctrl); + /* Flush write to device */ + readl(desc->pci.mask_base); +} + +static inline void pci_msix_unmask(struct msi_desc *desc) +{ + desc->pci.msix_ctrl &= ~PCI_MSIX_ENTRY_CTRL_MASKBIT; + pci_msix_write_vector_ctrl(desc, desc->pci.msix_ctrl); +} + +static inline void __pci_msi_mask_desc(struct msi_desc *desc, u32 mask) +{ + if (desc->pci.msi_attrib.is_msix) + pci_msix_mask(desc); + else + pci_msi_mask(desc, mask); +} + +static inline void __pci_msi_unmask_desc(struct msi_desc *desc, u32 mask) +{ + if (desc->pci.msi_attrib.is_msix) + pci_msix_unmask(desc); + else + pci_msi_unmask(desc, mask); } -#endif /* * PCI 2.3 does not specify mask bits for each MSI interrupt. Attempting to @@ -37,3 +83,20 @@ static inline __attribute_const__ u32 msi_multi_mask(struct msi_desc *desc) return 0xffffffff; return (1 << (1 << desc->pci.msi_attrib.multi_cap)) - 1; } + +/* Legacy (!IRQDOMAIN) fallbacks */ +#ifdef CONFIG_PCI_MSI_ARCH_FALLBACKS +int pci_msi_legacy_setup_msi_irqs(struct pci_dev *dev, int nvec, int type); +void pci_msi_legacy_teardown_msi_irqs(struct pci_dev *dev); +#else +static inline int pci_msi_legacy_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) +{ + WARN_ON_ONCE(1); + return -ENODEV; +} + +static inline void pci_msi_legacy_teardown_msi_irqs(struct pci_dev *dev) +{ + WARN_ON_ONCE(1); +} +#endif From patchwork Fri Nov 11 13:54:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 13040353 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4367DC43219 for ; Fri, 11 Nov 2022 13:56:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233883AbiKKN4I (ORCPT ); Fri, 11 Nov 2022 08:56:08 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59614 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233803AbiKKNzn (ORCPT ); Fri, 11 Nov 2022 08:55:43 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1FF487BE68; Fri, 11 Nov 2022 05:54:47 -0800 (PST) Message-ID: <20221111122014.696798036@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668174885; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: references:references; bh=5KmJKzZwAqMF//R5CEolBMOEBU8yD776C3UNuDuLpFo=; b=aW9aT9GTxHiSQ01KmcKcVAR5Gtgm712AnUUjXcf/UAU+la1n84AAR2UKavCv+FV0EdOi0K GE+J5zNuoTimGlHv/TN11mzW0TcFOY96fSWBMrIxXfggJTwyt7FmyztYuREP2otV0Z2jLQ IelQtk6sZZ09STPmn+MIp6DLZcrUKcdLoJC25gD9iFwF8u9f1XqLIDyLpy7cr5fGjczJhJ T0cZWHq3/mtFCYeSlRoCya3GS0B8WNJMTYLwfLgvdnUTK1rPDUwOOh/5qYA5cT6J2+QM6v TVcpvC5MGQKsQcE/3PRdo4upSRBHB9Fu/+qY/awa/RURaoefAG4DEOKwiugMBQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668174885; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: references:references; bh=5KmJKzZwAqMF//R5CEolBMOEBU8yD776C3UNuDuLpFo=; b=JuaZZ0BRz9HXURKAI+Kmjfz/8OWWG3gRuOmSlo8r2Ql9shwrIORF/7ph03FmrEt4obqVVr pkNOSQC7YlHDVyCg== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , "Ahmed S. Darwish" , Reinette Chatre , Michael Ellerman , Christophe Leroy , linuxppc-dev@lists.ozlabs.org Subject: [patch 19/39] PCI/MSI: Move pci_disable_msi() to api.c References: <20221111120501.026511281@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:54:45 +0100 (CET) Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Ahmed S. Darwish msi.c is a maze of randomly sorted functions which makes the code unreadable. As a first step split the driver visible API and the internal implementation which also allows proper API documentation via one file. Create drivers/pci/msi/api.c to group all exported device-driver PCI/MSI APIs in one C file. Begin by moving pci_disable_msi() there and add kernel-doc for the function as appropriate. Suggested-by: Thomas Gleixner Signed-off-by: Ahmed S. Darwish Signed-off-by: Thomas Gleixner Acked-by: Bjorn Helgaas --- drivers/pci/msi/Makefile | 3 +-- drivers/pci/msi/api.c | 37 +++++++++++++++++++++++++++++++++++++ drivers/pci/msi/msi.c | 22 +++++----------------- drivers/pci/msi/msi.h | 4 ++++ 4 files changed, 47 insertions(+), 19 deletions(-) create mode 100644 drivers/pci/msi/api.c --- diff --git a/drivers/pci/msi/Makefile b/drivers/pci/msi/Makefile index 4e0a7e07965e..839ff72d72a8 100644 --- a/drivers/pci/msi/Makefile +++ b/drivers/pci/msi/Makefile @@ -2,6 +2,5 @@ # # Makefile for the PCI/MSI obj-$(CONFIG_PCI) += pcidev_msi.o -obj-$(CONFIG_PCI_MSI) += msi.o -obj-$(CONFIG_PCI_MSI) += irqdomain.o +obj-$(CONFIG_PCI_MSI) += api.o msi.o irqdomain.o obj-$(CONFIG_PCI_MSI_ARCH_FALLBACKS) += legacy.o diff --git a/drivers/pci/msi/api.c b/drivers/pci/msi/api.c new file mode 100644 index 000000000000..7485942cbe5d --- /dev/null +++ b/drivers/pci/msi/api.c @@ -0,0 +1,37 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * PCI MSI/MSI-X — Exported APIs for device drivers + * + * Copyright (C) 2003-2004 Intel + * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com) + * Copyright (C) 2016 Christoph Hellwig. + * Copyright (C) 2022 Linutronix GmbH + */ + +#include + +#include "msi.h" + +/** + * pci_disable_msi() - Disable MSI interrupt mode on device + * @dev: the PCI device to operate on + * + * Legacy device driver API to disable MSI interrupt mode on device, + * free earlier allocated interrupt vectors, and restore INTx emulation. + * The PCI device Linux IRQ (@dev->irq) is restored to its default + * pin-assertion IRQ. This is the cleanup pair of pci_enable_msi(). + * + * NOTE: The newer pci_alloc_irq_vectors() / pci_free_irq_vectors() API + * pair should, in general, be used instead. + */ +void pci_disable_msi(struct pci_dev *dev) +{ + if (!pci_msi_enabled() || !dev || !dev->msi_enabled) + return; + + msi_lock_descs(&dev->dev); + pci_msi_shutdown(dev); + pci_free_msi_irqs(dev); + msi_unlock_descs(&dev->dev); +} +EXPORT_SYMBOL(pci_disable_msi); diff --git a/drivers/pci/msi/msi.c b/drivers/pci/msi/msi.c index 5c310df55d0d..4a1300b74518 100644 --- a/drivers/pci/msi/msi.c +++ b/drivers/pci/msi/msi.c @@ -163,7 +163,7 @@ void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg) } EXPORT_SYMBOL_GPL(pci_write_msi_msg); -static void free_msi_irqs(struct pci_dev *dev) +void pci_free_msi_irqs(struct pci_dev *dev) { pci_msi_teardown_msi_irqs(dev); @@ -413,7 +413,7 @@ static int msi_capability_init(struct pci_dev *dev, int nvec, err: pci_msi_unmask(entry, msi_multi_mask(entry)); - free_msi_irqs(dev); + pci_free_msi_irqs(dev); fail: dev->msi_enabled = 0; unlock: @@ -531,7 +531,7 @@ static int msix_setup_interrupts(struct pci_dev *dev, void __iomem *base, goto out_unlock; out_free: - free_msi_irqs(dev); + pci_free_msi_irqs(dev); out_unlock: msi_unlock_descs(&dev->dev); kfree(masks); @@ -680,7 +680,7 @@ int pci_msi_vec_count(struct pci_dev *dev) } EXPORT_SYMBOL(pci_msi_vec_count); -static void pci_msi_shutdown(struct pci_dev *dev) +void pci_msi_shutdown(struct pci_dev *dev) { struct msi_desc *desc; @@ -701,18 +701,6 @@ static void pci_msi_shutdown(struct pci_dev *dev) pcibios_alloc_irq(dev); } -void pci_disable_msi(struct pci_dev *dev) -{ - if (!pci_msi_enable || !dev || !dev->msi_enabled) - return; - - msi_lock_descs(&dev->dev); - pci_msi_shutdown(dev); - free_msi_irqs(dev); - msi_unlock_descs(&dev->dev); -} -EXPORT_SYMBOL(pci_disable_msi); - /** * pci_msix_vec_count - return the number of device's MSI-X table entries * @dev: pointer to the pci_dev data structure of MSI-X device function @@ -797,7 +785,7 @@ void pci_disable_msix(struct pci_dev *dev) msi_lock_descs(&dev->dev); pci_msix_shutdown(dev); - free_msi_irqs(dev); + pci_free_msi_irqs(dev); msi_unlock_descs(&dev->dev); } EXPORT_SYMBOL(pci_disable_msix); diff --git a/drivers/pci/msi/msi.h b/drivers/pci/msi/msi.h index d8f62d911f08..634879277349 100644 --- a/drivers/pci/msi/msi.h +++ b/drivers/pci/msi/msi.h @@ -84,6 +84,10 @@ static inline __attribute_const__ u32 msi_multi_mask(struct msi_desc *desc) return (1 << (1 << desc->pci.msi_attrib.multi_cap)) - 1; } +/* MSI internal functions invoked from the public APIs */ +void pci_msi_shutdown(struct pci_dev *dev); +void pci_free_msi_irqs(struct pci_dev *dev); + /* Legacy (!IRQDOMAIN) fallbacks */ #ifdef CONFIG_PCI_MSI_ARCH_FALLBACKS int pci_msi_legacy_setup_msi_irqs(struct pci_dev *dev, int nvec, int type); From patchwork Fri Nov 11 13:54:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 13040354 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1486BC4332F for ; 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a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668174887; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=wQvlSyzCiWq4qPGjM0h6GVII+05+CelOP+QrbE9YOVQ=; b=ziGlwcK3Nj4s7gB/ueyqfSNSgD74IeHz55tHp/olK9uxKE7YDq5psk3BkZY1xDx4OMxWIZ CVYs5Yt0p+c5FYCw== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , "Ahmed S. Darwish" , Reinette Chatre , Michael Ellerman , Christophe Leroy , linuxppc-dev@lists.ozlabs.org Subject: [patch 20/39] PCI/MSI: Move pci_enable_msi() API to api.c References: <20221111120501.026511281@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:54:46 +0100 (CET) Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Ahmed S. Darwish To distangle the maze in msi.c all exported device-driver MSI APIs are now to be grouped in one file, api.c. Move pci_enable_msi() and make its kernel-doc comprehensive. Signed-off-by: Ahmed S. Darwish Signed-off-by: Thomas Gleixner Acked-by: Bjorn Helgaas --- drivers/pci/msi/api.c | 23 +++++++++++++++++++++++ drivers/pci/msi/msi.c | 14 ++------------ drivers/pci/msi/msi.h | 1 + 3 files changed, 26 insertions(+), 12 deletions(-) --- diff --git a/drivers/pci/msi/api.c b/drivers/pci/msi/api.c index 7485942cbe5d..63d7f8f6a284 100644 --- a/drivers/pci/msi/api.c +++ b/drivers/pci/msi/api.c @@ -13,6 +13,29 @@ #include "msi.h" /** + * pci_enable_msi() - Enable MSI interrupt mode on device + * @dev: the PCI device to operate on + * + * Legacy device driver API to enable MSI interrupts mode on device and + * allocate a single interrupt vector. On success, the allocated vector + * Linux IRQ will be saved at @dev->irq. The driver must invoke + * pci_disable_msi() on cleanup. + * + * NOTE: The newer pci_alloc_irq_vectors() / pci_free_irq_vectors() API + * pair should, in general, be used instead. + * + * Return: 0 on success, errno otherwise + */ +int pci_enable_msi(struct pci_dev *dev) +{ + int rc = __pci_enable_msi_range(dev, 1, 1, NULL); + if (rc < 0) + return rc; + return 0; +} +EXPORT_SYMBOL(pci_enable_msi); + +/** * pci_disable_msi() - Disable MSI interrupt mode on device * @dev: the PCI device to operate on * diff --git a/drivers/pci/msi/msi.c b/drivers/pci/msi/msi.c index 4a1300b74518..98f07ad9af62 100644 --- a/drivers/pci/msi/msi.c +++ b/drivers/pci/msi/msi.c @@ -790,8 +790,8 @@ void pci_disable_msix(struct pci_dev *dev) } EXPORT_SYMBOL(pci_disable_msix); -static int __pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec, - struct irq_affinity *affd) +int __pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec, + struct irq_affinity *affd) { int nvec; int rc; @@ -844,16 +844,6 @@ static int __pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec, } } -/* deprecated, don't use */ -int pci_enable_msi(struct pci_dev *dev) -{ - int rc = __pci_enable_msi_range(dev, 1, 1, NULL); - if (rc < 0) - return rc; - return 0; -} -EXPORT_SYMBOL(pci_enable_msi); - static int __pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries, int minvec, int maxvec, struct irq_affinity *affd, diff --git a/drivers/pci/msi/msi.h b/drivers/pci/msi/msi.h index 634879277349..00bb98d5bb0e 100644 --- a/drivers/pci/msi/msi.h +++ b/drivers/pci/msi/msi.h @@ -87,6 +87,7 @@ static inline __attribute_const__ u32 msi_multi_mask(struct msi_desc *desc) /* MSI internal functions invoked from the public APIs */ void pci_msi_shutdown(struct pci_dev *dev); void pci_free_msi_irqs(struct pci_dev *dev); +int __pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec, struct irq_affinity *affd); /* Legacy (!IRQDOMAIN) fallbacks */ #ifdef CONFIG_PCI_MSI_ARCH_FALLBACKS From patchwork Fri Nov 11 13:54:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 13040355 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 90F46C433FE for ; Fri, 11 Nov 2022 13:56:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233900AbiKKN4f (ORCPT ); Fri, 11 Nov 2022 08:56:35 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59654 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233599AbiKKNzw (ORCPT ); Fri, 11 Nov 2022 08:55:52 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 549A37B229; Fri, 11 Nov 2022 05:54:50 -0800 (PST) Message-ID: <20221111122014.813792885@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668174889; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=+/SWQaPmmzQa3dI8BJSuUqTvToJtImL4OX5ekaSehDs=; b=Er02kSdmpSjpT/V3BnAH5gksYjlj5/BOkn1q9Xk0ByEwka7MmN00jjbggDtJ7CZn4JzwVE ER6d7eoeYN47fJi4hCN+Sok9ndfjzIKmFHUZu8xK7YQJ47q/TvEcVto6FzM6vIyHsnRgqs YgL6IDrUPtVRYLx8axV/P7RZ1srb/8C9YsnF4lxfzZyBgLgb+RhJZcNxQctOuwT0brjkvo VQDsYYqQscWHYak5X6s3xXhnNBK0x1opWlUPifFxluya48bGoRG9NqWQhRGYw04zGbfIJF I2et5ZGYIRLFpCoOT2KjezCk3ej3bKoSX7SQxaCNCf/G+6nDFBugigSPpvStew== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668174889; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=+/SWQaPmmzQa3dI8BJSuUqTvToJtImL4OX5ekaSehDs=; b=sZGbJ5v4ibSkVPeghlcKhY6RC7l93AZXEiSKmfJOLLjyOWr1rWHGxN49ajUHEOk1wCsitu 8ECbcklJiJTpKNDA== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , "Ahmed S. Darwish" , Reinette Chatre , Michael Ellerman , Christophe Leroy , linuxppc-dev@lists.ozlabs.org Subject: [patch 21/39] PCI/MSI: Move pci_enable_msix_range() to api.c References: <20221111120501.026511281@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:54:48 +0100 (CET) Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Ahmed S. Darwish To distangle the maze in msi.c, all exported device-driver MSI APIs are now to be grouped in one file, api.c. Move pci_enable_msix_range() and make its kernel-doc comprehensive. Signed-off-by: Ahmed S. Darwish Signed-off-by: Thomas Gleixner Acked-by: Bjorn Helgaas --- drivers/pci/msi/api.c | 32 ++++++++++++++++++++++++++++++++ drivers/pci/msi/msi.c | 30 ++++-------------------------- drivers/pci/msi/msi.h | 3 +++ 3 files changed, 39 insertions(+), 26 deletions(-) --- diff --git a/drivers/pci/msi/api.c b/drivers/pci/msi/api.c index 63d7f8f6a284..d48050555d55 100644 --- a/drivers/pci/msi/api.c +++ b/drivers/pci/msi/api.c @@ -58,3 +58,35 @@ void pci_disable_msi(struct pci_dev *dev) msi_unlock_descs(&dev->dev); } EXPORT_SYMBOL(pci_disable_msi); + +/** + * pci_enable_msix_range() - Enable MSI-X interrupt mode on device + * @dev: the PCI device to operate on + * @entries: input/output parameter, array of MSI-X configuration entries + * @minvec: minimum required number of MSI-X vectors + * @maxvec: maximum desired number of MSI-X vectors + * + * Legacy device driver API to enable MSI-X interrupt mode on device and + * configure its MSI-X capability structure as appropriate. The passed + * @entries array must have each of its members "entry" field set to a + * desired (valid) MSI-X vector number, where the range of valid MSI-X + * vector numbers can be queried through pci_msix_vec_count(). If + * successful, the driver must invoke pci_disable_msix() on cleanup. + * + * NOTE: The newer pci_alloc_irq_vectors() / pci_free_irq_vectors() API + * pair should, in general, be used instead. + * + * Return: number of MSI-X vectors allocated (which might be smaller + * than @maxvecs), where Linux IRQ numbers for such allocated vectors + * are saved back in the @entries array elements' "vector" field. Return + * -ENOSPC if less than @minvecs interrupt vectors are available. + * Return -EINVAL if one of the passed @entries members "entry" field + * was invalid or a duplicate, or if plain MSI interrupts mode was + * earlier enabled on device. Return other errnos otherwise. + */ +int pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries, + int minvec, int maxvec) +{ + return __pci_enable_msix_range(dev, entries, minvec, maxvec, NULL, 0); +} +EXPORT_SYMBOL(pci_enable_msix_range); diff --git a/drivers/pci/msi/msi.c b/drivers/pci/msi/msi.c index 98f07ad9af62..6700ef1c734e 100644 --- a/drivers/pci/msi/msi.c +++ b/drivers/pci/msi/msi.c @@ -844,10 +844,10 @@ int __pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec, } } -static int __pci_enable_msix_range(struct pci_dev *dev, - struct msix_entry *entries, int minvec, - int maxvec, struct irq_affinity *affd, - int flags) +int __pci_enable_msix_range(struct pci_dev *dev, + struct msix_entry *entries, int minvec, + int maxvec, struct irq_affinity *affd, + int flags) { int rc, nvec = maxvec; @@ -887,28 +887,6 @@ static int __pci_enable_msix_range(struct pci_dev *dev, } /** - * pci_enable_msix_range - configure device's MSI-X capability structure - * @dev: pointer to the pci_dev data structure of MSI-X device function - * @entries: pointer to an array of MSI-X entries - * @minvec: minimum number of MSI-X IRQs requested - * @maxvec: maximum number of MSI-X IRQs requested - * - * Setup the MSI-X capability structure of device function with a maximum - * possible number of interrupts in the range between @minvec and @maxvec - * upon its software driver call to request for MSI-X mode enabled on its - * hardware device function. It returns a negative errno if an error occurs. - * If it succeeds, it returns the actual number of interrupts allocated and - * indicates the successful configuration of MSI-X capability structure - * with new allocated MSI-X interrupts. - **/ -int pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries, - int minvec, int maxvec) -{ - return __pci_enable_msix_range(dev, entries, minvec, maxvec, NULL, 0); -} -EXPORT_SYMBOL(pci_enable_msix_range); - -/** * pci_alloc_irq_vectors_affinity - allocate multiple IRQs for a device * @dev: PCI device to operate on * @min_vecs: minimum number of vectors required (must be >= 1) diff --git a/drivers/pci/msi/msi.h b/drivers/pci/msi/msi.h index 00bb98d5bb0e..8c4a5289432d 100644 --- a/drivers/pci/msi/msi.h +++ b/drivers/pci/msi/msi.h @@ -88,8 +88,11 @@ static inline __attribute_const__ u32 msi_multi_mask(struct msi_desc *desc) void pci_msi_shutdown(struct pci_dev *dev); void pci_free_msi_irqs(struct pci_dev *dev); int __pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec, struct irq_affinity *affd); +int __pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries, int minvec, + int maxvec, struct irq_affinity *affd, int flags); /* Legacy (!IRQDOMAIN) fallbacks */ + #ifdef CONFIG_PCI_MSI_ARCH_FALLBACKS int pci_msi_legacy_setup_msi_irqs(struct pci_dev *dev, int nvec, int type); void pci_msi_legacy_teardown_msi_irqs(struct pci_dev *dev); From patchwork Fri Nov 11 13:54:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 13040356 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BD57DC4332F for ; Fri, 11 Nov 2022 13:56:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233907AbiKKN4h (ORCPT ); Fri, 11 Nov 2022 08:56:37 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59698 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233860AbiKKN4A (ORCPT ); Fri, 11 Nov 2022 08:56:00 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 05B6667101; Fri, 11 Nov 2022 05:54:52 -0800 (PST) Message-ID: <20221111122014.870888193@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668174890; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=r4FcKRBwb0S/6DX5J7gWRuaqhtaapFFj+24TyV6TJ3Q=; b=oC1efg0/7x7qL8AThd8flu4wRif16nNAbDPPmci8lhL2eADwgyBsYfEPHZSyI4yt8S+KJs Fly00rs/559MEIcgi9Gpww+9i6Iy4cQ3IWLL7y6p4eOn3TnfrtdrN2roLpKG6K+9zqLY4v g1KKU7xm4GzvZba1B8TViWnJhxeB7nJLyuymIW3Ni5ndgdwq/NUfrTUVt45sm3FKPWkwHK 3z1dwn6Fp7VjupcerdcMuAQAoVkB3fPh1EGTAU5atc2aHrIgDue3GqFMP23kj9jVwEFGY8 CIsWWqG23OelAGykN8OM25EcPbMu1aReKe9VPoRftrGjpfFHeLaNv3kuAzWvyA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668174890; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=r4FcKRBwb0S/6DX5J7gWRuaqhtaapFFj+24TyV6TJ3Q=; b=VBvji6CxYo3GJQJlKIkZ/fYFOTR9TrLHNIQBSnUKIR7abDARxG+AtzidhVRS0UQrQpqhJD 8rkdL7juWBEUqVBw== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , "Ahmed S. Darwish" , Reinette Chatre , Michael Ellerman , Christophe Leroy , linuxppc-dev@lists.ozlabs.org Subject: [patch 22/39] PCI/MSI: Move pci_alloc_irq_vectors() to api.c References: <20221111120501.026511281@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:54:50 +0100 (CET) Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Ahmed S. Darwish To distangle the maze in msi.c, all exported device-driver MSI APIs are now to be grouped in one file, api.c. Make pci_alloc_irq_vectors() a real function instead of wrapper and add proper kernel doc to it. Signed-off-by: Ahmed S. Darwish Signed-off-by: Thomas Gleixner Acked-by: Bjorn Helgaas --- drivers/pci/msi/api.c | 33 +++++++++++++++++++++++++++++++++ include/linux/pci.h | 17 +++++++++-------- 2 files changed, 42 insertions(+), 8 deletions(-) --- diff --git a/drivers/pci/msi/api.c b/drivers/pci/msi/api.c index d48050555d55..1714905943fb 100644 --- a/drivers/pci/msi/api.c +++ b/drivers/pci/msi/api.c @@ -90,3 +90,36 @@ int pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries, return __pci_enable_msix_range(dev, entries, minvec, maxvec, NULL, 0); } EXPORT_SYMBOL(pci_enable_msix_range); + +/** + * pci_alloc_irq_vectors() - Allocate multiple device interrupt vectors + * @dev: the PCI device to operate on + * @min_vecs: minimum required number of vectors (must be >= 1) + * @max_vecs: maximum desired number of vectors + * @flags: One or more of: + * %PCI_IRQ_MSIX Allow trying MSI-X vector allocations + * %PCI_IRQ_MSI Allow trying MSI vector allocations + * %PCI_IRQ_LEGACY Allow trying legacy INTx interrupts, if + * and only if @min_vecs == 1 + * %PCI_IRQ_AFFINITY Auto-manage IRQs affinity by spreading + * the vectors around available CPUs + * + * Allocate up to @max_vecs interrupt vectors on device. MSI-X irq + * vector allocation has a higher precedence over plain MSI, which has a + * higher precedence over legacy INTx emulation. + * + * Upon a successful allocation, the caller should use pci_irq_vector() + * to get the Linux IRQ number to be passed to request_threaded_irq(). + * The driver must call pci_free_irq_vectors() on cleanup. + * + * Return: number of allocated vectors (which might be smaller than + * @max_vecs), -ENOSPC if less than @min_vecs interrupt vectors are + * available, other errnos otherwise. + */ +int pci_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs, + unsigned int max_vecs, unsigned int flags) +{ + return pci_alloc_irq_vectors_affinity(dev, min_vecs, max_vecs, + flags, NULL); +} +EXPORT_SYMBOL(pci_alloc_irq_vectors); diff --git a/include/linux/pci.h b/include/linux/pci.h index 2bda4a4e47e8..6a356a39ba94 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -1553,6 +1553,8 @@ static inline int pci_enable_msix_exact(struct pci_dev *dev, return rc; return 0; } +int pci_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs, + unsigned int max_vecs, unsigned int flags); int pci_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs, unsigned int max_vecs, unsigned int flags, struct irq_affinity *affd); @@ -1586,6 +1588,13 @@ pci_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs, return 1; return -ENOSPC; } +static inline int +pci_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs, + unsigned int max_vecs, unsigned int flags) +{ + return pci_alloc_irq_vectors_affinity(dev, min_vecs, max_vecs, + flags, NULL); +} static inline void pci_free_irq_vectors(struct pci_dev *dev) { @@ -1900,14 +1909,6 @@ pci_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs, } #endif /* CONFIG_PCI */ -static inline int -pci_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs, - unsigned int max_vecs, unsigned int flags) -{ - return pci_alloc_irq_vectors_affinity(dev, min_vecs, max_vecs, flags, - NULL); -} - /* Include architecture-dependent settings and functions */ #include From patchwork Fri Nov 11 13:54:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 13040357 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 94371C43217 for ; Fri, 11 Nov 2022 13:56:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234011AbiKKN4i (ORCPT ); Fri, 11 Nov 2022 08:56:38 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59022 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233613AbiKKN4B (ORCPT ); Fri, 11 Nov 2022 08:56:01 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8F21F60698; Fri, 11 Nov 2022 05:54:53 -0800 (PST) Message-ID: <20221111122014.927531290@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668174892; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=uefv1SQ/kFaCIoG5nEqNjtgMsMbRPxf/+/AfGMMS3ME=; b=pRX56ARtPVj6OyQEIMCqiah6CjQfsbUUjLKE1htpO78jveI+lbUJsRZyFxv6ZjkAjUyoAN OmuwsBOTCOZcYbdo31sYBZJJ2JMMjsySbe+r7TtEcQbauOlB6obK1AaxPUm0xLZPC4vEfj fcveslvLUX0yyTCArZBpUr0GgvLaxk/Zt48uV76R6Xz6gsOtk073eqv6iPhtoDfylIPEcH 5WvyxYOkjFBFl2nOpoe9vzRcON0FKzSVhz9TXniJi/Fp6trJaG8/k4uD/ZGjZ0rqx/oUuu l8gSGVtbJBM/cwnAWhdq2WZdx3Vm6vpnKMcgPrP6Bm73HGnTvINn1tgoOm64CA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668174892; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=uefv1SQ/kFaCIoG5nEqNjtgMsMbRPxf/+/AfGMMS3ME=; b=AJ1J3mtq3gNBb0E5N58gtI7ISk9ECj7NVJw8fMFn44Fh4eLBVHxpY55lAGhoZtOWr1SC8R peJFrH/L1nyrdiAg== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , "Ahmed S. Darwish" , Reinette Chatre , Michael Ellerman , Christophe Leroy , linuxppc-dev@lists.ozlabs.org Subject: [patch 23/39] PCI/MSI: Move pci_alloc_irq_vectors_affinity() to api.c References: <20221111120501.026511281@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:54:51 +0100 (CET) Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Ahmed S. Darwish To distangle the maze in msi.c, all exported device-driver MSI APIs are now to be grouped in one file, api.c. Move pci_alloc_irq_vectors_affinity() and let its kernel-doc reference pci_alloc_irq_vectors() documentation added in parent commit. Signed-off-by: Ahmed S. Darwish Signed-off-by: Thomas Gleixner Acked-by: Bjorn Helgaas --- drivers/pci/msi/api.c | 59 +++++++++++++++++++++++++++++++++++++++++++++++- drivers/pci/msi/msi.c | 65 +---------------------------------------------------- 2 files changed, 59 insertions(+), 65 deletions(-) --- diff --git a/drivers/pci/msi/api.c b/drivers/pci/msi/api.c index 1714905943fb..8546749afa6e 100644 --- a/drivers/pci/msi/api.c +++ b/drivers/pci/msi/api.c @@ -123,3 +123,62 @@ int pci_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs, flags, NULL); } EXPORT_SYMBOL(pci_alloc_irq_vectors); + +/** + * pci_alloc_irq_vectors_affinity() - Allocate multiple device interrupt + * vectors with affinity requirements + * @dev: the PCI device to operate on + * @min_vecs: minimum required number of vectors (must be >= 1) + * @max_vecs: maximum desired number of vectors + * @flags: allocation flags, as in pci_alloc_irq_vectors() + * @affd: affinity requirements (can be %NULL). + * + * Same as pci_alloc_irq_vectors(), but with the extra @affd parameter. + * Check that function docs, and &struct irq_affinity, for more details. + */ +int pci_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs, + unsigned int max_vecs, unsigned int flags, + struct irq_affinity *affd) +{ + struct irq_affinity msi_default_affd = {0}; + int nvecs = -ENOSPC; + + if (flags & PCI_IRQ_AFFINITY) { + if (!affd) + affd = &msi_default_affd; + } else { + if (WARN_ON(affd)) + affd = NULL; + } + + if (flags & PCI_IRQ_MSIX) { + nvecs = __pci_enable_msix_range(dev, NULL, min_vecs, max_vecs, + affd, flags); + if (nvecs > 0) + return nvecs; + } + + if (flags & PCI_IRQ_MSI) { + nvecs = __pci_enable_msi_range(dev, min_vecs, max_vecs, affd); + if (nvecs > 0) + return nvecs; + } + + /* use legacy IRQ if allowed */ + if (flags & PCI_IRQ_LEGACY) { + if (min_vecs == 1 && dev->irq) { + /* + * Invoke the affinity spreading logic to ensure that + * the device driver can adjust queue configuration + * for the single interrupt case. + */ + if (affd) + irq_create_affinity_masks(1, affd); + pci_intx(dev, 1); + return 1; + } + } + + return nvecs; +} +EXPORT_SYMBOL(pci_alloc_irq_vectors_affinity); diff --git a/drivers/pci/msi/msi.c b/drivers/pci/msi/msi.c index 6700ef1c734e..a028774f438d 100644 --- a/drivers/pci/msi/msi.c +++ b/drivers/pci/msi/msi.c @@ -887,71 +887,6 @@ int __pci_enable_msix_range(struct pci_dev *dev, } /** - * pci_alloc_irq_vectors_affinity - allocate multiple IRQs for a device - * @dev: PCI device to operate on - * @min_vecs: minimum number of vectors required (must be >= 1) - * @max_vecs: maximum (desired) number of vectors - * @flags: flags or quirks for the allocation - * @affd: optional description of the affinity requirements - * - * Allocate up to @max_vecs interrupt vectors for @dev, using MSI-X or MSI - * vectors if available, and fall back to a single legacy vector - * if neither is available. Return the number of vectors allocated, - * (which might be smaller than @max_vecs) if successful, or a negative - * error code on error. If less than @min_vecs interrupt vectors are - * available for @dev the function will fail with -ENOSPC. - * - * To get the Linux IRQ number used for a vector that can be passed to - * request_irq() use the pci_irq_vector() helper. - */ -int pci_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs, - unsigned int max_vecs, unsigned int flags, - struct irq_affinity *affd) -{ - struct irq_affinity msi_default_affd = {0}; - int nvecs = -ENOSPC; - - if (flags & PCI_IRQ_AFFINITY) { - if (!affd) - affd = &msi_default_affd; - } else { - if (WARN_ON(affd)) - affd = NULL; - } - - if (flags & PCI_IRQ_MSIX) { - nvecs = __pci_enable_msix_range(dev, NULL, min_vecs, max_vecs, - affd, flags); - if (nvecs > 0) - return nvecs; - } - - if (flags & PCI_IRQ_MSI) { - nvecs = __pci_enable_msi_range(dev, min_vecs, max_vecs, affd); - if (nvecs > 0) - return nvecs; - } - - /* use legacy IRQ if allowed */ - if (flags & PCI_IRQ_LEGACY) { - if (min_vecs == 1 && dev->irq) { - /* - * Invoke the affinity spreading logic to ensure that - * the device driver can adjust queue configuration - * for the single interrupt case. - */ - if (affd) - irq_create_affinity_masks(1, affd); - pci_intx(dev, 1); - return 1; - } - } - - return nvecs; -} -EXPORT_SYMBOL(pci_alloc_irq_vectors_affinity); - -/** * pci_free_irq_vectors - free previously allocated IRQs for a device * @dev: PCI device to operate on * From patchwork Fri Nov 11 13:54:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 13040365 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 75C88C4332F for ; Fri, 11 Nov 2022 13:57:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233734AbiKKN5C (ORCPT ); Fri, 11 Nov 2022 08:57:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58848 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233592AbiKKN4D (ORCPT ); Fri, 11 Nov 2022 08:56:03 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E47295B5BF; Fri, 11 Nov 2022 05:54:55 -0800 (PST) Message-ID: <20221111122014.984490384@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668174893; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=bxe0AjpBaoDMg06CufdaCUWamwxhkdwl4bTBiQjCzNI=; b=cMGjLzZLtmJIj58oYr5P3Ok8YQZLmzLoqv8TcqjtDHGQGStfIwRRz5FAYENf+XUzKGvFfS U1HqMwbCGOu0ahCBvnP2LQuO4FVRfi6O6k8841mBDJLItntDNq2ICHJfGF8UOnvYlFZE1u MX98Yle05T3N1FhK+437CoOLSQfAyuWBThsr5H67RoLT46/GqCnJG2QP2J6tNr1wDFi7CZ uGECO372Vzpln/6RAnJjnLmcyJnBJYPQkkFr8QpGCUaz1gFD7VWXhMt+ebnZbvAhE0jFBC vOwD7a/CNm1eMI6JXWXXhXxMeCiz1a0yK3djJ5QxUfmSDOqc5eODC3QC3m22Cg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668174893; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=bxe0AjpBaoDMg06CufdaCUWamwxhkdwl4bTBiQjCzNI=; b=GqtozON3j5ddGqHse/b7ZFUeu9EaxdoXxaDKXGoeMNdAqhq3kEXBAFF/JTK28GaSU9IPnt NQvt0Gobxx0TOqBQ== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , "Ahmed S. Darwish" , Reinette Chatre , Michael Ellerman , Christophe Leroy , linuxppc-dev@lists.ozlabs.org Subject: [patch 24/39] PCI/MSI: Move pci_irq_vector() to api.c References: <20221111120501.026511281@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:54:53 +0100 (CET) Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Ahmed S. Darwish To distangle the maze in msi.c, all exported device-driver MSI APIs are now to be grouped in one file, api.c. Move pci_irq_vector() and let its kernel-doc match the rest of the file. Signed-off-by: Ahmed S. Darwish Signed-off-by: Thomas Gleixner Acked-by: Bjorn Helgaas --- drivers/pci/msi/api.c | 23 +++++++++++++++++++++++ drivers/pci/msi/msi.c | 24 ------------------------ 2 files changed, 23 insertions(+), 24 deletions(-) --- diff --git a/drivers/pci/msi/api.c b/drivers/pci/msi/api.c index 8546749afa6e..0f1ec87e3f9f 100644 --- a/drivers/pci/msi/api.c +++ b/drivers/pci/msi/api.c @@ -182,3 +182,26 @@ int pci_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs, return nvecs; } EXPORT_SYMBOL(pci_alloc_irq_vectors_affinity); + +/** + * pci_irq_vector() - Get Linux IRQ number of a device interrupt vector + * @dev: the PCI device to operate on + * @nr: device-relative interrupt vector index (0-based); has different + * meanings, depending on interrupt mode + * MSI-X the index in the MSI-X vector table + * MSI the index of the enabled MSI vectors + * INTx must be 0 + * + * Return: the Linux IRQ number, or -EINVAL if @nr is out of range + */ +int pci_irq_vector(struct pci_dev *dev, unsigned int nr) +{ + unsigned int irq; + + if (!dev->msi_enabled && !dev->msix_enabled) + return !nr ? dev->irq : -EINVAL; + + irq = msi_get_virq(&dev->dev, nr); + return irq ? irq : -EINVAL; +} +EXPORT_SYMBOL(pci_irq_vector); diff --git a/drivers/pci/msi/msi.c b/drivers/pci/msi/msi.c index a028774f438d..38ad2fe4b85c 100644 --- a/drivers/pci/msi/msi.c +++ b/drivers/pci/msi/msi.c @@ -900,30 +900,6 @@ void pci_free_irq_vectors(struct pci_dev *dev) EXPORT_SYMBOL(pci_free_irq_vectors); /** - * pci_irq_vector - return Linux IRQ number of a device vector - * @dev: PCI device to operate on - * @nr: Interrupt vector index (0-based) - * - * @nr has the following meanings depending on the interrupt mode: - * MSI-X: The index in the MSI-X vector table - * MSI: The index of the enabled MSI vectors - * INTx: Must be 0 - * - * Return: The Linux interrupt number or -EINVAl if @nr is out of range. - */ -int pci_irq_vector(struct pci_dev *dev, unsigned int nr) -{ - unsigned int irq; - - if (!dev->msi_enabled && !dev->msix_enabled) - return !nr ? dev->irq : -EINVAL; - - irq = msi_get_virq(&dev->dev, nr); - return irq ? irq : -EINVAL; -} -EXPORT_SYMBOL(pci_irq_vector); - -/** * pci_irq_get_affinity - return the affinity of a particular MSI vector * @dev: PCI device to operate on * @nr: device-relative interrupt vector index (0-based). From patchwork Fri Nov 11 13:54:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 13040366 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 13F6FC4332F for ; Fri, 11 Nov 2022 13:57:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233277AbiKKN5D (ORCPT ); Fri, 11 Nov 2022 08:57:03 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58794 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233928AbiKKN4D (ORCPT ); Fri, 11 Nov 2022 08:56:03 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8C14170196; Fri, 11 Nov 2022 05:54:57 -0800 (PST) Message-ID: <20221111122015.042870570@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668174895; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=P/dAsiB53NJ/9QiJ4hqH6W6Pskq4afAJG9tsk8AaX0Q=; b=OeXI2uBL1i4cCBWgCLDCjfWVrO+TGW/TKKoqPVlW6nRd7XuB0IylCLK2nnOS3JJqj3KGI3 woLnfcgLSwYHZfNTtZFOEzz/OUe8qmGOn1D/90O9/tMmcrTFbaxgcOkimW4wca31nX+6fC rNZqtK0XNoFRelFd/wWbFk4E84e8ezV7r/WBQN9qW/AlngbQicYTjPhvAEphKERN1UITqk j90JU0Ss2QQmTZzYyKyHXqECZWoRbVTbL4m6uUzQvH8hti+SyK0UoTlWAK8oD9ZKR1gLpM Rx1OR7SPtFM+tzdG9IJzLGeX4uVZOyPbm8AegMk+Ao7r2WOjtMa2HgjIieasKA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668174895; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=P/dAsiB53NJ/9QiJ4hqH6W6Pskq4afAJG9tsk8AaX0Q=; b=9etn11z13NPR3uOdAi/jxOseLod+YzmlXXfbgUMng69yMTgPSyiR5PWQM9MtTrhncoBb0J HEo73bvyvg7D2UBg== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , "Ahmed S. Darwish" , Reinette Chatre , Michael Ellerman , Christophe Leroy , linuxppc-dev@lists.ozlabs.org Subject: [patch 25/39] PCI/MSI: Move pci_free_irq_vectors() to api.c References: <20221111120501.026511281@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:54:54 +0100 (CET) Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Ahmed S. Darwish To distangle the maze in msi.c, all exported device-driver MSI APIs are now to be grouped in one file, api.c. Move pci_free_irq_vectors() and make its kernel-doc comprehensive. Signed-off-by: Ahmed S. Darwish Signed-off-by: Thomas Gleixner Acked-by: Bjorn Helgaas --- drivers/pci/msi/api.c | 15 +++++++++++++++ drivers/pci/msi/msi.c | 13 ------------- 2 files changed, 15 insertions(+), 13 deletions(-) --- diff --git a/drivers/pci/msi/api.c b/drivers/pci/msi/api.c index 0f1ec87e3f9f..2ff2a9ccfc47 100644 --- a/drivers/pci/msi/api.c +++ b/drivers/pci/msi/api.c @@ -205,3 +205,18 @@ int pci_irq_vector(struct pci_dev *dev, unsigned int nr) return irq ? irq : -EINVAL; } EXPORT_SYMBOL(pci_irq_vector); + +/** + * pci_free_irq_vectors() - Free previously allocated IRQs for a device + * @dev: the PCI device to operate on + * + * Undo the interrupt vector allocations and possible device MSI/MSI-X + * enablement earlier done through pci_alloc_irq_vectors_affinity() or + * pci_alloc_irq_vectors(). + */ +void pci_free_irq_vectors(struct pci_dev *dev) +{ + pci_disable_msix(dev); + pci_disable_msi(dev); +} +EXPORT_SYMBOL(pci_free_irq_vectors); diff --git a/drivers/pci/msi/msi.c b/drivers/pci/msi/msi.c index 38ad2fe4b85c..ed8caf5ac99f 100644 --- a/drivers/pci/msi/msi.c +++ b/drivers/pci/msi/msi.c @@ -887,19 +887,6 @@ int __pci_enable_msix_range(struct pci_dev *dev, } /** - * pci_free_irq_vectors - free previously allocated IRQs for a device - * @dev: PCI device to operate on - * - * Undoes the allocations and enabling in pci_alloc_irq_vectors(). - */ -void pci_free_irq_vectors(struct pci_dev *dev) -{ - pci_disable_msix(dev); - pci_disable_msi(dev); -} -EXPORT_SYMBOL(pci_free_irq_vectors); - -/** * pci_irq_get_affinity - return the affinity of a particular MSI vector * @dev: PCI device to operate on * @nr: device-relative interrupt vector index (0-based). From patchwork Fri Nov 11 13:54:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 13040367 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F2146C43217 for ; Fri, 11 Nov 2022 13:57:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233803AbiKKN5D (ORCPT ); Fri, 11 Nov 2022 08:57:03 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58866 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233933AbiKKN4E (ORCPT ); Fri, 11 Nov 2022 08:56:04 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9C8016EB4E; Fri, 11 Nov 2022 05:54:58 -0800 (PST) Message-ID: <20221111122015.099461602@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668174897; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=CkhwWSdGdGLLdzERFUfoG3NG0AhBrHuNhPbAZeB+IvI=; b=D/KO6ishfBlfCq11YH+Ofhy+P61hIKqceGKviXzQcvhX0F2xVoFUKMaucjWQOPHIBOtS0B /j/MU4IcPEAS0VdVZHkO+m3UpDZ7hTXF33/Ws3G36Ip5JRiX14aot8JnOG7L0U7Qq1Xlgj jjE4VymkIPiaEDau2j6yY/Sl8BqceSabP7pTCy9X4x6BTvRBxW/OT6bTntFuHWPwbPKT/V P1zatp5UOC1Uot6hhlrU4Qg82vOIZiBJdLZQcCmvdUdXk2TvgXRC20jIdiqB3/7836nSxW igL35SY8mpivrwl4VnRlxvfpssCjhZbbAJ3NJWotgixp4zcrki9BuKBYDFbLCg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668174897; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=CkhwWSdGdGLLdzERFUfoG3NG0AhBrHuNhPbAZeB+IvI=; b=agDEdkn3tqZvtSL/jqK2oB0oAy2H7vZ7hxPqegmfJc4ZGq2IGaAmYVus2CH/27QQDR0vBr OGs+tQD1dSzmRxCg== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , "Ahmed S. Darwish" , Reinette Chatre , Michael Ellerman , Christophe Leroy , linuxppc-dev@lists.ozlabs.org Subject: [patch 26/39] PCI/MSI: Move pci_msix_vec_count() to api.c References: <20221111120501.026511281@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:54:56 +0100 (CET) Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Ahmed S. Darwish To distangle the maze in msi.c, all exported device-driver MSI APIs are now to be grouped in one file, api.c. Move pci_msix_vec_count() and make its kernel-doc comprehensive. Signed-off-by: Ahmed S. Darwish Signed-off-by: Thomas Gleixner Acked-by: Bjorn Helgaas --- drivers/pci/msi/api.c | 20 ++++++++++++++++++++ drivers/pci/msi/msi.c | 20 -------------------- 2 files changed, 20 insertions(+), 20 deletions(-) --- diff --git a/drivers/pci/msi/api.c b/drivers/pci/msi/api.c index 2ff2a9ccfc47..83ea38ffa116 100644 --- a/drivers/pci/msi/api.c +++ b/drivers/pci/msi/api.c @@ -60,6 +60,26 @@ void pci_disable_msi(struct pci_dev *dev) EXPORT_SYMBOL(pci_disable_msi); /** + * pci_msix_vec_count() - Get number of MSI-X interrupt vectors on device + * @dev: the PCI device to operate on + * + * Return: number of MSI-X interrupt vectors available on this device + * (i.e., the device's MSI-X capability structure "table size"), -EINVAL + * if the device is not MSI-X capable, other errnos otherwise. + */ +int pci_msix_vec_count(struct pci_dev *dev) +{ + u16 control; + + if (!dev->msix_cap) + return -EINVAL; + + pci_read_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, &control); + return msix_table_size(control); +} +EXPORT_SYMBOL(pci_msix_vec_count); + +/** * pci_enable_msix_range() - Enable MSI-X interrupt mode on device * @dev: the PCI device to operate on * @entries: input/output parameter, array of MSI-X configuration entries diff --git a/drivers/pci/msi/msi.c b/drivers/pci/msi/msi.c index ed8caf5ac99f..1226d66da992 100644 --- a/drivers/pci/msi/msi.c +++ b/drivers/pci/msi/msi.c @@ -701,26 +701,6 @@ void pci_msi_shutdown(struct pci_dev *dev) pcibios_alloc_irq(dev); } -/** - * pci_msix_vec_count - return the number of device's MSI-X table entries - * @dev: pointer to the pci_dev data structure of MSI-X device function - * This function returns the number of device's MSI-X table entries and - * therefore the number of MSI-X vectors device is capable of sending. - * It returns a negative errno if the device is not capable of sending MSI-X - * interrupts. - **/ -int pci_msix_vec_count(struct pci_dev *dev) -{ - u16 control; - - if (!dev->msix_cap) - return -EINVAL; - - pci_read_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, &control); - return msix_table_size(control); -} -EXPORT_SYMBOL(pci_msix_vec_count); - static int __pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries, int nvec, struct irq_affinity *affd, int flags) { From patchwork Fri Nov 11 13:54:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 13040368 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 802ABC433FE for ; Fri, 11 Nov 2022 13:57:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233870AbiKKN5E (ORCPT ); Fri, 11 Nov 2022 08:57:04 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58888 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233678AbiKKN4F (ORCPT ); Fri, 11 Nov 2022 08:56:05 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6FB7A2B25B; Fri, 11 Nov 2022 05:55:00 -0800 (PST) Message-ID: <20221111122015.156785224@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668174898; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=sTSauIHtQe8nkxj9vWG7an7hER/OZbQ0yiXscxhOHpY=; b=GCdtHiG1mb1fVSYh20ExvLEgwnR3bMna0MV/l5dzAxH4jfJF15HxOOhRez2F2sTkSkN2rE 3/uBzQAfXv8r/lDQ/bQ0HAgpcTfjq2J2UDjO3iwycl2Q+jrsyJr//OwbLU2VIZLpxn2NRN adFz/JEvDxevHKf15fZHh1DU3NcrOADkt9ul5zltTwQQyKC0f0k5XT9RW50IgaQfty3oc8 cLVj/5ydTRp0JAjS0IJeJ0iYQhdlGdk+zgCWfFHvaRjCbO4kQ+2PYWABD6ZZ/bNWOeJ1hF rJ9JtygHZ/oYVMg2RMhjmJlSJQwzKdf5qHoW7MyVyWQ09MLE5oq2DHddS4+qTQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668174898; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=sTSauIHtQe8nkxj9vWG7an7hER/OZbQ0yiXscxhOHpY=; b=eTjnEvqLANPRFPDzNmMJb0aixvOkBMzGLcVDG/D78BrlL+s4esd4umI5YvkWIFmjtWzfxv 1qpBSZvBZJ+hbBAg== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , "Ahmed S. Darwish" , Reinette Chatre , Michael Ellerman , Christophe Leroy , linuxppc-dev@lists.ozlabs.org Subject: [patch 27/39] PCI/MSI: Move pci_disable_msix() to api.c References: <20221111120501.026511281@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:54:58 +0100 (CET) Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Ahmed S. Darwish To distangle the maze in msi.c, all exported device-driver MSI APIs are now to be grouped in one file, api.c. Move pci_disable_msix() and make its kernel-doc comprehensive. Signed-off-by: Ahmed S. Darwish Signed-off-by: Thomas Gleixner Acked-by: Bjorn Helgaas --- drivers/pci/msi/api.c | 24 ++++++++++++++++++++++++ drivers/pci/msi/msi.c | 14 +------------- drivers/pci/msi/msi.h | 1 + 3 files changed, 26 insertions(+), 13 deletions(-) --- diff --git a/drivers/pci/msi/api.c b/drivers/pci/msi/api.c index 83ea38ffa116..653a61868ae6 100644 --- a/drivers/pci/msi/api.c +++ b/drivers/pci/msi/api.c @@ -112,6 +112,30 @@ int pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries, EXPORT_SYMBOL(pci_enable_msix_range); /** + * pci_disable_msix() - Disable MSI-X interrupt mode on device + * @dev: the PCI device to operate on + * + * Legacy device driver API to disable MSI-X interrupt mode on device, + * free earlier-allocated interrupt vectors, and restore INTx emulation. + * The PCI device Linux IRQ (@dev->irq) is restored to its default pin + * assertion IRQ. This is the cleanup pair of pci_enable_msix_range(). + * + * NOTE: The newer pci_alloc_irq_vectors() / pci_free_irq_vectors() API + * pair should, in general, be used instead. + */ +void pci_disable_msix(struct pci_dev *dev) +{ + if (!pci_msi_enabled() || !dev || !dev->msix_enabled) + return; + + msi_lock_descs(&dev->dev); + pci_msix_shutdown(dev); + pci_free_msi_irqs(dev); + msi_unlock_descs(&dev->dev); +} +EXPORT_SYMBOL(pci_disable_msix); + +/** * pci_alloc_irq_vectors() - Allocate multiple device interrupt vectors * @dev: the PCI device to operate on * @min_vecs: minimum required number of vectors (must be >= 1) diff --git a/drivers/pci/msi/msi.c b/drivers/pci/msi/msi.c index 1226d66da992..6fa90d07d2e4 100644 --- a/drivers/pci/msi/msi.c +++ b/drivers/pci/msi/msi.c @@ -736,7 +736,7 @@ static int __pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries, return msix_capability_init(dev, entries, nvec, affd); } -static void pci_msix_shutdown(struct pci_dev *dev) +void pci_msix_shutdown(struct pci_dev *dev) { struct msi_desc *desc; @@ -758,18 +758,6 @@ static void pci_msix_shutdown(struct pci_dev *dev) pcibios_alloc_irq(dev); } -void pci_disable_msix(struct pci_dev *dev) -{ - if (!pci_msi_enable || !dev || !dev->msix_enabled) - return; - - msi_lock_descs(&dev->dev); - pci_msix_shutdown(dev); - pci_free_msi_irqs(dev); - msi_unlock_descs(&dev->dev); -} -EXPORT_SYMBOL(pci_disable_msix); - int __pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec, struct irq_affinity *affd) { diff --git a/drivers/pci/msi/msi.h b/drivers/pci/msi/msi.h index 8c4a5289432d..77e2587f7e4f 100644 --- a/drivers/pci/msi/msi.h +++ b/drivers/pci/msi/msi.h @@ -86,6 +86,7 @@ static inline __attribute_const__ u32 msi_multi_mask(struct msi_desc *desc) /* MSI internal functions invoked from the public APIs */ void pci_msi_shutdown(struct pci_dev *dev); +void pci_msix_shutdown(struct pci_dev *dev); void pci_free_msi_irqs(struct pci_dev *dev); int __pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec, struct irq_affinity *affd); int __pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries, int minvec, From patchwork Fri Nov 11 13:54:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 13040380 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2654BC433FE for ; Fri, 11 Nov 2022 13:58:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234144AbiKKN65 (ORCPT ); Fri, 11 Nov 2022 08:58:57 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58500 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233783AbiKKN4G (ORCPT ); Fri, 11 Nov 2022 08:56:06 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E6D7D657FF; Fri, 11 Nov 2022 05:55:01 -0800 (PST) Message-ID: <20221111122015.214792769@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668174900; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=gj8+JLvsSB7JkfjvtAibAPolzK16OEvGxNAST4u+PB8=; b=XKPL2kgfTpBrkdRq/Zqnr5TZtcoLiZS8HUTfm0kQkuYgegQYsqUwtY5csl9/CyJkrPrCEz A9uxOuIvrfntnY2DKbdKMXmf4ksC0QTVqS9OdMAlOAOQgCdzLXVMmX1JcCPAEBhdSB5mBf nhdD2+t2116iU5IqwotSXCD6AhM6aj2Y0RdnX73ut/xTahJDDpijcYHst0UpgmkbhE6eFJ UPSG4e0XWUziwhZY+cmfTYsgkNtc8sB9PEd/1aKnPYelYUCQtxFzSfMjWN7EeHPb0ht7Ss 04ZIAgydyt5L4gwlXCajkYRprDuhpS7NFJtkyRCbyY3urky7Pc8pU8t+6DhEDA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668174900; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=gj8+JLvsSB7JkfjvtAibAPolzK16OEvGxNAST4u+PB8=; b=U39CZCreXp6akmR3rKYVXRdbqs3XmuPdImd4hF/P0sSdCshaJKWtTXiiq6gHDDA3yj+rKA b2RkkjTtCy75QgDw== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , "Ahmed S. Darwish" , Reinette Chatre , Michael Ellerman , Christophe Leroy , linuxppc-dev@lists.ozlabs.org Subject: [patch 28/39] PCI/MSI: Move pci_irq_get_affinity() to api.c References: <20221111120501.026511281@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:54:59 +0100 (CET) Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Ahmed S. Darwish To distangle the maze in msi.c, all exported device-driver MSI APIs are now to be grouped in one file, api.c. Move pci_irq_get_affinity() and let its kernel-doc match rest of the file. Signed-off-by: Ahmed S. Darwish Signed-off-by: Thomas Gleixner Acked-by: Bjorn Helgaas --- drivers/pci/msi/api.c | 43 +++++++++++++++++++++++++++++++++++++++++++ drivers/pci/msi/msi.c | 38 -------------------------------------- 2 files changed, 43 insertions(+), 38 deletions(-) --- diff --git a/drivers/pci/msi/api.c b/drivers/pci/msi/api.c index 653a61868ae6..473df7ba0584 100644 --- a/drivers/pci/msi/api.c +++ b/drivers/pci/msi/api.c @@ -9,6 +9,7 @@ */ #include +#include #include "msi.h" @@ -251,6 +252,48 @@ int pci_irq_vector(struct pci_dev *dev, unsigned int nr) EXPORT_SYMBOL(pci_irq_vector); /** + * pci_irq_get_affinity() - Get a device interrupt vector affinity + * @dev: the PCI device to operate on + * @nr: device-relative interrupt vector index (0-based); has different + * meanings, depending on interrupt mode + * MSI-X the index in the MSI-X vector table + * MSI the index of the enabled MSI vectors + * INTx must be 0 + * + * Return: MSI/MSI-X vector affinity, NULL if @nr is out of range or if + * the MSI(-X) vector was allocated without explicit affinity + * requirements (e.g., by pci_enable_msi(), pci_enable_msix_range(), or + * pci_alloc_irq_vectors() without the %PCI_IRQ_AFFINITY flag). Return a + * generic set of CPU ids representing all possible CPUs available + * during system boot if the device is in legacy INTx mode. + */ +const struct cpumask *pci_irq_get_affinity(struct pci_dev *dev, int nr) +{ + int idx, irq = pci_irq_vector(dev, nr); + struct msi_desc *desc; + + if (WARN_ON_ONCE(irq <= 0)) + return NULL; + + desc = irq_get_msi_desc(irq); + /* Non-MSI does not have the information handy */ + if (!desc) + return cpu_possible_mask; + + /* MSI[X] interrupts can be allocated without affinity descriptor */ + if (!desc->affinity) + return NULL; + + /* + * MSI has a mask array in the descriptor. + * MSI-X has a single mask. + */ + idx = dev->msi_enabled ? nr : 0; + return &desc->affinity[idx].mask; +} +EXPORT_SYMBOL(pci_irq_get_affinity); + +/** * pci_free_irq_vectors() - Free previously allocated IRQs for a device * @dev: the PCI device to operate on * diff --git a/drivers/pci/msi/msi.c b/drivers/pci/msi/msi.c index 6fa90d07d2e4..d78646d1c116 100644 --- a/drivers/pci/msi/msi.c +++ b/drivers/pci/msi/msi.c @@ -854,44 +854,6 @@ int __pci_enable_msix_range(struct pci_dev *dev, } } -/** - * pci_irq_get_affinity - return the affinity of a particular MSI vector - * @dev: PCI device to operate on - * @nr: device-relative interrupt vector index (0-based). - * - * @nr has the following meanings depending on the interrupt mode: - * MSI-X: The index in the MSI-X vector table - * MSI: The index of the enabled MSI vectors - * INTx: Must be 0 - * - * Return: A cpumask pointer or NULL if @nr is out of range - */ -const struct cpumask *pci_irq_get_affinity(struct pci_dev *dev, int nr) -{ - int idx, irq = pci_irq_vector(dev, nr); - struct msi_desc *desc; - - if (WARN_ON_ONCE(irq <= 0)) - return NULL; - - desc = irq_get_msi_desc(irq); - /* Non-MSI does not have the information handy */ - if (!desc) - return cpu_possible_mask; - - /* MSI[X] interrupts can be allocated without affinity descriptor */ - if (!desc->affinity) - return NULL; - - /* - * MSI has a mask array in the descriptor. - * MSI-X has a single mask. - */ - idx = dev->msi_enabled ? nr : 0; - return &desc->affinity[idx].mask; -} -EXPORT_SYMBOL(pci_irq_get_affinity); - struct pci_dev *msi_desc_to_pci_dev(struct msi_desc *desc) { return to_pci_dev(desc->dev); From patchwork Fri Nov 11 13:55:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 13040369 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 57D56C43219 for ; Fri, 11 Nov 2022 13:57:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233888AbiKKN5G (ORCPT ); Fri, 11 Nov 2022 08:57:06 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59596 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233799AbiKKN4H (ORCPT ); Fri, 11 Nov 2022 08:56:07 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5902D7F563; Fri, 11 Nov 2022 05:55:03 -0800 (PST) Message-ID: <20221111122015.271447896@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668174902; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=uSFXy88Ws6eNkV/cYwDRULmA+6GRqcWIzt5ADLcbTDw=; b=qtOLrPfLAgkAZVy6NU1Qu4bTgTB43Bj44kvSwwsRH2ZnPNV8dgX7HwnPsn22qu8w9m7yL2 A97svlVBbgwk1Kouj39B9/00uFrvjnNmfsSosW6KlZXHE8ipZjQ0zh2qu2h4JEOniktLvM DdJLcXVpW+4EUh71Wah1RWNgffLHTJmi70jycylYYTUnXe5mTgu11BanYjAsDqbjHjh5Cj jNVdIefLpB/Et84Tmy/wCrmUO2sDcrVo8lhj8nIcgrZW5QGFV0eKkEMimQbvvAjsRl/0w+ VdXkapfyi/PEEHMzxyAKo9mdYdwp3K4g/p7Prgjc0/kxGJjy/daFCUOg+YK/3w== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668174902; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=uSFXy88Ws6eNkV/cYwDRULmA+6GRqcWIzt5ADLcbTDw=; b=9t/bFWqCfq8f0C3vQmoP3/db8s/pcp6OGrpaut5YexKKU5gS1ZtJ1Y4TbyTmvAad70QZt8 pyB9AsmnH5FIAdCA== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , "Ahmed S. Darwish" , Reinette Chatre , Michael Ellerman , Christophe Leroy , linuxppc-dev@lists.ozlabs.org Subject: [patch 29/39] PCI/MSI: Move pci_msi_enabled() to api.c References: <20221111120501.026511281@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:55:01 +0100 (CET) Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Ahmed S. Darwish To distangle the maze in msi.c, all exported device-driver MSI APIs are now to be grouped in one file, api.c. Move pci_msi_enabled() and make its kernel-doc comprehensive. Signed-off-by: Ahmed S. Darwish Signed-off-by: Thomas Gleixner Acked-by: Bjorn Helgaas --- drivers/pci/msi/api.c | 12 ++++++++++++ drivers/pci/msi/msi.c | 14 +------------- drivers/pci/msi/msi.h | 3 +++ 3 files changed, 16 insertions(+), 13 deletions(-) --- diff --git a/drivers/pci/msi/api.c b/drivers/pci/msi/api.c index 473df7ba0584..ee9ed5ccd94d 100644 --- a/drivers/pci/msi/api.c +++ b/drivers/pci/msi/api.c @@ -307,3 +307,15 @@ void pci_free_irq_vectors(struct pci_dev *dev) pci_disable_msi(dev); } EXPORT_SYMBOL(pci_free_irq_vectors); + +/** + * pci_msi_enabled() - Are MSI(-X) interrupts enabled system-wide? + * + * Return: true if MSI has not been globally disabled through ACPI FADT, + * PCI bridge quirks, or the "pci=nomsi" kernel command-line option. + */ +int pci_msi_enabled(void) +{ + return pci_msi_enable; +} +EXPORT_SYMBOL(pci_msi_enabled); diff --git a/drivers/pci/msi/msi.c b/drivers/pci/msi/msi.c index d78646d1c116..59c33bc7fe81 100644 --- a/drivers/pci/msi/msi.c +++ b/drivers/pci/msi/msi.c @@ -13,7 +13,7 @@ #include "../pci.h" #include "msi.h" -static int pci_msi_enable = 1; +int pci_msi_enable = 1; int pci_msi_ignore_mask; void pci_msi_update_mask(struct msi_desc *desc, u32 clear, u32 set) @@ -864,15 +864,3 @@ void pci_no_msi(void) { pci_msi_enable = 0; } - -/** - * pci_msi_enabled - is MSI enabled? - * - * Returns true if MSI has not been disabled by the command-line option - * pci=nomsi. - **/ -int pci_msi_enabled(void) -{ - return pci_msi_enable; -} -EXPORT_SYMBOL(pci_msi_enabled); diff --git a/drivers/pci/msi/msi.h b/drivers/pci/msi/msi.h index 77e2587f7e4f..f3f4ede53171 100644 --- a/drivers/pci/msi/msi.h +++ b/drivers/pci/msi/msi.h @@ -84,6 +84,9 @@ static inline __attribute_const__ u32 msi_multi_mask(struct msi_desc *desc) return (1 << (1 << desc->pci.msi_attrib.multi_cap)) - 1; } +/* Subsystem variables */ +extern int pci_msi_enable; + /* MSI internal functions invoked from the public APIs */ void pci_msi_shutdown(struct pci_dev *dev); void pci_msix_shutdown(struct pci_dev *dev); From patchwork Fri Nov 11 13:55:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 13040370 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5E45BC4332F for ; Fri, 11 Nov 2022 13:57:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233592AbiKKN5I (ORCPT ); Fri, 11 Nov 2022 08:57:08 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59614 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233946AbiKKN4H (ORCPT ); Fri, 11 Nov 2022 08:56:07 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ECECC7F553; Fri, 11 Nov 2022 05:55:04 -0800 (PST) Message-ID: <20221111122015.331584998@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668174903; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=17rQ88vsZDtlPmncoLd4F1WtMoDw5uG6QE6awHFzEIw=; b=u0MBwOKfdKIjVYsMnyfBs1VTZDXJEX6DuRpL7pKRU7BC7LYQGVWXa3TmnszJmKSgH0051K OtzIlEYeXodSuQoLNocXCVjSNJ+SgKfEAeXuS+64VjLc4GPurIWeeRHa/RRkj7DvlLMz63 0E/LNoqZcMdHj7I03PLUzpPAk0nNuDtVGV0syPSnWCo1HSXjsr/Do7sHxw7mBxdBdzj41H zYliO7BNOl/ULvKU3DrQsE0n8X9U9rQ64Pi/Xy1uzv7lY0jO0j/y3V/2yvzS+fX30EUVaF iQ3hOSlA943JC+BvTCqBq/hIeuk9COv4UtayBK3AXOCrIBZBpde6Ui88XR3MVQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668174903; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=17rQ88vsZDtlPmncoLd4F1WtMoDw5uG6QE6awHFzEIw=; b=yM3dN0j6bNW9WtIT9LkNs9RYaMlN3S1D8j/YyTsQdLKC9l8Stsx3vyIB4R3Y33YnomF1gB ueyboCuUeHb+1ACQ== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , "Ahmed S. Darwish" , Reinette Chatre , Michael Ellerman , Christophe Leroy , linuxppc-dev@lists.ozlabs.org Subject: [patch 30/39] PCI/MSI: Move pci_msi_restore_state() to api.c References: <20221111120501.026511281@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:55:03 +0100 (CET) Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Ahmed S. Darwish To distangle the maze in msi.c, all exported device-driver MSI APIs are now to be grouped in one file, api.c. Move pci_msi_enabled() and add kernel-doc for the function. Signed-off-by: Ahmed S. Darwish Signed-off-by: Thomas Gleixner Acked-by: Bjorn Helgaas diff --git a/drivers/pci/msi/api.c b/drivers/pci/msi/api.c index ee9ed5ccd94d..8d1cf6db9bd7 100644 --- a/drivers/pci/msi/api.c +++ b/drivers/pci/msi/api.c @@ -308,6 +308,21 @@ void pci_free_irq_vectors(struct pci_dev *dev) } EXPORT_SYMBOL(pci_free_irq_vectors); +/** + * pci_restore_msi_state() - Restore cached MSI(-X) state on device + * @dev: the PCI device to operate on + * + * Write the Linux-cached MSI(-X) state back on device. This is + * typically useful upon system resume, or after an error-recovery PCI + * adapter reset. + */ +void pci_restore_msi_state(struct pci_dev *dev) +{ + __pci_restore_msi_state(dev); + __pci_restore_msix_state(dev); +} +EXPORT_SYMBOL_GPL(pci_restore_msi_state); + /** * pci_msi_enabled() - Are MSI(-X) interrupts enabled system-wide? * diff --git a/drivers/pci/msi/msi.c b/drivers/pci/msi/msi.c index 59c33bc7fe81..a5d168c823ff 100644 --- a/drivers/pci/msi/msi.c +++ b/drivers/pci/msi/msi.c @@ -199,7 +199,7 @@ bool __weak arch_restore_msi_irqs(struct pci_dev *dev) return true; } -static void __pci_restore_msi_state(struct pci_dev *dev) +void __pci_restore_msi_state(struct pci_dev *dev) { struct msi_desc *entry; u16 control; @@ -231,7 +231,7 @@ static void pci_msix_clear_and_set_ctrl(struct pci_dev *dev, u16 clear, u16 set) pci_write_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, ctrl); } -static void __pci_restore_msix_state(struct pci_dev *dev) +void __pci_restore_msix_state(struct pci_dev *dev) { struct msi_desc *entry; bool write_msg; @@ -257,13 +257,6 @@ static void __pci_restore_msix_state(struct pci_dev *dev) pci_msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_MASKALL, 0); } -void pci_restore_msi_state(struct pci_dev *dev) -{ - __pci_restore_msi_state(dev); - __pci_restore_msix_state(dev); -} -EXPORT_SYMBOL_GPL(pci_restore_msi_state); - static void pcim_msi_release(void *pcidev) { struct pci_dev *dev = pcidev; diff --git a/drivers/pci/msi/msi.h b/drivers/pci/msi/msi.h index f3f4ede53171..8170ef2c5ad0 100644 --- a/drivers/pci/msi/msi.h +++ b/drivers/pci/msi/msi.h @@ -94,6 +94,8 @@ void pci_free_msi_irqs(struct pci_dev *dev); int __pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec, struct irq_affinity *affd); int __pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries, int minvec, int maxvec, struct irq_affinity *affd, int flags); +void __pci_restore_msi_state(struct pci_dev *dev); +void __pci_restore_msix_state(struct pci_dev *dev); /* Legacy (!IRQDOMAIN) fallbacks */ From patchwork Fri Nov 11 13:55:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 13040371 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C9AC8C43217 for ; Fri, 11 Nov 2022 13:57:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233804AbiKKN5J (ORCPT ); Fri, 11 Nov 2022 08:57:09 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58922 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233887AbiKKN4b (ORCPT ); Fri, 11 Nov 2022 08:56:31 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8599B7F560; Fri, 11 Nov 2022 05:55:06 -0800 (PST) Message-ID: <20221111122015.397739421@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668174905; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: references:references; bh=UuC1MepTqQIaLcqFkObf7DFyoADcBMPY/PEQtFoZlnk=; b=GthpV0+bUwZ0On/zDcLYLzsswb8L1Lyf03t32FEBRxX4PnOlz+khlP72rDfyiJ1x9wRgx0 QZBHxxrL4JkPQLW7wxnFxQQP1C3bGSUtkFuYA7n7ImHn09T6nJKXmSRNq6GMcgez9zHcBr /sXuwxE+KMFFbdY6PdL0GaHWRYeq2JTEl73uUqyXZcW+aV/4sFTHIWAWRwSUxCox9LTE9G hYCMBp2pxhJCSf4Vrdt9VkoToU9NxPEz3oqd083h7hlHGv5jYqQ13ynW5aQ/L+OWRe7yr0 HZqb6OTN06vPLw7H/xCHtuHUesG4QYeE53KYO3lB8wsG9XL+fgCEqmcpWHMg5g== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668174905; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: references:references; bh=UuC1MepTqQIaLcqFkObf7DFyoADcBMPY/PEQtFoZlnk=; b=N5w5QY6eUkXGEGiXNQj1Q3SBpVNANVHkPj6Rf+UFoASB2T/i/8da2rW7Kz59cuUMxbBlwY 9I6yIp/HKRYP4CAQ== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , "Ahmed S. Darwish" , Reinette Chatre , Michael Ellerman , Christophe Leroy , linuxppc-dev@lists.ozlabs.org Subject: [patch 31/39] Documentation: PCI: Add reference to PCI/MSI device driver APIs References: <20221111120501.026511281@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:55:04 +0100 (CET) Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Ahmed S. Darwish All exported device-driver MSI APIs are now grouped in one place at drivers/pci/msi/api.c with comprehensive kernel-docs added. Reference these kernel-docs in the official PCI/MSI howto. Signed-off-by: Ahmed S. Darwish Signed-off-by: Thomas Gleixner Acked-by: Bjorn Helgaas Reviewed-by: Jason Gunthorpe --- Documentation/PCI/msi-howto.rst | 10 ++++++++++ 1 file changed, 10 insertions(+) --- --- a/Documentation/PCI/msi-howto.rst +++ b/Documentation/PCI/msi-howto.rst @@ -285,3 +285,13 @@ to bridges between the PCI root and the It is also worth checking the device driver to see whether it supports MSIs. For example, it may contain calls to pci_alloc_irq_vectors() with the PCI_IRQ_MSI or PCI_IRQ_MSIX flags. + + +List of device drivers MSI(-X) APIs +=================================== + +The PCI/MSI subystem has a dedicated C file for its exported device driver +APIs — `drivers/pci/msi/api.c`. The following functions are exported: + +.. kernel-doc:: drivers/pci/msi/api.c + :export: From patchwork Fri Nov 11 13:55:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 13040372 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D2F32C433FE for ; Fri, 11 Nov 2022 13:57:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234062AbiKKN5d (ORCPT ); Fri, 11 Nov 2022 08:57:33 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59680 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233990AbiKKN4f (ORCPT ); Fri, 11 Nov 2022 08:56:35 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6206C7F57C; Fri, 11 Nov 2022 05:55:08 -0800 (PST) Message-ID: <20221111122015.459089736@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668174906; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=4WpT4DxJx79msSHfiBpfy36+MpLWop9m91H3PwQHhsw=; b=XztcOFcDxM49M45k9PTE/1k36ZiA6VNV5dpHbBjf2uXg/ah5CPVotTwa6TV93P4O+2yemV Syo6FMVfzyYfQWirZCviQ/nLdzJkvNLuyGXAEvUO66w3RDDPl4jPjPcSbmxHFSR5z/uML/ y2caS967jflVd7HwOtwJN0ednEAU3jPpAwRoXWP4fYSnd/XwKn4thlMKZ/KtMiyr2wzRgA fcq5EIZ4CzzXGolnDwQyl84iWyypXfMxnDUqqx5UZiugUSI7QezYun3/RQKgyTfALjFXlj i9oICtLBfF9ecJLVQ9AawrF3OL6x99P/sR6CUhneHS/789Pi0nqvvZRzNAgtfA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668174906; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=4WpT4DxJx79msSHfiBpfy36+MpLWop9m91H3PwQHhsw=; b=0jC2qVnRRiQ+XBJLy3wiPxQeeG3vbJUU5q7NonBcd7vZGec3mNfgtHuoxczVY/LP4H1WTx giOEt7HPy8YFFHAA== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , "Ahmed S. Darwish" , Reinette Chatre , Michael Ellerman , Christophe Leroy , linuxppc-dev@lists.ozlabs.org Subject: [patch 32/39] PCI/MSI: Reorder functions in msi.c References: <20221111120501.026511281@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:55:06 +0100 (CET) Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Ahmed S. Darwish There is no way to navigate msi.c without banging the head against the wall every now and then because MSI and MSI-X specific functions are intermingled and the code flow is completely non-obvious. Reorder everthing so common helpers, MSI and MSI-X specific functions are grouped together. Suggested-by: Thomas Gleixner Signed-off-by: Ahmed S. Darwish Signed-off-by: Thomas Gleixner Acked-by: Bjorn Helgaas --- drivers/pci/msi/msi.c | 577 +++++++++++++++++++++++++------------------------- 1 file changed, 295 insertions(+), 282 deletions(-) --- a/drivers/pci/msi/msi.c +++ b/drivers/pci/msi/msi.c @@ -16,6 +16,97 @@ int pci_msi_enable = 1; int pci_msi_ignore_mask; +/** + * pci_msi_supported - check whether MSI may be enabled on a device + * @dev: pointer to the pci_dev data structure of MSI device function + * @nvec: how many MSIs have been requested? + * + * Look at global flags, the device itself, and its parent buses + * to determine if MSI/-X are supported for the device. If MSI/-X is + * supported return 1, else return 0. + **/ +static int pci_msi_supported(struct pci_dev *dev, int nvec) +{ + struct pci_bus *bus; + + /* MSI must be globally enabled and supported by the device */ + if (!pci_msi_enable) + return 0; + + if (!dev || dev->no_msi) + return 0; + + /* + * You can't ask to have 0 or less MSIs configured. + * a) it's stupid .. + * b) the list manipulation code assumes nvec >= 1. + */ + if (nvec < 1) + return 0; + + /* + * Any bridge which does NOT route MSI transactions from its + * secondary bus to its primary bus must set NO_MSI flag on + * the secondary pci_bus. + * + * The NO_MSI flag can either be set directly by: + * - arch-specific PCI host bus controller drivers (deprecated) + * - quirks for specific PCI bridges + * + * or indirectly by platform-specific PCI host bridge drivers by + * advertising the 'msi_domain' property, which results in + * the NO_MSI flag when no MSI domain is found for this bridge + * at probe time. + */ + for (bus = dev->bus; bus; bus = bus->parent) + if (bus->bus_flags & PCI_BUS_FLAGS_NO_MSI) + return 0; + + return 1; +} + +static void pcim_msi_release(void *pcidev) +{ + struct pci_dev *dev = pcidev; + + dev->is_msi_managed = false; + pci_free_irq_vectors(dev); +} + +/* + * Needs to be separate from pcim_release to prevent an ordering problem + * vs. msi_device_data_release() in the MSI core code. + */ +static int pcim_setup_msi_release(struct pci_dev *dev) +{ + int ret; + + if (!pci_is_managed(dev) || dev->is_msi_managed) + return 0; + + ret = devm_add_action(&dev->dev, pcim_msi_release, dev); + if (!ret) + dev->is_msi_managed = true; + return ret; +} + +/* + * Ordering vs. devres: msi device data has to be installed first so that + * pcim_msi_release() is invoked before it on device release. + */ +static int pci_setup_msi_context(struct pci_dev *dev) +{ + int ret = msi_setup_device_data(&dev->dev); + + if (!ret) + ret = pcim_setup_msi_release(dev); + return ret; +} + +/* + * Helper functions for mask/unmask and MSI message handling + */ + void pci_msi_update_mask(struct msi_desc *desc, u32 clear, u32 set) { raw_spinlock_t *lock = &to_pci_dev(desc->dev)->msi_lock; @@ -163,15 +254,8 @@ void pci_write_msi_msg(unsigned int irq, } EXPORT_SYMBOL_GPL(pci_write_msi_msg); -void pci_free_msi_irqs(struct pci_dev *dev) -{ - pci_msi_teardown_msi_irqs(dev); - if (dev->msix_base) { - iounmap(dev->msix_base); - dev->msix_base = NULL; - } -} +/* PCI/MSI specific functionality */ static void pci_intx_for_msi(struct pci_dev *dev, int enable) { @@ -190,111 +274,6 @@ static void pci_msi_set_enable(struct pc pci_write_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, control); } -/* - * Architecture override returns true when the PCI MSI message should be - * written by the generic restore function. - */ -bool __weak arch_restore_msi_irqs(struct pci_dev *dev) -{ - return true; -} - -void __pci_restore_msi_state(struct pci_dev *dev) -{ - struct msi_desc *entry; - u16 control; - - if (!dev->msi_enabled) - return; - - entry = irq_get_msi_desc(dev->irq); - - pci_intx_for_msi(dev, 0); - pci_msi_set_enable(dev, 0); - if (arch_restore_msi_irqs(dev)) - __pci_write_msi_msg(entry, &entry->msg); - - pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control); - pci_msi_update_mask(entry, 0, 0); - control &= ~PCI_MSI_FLAGS_QSIZE; - control |= (entry->pci.msi_attrib.multiple << 4) | PCI_MSI_FLAGS_ENABLE; - pci_write_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, control); -} - -static void pci_msix_clear_and_set_ctrl(struct pci_dev *dev, u16 clear, u16 set) -{ - u16 ctrl; - - pci_read_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, &ctrl); - ctrl &= ~clear; - ctrl |= set; - pci_write_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, ctrl); -} - -void __pci_restore_msix_state(struct pci_dev *dev) -{ - struct msi_desc *entry; - bool write_msg; - - if (!dev->msix_enabled) - return; - - /* route the table */ - pci_intx_for_msi(dev, 0); - pci_msix_clear_and_set_ctrl(dev, 0, - PCI_MSIX_FLAGS_ENABLE | PCI_MSIX_FLAGS_MASKALL); - - write_msg = arch_restore_msi_irqs(dev); - - msi_lock_descs(&dev->dev); - msi_for_each_desc(entry, &dev->dev, MSI_DESC_ALL) { - if (write_msg) - __pci_write_msi_msg(entry, &entry->msg); - pci_msix_write_vector_ctrl(entry, entry->pci.msix_ctrl); - } - msi_unlock_descs(&dev->dev); - - pci_msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_MASKALL, 0); -} - -static void pcim_msi_release(void *pcidev) -{ - struct pci_dev *dev = pcidev; - - dev->is_msi_managed = false; - pci_free_irq_vectors(dev); -} - -/* - * Needs to be separate from pcim_release to prevent an ordering problem - * vs. msi_device_data_release() in the MSI core code. - */ -static int pcim_setup_msi_release(struct pci_dev *dev) -{ - int ret; - - if (!pci_is_managed(dev) || dev->is_msi_managed) - return 0; - - ret = devm_add_action(&dev->dev, pcim_msi_release, dev); - if (!ret) - dev->is_msi_managed = true; - return ret; -} - -/* - * Ordering vs. devres: msi device data has to be installed first so that - * pcim_msi_release() is invoked before it on device release. - */ -static int pci_setup_msi_context(struct pci_dev *dev) -{ - int ret = msi_setup_device_data(&dev->dev); - - if (!ret) - ret = pcim_setup_msi_release(dev); - return ret; -} - static int msi_setup_msi_desc(struct pci_dev *dev, int nvec, struct irq_affinity_desc *masks) { @@ -415,6 +394,149 @@ static int msi_capability_init(struct pc return ret; } +int __pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec, + struct irq_affinity *affd) +{ + int nvec; + int rc; + + if (!pci_msi_supported(dev, minvec) || dev->current_state != PCI_D0) + return -EINVAL; + + /* Check whether driver already requested MSI-X IRQs */ + if (dev->msix_enabled) { + pci_info(dev, "can't enable MSI (MSI-X already enabled)\n"); + return -EINVAL; + } + + if (maxvec < minvec) + return -ERANGE; + + if (WARN_ON_ONCE(dev->msi_enabled)) + return -EINVAL; + + nvec = pci_msi_vec_count(dev); + if (nvec < 0) + return nvec; + if (nvec < minvec) + return -ENOSPC; + + if (nvec > maxvec) + nvec = maxvec; + + rc = pci_setup_msi_context(dev); + if (rc) + return rc; + + for (;;) { + if (affd) { + nvec = irq_calc_affinity_vectors(minvec, nvec, affd); + if (nvec < minvec) + return -ENOSPC; + } + + rc = msi_capability_init(dev, nvec, affd); + if (rc == 0) + return nvec; + + if (rc < 0) + return rc; + if (rc < minvec) + return -ENOSPC; + + nvec = rc; + } +} + +/** + * pci_msi_vec_count - Return the number of MSI vectors a device can send + * @dev: device to report about + * + * This function returns the number of MSI vectors a device requested via + * Multiple Message Capable register. It returns a negative errno if the + * device is not capable sending MSI interrupts. Otherwise, the call succeeds + * and returns a power of two, up to a maximum of 2^5 (32), according to the + * MSI specification. + **/ +int pci_msi_vec_count(struct pci_dev *dev) +{ + int ret; + u16 msgctl; + + if (!dev->msi_cap) + return -EINVAL; + + pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &msgctl); + ret = 1 << ((msgctl & PCI_MSI_FLAGS_QMASK) >> 1); + + return ret; +} +EXPORT_SYMBOL(pci_msi_vec_count); + +/* + * Architecture override returns true when the PCI MSI message should be + * written by the generic restore function. + */ +bool __weak arch_restore_msi_irqs(struct pci_dev *dev) +{ + return true; +} + +void __pci_restore_msi_state(struct pci_dev *dev) +{ + struct msi_desc *entry; + u16 control; + + if (!dev->msi_enabled) + return; + + entry = irq_get_msi_desc(dev->irq); + + pci_intx_for_msi(dev, 0); + pci_msi_set_enable(dev, 0); + if (arch_restore_msi_irqs(dev)) + __pci_write_msi_msg(entry, &entry->msg); + + pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control); + pci_msi_update_mask(entry, 0, 0); + control &= ~PCI_MSI_FLAGS_QSIZE; + control |= (entry->pci.msi_attrib.multiple << 4) | PCI_MSI_FLAGS_ENABLE; + pci_write_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, control); +} + +void pci_msi_shutdown(struct pci_dev *dev) +{ + struct msi_desc *desc; + + if (!pci_msi_enable || !dev || !dev->msi_enabled) + return; + + pci_msi_set_enable(dev, 0); + pci_intx_for_msi(dev, 1); + dev->msi_enabled = 0; + + /* Return the device with MSI unmasked as initial states */ + desc = msi_first_desc(&dev->dev, MSI_DESC_ALL); + if (!WARN_ON_ONCE(!desc)) + pci_msi_unmask(desc, msi_multi_mask(desc)); + + /* Restore dev->irq to its default pin-assertion IRQ */ + dev->irq = desc->pci.msi_attrib.default_irq; + pcibios_alloc_irq(dev); +} + +/* PCI/MSI-X specific functionality */ + +static void pci_msix_clear_and_set_ctrl(struct pci_dev *dev, u16 clear, u16 set) +{ + u16 ctrl; + + pci_read_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, &ctrl); + ctrl &= ~clear; + ctrl |= set; + pci_write_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, ctrl); +} + static void __iomem *msix_map_region(struct pci_dev *dev, unsigned int nr_entries) { @@ -599,101 +721,6 @@ static int msix_capability_init(struct p return ret; } -/** - * pci_msi_supported - check whether MSI may be enabled on a device - * @dev: pointer to the pci_dev data structure of MSI device function - * @nvec: how many MSIs have been requested? - * - * Look at global flags, the device itself, and its parent buses - * to determine if MSI/-X are supported for the device. If MSI/-X is - * supported return 1, else return 0. - **/ -static int pci_msi_supported(struct pci_dev *dev, int nvec) -{ - struct pci_bus *bus; - - /* MSI must be globally enabled and supported by the device */ - if (!pci_msi_enable) - return 0; - - if (!dev || dev->no_msi) - return 0; - - /* - * You can't ask to have 0 or less MSIs configured. - * a) it's stupid .. - * b) the list manipulation code assumes nvec >= 1. - */ - if (nvec < 1) - return 0; - - /* - * Any bridge which does NOT route MSI transactions from its - * secondary bus to its primary bus must set NO_MSI flag on - * the secondary pci_bus. - * - * The NO_MSI flag can either be set directly by: - * - arch-specific PCI host bus controller drivers (deprecated) - * - quirks for specific PCI bridges - * - * or indirectly by platform-specific PCI host bridge drivers by - * advertising the 'msi_domain' property, which results in - * the NO_MSI flag when no MSI domain is found for this bridge - * at probe time. - */ - for (bus = dev->bus; bus; bus = bus->parent) - if (bus->bus_flags & PCI_BUS_FLAGS_NO_MSI) - return 0; - - return 1; -} - -/** - * pci_msi_vec_count - Return the number of MSI vectors a device can send - * @dev: device to report about - * - * This function returns the number of MSI vectors a device requested via - * Multiple Message Capable register. It returns a negative errno if the - * device is not capable sending MSI interrupts. Otherwise, the call succeeds - * and returns a power of two, up to a maximum of 2^5 (32), according to the - * MSI specification. - **/ -int pci_msi_vec_count(struct pci_dev *dev) -{ - int ret; - u16 msgctl; - - if (!dev->msi_cap) - return -EINVAL; - - pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &msgctl); - ret = 1 << ((msgctl & PCI_MSI_FLAGS_QMASK) >> 1); - - return ret; -} -EXPORT_SYMBOL(pci_msi_vec_count); - -void pci_msi_shutdown(struct pci_dev *dev) -{ - struct msi_desc *desc; - - if (!pci_msi_enable || !dev || !dev->msi_enabled) - return; - - pci_msi_set_enable(dev, 0); - pci_intx_for_msi(dev, 1); - dev->msi_enabled = 0; - - /* Return the device with MSI unmasked as initial states */ - desc = msi_first_desc(&dev->dev, MSI_DESC_ALL); - if (!WARN_ON_ONCE(!desc)) - pci_msi_unmask(desc, msi_multi_mask(desc)); - - /* Restore dev->irq to its default pin-assertion IRQ */ - dev->irq = desc->pci.msi_attrib.default_irq; - pcibios_alloc_irq(dev); -} - static int __pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries, int nvec, struct irq_affinity *affd, int flags) { @@ -729,57 +756,23 @@ static int __pci_enable_msix(struct pci_ return msix_capability_init(dev, entries, nvec, affd); } -void pci_msix_shutdown(struct pci_dev *dev) -{ - struct msi_desc *desc; - - if (!pci_msi_enable || !dev || !dev->msix_enabled) - return; - - if (pci_dev_is_disconnected(dev)) { - dev->msix_enabled = 0; - return; - } - - /* Return the device with MSI-X masked as initial states */ - msi_for_each_desc(desc, &dev->dev, MSI_DESC_ALL) - pci_msix_mask(desc); - - pci_msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_ENABLE, 0); - pci_intx_for_msi(dev, 1); - dev->msix_enabled = 0; - pcibios_alloc_irq(dev); -} - -int __pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec, - struct irq_affinity *affd) +int __pci_enable_msix_range(struct pci_dev *dev, + struct msix_entry *entries, int minvec, + int maxvec, struct irq_affinity *affd, + int flags) { - int nvec; - int rc; - - if (!pci_msi_supported(dev, minvec) || dev->current_state != PCI_D0) - return -EINVAL; - - /* Check whether driver already requested MSI-X IRQs */ - if (dev->msix_enabled) { - pci_info(dev, "can't enable MSI (MSI-X already enabled)\n"); - return -EINVAL; - } + int rc, nvec = maxvec; if (maxvec < minvec) return -ERANGE; - if (WARN_ON_ONCE(dev->msi_enabled)) + if (dev->msi_enabled) { + pci_info(dev, "can't enable MSI-X (MSI already enabled)\n"); return -EINVAL; + } - nvec = pci_msi_vec_count(dev); - if (nvec < 0) - return nvec; - if (nvec < minvec) - return -ENOSPC; - - if (nvec > maxvec) - nvec = maxvec; + if (WARN_ON_ONCE(dev->msix_enabled)) + return -EINVAL; rc = pci_setup_msi_context(dev); if (rc) @@ -792,7 +785,7 @@ int __pci_enable_msi_range(struct pci_de return -ENOSPC; } - rc = msi_capability_init(dev, nvec, affd); + rc = __pci_enable_msix(dev, entries, nvec, affd, flags); if (rc == 0) return nvec; @@ -805,48 +798,68 @@ int __pci_enable_msi_range(struct pci_de } } -int __pci_enable_msix_range(struct pci_dev *dev, - struct msix_entry *entries, int minvec, - int maxvec, struct irq_affinity *affd, - int flags) +void __pci_restore_msix_state(struct pci_dev *dev) { - int rc, nvec = maxvec; + struct msi_desc *entry; + bool write_msg; - if (maxvec < minvec) - return -ERANGE; + if (!dev->msix_enabled) + return; - if (dev->msi_enabled) { - pci_info(dev, "can't enable MSI-X (MSI already enabled)\n"); - return -EINVAL; + /* route the table */ + pci_intx_for_msi(dev, 0); + pci_msix_clear_and_set_ctrl(dev, 0, + PCI_MSIX_FLAGS_ENABLE | PCI_MSIX_FLAGS_MASKALL); + + write_msg = arch_restore_msi_irqs(dev); + + msi_lock_descs(&dev->dev); + msi_for_each_desc(entry, &dev->dev, MSI_DESC_ALL) { + if (write_msg) + __pci_write_msi_msg(entry, &entry->msg); + pci_msix_write_vector_ctrl(entry, entry->pci.msix_ctrl); } + msi_unlock_descs(&dev->dev); - if (WARN_ON_ONCE(dev->msix_enabled)) - return -EINVAL; + pci_msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_MASKALL, 0); +} - rc = pci_setup_msi_context(dev); - if (rc) - return rc; +void pci_msix_shutdown(struct pci_dev *dev) +{ + struct msi_desc *desc; - for (;;) { - if (affd) { - nvec = irq_calc_affinity_vectors(minvec, nvec, affd); - if (nvec < minvec) - return -ENOSPC; - } + if (!pci_msi_enable || !dev || !dev->msix_enabled) + return; - rc = __pci_enable_msix(dev, entries, nvec, affd, flags); - if (rc == 0) - return nvec; + if (pci_dev_is_disconnected(dev)) { + dev->msix_enabled = 0; + return; + } - if (rc < 0) - return rc; - if (rc < minvec) - return -ENOSPC; + /* Return the device with MSI-X masked as initial states */ + msi_for_each_desc(desc, &dev->dev, MSI_DESC_ALL) + pci_msix_mask(desc); - nvec = rc; + pci_msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_ENABLE, 0); + pci_intx_for_msi(dev, 1); + dev->msix_enabled = 0; + pcibios_alloc_irq(dev); +} + +/* Common interfaces */ + +void pci_free_msi_irqs(struct pci_dev *dev) +{ + pci_msi_teardown_msi_irqs(dev); + + if (dev->msix_base) { + iounmap(dev->msix_base); + dev->msix_base = NULL; } } +/* Misc. infrastructure */ + struct pci_dev *msi_desc_to_pci_dev(struct msi_desc *desc) { return to_pci_dev(desc->dev); From patchwork Fri Nov 11 13:55:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 13040373 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DEAD9C433FE for ; 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a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668174908; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=o9tkl2d2tC9egQPEBUifcDdfF9knjDTOjOdgLUksEhs=; b=KIGuSY4SHqfY2xYt0UXwXFotUsRZ7MwILcY+hFirUyhfKVZQYvYuooVliEYPFYi0XbVRDs q/SAL05mXclgyDCw== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , Michael Ellerman , Christophe Leroy , linuxppc-dev@lists.ozlabs.org, "Ahmed S. Darwish" , Reinette Chatre Subject: [patch 33/39] PCI/MSI: Sanitize MSI-X checks References: <20221111120501.026511281@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:55:07 +0100 (CET) Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org There is no point in doing the same sanity checks over and over in a loop during MSI-X enablement. Put them in front of the loop and return early when they fail. Signed-off-by: Thomas Gleixner Acked-by: Bjorn Helgaas Reviewed-by: Jason Gunthorpe --- drivers/pci/msi/msi.c | 67 +++++++++++++++++++++++++------------------------- 1 file changed, 34 insertions(+), 33 deletions(-) --- a/drivers/pci/msi/msi.c +++ b/drivers/pci/msi/msi.c @@ -721,47 +721,31 @@ static int msix_capability_init(struct p return ret; } -static int __pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries, - int nvec, struct irq_affinity *affd, int flags) +static bool pci_msix_validate_entries(struct msix_entry *entries, int nvec, int hwsize) { - int nr_entries; int i, j; - if (!pci_msi_supported(dev, nvec) || dev->current_state != PCI_D0) - return -EINVAL; + if (!entries) + return true; - nr_entries = pci_msix_vec_count(dev); - if (nr_entries < 0) - return nr_entries; - if (nvec > nr_entries && !(flags & PCI_IRQ_VIRTUAL)) - return nr_entries; - - if (entries) { - /* Check for any invalid entries */ - for (i = 0; i < nvec; i++) { - if (entries[i].entry >= nr_entries) - return -EINVAL; /* invalid entry */ - for (j = i + 1; j < nvec; j++) { - if (entries[i].entry == entries[j].entry) - return -EINVAL; /* duplicate entry */ - } + for (i = 0; i < nvec; i++) { + /* Entry within hardware limit? */ + if (entries[i].entry >= hwsize) + return false; + + /* Check for duplicate entries */ + for (j = i + 1; j < nvec; j++) { + if (entries[i].entry == entries[j].entry) + return false; } } - - /* Check whether driver already requested for MSI IRQ */ - if (dev->msi_enabled) { - pci_info(dev, "can't enable MSI-X (MSI IRQ already assigned)\n"); - return -EINVAL; - } - return msix_capability_init(dev, entries, nvec, affd); + return true; } -int __pci_enable_msix_range(struct pci_dev *dev, - struct msix_entry *entries, int minvec, - int maxvec, struct irq_affinity *affd, - int flags) +int __pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries, int minvec, + int maxvec, struct irq_affinity *affd, int flags) { - int rc, nvec = maxvec; + int hwsize, rc, nvec = maxvec; if (maxvec < minvec) return -ERANGE; @@ -774,6 +758,23 @@ int __pci_enable_msix_range(struct pci_d if (WARN_ON_ONCE(dev->msix_enabled)) return -EINVAL; + if (!pci_msi_supported(dev, nvec) || dev->current_state != PCI_D0) + return -EINVAL; + + hwsize = pci_msix_vec_count(dev); + if (hwsize < 0) + return hwsize; + + if (!pci_msix_validate_entries(entries, nvec, hwsize)) + return -EINVAL; + + /* PCI_IRQ_VIRTUAL is a horrible hack! */ + if (nvec > hwsize && !(flags & PCI_IRQ_VIRTUAL)) + nvec = hwsize; + + if (nvec < minvec) + return -ENOSPC; + rc = pci_setup_msi_context(dev); if (rc) return rc; @@ -785,7 +786,7 @@ int __pci_enable_msix_range(struct pci_d return -ENOSPC; } - rc = __pci_enable_msix(dev, entries, nvec, affd, flags); + rc = msix_capability_init(dev, entries, nvec, affd); if (rc == 0) return nvec; From patchwork Fri Nov 11 13:55:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 13040374 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 72EF1C4332F for ; Fri, 11 Nov 2022 13:57:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234009AbiKKN5n (ORCPT ); Fri, 11 Nov 2022 08:57:43 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59172 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234017AbiKKN4y (ORCPT ); Fri, 11 Nov 2022 08:56:54 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 88FAC7F56F; Fri, 11 Nov 2022 05:55:11 -0800 (PST) Message-ID: <20221111122015.574339988@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668174910; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=Msjel7aC5+Im+aQvsAthw2RuYInXdUWBTW//73XVYm0=; b=KgXVLrX3pE/nIoqiS99qR5s9yOIMz/R1VaPvfyv2loIU5hDglv67gRX6pyou1DtK60H8cv 9GpmCDddO9kcF85adqjHiYF1bQ5d87zXTRgP0UgAlqGixa7Beb5iGb+pdp3Q4PG+f1toDz X83uOxv0BEfIdDiW+VJKmP5sHOk9JHA4UYsiIbRMhD1dFrLSv8FyNxH9l8a1jx+W7F1ES2 mgqX8q8gvQYFh0AjANuSBzI/kXzbuI16QPGuQiCAWc2j/5+ePYMfVnyMFOtmr8uagWYcXr mb6yiiUo1myYYM3ShslmbhVM3mpnldYVdu78xh8u5sdNukY35Vk1Ij8AFOxhaw== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668174910; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=Msjel7aC5+Im+aQvsAthw2RuYInXdUWBTW//73XVYm0=; b=+iwkwvNEn54tR9xz7jcZGiqa+56HiFP8TiLT8JYtzPWGMO6Z8uVywQslTWiMPsVIVC4Jkm pdv9Nt05hulH8fCQ== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , Michael Ellerman , Christophe Leroy , linuxppc-dev@lists.ozlabs.org, "Ahmed S. Darwish" , Reinette Chatre Subject: [patch 34/39] PCI/MSI: Reject multi-MSI early References: <20221111120501.026511281@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:55:09 +0100 (CET) Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org When hierarchical MSI interrupt domains are enabled then there is no point to do tons of work and detect the missing support for multi-MSI late in the allocation path. Just query the domain feature flags right away. The query function is going to be used for other purposes later and has a mode argument which influences the result: ALLOW_LEGACY returns true when: - there is no irq domain attached (legacy support) - there is a irq domain attached which has the feature flag set DENY_LEGACY returns only true when: - there is a irq domain attached which has the feature flag set This allows to use the function universally without ifdeffery in the calling code. Signed-off-by: Thomas Gleixner Acked-by: Bjorn Helgaas Reviewed-by: Jason Gunthorpe --- drivers/pci/msi/irqdomain.c | 22 ++++++++++++++++++++++ drivers/pci/msi/msi.c | 4 ++++ drivers/pci/msi/msi.h | 9 +++++++++ 3 files changed, 35 insertions(+) --- a/drivers/pci/msi/irqdomain.c +++ b/drivers/pci/msi/irqdomain.c @@ -187,6 +187,28 @@ struct irq_domain *pci_msi_create_irq_do } EXPORT_SYMBOL_GPL(pci_msi_create_irq_domain); +/** + * pci_msi_domain_supports - Check for support of a particular feature flag + * @pdev: The PCI device to operate on + * @feature_mask: The feature mask to check for (full match) + * @mode: If ALLOW_LEGACY this grants the feature when there is no irq domain + * associated to the device. If DENY_LEGACY the lack of an irq domain + * makes the feature unsupported + */ +bool pci_msi_domain_supports(struct pci_dev *pdev, unsigned int feature_mask, + enum support_mode mode) +{ + struct msi_domain_info *info; + struct irq_domain *domain; + + domain = dev_get_msi_domain(&pdev->dev); + + if (!domain || !irq_domain_is_hierarchy(domain)) + return mode == ALLOW_LEGACY; + info = domain->host_data; + return (info->flags & feature_mask) == feature_mask; +} + /* * Users of the generic MSI infrastructure expect a device to have a single ID, * so with DMA aliases we have to pick the least-worst compromise. Devices with --- a/drivers/pci/msi/msi.c +++ b/drivers/pci/msi/msi.c @@ -347,6 +347,10 @@ static int msi_capability_init(struct pc struct msi_desc *entry; int ret; + /* Reject multi-MSI early on irq domain enabled architectures */ + if (nvec > 1 && !pci_msi_domain_supports(dev, MSI_FLAG_MULTI_PCI_MSI, ALLOW_LEGACY)) + return 1; + /* * Disable MSI during setup in the hardware, but mark it enabled * so that setup code can evaluate it. --- a/drivers/pci/msi/msi.h +++ b/drivers/pci/msi/msi.h @@ -97,6 +97,15 @@ int __pci_enable_msix_range(struct pci_d void __pci_restore_msi_state(struct pci_dev *dev); void __pci_restore_msix_state(struct pci_dev *dev); +/* irq_domain related functionality */ + +enum support_mode { + ALLOW_LEGACY, + DENY_LEGACY, +}; + +bool pci_msi_domain_supports(struct pci_dev *dev, unsigned int feature_mask, enum support_mode mode); + /* Legacy (!IRQDOMAIN) fallbacks */ #ifdef CONFIG_PCI_MSI_ARCH_FALLBACKS From patchwork Fri Nov 11 13:55:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 13040375 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 48F9FC433FE for ; Fri, 11 Nov 2022 13:57:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234029AbiKKN5t (ORCPT ); Fri, 11 Nov 2022 08:57:49 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58850 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234030AbiKKN46 (ORCPT ); Fri, 11 Nov 2022 08:56:58 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F2F3F83BBD; Fri, 11 Nov 2022 05:55:12 -0800 (PST) Message-ID: <20221111122015.631728309@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668174911; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=+6oBh3Odymqoh23rvdka2IMdSMoyZzzr0/UBN1qNnTk=; b=O3tsMqs0BMeeR+sixFB4gZJapU/NxK4ghDKAVQPqDhnTZ1IBPbK56iDtMw7jiD/yvC0Vms vf+roT7vboCo/D68gqgyuCWbdKslCGJJlnagz5NYC84Fa+4muHYwvI8A/twTqrfeUBk4vq qOa5boM9ecDRIvlv/Ne3aj00R/KskvzhltFrU+g0Dwj09t1ZkfM5eE1QNWW8iR655FotRi SVw1neM3UJcaXYj5CYqZj6zgC6RP/mbHOygnVJyedVo6fh9IVUba5cbNVdgGznNBm/s8sV hI/fb/i3XF/r1foTj/UHFgkIBx8je8kZVkZCQzlLRfgqN9hBwDdlt7py4prVNw== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668174911; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=+6oBh3Odymqoh23rvdka2IMdSMoyZzzr0/UBN1qNnTk=; b=RaGdX6Bhz2QV0LIWcWTdx/Y0fm6Co1H4cRb08fHDA9pCZ6wSQ+pfMSrQ7MxAFpkbWFifhD 9ql635EreUgGQKBA== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , Michael Ellerman , Christophe Leroy , linuxppc-dev@lists.ozlabs.org, "Ahmed S. Darwish" , Reinette Chatre Subject: [patch 35/39] PCI/MSI: Reject MSI-X early References: <20221111120501.026511281@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:55:11 +0100 (CET) Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Similar to PCI multi-MSI reject MSI-X enablement when a irq domain is attached to the device which does not support MSI-X. Signed-off-by: Thomas Gleixner Acked-by: Bjorn Helgaas Reviewed-by: Jason Gunthorpe --- drivers/pci/msi/msi.c | 4 ++++ 1 file changed, 4 insertions(+) --- a/drivers/pci/msi/msi.c +++ b/drivers/pci/msi/msi.c @@ -760,6 +760,10 @@ int __pci_enable_msix_range(struct pci_d if (WARN_ON_ONCE(dev->msix_enabled)) return -EINVAL; + /* Check MSI-X early on irq domain enabled architectures */ + if (!pci_msi_domain_supports(dev, MSI_FLAG_PCI_MSIX, ALLOW_LEGACY)) + return -ENOTSUPP; + if (!pci_msi_supported(dev, nvec) || dev->current_state != PCI_D0) return -EINVAL; From patchwork Fri Nov 11 13:55:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 13040376 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CBEF5C433FE for ; Fri, 11 Nov 2022 13:57:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234045AbiKKN5u (ORCPT ); Fri, 11 Nov 2022 08:57:50 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59552 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234050AbiKKN5A (ORCPT ); Fri, 11 Nov 2022 08:57:00 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7FB607F572; Fri, 11 Nov 2022 05:55:14 -0800 (PST) Message-ID: <20221111122015.691357406@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668174913; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=ZT2wqZQe1H/I6Zbp9NC+LKW2/0gzRDmAQRTFrKQsKJ4=; b=pZhlEC8HQoltxfUbzgMXHkDfB0GRlxnLvSjN1dc3PiVBo8WSLYIF9ktMwc0XjNYb4kLS8+ FqTCjJWZeq1j8WqGwul0V0shm019qcC15aTTmWrBmibPa4iyBaHln17GO+B7a+FZ7HzxkG 0nigWZfumb9aUEbIyEZcIeoXLpiQyjkTbnipeH21yJ5xwmTxonq864TxZUl+LihVftel2x Ph1PWWqEcs7OLda5Ee6GdGF+KAXyt4i9XvX9Y9f9J76I48MVaA77REkSGiMVd5hEo8Wn9s 7pMPZ0LZKwuqpeWH/NkpM1YFXBbaazZjlZyRkesNTxkBHo+2AUSp+C++9BSUwA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668174913; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=ZT2wqZQe1H/I6Zbp9NC+LKW2/0gzRDmAQRTFrKQsKJ4=; b=XzyeTFE4zXDDmgsFpNdLl62MN8+2pdKYw4Ip6qUuQqqfIw4P9A9EW8A7NpauZTzTWtO0LS F5TDeOWU93205LDg== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , Michael Ellerman , Christophe Leroy , linuxppc-dev@lists.ozlabs.org, "Ahmed S. Darwish" , Reinette Chatre Subject: [patch 36/39] PCI/MSI: Validate MSIX contiguous restriction early References: <20221111120501.026511281@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:55:12 +0100 (CET) Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org With interrupt domains the sanity check for MSI-X vector validation can be done _before_ any allocation happens. The sanity check only applies to the allocation functions which have an 'entries' array argument. The entries array is filled by the caller with the requested MSI-X indicies. Some drivers have gaps in the index space which is not supported on all architectures. The PCI/MSI irqdomain has a 'feature' bit to enforce this validation late during the allocation phase. Just do it right away before doing any other work along with the other sanity checks on that array. Signed-off-by: Thomas Gleixner Acked-by: Bjorn Helgaas Reviewed-by: Jason Gunthorpe --- drivers/pci/msi/msi.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) --- a/drivers/pci/msi/msi.c +++ b/drivers/pci/msi/msi.c @@ -725,13 +725,17 @@ static int msix_capability_init(struct p return ret; } -static bool pci_msix_validate_entries(struct msix_entry *entries, int nvec, int hwsize) +static bool pci_msix_validate_entries(struct pci_dev *dev, struct msix_entry *entries, + int nvec, int hwsize) { + bool nogap; int i, j; if (!entries) return true; + nogap = pci_msi_domain_supports(dev, MSI_FLAG_MSIX_CONTIGUOUS, DENY_LEGACY); + for (i = 0; i < nvec; i++) { /* Entry within hardware limit? */ if (entries[i].entry >= hwsize) @@ -742,6 +746,9 @@ static bool pci_msix_validate_entries(st if (entries[i].entry == entries[j].entry) return false; } + /* Check for unsupported gaps */ + if (nogap && entries[i].entry != i) + return false; } return true; } @@ -773,7 +780,7 @@ int __pci_enable_msix_range(struct pci_d if (hwsize < 0) return hwsize; - if (!pci_msix_validate_entries(entries, nvec, hwsize)) + if (!pci_msix_validate_entries(dev, entries, nvec, hwsize)) return -EINVAL; /* PCI_IRQ_VIRTUAL is a horrible hack! */ From patchwork Fri Nov 11 13:55:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 13040377 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 21580C4332F for ; Fri, 11 Nov 2022 13:58:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234057AbiKKN6G (ORCPT ); Fri, 11 Nov 2022 08:58:06 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59580 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234061AbiKKN5B (ORCPT ); Fri, 11 Nov 2022 08:57:01 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6172085460; Fri, 11 Nov 2022 05:55:16 -0800 (PST) Message-ID: <20221111122015.749446904@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668174915; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=Ih0SYkcSYwketpyalRo87sRSG9j843DJDGdjQI9dFbE=; b=VRE7MeUlB+cCM6U0cjMzbGN3WDIQa4HFZh7046HSLFSqzZZR+YCs/CdvdLqq6MWSGZekns H/dGx3if2rOBFQbosYmjXgs8H6R5QzfT4Wx9HUiK3bRvDeCd3Y2/aKwsZmLgcB2RLXpdOs oVkPfJgyTtJEli4A4Tu93d2MK7EdOeIEH+Y0BZTm7D17rn3qKvvsqjvAZrJgzd7vVJM1e9 1Z0lHU2nKsnKqYI3bqO1EqiYcRaa2k7iEq2ImYpiFsxIhbdqk1xQCU1UqPFsjb5fWestXq 04JcUcgHgsR+8pKz5h9KEtGpLzv4hoUBfbtq/MJ4c2jMIoOztbmH2Ysjx6MsoQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668174915; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=Ih0SYkcSYwketpyalRo87sRSG9j843DJDGdjQI9dFbE=; b=3NdsAzuzZxu0dT7r41E3zPAtIf/iHCijDpTpmlZOnjI92Lbu6pLEazC2N//W9XAeQ4XAqW 7LzccZ7efW9feDBw== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , Michael Ellerman , Christophe Leroy , linuxppc-dev@lists.ozlabs.org, "Ahmed S. Darwish" , Reinette Chatre Subject: [patch 37/39] PCI/MSI: Remove redundant msi_check() callback References: <20221111120501.026511281@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:55:14 +0100 (CET) Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org All these sanity checks are now done _before_ any allocation work happens. No point in doing it twice. Signed-off-by: Thomas Gleixner Acked-by: Bjorn Helgaas Reviewed-by: Jason Gunthorpe --- drivers/pci/msi/irqdomain.c | 48 -------------------------------------------- 1 file changed, 48 deletions(-) --- a/drivers/pci/msi/irqdomain.c +++ b/drivers/pci/msi/irqdomain.c @@ -64,51 +64,6 @@ static irq_hw_number_t pci_msi_domain_ca (pci_domain_nr(dev->bus) & 0xFFFFFFFF) << 27; } -static inline bool pci_msi_desc_is_multi_msi(struct msi_desc *desc) -{ - return !desc->pci.msi_attrib.is_msix && desc->nvec_used > 1; -} - -/** - * pci_msi_domain_check_cap - Verify that @domain supports the capabilities - * for @dev - * @domain: The interrupt domain to check - * @info: The domain info for verification - * @dev: The device to check - * - * Returns: - * 0 if the functionality is supported - * 1 if Multi MSI is requested, but the domain does not support it - * -ENOTSUPP otherwise - */ -static int pci_msi_domain_check_cap(struct irq_domain *domain, - struct msi_domain_info *info, - struct device *dev) -{ - struct msi_desc *desc = msi_first_desc(dev, MSI_DESC_ALL); - - /* Special handling to support __pci_enable_msi_range() */ - if (pci_msi_desc_is_multi_msi(desc) && - !(info->flags & MSI_FLAG_MULTI_PCI_MSI)) - return 1; - - if (desc->pci.msi_attrib.is_msix) { - if (!(info->flags & MSI_FLAG_PCI_MSIX)) - return -ENOTSUPP; - - if (info->flags & MSI_FLAG_MSIX_CONTIGUOUS) { - unsigned int idx = 0; - - /* Check for gaps in the entry indices */ - msi_for_each_desc(desc, dev, MSI_DESC_ALL) { - if (desc->msi_index != idx++) - return -ENOTSUPP; - } - } - } - return 0; -} - static void pci_msi_domain_set_desc(msi_alloc_info_t *arg, struct msi_desc *desc) { @@ -118,7 +73,6 @@ static void pci_msi_domain_set_desc(msi_ static struct msi_domain_ops pci_msi_domain_ops_default = { .set_desc = pci_msi_domain_set_desc, - .msi_check = pci_msi_domain_check_cap, }; static void pci_msi_domain_update_dom_ops(struct msi_domain_info *info) @@ -130,8 +84,6 @@ static void pci_msi_domain_update_dom_op } else { if (ops->set_desc == NULL) ops->set_desc = pci_msi_domain_set_desc; - if (ops->msi_check == NULL) - ops->msi_check = pci_msi_domain_check_cap; } } From patchwork Fri Nov 11 13:55:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 13040378 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 05D7FC43217 for ; Fri, 11 Nov 2022 13:58:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233365AbiKKN6K (ORCPT ); Fri, 11 Nov 2022 08:58:10 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58812 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234064AbiKKN5B (ORCPT ); Fri, 11 Nov 2022 08:57:01 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DEA586EB6F; Fri, 11 Nov 2022 05:55:17 -0800 (PST) Message-ID: <20221111122015.807616900@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668174916; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=643AGhyNZmR2aie2PCCrOjp31nEV6JyyeqqH5V3vLDo=; b=Sw1lJkOUvkZ0DIAcRPl+ie495eVa6MbYCglERsRGFe8w0Y5OR00lTVkULAo3m3suKSbjrP 0ow0a6Nw5jI91aq9J3EGWRZoVNumWiEKlIlIXZxwTYrItsHWIo3QClO8S/4rXyABHAgyRd VLCJNs9QTCInxzPdTphoMGKQBBAQzQYXZZzvOmqqZ5Wydl5zhwLSMUpWma3gufRqtR7R7c Q7e/lmelPnuCPGVViHH7TrfQy0Chs28OJpRiQP92j/k5T4lQXPSjBLR5hGCMjSgcBdnQev 9JltwNMmtLP7XxpQGxTpy8LoCtAOCTdKp0RybLPEIGZ6vG3MULDpIUQfdcegHw== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668174916; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=643AGhyNZmR2aie2PCCrOjp31nEV6JyyeqqH5V3vLDo=; b=CEwbqwdLhlbEE3zKR1PyZBZm1Iv1k/zk7+gvTQLDniqqGqeEfGsMiJ+J0PDZl7Nx3yuYOM y3Rvy6Y7JuG7mMBQ== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , Michael Ellerman , Christophe Leroy , linuxppc-dev@lists.ozlabs.org, "Ahmed S. Darwish" , Reinette Chatre Subject: [patch 38/39] genirq/msi: Remove msi_domain_ops::msi_check() References: <20221111120501.026511281@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:55:15 +0100 (CET) Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org No more users. Signed-off-by: Thomas Gleixner Reviewed-by: Jason Gunthorpe --- include/linux/msi.h | 4 ---- kernel/irq/msi.c | 17 +---------------- 2 files changed, 1 insertion(+), 20 deletions(-) --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -288,7 +288,6 @@ struct msi_domain_info; * @get_hwirq: Retrieve the resulting hw irq number * @msi_init: Domain specific init function for MSI interrupts * @msi_free: Domain specific function to free a MSI interrupts - * @msi_check: Callback for verification of the domain/info/dev data * @msi_prepare: Prepare the allocation of the interrupts in the domain * @set_desc: Set the msi descriptor for an interrupt * @domain_alloc_irqs: Optional function to override the default allocation @@ -326,9 +325,6 @@ struct msi_domain_ops { void (*msi_free)(struct irq_domain *domain, struct msi_domain_info *info, unsigned int virq); - int (*msi_check)(struct irq_domain *domain, - struct msi_domain_info *info, - struct device *dev); int (*msi_prepare)(struct irq_domain *domain, struct device *dev, int nvec, msi_alloc_info_t *arg); --- a/kernel/irq/msi.c +++ b/kernel/irq/msi.c @@ -617,17 +617,9 @@ static int msi_domain_ops_init(struct ir return 0; } -static int msi_domain_ops_check(struct irq_domain *domain, - struct msi_domain_info *info, - struct device *dev) -{ - return 0; -} - static struct msi_domain_ops msi_domain_ops_default = { .get_hwirq = msi_domain_ops_get_hwirq, .msi_init = msi_domain_ops_init, - .msi_check = msi_domain_ops_check, .msi_prepare = msi_domain_ops_prepare, .set_desc = msi_domain_ops_set_desc, .domain_alloc_irqs = __msi_domain_alloc_irqs, @@ -655,8 +647,6 @@ static void msi_domain_update_dom_ops(st ops->get_hwirq = msi_domain_ops_default.get_hwirq; if (ops->msi_init == NULL) ops->msi_init = msi_domain_ops_default.msi_init; - if (ops->msi_check == NULL) - ops->msi_check = msi_domain_ops_default.msi_check; if (ops->msi_prepare == NULL) ops->msi_prepare = msi_domain_ops_default.msi_prepare; if (ops->set_desc == NULL) @@ -707,13 +697,8 @@ int msi_domain_prepare_irqs(struct irq_d { struct msi_domain_info *info = domain->host_data; struct msi_domain_ops *ops = info->ops; - int ret; - - ret = ops->msi_check(domain, info, dev); - if (ret == 0) - ret = ops->msi_prepare(domain, dev, nvec, arg); - return ret; + return ops->msi_prepare(domain, dev, nvec, arg); } int msi_domain_populate_irqs(struct irq_domain *domain, struct device *dev, From patchwork Fri Nov 11 13:55:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 13040379 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D5BD5C433FE for ; Fri, 11 Nov 2022 13:58:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234125AbiKKN6R (ORCPT ); Fri, 11 Nov 2022 08:58:17 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59624 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233581AbiKKN5C (ORCPT ); Fri, 11 Nov 2022 08:57:02 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6F92D701AD; Fri, 11 Nov 2022 05:55:19 -0800 (PST) Message-ID: <20221111122015.865042356@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668174918; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=KlmWSrD822PE2zOCQUPKNeyY1BUX75wWYBCy1LY/Ddo=; b=uOX0P7JY4JDZrhpHSa4G1IGNcgMKKOEotn3WaD7e11QG/6dfy0hAWm6VlqdtkgWxscy2j2 vg8RZD2L7my03vFnseCP0zLzRVNFtmog03/OZWe8j+dCe3360GRdm7D7Ro+eFucXWe1cGt B1TbYs1Kn3thlD7fo2rbFIumODHXMAxjO1WybkfUU98oPmOGMfEeOcgke6duFUhpjCZKei OKjgabNkcGtNWaX2DdmfmLk843sFhP8s/1IrxWyfYUmW6Aek0x8nC5F0XV+DOF6doD4AUQ pelYpWuMy5qNR57TeK4q2muF+jZFU5A0mAMkigQCBXCSX0sc7psCpSz6yuOhBg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668174918; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=KlmWSrD822PE2zOCQUPKNeyY1BUX75wWYBCy1LY/Ddo=; b=IbSEAj1FCCNGEuhGibqJgPyd7PCqcVB4JEhzyivG+QUYDdfm3d+uCQ5/9YQCI9bNGUKlUx zljP/0HV6LO8O0BA== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe , Michael Ellerman , Christophe Leroy , linuxppc-dev@lists.ozlabs.org, "Ahmed S. Darwish" , Reinette Chatre Subject: [patch 39/39] x86/apic: Remove X86_IRQ_ALLOC_CONTIGUOUS_VECTORS References: <20221111120501.026511281@linutronix.de> MIME-Version: 1.0 Date: Fri, 11 Nov 2022 14:55:17 +0100 (CET) Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Now that the PCI/MSI core code does early checking for multi-MSI support X86_IRQ_ALLOC_CONTIGUOUS_VECTORS is not required anymore. Remove the flag and rely on MSI_FLAG_MULTI_PCI_MSI. Signed-off-by: Thomas Gleixner Reviewed-by: Jason Gunthorpe --- arch/x86/include/asm/irqdomain.h | 4 +--- arch/x86/kernel/apic/msi.c | 6 ++---- arch/x86/kernel/apic/vector.c | 4 ---- drivers/iommu/amd/iommu.c | 7 ------- drivers/iommu/intel/irq_remapping.c | 7 ------- drivers/pci/controller/pci-hyperv.c | 15 +-------------- 6 files changed, 4 insertions(+), 39 deletions(-) --- a/arch/x86/include/asm/irqdomain.h +++ b/arch/x86/include/asm/irqdomain.h @@ -7,9 +7,7 @@ #ifdef CONFIG_X86_LOCAL_APIC enum { - /* Allocate contiguous CPU vectors */ - X86_IRQ_ALLOC_CONTIGUOUS_VECTORS = 0x1, - X86_IRQ_ALLOC_LEGACY = 0x2, + X86_IRQ_ALLOC_LEGACY = 0x1, }; extern int x86_fwspec_is_ioapic(struct irq_fwspec *fwspec); --- a/arch/x86/kernel/apic/msi.c +++ b/arch/x86/kernel/apic/msi.c @@ -161,12 +161,10 @@ int pci_msi_prepare(struct irq_domain *d msi_alloc_info_t *arg) { init_irq_alloc_info(arg, NULL); - if (to_pci_dev(dev)->msix_enabled) { + if (to_pci_dev(dev)->msix_enabled) arg->type = X86_IRQ_ALLOC_TYPE_PCI_MSIX; - } else { + else arg->type = X86_IRQ_ALLOC_TYPE_PCI_MSI; - arg->flags |= X86_IRQ_ALLOC_CONTIGUOUS_VECTORS; - } return 0; } --- a/arch/x86/kernel/apic/vector.c +++ b/arch/x86/kernel/apic/vector.c @@ -539,10 +539,6 @@ static int x86_vector_alloc_irqs(struct if (disable_apic) return -ENXIO; - /* Currently vector allocator can't guarantee contiguous allocations */ - if ((info->flags & X86_IRQ_ALLOC_CONTIGUOUS_VECTORS) && nr_irqs > 1) - return -ENOSYS; - /* * Catch any attempt to touch the cascade interrupt on a PIC * equipped system. --- a/drivers/iommu/amd/iommu.c +++ b/drivers/iommu/amd/iommu.c @@ -3297,13 +3297,6 @@ static int irq_remapping_alloc(struct ir if (nr_irqs > 1 && info->type != X86_IRQ_ALLOC_TYPE_PCI_MSI) return -EINVAL; - /* - * With IRQ remapping enabled, don't need contiguous CPU vectors - * to support multiple MSI interrupts. - */ - if (info->type == X86_IRQ_ALLOC_TYPE_PCI_MSI) - info->flags &= ~X86_IRQ_ALLOC_CONTIGUOUS_VECTORS; - sbdf = get_devid(info); if (sbdf < 0) return -EINVAL; --- a/drivers/iommu/intel/irq_remapping.c +++ b/drivers/iommu/intel/irq_remapping.c @@ -1337,13 +1337,6 @@ static int intel_irq_remapping_alloc(str if (nr_irqs > 1 && info->type != X86_IRQ_ALLOC_TYPE_PCI_MSI) return -EINVAL; - /* - * With IRQ remapping enabled, don't need contiguous CPU vectors - * to support multiple MSI interrupts. - */ - if (info->type == X86_IRQ_ALLOC_TYPE_PCI_MSI) - info->flags &= ~X86_IRQ_ALLOC_CONTIGUOUS_VECTORS; - ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg); if (ret < 0) return ret; --- a/drivers/pci/controller/pci-hyperv.c +++ b/drivers/pci/controller/pci-hyperv.c @@ -611,20 +611,7 @@ static unsigned int hv_msi_get_int_vecto return cfg->vector; } -static int hv_msi_prepare(struct irq_domain *domain, struct device *dev, - int nvec, msi_alloc_info_t *info) -{ - int ret = pci_msi_prepare(domain, dev, nvec, info); - - /* - * By using the interrupt remapper in the hypervisor IOMMU, contiguous - * CPU vectors is not needed for multi-MSI - */ - if (info->type == X86_IRQ_ALLOC_TYPE_PCI_MSI) - info->flags &= ~X86_IRQ_ALLOC_CONTIGUOUS_VECTORS; - - return ret; -} +#define hv_msi_prepare pci_msi_prepare /** * hv_arch_irq_unmask() - "Unmask" the IRQ by setting its current