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[2001:1c06:2302:5600:7e82:4de3:e7e5:df38]) by smtp.gmail.com with ESMTPSA id h23-20020a170906585700b007317f017e64sm1882915ejs.134.2022.11.12.04.41.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 12 Nov 2022 04:41:38 -0800 (PST) From: Bryan O'Donoghue To: robert.foss@linaro.org, todor.too@gmail.com, agross@kernel.org, andersson@kernel.org, konrad.dybcio@somainline.org, mchehab@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, dmitry.baryshkov@linaro.org, vladimir.zapolskiy@linaro.org Cc: sakari.ailus@iki.fi, hverkuil@xs4all.nl, laurent.pinchart@ideasonboard.com, quic_mmitkov@quicinc.com, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Bryan O'Donoghue Subject: [PATCH v4 1/3] arm64: dts: qcom: sm8250: camss: Define ports address/size cells Date: Sat, 12 Nov 2022 12:41:24 +0000 Message-Id: <20221112124126.86815-2-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221112124126.86815-1-bryan.odonoghue@linaro.org> References: <20221112124126.86815-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The ports {} address and size cells definition is the same for every derived 8250 board so, we should define it in the core sm8250.dtsi. Suggested-by: Konrad Dybcio Reviewed-by: Vladimir Zapolskiy Signed-off-by: Bryan O'Donoghue --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index d517d6a80bdcb..f28a8893d00d7 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -3412,6 +3412,11 @@ camss: camss@ac6a000 { "cam_hf_0_mnoc", "cam_sf_0_mnoc", "cam_sf_icp_mnoc"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + }; }; camcc: clock-controller@ad00000 { From patchwork Sat Nov 12 12:41:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 13041195 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 19B29C46467 for ; Sat, 12 Nov 2022 12:41:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234916AbiKLMlp (ORCPT ); Sat, 12 Nov 2022 07:41:45 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52556 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234838AbiKLMln (ORCPT ); Sat, 12 Nov 2022 07:41:43 -0500 Received: from mail-ej1-x62a.google.com (mail-ej1-x62a.google.com [IPv6:2a00:1450:4864:20::62a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AEE8412A86 for ; Sat, 12 Nov 2022 04:41:41 -0800 (PST) Received: by mail-ej1-x62a.google.com with SMTP id t25so18102978ejb.8 for ; Sat, 12 Nov 2022 04:41:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=m11Wfyl1s0tVU6aM4TogI60DJN2xjUND4jny0vFuOjE=; b=dniROph7TrNRUUZpE1NfM59JBHZlHl0WBdHLjIKt71MdDVqd72gIMkUnn3pmGqBAcx rmSE6Sji0YiTstrNWhVNdm21Pbu1RG+zjnhpnUi8yrFAmq1w7Jqigw8X2AJknfg7+IlU QS5HqefxB5KGYQH73g1XBhkQ4sa4mOh+1HnfFfDl5o4Pf+m5ZW/S4okZ/5ZbIgyAf7Cd ay65F3URSTv2GwQbXstW6MkwLYln1CZbB5UziVYcozcorE1btBzuOSn8oz1ID57sTer6 nESFGEzAZMTs4ddkb3ao3ubmbMtzk0aI2kwDJ9G7VBdM5GgAJjI+zue3DDE573GUtv2Q TvoQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=m11Wfyl1s0tVU6aM4TogI60DJN2xjUND4jny0vFuOjE=; b=sbKDErcAVC7aV5dDGQW2gQJuPSa3tzcl8dqVRWNzCKRrPj1Xs0CYfEQumD6huRMrPO Tx+E5hZIb/BPffN6wX/sA5COUy6ceU+SrV42PYhVGBL9NbSq8C/GN8oE+pLw2C92Q/uO pfXRtvErhsjmvnjokHfLuZ7aUtr4A3Zz+scZovm3eBzyoH1AK0qiYbYyQKhZybSz9Q03 2TGfqA7lkAjx9VuuvtnjNjJa5tFSlOKnZd7fWzN2dMaBCZfnL3TtsPPchGrhCrnzHoOX bx5sbrcDipRl0vTSQAU+LG0NGQ5+7YHKZXhHuiR3QKJbFJL4Xi9m9pfzW5ZDVvd812KJ rBLg== X-Gm-Message-State: ANoB5pn7gVKnoEYjTzFEhJmthdOc/JF46ruwhLRWii/LoVXsxBDA9GCP fRr4O/ABMXCy7NNb9HRgNzEeIw== X-Google-Smtp-Source: AA0mqf6T1ROUnUkmfrlYgaB2RCORn1Wxf081qL9m3nFrZbilSxnQqiRU8Ll/EwnNNiRU7bNjTwo+/g== X-Received: by 2002:a17:906:4bd5:b0:78d:408a:4a18 with SMTP id x21-20020a1709064bd500b0078d408a4a18mr5091407ejv.261.1668256900266; Sat, 12 Nov 2022 04:41:40 -0800 (PST) Received: from localhost.localdomain (2001-1c06-2302-5600-7e82-4de3-e7e5-df38.cable.dynamic.v6.ziggo.nl. [2001:1c06:2302:5600:7e82:4de3:e7e5:df38]) by smtp.gmail.com with ESMTPSA id h23-20020a170906585700b007317f017e64sm1882915ejs.134.2022.11.12.04.41.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 12 Nov 2022 04:41:39 -0800 (PST) From: Bryan O'Donoghue To: robert.foss@linaro.org, todor.too@gmail.com, agross@kernel.org, andersson@kernel.org, konrad.dybcio@somainline.org, mchehab@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, dmitry.baryshkov@linaro.org, vladimir.zapolskiy@linaro.org Cc: sakari.ailus@iki.fi, hverkuil@xs4all.nl, laurent.pinchart@ideasonboard.com, quic_mmitkov@quicinc.com, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Bryan O'Donoghue Subject: [PATCH v4 2/3] arm64: dts: qcom: qrb5165-rb5-vision-mezzanine: Add vision mezzanine Date: Sat, 12 Nov 2022 12:41:25 +0000 Message-Id: <20221112124126.86815-3-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221112124126.86815-1-bryan.odonoghue@linaro.org> References: <20221112124126.86815-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The Vision Mezzanine for the RB5 ships with an imx517 and ov9282 populated. Other sensors and components may be added or stacked with additional mezzanines. Enable both the IMX577 An example media-ctl pipeline for the imx577 is: media-ctl --reset media-ctl -v -d /dev/media0 -V '"imx577 '22-001a'":0[fmt:SRGGB10/4056x3040 field:none]' media-ctl -V '"msm_csiphy2":0[fmt:SRGGB10/4056x3040]' media-ctl -V '"msm_csid0":0[fmt:SRGGB10/4056x3040]' media-ctl -V '"msm_vfe0_rdi0":0[fmt:SRGGB10/4056x3040]' media-ctl -l '"msm_csiphy2":1->"msm_csid0":0[1]' media-ctl -l '"msm_csid0":1->"msm_vfe0_rdi0":0[1]' yavta -B capture-mplane -c -I -n 5 -f SRGGB10P -s 4056x3040 -F /dev/video0 Signed-off-by: Bryan O'Donoghue --- arch/arm64/boot/dts/qcom/Makefile | 1 + .../dts/qcom/qrb5165-rb5-vision-mezzanine.dts | 63 +++++++++++++++++++ arch/arm64/boot/dts/qcom/sm8250.dtsi | 33 ++++++++++ 3 files changed, 97 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/qrb5165-rb5-vision-mezzanine.dts diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index d534888bcfe52..cd88efa19e750 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -54,6 +54,7 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8998-sony-xperia-yoshino-poplar.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb dtb-$(CONFIG_ARCH_QCOM) += qrb5165-rb5.dtb +dtb-$(CONFIG_ARCH_QCOM) += qrb5165-rb5-vision-mezzanine.dtb dtb-$(CONFIG_ARCH_QCOM) += sa8155p-adp.dtb dtb-$(CONFIG_ARCH_QCOM) += sa8295p-adp.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7180-idp.dtb diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5-vision-mezzanine.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5-vision-mezzanine.dts new file mode 100644 index 0000000000000..315d524045cf3 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5-vision-mezzanine.dts @@ -0,0 +1,63 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2022, Linaro Ltd. + */ + +/dts-v1/; + +#include "qrb5165-rb5.dts" + +&camss { + status = "okay"; + vdda-phy-supply = <&vreg_l5a_0p88>; + vdda-pll-supply = <&vreg_l9a_1p2>; + + ports { + /* The port index denotes CSIPHY id i.e. csiphy2 */ + port@2 { + reg = <2>; + csiphy2_ep: endpoint { + clock-lanes = <7>; + data-lanes = <0 1 2 3>; + remote-endpoint = <&imx577_ep>; + }; + }; + }; +}; + +&camcc { + status = "okay"; +}; + +&cci1 { + status = "okay"; +}; + +&cci1_i2c0 { + camera@1a { + compatible = "sony,imx577"; + reg = <0x1a>; + + reset-gpios = <&tlmm 78 GPIO_ACTIVE_LOW>; + pinctrl-names = "default", "suspend"; + pinctrl-0 = <&cam2_default>; + pinctrl-1 = <&cam2_suspend>; + + clocks = <&camcc CAM_CC_MCLK2_CLK>; + assigned-clocks = <&camcc CAM_CC_MCLK2_CLK>; + assigned-clock-rates = <24000000>; + + dovdd-supply = <&vreg_l7f_1p8>; + avdd-supply = <&vdc_5v>; + dvdd-supply = <&vdc_5v>; + + port { + imx577_ep: endpoint { + clock-lanes = <1>; + link-frequencies = /bits/ 64 <600000000>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&csiphy2_ep>; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index f28a8893d00d7..83604b9772766 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -3798,6 +3798,39 @@ tlmm: pinctrl@f100000 { gpio-ranges = <&tlmm 0 0 181>; wakeup-parent = <&pdc>; + cam2_default: cam2-default-state { + rst-pins { + pins = "gpio78"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + mclk-pins { + pins = "gpio96"; + function = "cam_mclk"; + drive-strength = <16>; + bias-disable; + }; + }; + + cam2_suspend: cam2-suspend-state { + rst-pins { + pins = "gpio78"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + output-low; + }; + + mclk-pins { + pins = "gpio96"; + function = "cam_mclk"; + drive-strength = <2>; + bias-disable; + }; + }; + cci0_default: cci0-default-state { cci0_i2c0_default: cci0-i2c0-default-pins { /* SDA, SCL */ From patchwork Sat Nov 12 12:41:26 2022 Content-Type: text/plain; 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[2001:1c06:2302:5600:7e82:4de3:e7e5:df38]) by smtp.gmail.com with ESMTPSA id h23-20020a170906585700b007317f017e64sm1882915ejs.134.2022.11.12.04.41.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 12 Nov 2022 04:41:41 -0800 (PST) From: Bryan O'Donoghue To: robert.foss@linaro.org, todor.too@gmail.com, agross@kernel.org, andersson@kernel.org, konrad.dybcio@somainline.org, mchehab@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, dmitry.baryshkov@linaro.org, vladimir.zapolskiy@linaro.org Cc: sakari.ailus@iki.fi, hverkuil@xs4all.nl, laurent.pinchart@ideasonboard.com, quic_mmitkov@quicinc.com, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Bryan O'Donoghue Subject: [PATCH v4 3/3] arm64: dts: qcom: sdm845-db845c-navigation-mezzanine: Add navigation mezzanine dts Date: Sat, 12 Nov 2022 12:41:26 +0000 Message-Id: <20221112124126.86815-4-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221112124126.86815-1-bryan.odonoghue@linaro.org> References: <20221112124126.86815-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Move the dts data for the rb3 navigation mezzanine into its own dts file. Suggested-by: Dmitry Baryshkov Signed-off-by: Bryan O'Donoghue --- arch/arm64/boot/dts/qcom/Makefile | 1 + .../sdm845-db845c-navigation-mezzanine.dts | 109 ++++++++++++++++++ arch/arm64/boot/dts/qcom/sdm845-db845c.dts | 101 ---------------- 3 files changed, 110 insertions(+), 101 deletions(-) create mode 100644 arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dts diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index cd88efa19e750..5eadd251a0a16 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -132,6 +132,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r1.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r2.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r3.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm845-db845c.dtb +dtb-$(CONFIG_ARCH_QCOM) += sdm845-db845c-navigation-mezzanine.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm845-lg-judyln.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm845-lg-judyp.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm845-mtp.dtb diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dts new file mode 100644 index 0000000000000..0862ca30c8963 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dts @@ -0,0 +1,109 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2022, Linaro Ltd. + */ + +/dts-v1/; + +#include "sdm845-db845c.dts" + +&cci { + status = "okay"; +}; + +&camss { + vdda-phy-supply = <&vreg_l1a_0p875>; + vdda-pll-supply = <&vreg_l26a_1p2>; + + status = "ok"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + csiphy0_ep: endpoint { + data-lanes = <0 1 2 3>; + remote-endpoint = <&ov8856_ep>; + }; + }; + }; +}; + +&cci_i2c0 { + camera@10 { + compatible = "ovti,ov8856"; + reg = <0x10>; + + /* CAM0_RST_N */ + reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&cam0_default>; + + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "xvclk"; + clock-frequency = <19200000>; + + /* + * The &vreg_s4a_1p8 trace is powered on as a, + * so it is represented by a fixed regulator. + * + * The 2.8V vdda-supply and 1.2V vddd-supply regulators + * both have to be enabled through the power management + * gpios. + */ + dovdd-supply = <&vreg_lvs1a_1p8>; + avdd-supply = <&cam0_avdd_2v8>; + dvdd-supply = <&cam0_dvdd_1v2>; + + status = "ok"; + + port { + ov8856_ep: endpoint { + link-frequencies = /bits/ 64 + <360000000 180000000>; + data-lanes = <1 2 3 4>; + remote-endpoint = <&csiphy0_ep>; + }; + }; + }; +}; + +&cci_i2c1 { + camera@60 { + compatible = "ovti,ov7251"; + + /* I2C address as per ov7251.txt linux documentation */ + reg = <0x60>; + + /* CAM3_RST_N */ + enable-gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&cam3_default>; + + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "xclk"; + clock-frequency = <24000000>; + + /* + * The &vreg_s4a_1p8 trace always powered on. + * + * The 2.8V vdda-supply regulator is enabled when the + * vreg_s4a_1p8 trace is pulled high. + * It too is represented by a fixed regulator. + * + * No 1.2V vddd-supply regulator is used. + */ + vdddo-supply = <&vreg_lvs1a_1p8>; + vdda-supply = <&cam3_avdd_2v8>; + + status = "disable"; + + port { + ov7251_ep: endpoint { + data-lanes = <0 1>; +/* remote-endpoint = <&csiphy3_ep>; */ + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts index 3e7ceb0861eb0..f41c6d600ea8c 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts @@ -1174,107 +1174,6 @@ &pm8998_gpio { }; -&cci { - status = "okay"; -}; - -&camss { - vdda-phy-supply = <&vreg_l1a_0p875>; - vdda-pll-supply = <&vreg_l26a_1p2>; - - status = "ok"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - port@0 { - reg = <0>; - csiphy0_ep: endpoint { - data-lanes = <0 1 2 3>; - remote-endpoint = <&ov8856_ep>; - }; - }; - }; -}; - -&cci_i2c0 { - camera@10 { - compatible = "ovti,ov8856"; - reg = <0x10>; - - /* CAM0_RST_N */ - reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&cam0_default>; - - clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; - clock-names = "xvclk"; - clock-frequency = <19200000>; - - /* - * The &vreg_s4a_1p8 trace is powered on as a, - * so it is represented by a fixed regulator. - * - * The 2.8V vdda-supply and 1.2V vddd-supply regulators - * both have to be enabled through the power management - * gpios. - */ - dovdd-supply = <&vreg_lvs1a_1p8>; - avdd-supply = <&cam0_avdd_2v8>; - dvdd-supply = <&cam0_dvdd_1v2>; - - status = "ok"; - - port { - ov8856_ep: endpoint { - link-frequencies = /bits/ 64 - <360000000 180000000>; - data-lanes = <1 2 3 4>; - remote-endpoint = <&csiphy0_ep>; - }; - }; - }; -}; - -&cci_i2c1 { - camera@60 { - compatible = "ovti,ov7251"; - - /* I2C address as per ov7251.txt linux documentation */ - reg = <0x60>; - - /* CAM3_RST_N */ - enable-gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&cam3_default>; - - clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; - clock-names = "xclk"; - clock-frequency = <24000000>; - - /* - * The &vreg_s4a_1p8 trace always powered on. - * - * The 2.8V vdda-supply regulator is enabled when the - * vreg_s4a_1p8 trace is pulled high. - * It too is represented by a fixed regulator. - * - * No 1.2V vddd-supply regulator is used. - */ - vdddo-supply = <&vreg_lvs1a_1p8>; - vdda-supply = <&cam3_avdd_2v8>; - - status = "disable"; - - port { - ov7251_ep: endpoint { - data-lanes = <0 1>; -/* remote-endpoint = <&csiphy3_ep>; */ - }; - }; - }; -}; - /* PINCTRL - additions to nodes defined in sdm845.dtsi */ &qup_spi0_default { config {