From patchwork Tue Jan 22 05:51:03 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 10774869 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 29997139A for ; Tue, 22 Jan 2019 05:52:52 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1ADE22A72E for ; Tue, 22 Jan 2019 05:52:52 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0F2FB2A74A; Tue, 22 Jan 2019 05:52:52 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id ADE182A72E for ; Tue, 22 Jan 2019 05:52:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726271AbfAVFwu (ORCPT ); Tue, 22 Jan 2019 00:52:50 -0500 Received: from mail-pl1-f194.google.com ([209.85.214.194]:40280 "EHLO mail-pl1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726213AbfAVFvq (ORCPT ); Tue, 22 Jan 2019 00:51:46 -0500 Received: by mail-pl1-f194.google.com with SMTP id u18so10902597plq.7 for ; Mon, 21 Jan 2019 21:51:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=sl0tPf1cXbi8vKXNTpstL1d2A0LU8sPSxUtRPLPpSis=; b=jdmohsLojjOXN7ZQvPlPNBhjKdQ064xBypP6dAerbnzu3JsPhiYI+qfSmt1CceY+fk Ih7o4ri/aUprfZdFV2uh/65qyyPCerWRmwl+bJliVsV5D9qO2fkStrZHxJNiIyHctnOV zBJYTHkIprgPYm/yF505qjMVZZd2hDnWKfvB0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=sl0tPf1cXbi8vKXNTpstL1d2A0LU8sPSxUtRPLPpSis=; b=tV+Emp4t/zpHd5e2Kt5V5jilKaZhUV9y2wRbZOONnyzw08ZHE36YsgZ2C1FDTTBNbh ddHTzr15pOeWnAPgEIZzWGhgaaFb24aABLUsRiUJw6VAGoMANXrI6HZyLEBXoPXIBWNk pB3zChxsMRwfQdm2d9ePBPq77FHGtLx65nVkiA7QS5V8+wFFUc9qv7BK5l2SnyFnLkB1 fV8g8DTrwM4qM2x1QaqCR+t7+POnSbbbusMVsUH1U325M/6AFPlHZZssuJseKNv/Zm1w fq8IxY4DqNiXeU3u91mLouysEfatQv2nPTPQr0HiFaM5qs7ZadBZkkuVNA+NHm4ahMLl 51Dg== X-Gm-Message-State: AJcUukdR1NuB1lVWSntTw0HuQ+3iO7GmowSKt97K8ucN0pC8I1Vxz5yg fAe/GJAgWP8vvBdck0BhNyvz8g== X-Google-Smtp-Source: ALg8bN7VMWkLqWTStgimPzUr4QTWvd7RBAme1Ia4dMkZvDaKLfYrFZcGERXZYKd2uBMGXO2XN3Xtwg== X-Received: by 2002:a17:902:e10a:: with SMTP id cc10mr33287703plb.165.1548136306281; Mon, 21 Jan 2019 21:51:46 -0800 (PST) Received: from localhost.localdomain (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id z62sm23771572pfl.33.2019.01.21.21.51.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 21 Jan 2019 21:51:45 -0800 (PST) From: Bjorn Andersson To: Andy Gross , David Brown , Sibi Sankar Cc: Rob Herring , Mark Rutland , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 01/10] arm64: dts: qcom: sdm845: Update PIL region memory map Date: Mon, 21 Jan 2019 21:51:03 -0800 Message-Id: <20190122055112.30943-2-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20190122055112.30943-1-bjorn.andersson@linaro.org> References: <20190122055112.30943-1-bjorn.andersson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Update existing and add all missing PIL regions to the reserved memory map, as described in version 10. Signed-off-by: Bjorn Andersson --- Changes since v2: - New patch arch/arm64/boot/dts/qcom/sdm845.dtsi | 61 ++++++++++++++++++++++++++-- 1 file changed, 58 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 0ec827394e92..cdcac3704c13 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -89,12 +89,47 @@ }; memory@86200000 { - reg = <0 0x86200000 0 0x2d00000>; + reg = <0 0x86200000 0 0x100000>; no-map; }; - wlan_msa_mem: memory@96700000 { - reg = <0 0x96700000 0 0x100000>; + memory@86300000 { + reg = <0 0x86300000 0 0x4800000>; + no-map; + }; + + memory@8ab00000 { + reg = <0 0x8ab00000 0 0x1400000>; + no-map; + }; + + memory@8bf00000 { + reg = <0 0x8bf00000 0 0x500000>; + no-map; + }; + + ipa_fw_mem: memory@8c400000 { + reg = <0 0x8c400000 0 0x10000>; + no-map; + }; + + ipa_gsi_mem: memory@8c410000 { + reg = <0 0x8c410000 0 0x5000>; + no-map; + }; + + memory@8c415000 { + reg = <0 0x8c415000 0 0x2000>; + no-map; + }; + + adsp_mem: memory@8c500000 { + reg = <0 0x8c500000 0 0x1a00000>; + no-map; + }; + + wlan_msa_mem: memory@8df00000 { + reg = <0 0x8df00000 0 0x100000>; no-map; }; @@ -103,10 +138,30 @@ no-map; }; + venus_mem: memory@95800000 { + reg = <0 0x95800000 0 0x500000>; + no-map; + }; + + cdsp_mem: memory@95d00000 { + reg = <0 0x95d00000 0 0x800000>; + no-map; + }; + mba_region: memory@96500000 { reg = <0 0x96500000 0 0x200000>; no-map; }; + + slpi_mem: memory@96700000 { + reg = <0 0x96700000 0 0x1400000>; + no-map; + }; + + spss_mem: memory@97b00000 { + reg = <0 0x97b00000 0 0x100000>; + no-map; + }; }; cpus { From patchwork Tue Jan 22 05:51:04 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 10774865 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1381013BF for ; Tue, 22 Jan 2019 05:52:38 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 03B372A72E for ; Tue, 22 Jan 2019 05:52:38 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EAFED2A74A; Tue, 22 Jan 2019 05:52:37 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A58872A72E for ; Tue, 22 Jan 2019 05:52:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727001AbfAVFvu (ORCPT ); Tue, 22 Jan 2019 00:51:50 -0500 Received: from mail-pg1-f194.google.com ([209.85.215.194]:44958 "EHLO mail-pg1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726963AbfAVFvs (ORCPT ); Tue, 22 Jan 2019 00:51:48 -0500 Received: by mail-pg1-f194.google.com with SMTP id t13so10516500pgr.11 for ; Mon, 21 Jan 2019 21:51:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=rOTwnk6dtXq1KXQGBQ526dvyAfi3nAsjQPbpfKkz9uA=; b=apNyTeTIOu5lY+Mf7f6LashjOOCLN83vhKtDE5/65csBnytr0rEiyYbPKRr0h7JBUG DjI1dFfdl984zFGLjqNLvGV63gZVPlZyPbQ3Kjyk8Oj7FeSVk1JXS5ot0VJ/6MKiQsWz vcsBuMn5eO+yUlSHJx68vpudzXyq/5yUNARNg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=rOTwnk6dtXq1KXQGBQ526dvyAfi3nAsjQPbpfKkz9uA=; b=TnK4fKa1HBIEdNkcH9sYP8xnLJjba0S4hSMKk6cob8XGiTOIBVnCvVnKZMVMfTTJTl vlU9hAlncZHhODd0/7iRHEismMZdiz9h+s4X2AJNxBnhXxXR8ZaHfCsWTugFOS5zljsk DDOTkkVn7UKjn/sIiM3HlSB68SvRMQcdhMbN1KqGKP50vVp1PG8owvNMzlAnf1+zu83M VaLwRzzKxktJDRzdk6vU27eDA451YdeYVPmUOlK42egYRW+MTCwHmsiP+uUHXnjOb6F8 h2nSU4f42+M3U/+ylBz02TchbqBVZ+70YlQTD1brYwhtThvreIMJa2Vh6wHLDgDk67TJ xAow== X-Gm-Message-State: AJcUukfUe1MpWH8fP/WI/ms5fAHoAiGblYQNWTvvaqzyVrU6W00WpgtM l16RQz69Gd9bu96z1pqBykiGtw== X-Google-Smtp-Source: ALg8bN4os5nJ/hXm3XXYGY1Xewvk5noRcizPMqWcGzuO/uqrNOclqe6PFLB4a2N7Qb6/TBaIPgfbEQ== X-Received: by 2002:a62:520b:: with SMTP id g11mr32794050pfb.53.1548136307766; Mon, 21 Jan 2019 21:51:47 -0800 (PST) Received: from localhost.localdomain (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id z62sm23771572pfl.33.2019.01.21.21.51.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 21 Jan 2019 21:51:46 -0800 (PST) From: Bjorn Andersson To: Andy Gross , David Brown , Sibi Sankar Cc: Rob Herring , Mark Rutland , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 02/10] arm64: dts: qcom: sdm845: Define rmtfs memory Date: Mon, 21 Jan 2019 21:51:04 -0800 Message-Id: <20190122055112.30943-3-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20190122055112.30943-1-bjorn.andersson@linaro.org> References: <20190122055112.30943-1-bjorn.andersson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Define the rmtfs memory node, as described in version 10 of the memory map. Signed-off-by: Bjorn Andersson --- Changes since v2: - New patch arch/arm64/boot/dts/qcom/sdm845.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index cdcac3704c13..64f57cc5c61a 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -72,6 +72,15 @@ #size-cells = <2>; ranges; + rmtfs@85d00000 { + compatible = "qcom,rmtfs-mem"; + reg = <0 0x85d00000 0 0x200000>; + no-map; + + qcom,client-id = <1>; + qcom,vmid = <15>; + }; + memory@85fc0000 { reg = <0 0x85fc0000 0 0x20000>; no-map; From patchwork Tue Jan 22 05:51:05 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 10774867 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E852B913 for ; Tue, 22 Jan 2019 05:52:44 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D621E2A72E for ; Tue, 22 Jan 2019 05:52:44 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C7D122A74A; Tue, 22 Jan 2019 05:52:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 68B442A72E for ; Tue, 22 Jan 2019 05:52:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726986AbfAVFwn (ORCPT ); Tue, 22 Jan 2019 00:52:43 -0500 Received: from mail-pf1-f195.google.com ([209.85.210.195]:40682 "EHLO mail-pf1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726976AbfAVFvt (ORCPT ); Tue, 22 Jan 2019 00:51:49 -0500 Received: by mail-pf1-f195.google.com with SMTP id i12so11202532pfo.7 for ; Mon, 21 Jan 2019 21:51:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=kRXJdEO8I/SlhbNJiF5XYNK/PWPlwRsErJzpDvsBh7A=; b=RnnzFMqVPwZXf6lbGg26UrDC1U31+Y2IVKtIin52AUk8gWv2E7oFKRnGa6S4KYmAmZ HH3hKspDqqPSyuo9XGTF1xH5sj6JjTKtPJpullhS1uQ4GDN9XvzP5nTypcjfUJ7yaSfb mAi/SXjKUWL8knanbKy1bfLb6ipDb9YRFab9I= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=kRXJdEO8I/SlhbNJiF5XYNK/PWPlwRsErJzpDvsBh7A=; b=Co8mFBLQ03pZZsSwfdBg7r4S8VJNSl5IwEaMIrim7rAhSq1q62PeO4YmfhY47fsBp5 qTbKqTdX2USK2o+6OG4m6PY53ZMvl4NnVMoqC0tM8Xrz/ZoJoF0iFF9hlAbESNueyiNC +cRh8fn9qh71TjORsauc7yRfkG39iK9oVrbiekBBLkfm956u32mZjNOSDldC29KzweE5 cLgD2ekmO+zvjJ+87bkU1bnAI8JPnJVqX0Fl5Ujk/E9urBK/ghQcwpw9qvXwsyzW6lj7 6YCnm5JW1+74o7WPJ0OGzzo0zz7XfkMaAYLkg82IcvfBuZT9xcoljdwtAwK+b7gFUnEY zTSQ== X-Gm-Message-State: AJcUukdzTp/qfhWtfwcVzoOUPG0zp/jKhkFSRViBAWsoHFskx5ithdsy YYE+nRYv7en+Qcq8l/PPpg2UbA== X-Google-Smtp-Source: ALg8bN6jt3cD5HSf+9YDjigyHAzbQgpiTbsPW3wVOsisVRZSmq7Y31Wl2cGWMp3ZIvrrbDpAAYNF1g== X-Received: by 2002:a63:da14:: with SMTP id c20mr2291579pgh.233.1548136309012; Mon, 21 Jan 2019 21:51:49 -0800 (PST) Received: from localhost.localdomain (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id z62sm23771572pfl.33.2019.01.21.21.51.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 21 Jan 2019 21:51:48 -0800 (PST) From: Bjorn Andersson To: Andy Gross , David Brown , Sibi Sankar Cc: Rob Herring , Mark Rutland , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 03/10] arm64: dts: sdm845: Introduce ADSP and CDSP PAS nodes Date: Mon, 21 Jan 2019 21:51:05 -0800 Message-Id: <20190122055112.30943-4-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20190122055112.30943-1-bjorn.andersson@linaro.org> References: <20190122055112.30943-1-bjorn.andersson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add the ADSP and CDSP nodes for PAS-based remoteproc, supporting booting these cores on e.g. the MTP, and enable the same for the MTP. Signed-off-by: Bjorn Andersson --- Changes since v2: - New patch arch/arm64/boot/dts/qcom/sdm845-mtp.dts | 8 ++++ arch/arm64/boot/dts/qcom/sdm845.dtsi | 58 +++++++++++++++++++++++++ 2 files changed, 66 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts index af8c6a2445a2..02b8357c8ce8 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts @@ -48,6 +48,10 @@ }; }; +&adsp_pas { + status = "okay"; +}; + &apps_rsc { pm8998-rpmh-regulators { compatible = "qcom,pm8998-rpmh-regulators"; @@ -344,6 +348,10 @@ }; }; +&cdsp_pas { + status = "okay"; +}; + &gcc { protected-clocks = , , diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 64f57cc5c61a..1033b77856e6 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -319,6 +319,64 @@ }; }; + adsp_pas: remoteproc-adsp { + compatible = "qcom,sdm845-adsp-pas"; + + interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", + "handover", "stop-ack"; + + clocks = <&xo_board>; + clock-names = "xo"; + + memory-region = <&adsp_mem>; + + qcom,smem-states = <&adsp_smp2p_out 0>; + qcom,smem-state-names = "stop"; + + status = "disabled"; + + glink-edge { + interrupts = ; + label = "lpass"; + qcom,remote-pid = <2>; + mboxes = <&apss_shared 8>; + }; + }; + + cdsp_pas: remoteproc-cdsp { + compatible = "qcom,sdm845-cdsp-pas"; + + interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>, + <&cdsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&cdsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, + <&cdsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, + <&cdsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", + "handover", "stop-ack"; + + clocks = <&xo_board>; + clock-names = "xo"; + + memory-region = <&cdsp_mem>; + + qcom,smem-states = <&cdsp_smp2p_out 0>; + qcom,smem-state-names = "stop"; + + status = "disabled"; + + glink-edge { + interrupts = ; + label = "turing"; + qcom,remote-pid = <5>; + mboxes = <&apss_shared 4>; + }; + }; + tcsr_mutex: hwlock { compatible = "qcom,tcsr-mutex"; syscon = <&tcsr_mutex_regs 0 0x1000>; From patchwork Tue Jan 22 05:51:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 10774863 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 81200139A for ; Tue, 22 Jan 2019 05:52:37 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 719252A738 for ; Tue, 22 Jan 2019 05:52:37 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6554B2A72E; Tue, 22 Jan 2019 05:52:37 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D706F2A72E for ; Tue, 22 Jan 2019 05:52:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727213AbfAVFwb (ORCPT ); Tue, 22 Jan 2019 00:52:31 -0500 Received: from mail-pg1-f196.google.com ([209.85.215.196]:36916 "EHLO mail-pg1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727004AbfAVFvv (ORCPT ); Tue, 22 Jan 2019 00:51:51 -0500 Received: by mail-pg1-f196.google.com with SMTP id c25so10525415pgb.4 for ; Mon, 21 Jan 2019 21:51:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=zCHYvSO8eaeXp9atcghciWLMcYsRcNwmxrzlQR0jYTw=; b=dVLVVgeNw/7EFHHjRvM3C02+egpevGDjKwHICQV89JvZV1sQHtnwTrbSfOgjVlviEV i2vHEhXipB3/d46PmvoN+iqH6P1hfmSMBAUfZRxaPSYj8mPe3orGnBf64w22UIg9QqwD ns+Uun3aBXaXGSyaUpPLGMpvIk5lLMZoB/eCc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=zCHYvSO8eaeXp9atcghciWLMcYsRcNwmxrzlQR0jYTw=; b=BbrcwraOwyHMZ+JNTKeMU6Haqw4gqcK9dlSUGdpPudWdZDIgslmhaoajq1ipxjwF3B EAN8BazyEmMLJtpDkzmCXlIEPjPM9L5jO222z4PdjSEobOf+za/KTb02qOTGBwnxIScH +Ls2bFnWiffr1pgBMuSc2S0GXI1qwOeahe5jJIZ8L+4kSD9jdQXehUNpZk/Po0BA/xTb c4X71VxY6FsKhgUZke/w5C8IF7Ry/JaaWtM1nOhGyHfoUxPeE9KjyoLsUUdYVjD/DGHp yXt9vNl/tGImnvgUQYtXsUbjHISwNfXXoaNW8CY5qywbV38XLZAX/bwN43L8zKvmsawa Qn+Q== X-Gm-Message-State: AJcUukdXkKPY2RWN3bfGsKFD8M35ASV399IxokyclNDd+HAlLhEjwTso s+We5fYMARbYoncHEksVPIvzTQ== X-Google-Smtp-Source: ALg8bN7iIVeH/nVS9mD8lwUo4XNkKg+rgaAWQmd/sF1b/dDqp5WMb7+7Ojnxz1iUWlvI6AURff8nDQ== X-Received: by 2002:a62:ca9c:: with SMTP id y28mr32200587pfk.236.1548136310190; Mon, 21 Jan 2019 21:51:50 -0800 (PST) Received: from localhost.localdomain (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id z62sm23771572pfl.33.2019.01.21.21.51.49 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 21 Jan 2019 21:51:49 -0800 (PST) From: Bjorn Andersson To: Andy Gross , David Brown , Sibi Sankar Cc: Rob Herring , Mark Rutland , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 04/10] dt-bindings: soc: qcom: Add AOSS QMP binding Date: Mon, 21 Jan 2019 21:51:06 -0800 Message-Id: <20190122055112.30943-5-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20190122055112.30943-1-bjorn.andersson@linaro.org> References: <20190122055112.30943-1-bjorn.andersson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add binding for the QMP based side-channel communication mechanism to the AOSS, which is used to control resources not exposed through the RPMh interface. Reviewed-by: Rob Herring Reviewed-by: Stephen Boyd Signed-off-by: Bjorn Andersson --- Changes since v2: - Update indentation of example - Add colling device subnodes to the description .../bindings/soc/qcom/qcom,aoss-qmp.txt | 75 +++++++++++++++++++ include/dt-bindings/power/qcom-aoss-qmp.h | 15 ++++ 2 files changed, 90 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt create mode 100644 include/dt-bindings/power/qcom-aoss-qmp.h diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt new file mode 100644 index 000000000000..881dc8c7907a --- /dev/null +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt @@ -0,0 +1,75 @@ +Qualcomm Always-On Subsystem side channel binding + +This binding describes the hardware component responsible for side channel +requests to the always-on subsystem (AOSS), used for certain power management +requests that is not handled by the standard RPMh interface. Each client in the +SoC has it's own block of message RAM and IRQ for communication with the AOSS. +The protocol used to communicate in the message RAM is known as QMP. + +The AOSS side channel exposes control over a set of resources, used to control +a set of debug related clocks and to affect the low power state of resources +related to the secondary subsystems. These resources are exposed as a set of +power-domains. + +- compatible: + Usage: required + Value type: + Definition: must be "qcom,sdm845-aoss-qmp" + +- reg: + Usage: required + Value type: + Definition: the base address and size of the message RAM for this + client's communication with the AOSS + +- interrupts: + Usage: required + Value type: + Definition: should specify the AOSS message IRQ for this client + +- mboxes: + Usage: required + Value type: + Definition: reference to the mailbox representing the outgoing doorbell + in APCS for this client, as described in mailbox/mailbox.txt + +- #power-domain-cells: + Usage: optional + Value type: + Definition: must be 1 + The provided power-domains are: + QDSS clock-domain (0), CDSP state (1), LPASS state (2), + modem state (3), SLPI state (4), SPSS state (5) and Venus + state (6). + += SUBNODES +The AOSS side channel also provides the controls for three cooling devices, +these are expressed as subnodes of the QMP node. The name of the node is used +to identify the resource and must therefor be "cx", "mx" or "ebi". + +- #cooling-cells: + Usage: optional + Value type: + Definition: must be 2 + += EXAMPLE + +The following example represents the AOSS side-channel message RAM and the +mechanism exposing the power-domains, as found in SDM845. + + aoss_qmp: qmp@c300000 { + compatible = "qcom,sdm845-aoss-qmp"; + reg = <0x0c300000 0x100000>; + interrupts = ; + mboxes = <&apss_shared 0>; + + #power-domain-cells = <1>; + + cx_cdev: cx { + #cooling-cells = <2>; + }; + + mx_cdev: mx { + #cooling-cells = <2>; + }; + }; diff --git a/include/dt-bindings/power/qcom-aoss-qmp.h b/include/dt-bindings/power/qcom-aoss-qmp.h new file mode 100644 index 000000000000..7d8ac1a4f90c --- /dev/null +++ b/include/dt-bindings/power/qcom-aoss-qmp.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright (c) 2018, Linaro Ltd. */ + +#ifndef __DT_BINDINGS_POWER_QCOM_AOSS_QMP_H +#define __DT_BINDINGS_POWER_QCOM_AOSS_QMP_H + +#define AOSS_QMP_QDSS_CLK 0 +#define AOSS_QMP_LS_CDSP 1 +#define AOSS_QMP_LS_LPASS 2 +#define AOSS_QMP_LS_MODEM 3 +#define AOSS_QMP_LS_SLPI 4 +#define AOSS_QMP_LS_SPSS 5 +#define AOSS_QMP_LS_VENUS 6 + +#endif From patchwork Tue Jan 22 05:51:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 10774851 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 28852139A for ; Tue, 22 Jan 2019 05:51:55 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 173402A72E for ; Tue, 22 Jan 2019 05:51:55 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0B1692A74A; Tue, 22 Jan 2019 05:51:55 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2DEDC2A72E for ; Tue, 22 Jan 2019 05:51:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727062AbfAVFvw (ORCPT ); Tue, 22 Jan 2019 00:51:52 -0500 Received: from mail-pg1-f195.google.com ([209.85.215.195]:41991 "EHLO mail-pg1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727040AbfAVFvw (ORCPT ); Tue, 22 Jan 2019 00:51:52 -0500 Received: by mail-pg1-f195.google.com with SMTP id d72so10515901pga.9 for ; Mon, 21 Jan 2019 21:51:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=K7M5A7Zww3QV9Qjs6y4qsHq/a0633T3F3TXlBpxEeBg=; b=WFDz363dklVpb5rdSjJP/A6x2n2A83/Cl1kDfV88qpnHLIXO9kJaLlEnwb+oUxlcIG qY0Myyjy5G3phsFuuhY/euvniXJsvdkwLmE9b3O9MW5z1XmaKRU6dZIZBBN6GF2OLsx+ DuAQMvF02l3brEv6zPU+LUA9cIXetn/Y4Rkrc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=K7M5A7Zww3QV9Qjs6y4qsHq/a0633T3F3TXlBpxEeBg=; b=fKEmnNav9TJ0939hTuW8/SR6FgBrFzJc6STArACSNTqlGKNs6RmlyxvPQT/iONSE71 xitE8CBlHvwvvPbxzpXnuePsM4KL/xJhWmDx+ahd0cEahA2A9HU/0usRidc13eY+jiVz fdk8p957yvsAOQehLGftGCCR1heVwJi8DskDcif4vexB9pQsk9HtdwZJWHf6dIjCSblY GWQW1G/XiQys6uqqs5kVcezhLNnPMClQ/hqcvvvVSzL/qGddgnJLZhZtAYHnrZFa18dQ hWvNbI4nKEpBwIQ2sJKcd+TKW6AnOYl7Jy/WNQd8L9bWO+lZEPEdWloccA7rvsmfKxR1 fu9A== X-Gm-Message-State: AJcUuke2THOrRsTJITSlMRH3DGN+JJXo6QIiLbnpaJkoihtpk2e0mqkX QWwhQnh29d6yAgiSeqIBcHfsuA== X-Google-Smtp-Source: ALg8bN4cSQXqbJQ9Vffc8UrvHtwM5FWn1bVt4/By3xaUHy7vr7QnXsMt6/c0YH5Qm8JIrwy3j7lprg== X-Received: by 2002:a63:4e41:: with SMTP id o1mr31383635pgl.282.1548136311386; Mon, 21 Jan 2019 21:51:51 -0800 (PST) Received: from localhost.localdomain (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id z62sm23771572pfl.33.2019.01.21.21.51.50 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 21 Jan 2019 21:51:50 -0800 (PST) From: Bjorn Andersson To: Andy Gross , David Brown , Sibi Sankar Cc: Rob Herring , Mark Rutland , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 05/10] soc: qcom: Add AOSS QMP communication driver Date: Mon, 21 Jan 2019 21:51:07 -0800 Message-Id: <20190122055112.30943-6-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20190122055112.30943-1-bjorn.andersson@linaro.org> References: <20190122055112.30943-1-bjorn.andersson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The AOSS QMP driver is used to communicate with the AOSS for certain side-channel requests, that are not enabled through the RPMh interface. The communication is a very simple synchronous mechanism of messages being written in message RAM and a doorbell in the AOSS is rung. As the AOSS has processed the message length is cleared and an interrupt is fired by the AOSS as acknowledgment. Reviewed-by: Arun Kumar Neelakantam Signed-off-by: Bjorn Andersson --- Changes since v2: - Free mbox channel on failure and remove drivers/soc/qcom/Kconfig | 9 + drivers/soc/qcom/Makefile | 1 + drivers/soc/qcom/aoss-qmp.c | 317 ++++++++++++++++++++++++++++++ include/linux/soc/qcom/aoss-qmp.h | 14 ++ 4 files changed, 341 insertions(+) create mode 100644 drivers/soc/qcom/aoss-qmp.c create mode 100644 include/linux/soc/qcom/aoss-qmp.h diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig index 6241d3e3b115..e2c859121b88 100644 --- a/drivers/soc/qcom/Kconfig +++ b/drivers/soc/qcom/Kconfig @@ -3,6 +3,15 @@ # menu "Qualcomm SoC drivers" +config QCOM_AOSS_QMP + tristate "Qualcomm AOSS Messaging Driver" + depends on ARCH_QCOM || COMPILE_TEST + depends on MAILBOX + help + This driver provides the means for communicating with the + micro-controller in the AOSS, using QMP, to control certain resource + that are not exposed through RPMh. + config QCOM_COMMAND_DB bool "Qualcomm Command DB" depends on ARCH_QCOM || COMPILE_TEST diff --git a/drivers/soc/qcom/Makefile b/drivers/soc/qcom/Makefile index ffe519b0cb66..2c04d27fbf9e 100644 --- a/drivers/soc/qcom/Makefile +++ b/drivers/soc/qcom/Makefile @@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 CFLAGS_rpmh-rsc.o := -I$(src) +obj-$(CONFIG_QCOM_AOSS_QMP) += aoss-qmp.o obj-$(CONFIG_QCOM_GENI_SE) += qcom-geni-se.o obj-$(CONFIG_QCOM_COMMAND_DB) += cmd-db.o obj-$(CONFIG_QCOM_GLINK_SSR) += glink_ssr.o diff --git a/drivers/soc/qcom/aoss-qmp.c b/drivers/soc/qcom/aoss-qmp.c new file mode 100644 index 000000000000..86ee622cdadf --- /dev/null +++ b/drivers/soc/qcom/aoss-qmp.c @@ -0,0 +1,317 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2018, Linaro Ltd + */ +#include +#include +#include +#include +#include +#include + +#define QMP_DESC_MAGIC 0x0 +#define QMP_DESC_VERSION 0x4 +#define QMP_DESC_FEATURES 0x8 + +#define QMP_DESC_UCORE_LINK_STATE 0xc +#define QMP_DESC_UCORE_LINK_STATE_ACK 0x10 +#define QMP_DESC_UCORE_CH_STATE 0x14 +#define QMP_DESC_UCORE_CH_STATE_ACK 0x18 +#define QMP_DESC_UCORE_MBOX_SIZE 0x1c +#define QMP_DESC_UCORE_MBOX_OFFSET 0x20 + +#define QMP_DESC_MCORE_LINK_STATE 0x24 +#define QMP_DESC_MCORE_LINK_STATE_ACK 0x28 +#define QMP_DESC_MCORE_CH_STATE 0x2c +#define QMP_DESC_MCORE_CH_STATE_ACK 0x30 +#define QMP_DESC_MCORE_MBOX_SIZE 0x34 +#define QMP_DESC_MCORE_MBOX_OFFSET 0x38 + +#define QMP_STATE_UP 0x0000ffff +#define QMP_STATE_DOWN 0xffff0000 + +#define QMP_MAGIC 0x4d41494c +#define QMP_VERSION 1 + +/** + * struct qmp - driver state for QMP implementation + * @msgram: iomem referencing the message RAM used for communication + * @dev: reference to QMP device + * @mbox_client: mailbox client used to ring the doorbell on transmit + * @mbox_chan: mailbox channel used to ring the doorbell on transmit + * @offset: offset within @msgram where messages should be written + * @size: maximum size of the messages to be transmitted + * @event: wait_queue for synchronization with the IRQ + * @tx_lock: provides syncrhonization between multiple callers of qmp_send() + * @pd_pdev: platform device for the power-domain child device + */ +struct qmp { + void __iomem *msgram; + struct device *dev; + + struct mbox_client mbox_client; + struct mbox_chan *mbox_chan; + + size_t offset; + size_t size; + + wait_queue_head_t event; + + struct mutex tx_lock; + + struct platform_device *pd_pdev; +}; + +static void qmp_kick(struct qmp *qmp) +{ + mbox_send_message(qmp->mbox_chan, NULL); + mbox_client_txdone(qmp->mbox_chan, 0); +} + +static bool qmp_magic_valid(struct qmp *qmp) +{ + return readl(qmp->msgram + QMP_DESC_MAGIC) == QMP_MAGIC; +} + +static bool qmp_link_acked(struct qmp *qmp) +{ + return readl(qmp->msgram + QMP_DESC_MCORE_LINK_STATE_ACK) == QMP_STATE_UP; +} + +static bool qmp_mcore_channel_acked(struct qmp *qmp) +{ + return readl(qmp->msgram + QMP_DESC_MCORE_CH_STATE_ACK) == QMP_STATE_UP; +} + +static bool qmp_ucore_channel_up(struct qmp *qmp) +{ + return readl(qmp->msgram + QMP_DESC_UCORE_CH_STATE) == QMP_STATE_UP; +} + +static int qmp_open(struct qmp *qmp) +{ + int ret; + u32 val; + + ret = wait_event_timeout(qmp->event, qmp_magic_valid(qmp), HZ); + if (!ret) { + dev_err(qmp->dev, "QMP magic doesn't match\n"); + return -ETIMEDOUT; + } + + val = readl(qmp->msgram + QMP_DESC_VERSION); + if (val != QMP_VERSION) { + dev_err(qmp->dev, "unsupported QMP version %d\n", val); + return -EINVAL; + } + + qmp->offset = readl(qmp->msgram + QMP_DESC_MCORE_MBOX_OFFSET); + qmp->size = readl(qmp->msgram + QMP_DESC_MCORE_MBOX_SIZE); + if (!qmp->size) { + dev_err(qmp->dev, "invalid mailbox size 0x%zx\n", qmp->size); + return -EINVAL; + } + + /* Ack remote core's link state */ + val = readl(qmp->msgram + QMP_DESC_UCORE_LINK_STATE); + writel(val, qmp->msgram + QMP_DESC_UCORE_LINK_STATE_ACK); + + /* Set local core's link state to up */ + writel(QMP_STATE_UP, qmp->msgram + QMP_DESC_MCORE_LINK_STATE); + + qmp_kick(qmp); + + ret = wait_event_timeout(qmp->event, qmp_link_acked(qmp), HZ); + if (!ret) { + dev_err(qmp->dev, "ucore didn't ack link\n"); + goto timeout_close_link; + } + + writel(QMP_STATE_UP, qmp->msgram + QMP_DESC_MCORE_CH_STATE); + + ret = wait_event_timeout(qmp->event, qmp_ucore_channel_up(qmp), HZ); + if (!ret) { + dev_err(qmp->dev, "ucore didn't open channel\n"); + goto timeout_close_channel; + } + + /* Ack remote core's channel state */ + val = readl(qmp->msgram + QMP_DESC_UCORE_CH_STATE); + writel(val, qmp->msgram + QMP_DESC_UCORE_CH_STATE_ACK); + + qmp_kick(qmp); + + ret = wait_event_timeout(qmp->event, qmp_mcore_channel_acked(qmp), HZ); + if (!ret) { + dev_err(qmp->dev, "ucore didn't ack channel\n"); + goto timeout_close_channel; + } + + return 0; + +timeout_close_channel: + writel(QMP_STATE_DOWN, qmp->msgram + QMP_DESC_MCORE_CH_STATE); + +timeout_close_link: + writel(QMP_STATE_DOWN, qmp->msgram + QMP_DESC_MCORE_LINK_STATE); + qmp_kick(qmp); + + return -ETIMEDOUT; +} + +static void qmp_close(struct qmp *qmp) +{ + writel(QMP_STATE_DOWN, qmp->msgram + QMP_DESC_MCORE_CH_STATE); + writel(QMP_STATE_DOWN, qmp->msgram + QMP_DESC_MCORE_LINK_STATE); + qmp_kick(qmp); +} + +static irqreturn_t qmp_intr(int irq, void *data) +{ + struct qmp *qmp = data; + + wake_up_interruptible_all(&qmp->event); + + return IRQ_HANDLED; +} + +static bool qmp_message_empty(struct qmp *qmp) +{ + return readl(qmp->msgram + qmp->offset) == 0; +} + +/** + * qmp_send() - send a message to the AOSS + * @qmp: qmp context + * @data: message to be sent + * @len: length of the message + * + * Transmit @data to AOSS and wait for the AOSS to acknowledge the message. + * @len must be a multiple of 4 and not longer than the mailbox size. Access is + * synchronized by this implementation. + * + * Return: 0 on success, negative errno on failure + */ +int qmp_send(struct qmp *qmp, const void *data, size_t len) +{ + int ret; + + if (WARN_ON(len + sizeof(u32) > qmp->size)) + return -EINVAL; + + if (WARN_ON(len % sizeof(u32))) + return -EINVAL; + + mutex_lock(&qmp->tx_lock); + + /* The message RAM only implements 32-bit accesses */ + __iowrite32_copy(qmp->msgram + qmp->offset + sizeof(u32), + data, len / sizeof(u32)); + writel(len, qmp->msgram + qmp->offset); + qmp_kick(qmp); + + ret = wait_event_interruptible_timeout(qmp->event, + qmp_message_empty(qmp), HZ); + if (!ret) { + dev_err(qmp->dev, "ucore did not ack channel\n"); + ret = -ETIMEDOUT; + + /* Clear message from buffer */ + writel(0, qmp->msgram + qmp->offset); + } else { + ret = 0; + } + + mutex_unlock(&qmp->tx_lock); + + return ret; +} +EXPORT_SYMBOL(qmp_send); + +static int qmp_probe(struct platform_device *pdev) +{ + struct resource *res; + struct qmp *qmp; + int irq; + int ret; + + qmp = devm_kzalloc(&pdev->dev, sizeof(*qmp), GFP_KERNEL); + if (!qmp) + return -ENOMEM; + + qmp->dev = &pdev->dev; + init_waitqueue_head(&qmp->event); + mutex_init(&qmp->tx_lock); + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + qmp->msgram = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(qmp->msgram)) + return PTR_ERR(qmp->msgram); + + qmp->mbox_client.dev = &pdev->dev; + qmp->mbox_client.knows_txdone = true; + qmp->mbox_chan = mbox_request_channel(&qmp->mbox_client, 0); + if (IS_ERR(qmp->mbox_chan)) { + dev_err(&pdev->dev, "failed to acquire ipc mailbox\n"); + return PTR_ERR(qmp->mbox_chan); + } + + irq = platform_get_irq(pdev, 0); + ret = devm_request_irq(&pdev->dev, irq, qmp_intr, IRQF_ONESHOT, + "aoss-qmp", qmp); + if (ret < 0) { + dev_err(&pdev->dev, "failed to request interrupt\n"); + mbox_free_channel(qmp->mbox_chan); + return ret; + } + + ret = qmp_open(qmp); + if (ret < 0) { + mbox_free_channel(qmp->mbox_chan); + return ret; + } + + platform_set_drvdata(pdev, qmp); + + if (of_property_read_bool(pdev->dev.of_node, "#power-domain-cells")) { + qmp->pd_pdev = platform_device_register_data(&pdev->dev, + "aoss_qmp_pd", + PLATFORM_DEVID_NONE, + NULL, 0); + if (IS_ERR(qmp->pd_pdev)) + dev_err(&pdev->dev, "failed to register AOSS PD\n"); + } + + return 0; +} + +static int qmp_remove(struct platform_device *pdev) +{ + struct qmp *qmp = platform_get_drvdata(pdev); + + platform_device_unregister(qmp->pd_pdev); + + mbox_free_channel(qmp->mbox_chan); + qmp_close(qmp); + + return 0; +} + +static const struct of_device_id qmp_dt_match[] = { + { .compatible = "qcom,sdm845-aoss-qmp", }, + {} +}; +MODULE_DEVICE_TABLE(of, qmp_dt_match); + +static struct platform_driver qmp_driver = { + .driver = { + .name = "aoss_qmp", + .of_match_table = qmp_dt_match, + }, + .probe = qmp_probe, + .remove = qmp_remove, +}; +module_platform_driver(qmp_driver); + +MODULE_DESCRIPTION("Qualcomm AOSS QMP driver"); +MODULE_LICENSE("GPL v2"); diff --git a/include/linux/soc/qcom/aoss-qmp.h b/include/linux/soc/qcom/aoss-qmp.h new file mode 100644 index 000000000000..a2ac891d7fd4 --- /dev/null +++ b/include/linux/soc/qcom/aoss-qmp.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2018, Linaro Ltd + */ +#ifndef __AOP_QMP_H__ +#define __AOP_QMP_H__ + +#include + +struct qmp; + +int qmp_send(struct qmp *qmp, const void *data, size_t len); + +#endif From patchwork Tue Jan 22 05:51:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 10774861 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7A866913 for ; Tue, 22 Jan 2019 05:52:31 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6A7C52A72E for ; Tue, 22 Jan 2019 05:52:31 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5ECB32A74A; Tue, 22 Jan 2019 05:52:31 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C4D192A72E for ; Tue, 22 Jan 2019 05:52:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727078AbfAVFwS (ORCPT ); Tue, 22 Jan 2019 00:52:18 -0500 Received: from mail-pg1-f194.google.com ([209.85.215.194]:36918 "EHLO mail-pg1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727064AbfAVFvx (ORCPT ); Tue, 22 Jan 2019 00:51:53 -0500 Received: by mail-pg1-f194.google.com with SMTP id c25so10525457pgb.4 for ; Mon, 21 Jan 2019 21:51:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=pW9+FnFhTixsM1NvLiRxk7mkM5jyq1Bhl39XrdO6+DY=; b=GI5rtE9hhYO4frHD9B68ZN3IRPw+OTuvhdfIbThO5ytG7OGbGq3c2hrdU3Zg0sDGPS ++AKNgLNrpK3l7ZZno7q97JGpSm3fCZFA6AkSKxXHvq4eS7Xgc6XZsWSgEoYSWcTDNG6 rqpiLT7e52tzcYqNPJxmIbi/QvHKwcIpYm8lw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=pW9+FnFhTixsM1NvLiRxk7mkM5jyq1Bhl39XrdO6+DY=; b=FxlfYflq+E1r8eiWOOC7l8sZWPNP8tF7mJ9pJsqdu7NVkAuMRf3bHPU2zRK9M775gr C0oAwfCAfXpiFumlcUeXkHIgTeeHcn5eeGDRjpiZMBh4VkuqaL9D3weM4e9ug+ZN72fc SP4xoMn28yIqTzDt+v1TSLro+kHXjoiwi8DA3MJCIQRuSuc6Y/IbvHe7CbPng9LGeyjI YIVwlgKcGZ/w55DddhtvqmOrYTTStwVCsb7imn1IDB/z7RpmEn8buGtuwtuUU+pvqlQz xC+GifwrWnms/Cgq++Ln88pjqNqymd0CvG3xZ960EBlnAmcTaaMxo8eobNmFpwpinN04 wOjw== X-Gm-Message-State: AJcUukcAjOfyIvJexK99YWjl1V091kLd488feN/9BbS/Xq541TZKVOvM mCPhgcn1iIBO0vkfS7k5TcYdrycXRm8= X-Google-Smtp-Source: ALg8bN5GTsOqm5afo95VqQSNA15p722lrD1Y//00N+DI1O6ubLKpuVI1lre/qlH/ix0K74hcLbM04A== X-Received: by 2002:a62:7086:: with SMTP id l128mr32186966pfc.68.1548136312529; Mon, 21 Jan 2019 21:51:52 -0800 (PST) Received: from localhost.localdomain (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id z62sm23771572pfl.33.2019.01.21.21.51.51 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 21 Jan 2019 21:51:51 -0800 (PST) From: Bjorn Andersson To: Andy Gross , David Brown , Sibi Sankar Cc: Rob Herring , Mark Rutland , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 06/10] soc: qcom: Add AOSS QMP genpd provider Date: Mon, 21 Jan 2019 21:51:08 -0800 Message-Id: <20190122055112.30943-7-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20190122055112.30943-1-bjorn.andersson@linaro.org> References: <20190122055112.30943-1-bjorn.andersson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The AOSS QMP genpd provider implements control over power-related resources related to low-power state associated with the remoteprocs in the system as well as control over a set of clocks related to debug hardware in the SoC. Tested-by: Sai Prakash Ranjan Signed-off-by: Bjorn Andersson --- Changes since v2: - Add define for request array size drivers/soc/qcom/Kconfig | 9 +++ drivers/soc/qcom/Makefile | 1 + drivers/soc/qcom/aoss-qmp-pd.c | 138 +++++++++++++++++++++++++++++++++ 3 files changed, 148 insertions(+) create mode 100644 drivers/soc/qcom/aoss-qmp-pd.c diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig index e2c859121b88..9d71e23005ad 100644 --- a/drivers/soc/qcom/Kconfig +++ b/drivers/soc/qcom/Kconfig @@ -12,6 +12,15 @@ config QCOM_AOSS_QMP micro-controller in the AOSS, using QMP, to control certain resource that are not exposed through RPMh. +config QCOM_AOSS_QMP_PD + tristate "Qualcomm AOSS Messaging Power Domain driver" + depends on QCOM_AOSS_QMP + select PM_GENERIC_DOMAINS + help + This driver provides the means of controlling the AOSS's handling of + low-power state for resources related to the remoteproc subsystems as + well as controlling the debug clocks. + config QCOM_COMMAND_DB bool "Qualcomm Command DB" depends on ARCH_QCOM || COMPILE_TEST diff --git a/drivers/soc/qcom/Makefile b/drivers/soc/qcom/Makefile index 2c04d27fbf9e..16913e73fddf 100644 --- a/drivers/soc/qcom/Makefile +++ b/drivers/soc/qcom/Makefile @@ -1,6 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 CFLAGS_rpmh-rsc.o := -I$(src) obj-$(CONFIG_QCOM_AOSS_QMP) += aoss-qmp.o +obj-$(CONFIG_QCOM_AOSS_QMP_PD) += aoss-qmp-pd.o obj-$(CONFIG_QCOM_GENI_SE) += qcom-geni-se.o obj-$(CONFIG_QCOM_COMMAND_DB) += cmd-db.o obj-$(CONFIG_QCOM_GLINK_SSR) += glink_ssr.o diff --git a/drivers/soc/qcom/aoss-qmp-pd.c b/drivers/soc/qcom/aoss-qmp-pd.c new file mode 100644 index 000000000000..82dd569a2bc9 --- /dev/null +++ b/drivers/soc/qcom/aoss-qmp-pd.c @@ -0,0 +1,138 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2018, Linaro Ltd + */ +#include +#include +#include +#include +#include + +/* Requests are expected to be 96 bytes long */ +#define AOSS_QMP_PD_MSG_LEN 96 + +struct qmp_pd { + struct qmp *qmp; + + struct generic_pm_domain pd; + + const char *name; +}; + +#define to_qmp_pd_resource(res) container_of(res, struct qmp_pd, pd) + +struct qmp_pd_resource { + const char *name; + int (*on)(struct generic_pm_domain *domain); + int (*off)(struct generic_pm_domain *domain); +}; + +static int qmp_pd_clock_toggle(struct qmp_pd *res, bool enable) +{ + char buf[AOSS_QMP_PD_MSG_LEN]; + + snprintf(buf, sizeof(buf), "{class: clock, res: %s, val: %d}", + res->name, !!enable); + return qmp_send(res->qmp, buf, sizeof(buf)); +} + +static int qmp_pd_clock_on(struct generic_pm_domain *domain) +{ + return qmp_pd_clock_toggle(to_qmp_pd_resource(domain), true); +} + +static int qmp_pd_clock_off(struct generic_pm_domain *domain) +{ + return qmp_pd_clock_toggle(to_qmp_pd_resource(domain), false); +} + +static int qmp_pd_image_toggle(struct qmp_pd *res, bool enable) +{ + char buf[AOSS_QMP_PD_MSG_LEN]; + + snprintf(buf, sizeof(buf), + "{class: image, res: load_state, name: %s, val: %s}", + res->name, enable ? "on" : "off"); + return qmp_send(res->qmp, buf, sizeof(buf)); +} + +static int qmp_pd_image_on(struct generic_pm_domain *domain) +{ + return qmp_pd_image_toggle(to_qmp_pd_resource(domain), true); +} + +static int qmp_pd_image_off(struct generic_pm_domain *domain) +{ + return qmp_pd_image_toggle(to_qmp_pd_resource(domain), false); +} + +static const struct qmp_pd_resource sdm845_resources[] = { + [AOSS_QMP_QDSS_CLK] = { "qdss", qmp_pd_clock_on, qmp_pd_clock_off }, + [AOSS_QMP_LS_CDSP] = { "cdsp", qmp_pd_image_on, qmp_pd_image_off }, + [AOSS_QMP_LS_LPASS] = { "adsp", qmp_pd_image_on, qmp_pd_image_off }, + [AOSS_QMP_LS_MODEM] = { "modem", qmp_pd_image_on, qmp_pd_image_off }, + [AOSS_QMP_LS_SLPI] = { "slpi", qmp_pd_image_on, qmp_pd_image_off }, + [AOSS_QMP_LS_SPSS] = { "spss", qmp_pd_image_on, qmp_pd_image_off }, + [AOSS_QMP_LS_VENUS] = { "venus", qmp_pd_image_on, qmp_pd_image_off }, +}; + +static int qmp_pd_probe(struct platform_device *pdev) +{ + struct genpd_onecell_data *data; + struct device *parent = pdev->dev.parent; + struct qmp_pd *res; + struct qmp *qmp; + size_t num = ARRAY_SIZE(sdm845_resources); + int i; + + qmp = dev_get_drvdata(pdev->dev.parent); + if (!qmp) + return -EINVAL; + + res = devm_kcalloc(&pdev->dev, num, sizeof(*res), GFP_KERNEL); + if (!res) + return -ENOMEM; + + data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + data->domains = devm_kcalloc(&pdev->dev, num, sizeof(*data->domains), + GFP_KERNEL); + + for (i = 0; i < num; i++) { + pm_genpd_init(&res[i].pd, NULL, true); + res[i].qmp = qmp; + res[i].name = sdm845_resources[i].name; + + res[i].pd.name = sdm845_resources[i].name; + res[i].pd.power_on = sdm845_resources[i].on; + res[i].pd.power_off = sdm845_resources[i].off; + + data->domains[data->num_domains++] = &res[i].pd; + } + + return of_genpd_add_provider_onecell(parent->of_node, data); +} + +static int qmp_pd_remove(struct platform_device *pdev) +{ + struct device *parent = pdev->dev.parent; + + of_genpd_del_provider(parent->of_node); + + return 0; +} + +static struct platform_driver qmp_pd_driver = { + .driver = { + .name = "aoss_qmp_pd", + }, + .probe = qmp_pd_probe, + .remove = qmp_pd_remove, +}; +module_platform_driver(qmp_pd_driver); + +MODULE_ALIAS("platform:aoss_qmp_pd"); +MODULE_DESCRIPTION("Qualcomm AOSS QMP load-state driver"); +MODULE_LICENSE("GPL v2"); From patchwork Tue Jan 22 05:51:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 10774857 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 90D24139A for ; Tue, 22 Jan 2019 05:52:17 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7FB702A72E for ; Tue, 22 Jan 2019 05:52:17 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 73B032A74A; Tue, 22 Jan 2019 05:52:17 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C536C2A72E for ; Tue, 22 Jan 2019 05:52:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727089AbfAVFv4 (ORCPT ); Tue, 22 Jan 2019 00:51:56 -0500 Received: from mail-pf1-f194.google.com ([209.85.210.194]:39863 "EHLO mail-pf1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727067AbfAVFvz (ORCPT ); Tue, 22 Jan 2019 00:51:55 -0500 Received: by mail-pf1-f194.google.com with SMTP id r136so11213609pfc.6 for ; Mon, 21 Jan 2019 21:51:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=0K5Q8jXmAwTtQLgYnsHYIO7/6CejOJ/BLEqWsyhLhvo=; b=ZuI7szlR3gXWxkaNjwfMO5RkEtTVXcm13nYgEwMiBYUc9DdMBTvv1sJxbNQPclMU/y u3YNAg9aldmyfHqvBOBr74wRomLDKuLoBtNaHOWtt8/E4AHHfSXyWhq+ohRbc5tumGeF 6cUos7EfL0lkZaUQT8Z/Sc+IcpwK/kILQqMN8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=0K5Q8jXmAwTtQLgYnsHYIO7/6CejOJ/BLEqWsyhLhvo=; b=SIWX9Agb/Fc4CLk3IwPDtBnHOrXbA8WVTSzhg5kxYBofVjxbob0RBr+kvSzKgzrhhj TcSJS8CyfVOuL+vFKQpvCPMzsgLhlGlTxTJP73Ug64NlgzKLOdgmDIIfxzm3ydU8xp7t o3VrkwFcBqp8m+QJBdHotNK7v51xNMIxB/txUAJNuozNDBy/avdG0aZ6C7Qq/EvfCYcN TAZc1jj/4xx2NsBLDoRK9ngeJBWwrdtmt9RB1q6jlCwZM68muZ3DLutEHtcv2w00/Tov x8q5dEQs4Tq9i4dBOQLsXShKbRYSXbYw9HfULjWchqTFW7A7JJaVw1S0+VFp1Ly471Mp /35A== X-Gm-Message-State: AJcUukc4FPkRn3vyGEu4ZZRA3i8dTUHNpPEg+8WoGQcL1rpSAjEwanDe 7HnDxEiDah7q2eFSNB/JXc37AQ== X-Google-Smtp-Source: ALg8bN7uXQ634kxUImJv9TYGQcZsEEfDIerZ+og7Bq2od6lSWsduEOkXSHNEWae84Ukt9EbkbkADJw== X-Received: by 2002:a63:ff62:: with SMTP id s34mr30918917pgk.325.1548136313865; Mon, 21 Jan 2019 21:51:53 -0800 (PST) Received: from localhost.localdomain (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id z62sm23771572pfl.33.2019.01.21.21.51.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 21 Jan 2019 21:51:52 -0800 (PST) From: Bjorn Andersson To: Andy Gross , David Brown , Sibi Sankar Cc: Rob Herring , Mark Rutland , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 07/10] remoteproc: q6v5-mss: Vote for rpmh power domains Date: Mon, 21 Jan 2019 21:51:09 -0800 Message-Id: <20190122055112.30943-8-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20190122055112.30943-1-bjorn.andersson@linaro.org> References: <20190122055112.30943-1-bjorn.andersson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Rajendra Nayak With rpmh ARC resources being modelled as power domains with performance state, we need to proxy vote on these for SDM845. Add support to vote on multiple of them, now that genpd supports associating mutliple power domains to a device. Tested-by: Sibi Sankar Reviewed-by: Sibi Sankar Signed-off-by: Rajendra Nayak [bjorn: Drop device link, improve error handling, name things "proxy"] Signed-off-by: Bjorn Andersson --- Changes since v2: - Disable proxy pds if handover did not arrived before stop drivers/remoteproc/qcom_q6v5_mss.c | 117 ++++++++++++++++++++++++++++- 1 file changed, 113 insertions(+), 4 deletions(-) diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c index 01be7314e176..003186ce56c7 100644 --- a/drivers/remoteproc/qcom_q6v5_mss.c +++ b/drivers/remoteproc/qcom_q6v5_mss.c @@ -25,6 +25,8 @@ #include #include #include +#include +#include #include #include #include @@ -131,6 +133,7 @@ struct rproc_hexagon_res { char **proxy_clk_names; char **reset_clk_names; char **active_clk_names; + char **proxy_pd_names; int version; bool need_mem_protection; bool has_alt_reset; @@ -156,9 +159,11 @@ struct q6v5 { struct clk *active_clks[8]; struct clk *reset_clks[4]; struct clk *proxy_clks[4]; + struct device *proxy_pds[3]; int active_clk_count; int reset_clk_count; int proxy_clk_count; + int proxy_pd_count; struct reg_info active_regs[1]; struct reg_info proxy_regs[3]; @@ -321,6 +326,41 @@ static void q6v5_clk_disable(struct device *dev, clk_disable_unprepare(clks[i]); } +static int q6v5_pds_enable(struct q6v5 *qproc, struct device **pds, + size_t pd_count) +{ + int ret; + int i; + + for (i = 0; i < pd_count; i++) { + dev_pm_genpd_set_performance_state(pds[i], INT_MAX); + ret = pm_runtime_get_sync(pds[i]); + if (ret < 0) + goto unroll_pd_votes; + } + + return 0; + +unroll_pd_votes: + for (i--; i >= 0; i--) { + dev_pm_genpd_set_performance_state(pds[i], 0); + pm_runtime_put(pds[i]); + } + + return ret; +}; + +static void q6v5_pds_disable(struct q6v5 *qproc, struct device **pds, + size_t pd_count) +{ + int i; + + for (i = 0; i < pd_count; i++) { + dev_pm_genpd_set_performance_state(pds[i], 0); + pm_runtime_put(pds[i]); + } +} + static int q6v5_xfer_mem_ownership(struct q6v5 *qproc, int *current_perm, bool remote_owner, phys_addr_t addr, size_t size) @@ -690,11 +730,17 @@ static int q6v5_mba_load(struct q6v5 *qproc) qcom_q6v5_prepare(&qproc->q6v5); + ret = q6v5_pds_enable(qproc, qproc->proxy_pds, qproc->proxy_pd_count); + if (ret < 0) { + dev_err(qproc->dev, "failed to enable proxy power domains\n"); + goto disable_irqs; + } + ret = q6v5_regulator_enable(qproc, qproc->proxy_regs, qproc->proxy_reg_count); if (ret) { dev_err(qproc->dev, "failed to enable proxy supplies\n"); - goto disable_irqs; + goto disable_proxy_pds; } ret = q6v5_clk_enable(qproc->dev, qproc->proxy_clks, @@ -791,6 +837,8 @@ static int q6v5_mba_load(struct q6v5 *qproc) disable_proxy_reg: q6v5_regulator_disable(qproc, qproc->proxy_regs, qproc->proxy_reg_count); +disable_proxy_pds: + q6v5_pds_disable(qproc, qproc->proxy_pds, qproc->proxy_pd_count); disable_irqs: qcom_q6v5_unprepare(&qproc->q6v5); @@ -841,6 +889,8 @@ static void q6v5_mba_reclaim(struct q6v5 *qproc) ret = qcom_q6v5_unprepare(&qproc->q6v5); if (ret) { + q6v5_pds_disable(qproc, qproc->proxy_pds, + qproc->proxy_pd_count); q6v5_clk_disable(qproc->dev, qproc->proxy_clks, qproc->proxy_clk_count); q6v5_regulator_disable(qproc, qproc->proxy_regs, @@ -1121,6 +1171,7 @@ static void qcom_msa_handover(struct qcom_q6v5 *q6v5) qproc->proxy_clk_count); q6v5_regulator_disable(qproc, qproc->proxy_regs, qproc->proxy_reg_count); + q6v5_pds_disable(qproc, qproc->proxy_pds, qproc->proxy_pd_count); } static int q6v5_init_mem(struct q6v5 *qproc, struct platform_device *pdev) @@ -1181,6 +1232,45 @@ static int q6v5_init_clocks(struct device *dev, struct clk **clks, return i; } +static int q6v5_pds_attach(struct device *dev, struct device **devs, + char **pd_names) +{ + size_t num_pds = 0; + int ret; + int i; + + if (!pd_names) + return 0; + + while (pd_names[num_pds]) + num_pds++; + + for (i = 0; i < num_pds; i++) { + devs[i] = dev_pm_domain_attach_by_name(dev, pd_names[i]); + if (IS_ERR(devs[i])) { + ret = PTR_ERR(devs[i]); + goto unroll_attach; + } + } + + return num_pds; + +unroll_attach: + for (i--; i >= 0; i--) + dev_pm_domain_detach(devs[i], false); + + return ret; +}; + +static void q6v5_pds_detach(struct q6v5 *qproc, struct device **pds, + size_t pd_count) +{ + int i; + + for (i = 0; i < pd_count; i++) + dev_pm_domain_detach(pds[i], false); +} + static int q6v5_init_reset(struct q6v5 *qproc) { qproc->mss_restart = devm_reset_control_get_exclusive(qproc->dev, @@ -1322,10 +1412,18 @@ static int q6v5_probe(struct platform_device *pdev) } qproc->active_reg_count = ret; + ret = q6v5_pds_attach(&pdev->dev, qproc->proxy_pds, + desc->proxy_pd_names); + if (ret < 0) { + dev_err(&pdev->dev, "Failed to init power domains\n"); + goto free_rproc; + } + qproc->proxy_pd_count = ret; + qproc->has_alt_reset = desc->has_alt_reset; ret = q6v5_init_reset(qproc); if (ret) - goto free_rproc; + goto detach_proxy_pds; qproc->version = desc->version; qproc->need_mem_protection = desc->need_mem_protection; @@ -1333,7 +1431,7 @@ static int q6v5_probe(struct platform_device *pdev) ret = qcom_q6v5_init(&qproc->q6v5, pdev, rproc, MPSS_CRASH_REASON_SMEM, qcom_msa_handover); if (ret) - goto free_rproc; + goto detach_proxy_pds; qproc->mpss_perm = BIT(QCOM_SCM_VMID_HLOS); qproc->mba_perm = BIT(QCOM_SCM_VMID_HLOS); @@ -1344,10 +1442,12 @@ static int q6v5_probe(struct platform_device *pdev) ret = rproc_add(rproc); if (ret) - goto free_rproc; + goto detach_proxy_pds; return 0; +detach_proxy_pds: + q6v5_pds_detach(qproc, qproc->proxy_pds, qproc->proxy_pd_count); free_rproc: rproc_free(rproc); @@ -1364,6 +1464,9 @@ static int q6v5_remove(struct platform_device *pdev) qcom_remove_glink_subdev(qproc->rproc, &qproc->glink_subdev); qcom_remove_smd_subdev(qproc->rproc, &qproc->smd_subdev); qcom_remove_ssr_subdev(qproc->rproc, &qproc->ssr_subdev); + + q6v5_pds_detach(qproc, qproc->proxy_pds, qproc->proxy_pd_count); + rproc_free(qproc->rproc); return 0; @@ -1388,6 +1491,12 @@ static const struct rproc_hexagon_res sdm845_mss = { "mnoc_axi", NULL }, + .proxy_pd_names = (char*[]){ + "cx", + "mx", + "mss", + NULL + }, .need_mem_protection = true, .has_alt_reset = true, .version = MSS_SDM845, From patchwork Tue Jan 22 05:51:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 10774859 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3F4EB13BF for ; Tue, 22 Jan 2019 05:52:18 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2F6012A72E for ; Tue, 22 Jan 2019 05:52:18 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 23CD02A738; Tue, 22 Jan 2019 05:52:18 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8B6632A75A for ; Tue, 22 Jan 2019 05:52:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726134AbfAVFwQ (ORCPT ); Tue, 22 Jan 2019 00:52:16 -0500 Received: from mail-pg1-f196.google.com ([209.85.215.196]:33376 "EHLO mail-pg1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727078AbfAVFv4 (ORCPT ); Tue, 22 Jan 2019 00:51:56 -0500 Received: by mail-pg1-f196.google.com with SMTP id z11so10537295pgu.0 for ; Mon, 21 Jan 2019 21:51:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=GjBCWU0YLJV4xz8elAnATcaOk73UwOaJ2hgycUvAavI=; b=RKDtvGQLZvWYSkFUOZ8HT8YIQWO2AlYj8zviFc8rxVKGtD1nbPNHIk1uHarwkoX4Dd AZXwzycWiJ9U47HKZt8jUXU+GV5QyMNQPtybhuG5oSkCl22OUO7YaC3TaLjhdII2FtrU vc/0X8Yre38cghWml7wwgqMCzW+F/YsyevA34= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=GjBCWU0YLJV4xz8elAnATcaOk73UwOaJ2hgycUvAavI=; b=mcwXGO/RZGaqqcRA7CWoFOcMjsmHezRQ5zryQiQ/gLaG0jLTHl4TUO81jse1UIXn9U /5m368qgKFEpjEBZgi04dkIpku2xug9tiwRFNag+MXHElOYvSO+yCJsQqwtcxO8GXo12 dwBnWKjCjgd81aQJ+6/1Fw3UGH0XyjU6CNjUrbPgL1YeWmL8XeAFLVJIzyolFDGaBkKF Qk1QR/3Vw73xQqyiAywHSRoFrhNgvWGp2Dwj8986MJGD8hUKQgR/4NdgnpiHWYDS4qg/ uJrqKtT5BmId5D9x5c59puM8d60V2OvoWN/I9Zj+NyfgT5w2L/8spuLenIczu77VNze+ GaBw== X-Gm-Message-State: AJcUukcV9KgnzjpcZXnN7yfWlKmt5y2vz5XREIm7w5jq2XS5NdzQ93u9 3bAKil1zSHkhEpN7fqzCQnxfmg== X-Google-Smtp-Source: ALg8bN7Vf/tDuJeA7uROWKDxUjsyYyGwN4EJ5y0Jp8HLqZJlFD2mpjbMORSg4Hl/18zo+o2yxjKaTg== X-Received: by 2002:a63:6150:: with SMTP id v77mr30087868pgb.266.1548136315105; Mon, 21 Jan 2019 21:51:55 -0800 (PST) Received: from localhost.localdomain (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id z62sm23771572pfl.33.2019.01.21.21.51.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 21 Jan 2019 21:51:54 -0800 (PST) From: Bjorn Andersson To: Andy Gross , David Brown , Sibi Sankar Cc: Rob Herring , Mark Rutland , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 08/10] remoteproc: q6v5-mss: Active powerdomain for SDM845 Date: Mon, 21 Jan 2019 21:51:10 -0800 Message-Id: <20190122055112.30943-9-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20190122055112.30943-1-bjorn.andersson@linaro.org> References: <20190122055112.30943-1-bjorn.andersson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The SDM845 MSS needs the load_state powerdomain voted for during the duration of the MSS being powered on, to let the AOSS know that it may not perform certain power save measures. So vote for this. Tested-by: Sibi Sankar Reviewed-by: Sibi Sankar Signed-off-by: Bjorn Andersson --- Changes since v2: - None drivers/remoteproc/qcom_q6v5_mss.c | 31 ++++++++++++++++++++++++++++-- 1 file changed, 29 insertions(+), 2 deletions(-) diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c index 003186ce56c7..3e25016954d9 100644 --- a/drivers/remoteproc/qcom_q6v5_mss.c +++ b/drivers/remoteproc/qcom_q6v5_mss.c @@ -133,6 +133,7 @@ struct rproc_hexagon_res { char **proxy_clk_names; char **reset_clk_names; char **active_clk_names; + char **active_pd_names; char **proxy_pd_names; int version; bool need_mem_protection; @@ -159,10 +160,12 @@ struct q6v5 { struct clk *active_clks[8]; struct clk *reset_clks[4]; struct clk *proxy_clks[4]; + struct device *active_pds[1]; struct device *proxy_pds[3]; int active_clk_count; int reset_clk_count; int proxy_clk_count; + int active_pd_count; int proxy_pd_count; struct reg_info active_regs[1]; @@ -730,10 +733,16 @@ static int q6v5_mba_load(struct q6v5 *qproc) qcom_q6v5_prepare(&qproc->q6v5); + ret = q6v5_pds_enable(qproc, qproc->active_pds, qproc->active_pd_count); + if (ret < 0) { + dev_err(qproc->dev, "failed to enable active power domains\n"); + goto disable_irqs; + } + ret = q6v5_pds_enable(qproc, qproc->proxy_pds, qproc->proxy_pd_count); if (ret < 0) { dev_err(qproc->dev, "failed to enable proxy power domains\n"); - goto disable_irqs; + goto disable_active_pds; } ret = q6v5_regulator_enable(qproc, qproc->proxy_regs, @@ -839,6 +848,8 @@ static int q6v5_mba_load(struct q6v5 *qproc) qproc->proxy_reg_count); disable_proxy_pds: q6v5_pds_disable(qproc, qproc->proxy_pds, qproc->proxy_pd_count); +disable_active_pds: + q6v5_pds_disable(qproc, qproc->active_pds, qproc->active_pd_count); disable_irqs: qcom_q6v5_unprepare(&qproc->q6v5); @@ -878,6 +889,7 @@ static void q6v5_mba_reclaim(struct q6v5 *qproc) qproc->active_clk_count); q6v5_regulator_disable(qproc, qproc->active_regs, qproc->active_reg_count); + q6v5_pds_disable(qproc, qproc->active_pds, qproc->active_pd_count); /* In case of failure or coredump scenario where reclaiming MBA memory * could not happen reclaim it here. @@ -1412,11 +1424,19 @@ static int q6v5_probe(struct platform_device *pdev) } qproc->active_reg_count = ret; + ret = q6v5_pds_attach(&pdev->dev, qproc->active_pds, + desc->active_pd_names); + if (ret < 0) { + dev_err(&pdev->dev, "Failed to attach active power domains\n"); + goto free_rproc; + } + qproc->active_pd_count = ret; + ret = q6v5_pds_attach(&pdev->dev, qproc->proxy_pds, desc->proxy_pd_names); if (ret < 0) { dev_err(&pdev->dev, "Failed to init power domains\n"); - goto free_rproc; + goto detach_active_pds; } qproc->proxy_pd_count = ret; @@ -1448,6 +1468,8 @@ static int q6v5_probe(struct platform_device *pdev) detach_proxy_pds: q6v5_pds_detach(qproc, qproc->proxy_pds, qproc->proxy_pd_count); +detach_active_pds: + q6v5_pds_detach(qproc, qproc->active_pds, qproc->active_pd_count); free_rproc: rproc_free(rproc); @@ -1465,6 +1487,7 @@ static int q6v5_remove(struct platform_device *pdev) qcom_remove_smd_subdev(qproc->rproc, &qproc->smd_subdev); qcom_remove_ssr_subdev(qproc->rproc, &qproc->ssr_subdev); + q6v5_pds_detach(qproc, qproc->active_pds, qproc->active_pd_count); q6v5_pds_detach(qproc, qproc->proxy_pds, qproc->proxy_pd_count); rproc_free(qproc->rproc); @@ -1491,6 +1514,10 @@ static const struct rproc_hexagon_res sdm845_mss = { "mnoc_axi", NULL }, + .active_pd_names = (char*[]){ + "load_state", + NULL + }, .proxy_pd_names = (char*[]){ "cx", "mx", From patchwork Tue Jan 22 05:51:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 10774855 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B902D913 for ; Tue, 22 Jan 2019 05:52:09 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A97162A72E for ; Tue, 22 Jan 2019 05:52:09 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9DBD22A74A; Tue, 22 Jan 2019 05:52:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4F08B2A72E for ; Tue, 22 Jan 2019 05:52:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727113AbfAVFv5 (ORCPT ); Tue, 22 Jan 2019 00:51:57 -0500 Received: from mail-pg1-f196.google.com ([209.85.215.196]:34859 "EHLO mail-pg1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727101AbfAVFv4 (ORCPT ); Tue, 22 Jan 2019 00:51:56 -0500 Received: by mail-pg1-f196.google.com with SMTP id s198so10535013pgs.2 for ; Mon, 21 Jan 2019 21:51:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=aQfgLHGyafHU7tICKZQbQ4yyQ9JsXlWjf2VqfyIq9Jw=; b=fiGUbUhb9l2DipnjkvZ0h2+2b9iVpp69SCrJkHXzAqLeHidpciQw8velfCQwBOB1zm afq5WAq5+uIzHJbQgT6rVIpdAc9y9IidtdJqKVhH7itqEEUhkQGP0cQOQHZYGNql8ArR Ja8XOZLgFpyqOSgbthbawW5eneAdOq7Pi9KIw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=aQfgLHGyafHU7tICKZQbQ4yyQ9JsXlWjf2VqfyIq9Jw=; b=pVXHXZRzPnoS3Nb6U9JmUB6IXdKQkd5oT4LYEDSzQQJUStJfclnTNnX6jXHN5BADUU 1WWsiT3NAAwAEldno9WXgJGnbdfaPfK/oKtTUyPgiSumSwMJKcreVeETSWNseahsZhCe 7msSsA41wJnC3wFzAwcN+VU/Ik3PSSQwXDqqtLNwWX5qjebxxph5x1nfB8PU//LBHWaV 32rBSCK7uuWDlnBg3u3mnOHFy5YjLbw/5PdFyl35YZtj+hsVSZP5U72Ni4NJdIhcp4kI ZbD4fDLEZ5N7i8Oj2I3GiecdIf7tsNXp4EPkLMz5GrfZpTY4JAingWPwiyo0ti9i6sBc zDmQ== X-Gm-Message-State: AJcUukfvKLEeTGq0+BIc3ljM9/eQ2g19DQTjLU/+A9MtoAqCvoGdw/fF Fm4SS5jEtYf7ag5pX7NtlU9FBw== X-Google-Smtp-Source: ALg8bN4Y6v6Bu6nMswZhdAyn+EbeFHnL67poESjxYF4CgBdqoKPZFrGRZ79H8LaM4qk8bnzNQEk88Q== X-Received: by 2002:a63:88c7:: with SMTP id l190mr30197186pgd.110.1548136316194; Mon, 21 Jan 2019 21:51:56 -0800 (PST) Received: from localhost.localdomain (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id z62sm23771572pfl.33.2019.01.21.21.51.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 21 Jan 2019 21:51:55 -0800 (PST) From: Bjorn Andersson To: Andy Gross , David Brown , Sibi Sankar Cc: Rob Herring , Mark Rutland , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 09/10] arm64: dts: qcom: Add AOSS QMP node Date: Mon, 21 Jan 2019 21:51:11 -0800 Message-Id: <20190122055112.30943-10-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20190122055112.30943-1-bjorn.andersson@linaro.org> References: <20190122055112.30943-1-bjorn.andersson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The AOSS QMP provides a number of power domains, used for QDSS and PIL, add the node for this. Signed-off-by: Bjorn Andersson --- Changes since v2: - New patch arch/arm64/boot/dts/qcom/sdm845.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 1033b77856e6..5cc2615461da 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -2070,6 +2071,15 @@ #reset-cells = <1>; }; + aoss_qmp: qmp@c300000 { + compatible = "qcom,sdm845-aoss-qmp"; + reg = <0 0x0c300000 0 0x100000>; + interrupts = ; + mboxes = <&apss_shared 0>; + + #power-domain-cells = <1>; + }; + spmi_bus: spmi@c440000 { compatible = "qcom,spmi-pmic-arb"; reg = <0 0x0c440000 0 0x1100>, From patchwork Tue Jan 22 05:51:12 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 10774853 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E8AF4139A for ; Tue, 22 Jan 2019 05:52:07 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D73D62A72E for ; Tue, 22 Jan 2019 05:52:07 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CAF1F2A74A; Tue, 22 Jan 2019 05:52:07 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 62EAB2A72E for ; Tue, 22 Jan 2019 05:52:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727130AbfAVFv7 (ORCPT ); Tue, 22 Jan 2019 00:51:59 -0500 Received: from mail-pf1-f196.google.com ([209.85.210.196]:43604 "EHLO mail-pf1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727101AbfAVFv6 (ORCPT ); Tue, 22 Jan 2019 00:51:58 -0500 Received: by mail-pf1-f196.google.com with SMTP id w73so11201837pfk.10 for ; Mon, 21 Jan 2019 21:51:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=1ewOPx/Q/MvKiqCUH4MpfT+IzxQNYFi2WjzfDjsydGo=; b=gwxYZeJW2j9DYwSar65zTKQGgeOcGZ0Bf2OKtxtkWz00EkrCKVSpXruxIApicJOkQp Mz1YKoWxDMW1oo7SDTUGqxmxLPTmae3BUI/85xZApYrs3W3Fwzoka98tau/pDmdDlUJT NiGMsmchCoryJ55k98qXmEx6VpjuCpAVfCh4I= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=1ewOPx/Q/MvKiqCUH4MpfT+IzxQNYFi2WjzfDjsydGo=; b=XNqiS1x9bH7Lxqrvfr8cPe69YXQ1+yfkULlwiI4twJufAlrAnzZsXD4zXijehygtvO u7dfC4qA+uvgz2SLZPDRQIZDBki4Px0R88X6fQYK8gT7yyC09iOZKU6pTLMu1p4om8ST xMEgZxt3H54b/+3CfPLlaTdi0KKFCu7btAcFI37rG9PN18D/IF+N/sbAK8qrtR/O8mah mj0yrx6H6d5OmnVq2uWcC/zs/w25eA/wGTUO1q577ZuA/IqWvFb2Qul1N7/h97LbXCAz 4z2/7gaE7x7yuysAuQlQXUwl3UU2let6u4MiuvP3CZv/hHtO3IHNFiq+cKdygAy9Tedb HLbA== X-Gm-Message-State: AJcUukfkujZGDLTMwfoIg0qXbF3GuN+NtKhqpIxFwWedAxoxBvgZr9cO JPgubTaqM3bUi9jkAgCVqVXp9w== X-Google-Smtp-Source: ALg8bN42obCwixn9XHu5Tpa5VvKeJgycRwqbkCWa8b7GuUca+QQHtUfiMIcmiu96M6uQeMK8O9Z76Q== X-Received: by 2002:a63:ab08:: with SMTP id p8mr30182047pgf.87.1548136317597; Mon, 21 Jan 2019 21:51:57 -0800 (PST) Received: from localhost.localdomain (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id z62sm23771572pfl.33.2019.01.21.21.51.56 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 21 Jan 2019 21:51:56 -0800 (PST) From: Bjorn Andersson To: Andy Gross , David Brown , Sibi Sankar Cc: Rob Herring , Mark Rutland , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 10/10] arm64: dts: qcom: sdm845: Add Q6V5 MSS node Date: Mon, 21 Jan 2019 21:51:12 -0800 Message-Id: <20190122055112.30943-11-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20190122055112.30943-1-bjorn.andersson@linaro.org> References: <20190122055112.30943-1-bjorn.andersson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Sibi Sankar This patch adds Q6V5 MSS remoteproc node for SDM845 SoCs. Signed-off-by: Sibi Sankar Reviewed-by: Douglas Anderson Signed-off-by: Bjorn Andersson --- Changes since v2: - Picked up Sibi's patch - Fixed reg to work with address/size-cells as 2 arch/arm64/boot/dts/qcom/sdm845.dtsi | 58 ++++++++++++++++++++++++++++ 1 file changed, 58 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 5cc2615461da..78df5f1bce2d 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -1617,6 +1617,64 @@ clock-names = "xo"; }; + mss_pil: remoteproc@4080000 { + compatible = "qcom,sdm845-mss-pil"; + reg = <0 0x04080000 0 0x408>, <0 0x04180000 0 0x48>; + reg-names = "qdsp6", "rmb"; + + interrupts-extended = + <&intc GIC_SPI 266 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", + "handover", "stop-ack", + "shutdown-ack"; + + clocks = <&gcc GCC_MSS_CFG_AHB_CLK>, + <&gcc GCC_MSS_Q6_MEMNOC_AXI_CLK>, + <&gcc GCC_BOOT_ROM_AHB_CLK>, + <&gcc GCC_MSS_GPLL0_DIV_CLK_SRC>, + <&gcc GCC_MSS_SNOC_AXI_CLK>, + <&gcc GCC_MSS_MFAB_AXIS_CLK>, + <&gcc GCC_PRNG_AHB_CLK>, + <&rpmhcc RPMH_CXO_CLK>; + clock-names = "iface", "bus", "mem", "gpll0_mss", + "snoc_axi", "mnoc_axi", "prng", "xo"; + + qcom,smem-states = <&modem_smp2p_out 0>; + qcom,smem-state-names = "stop"; + + resets = <&aoss_reset AOSS_CC_MSS_RESTART>, + <&pdc_reset PDC_MODEM_SYNC_RESET>; + reset-names = "mss_restart", "pdc_reset"; + + qcom,halt-regs = <&tcsr_mutex_regs 0x23000 0x25000 0x24000>; + + power-domains = <&aoss_qmp AOSS_QMP_LS_MODEM>, + <&rpmhpd SDM845_CX>, + <&rpmhpd SDM845_MX>, + <&rpmhpd SDM845_MSS>; + power-domain-names = "load_state", "cx", "mx", "mss"; + + mba { + memory-region = <&mba_region>; + }; + + mpss { + memory-region = <&mpss_region>; + }; + + glink-edge { + interrupts = ; + label = "modem"; + qcom,remote-pid = <1>; + mboxes = <&apss_shared 12>; + }; + }; + sdhc_2: sdhci@8804000 { compatible = "qcom,sdm845-sdhci", "qcom,sdhci-msm-v5"; reg = <0 0x08804000 0 0x1000>;