From patchwork Fri Nov 18 11:04:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amjad Ouled-Ameur X-Patchwork-Id: 13048064 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 536CBC4332F for ; Fri, 18 Nov 2022 11:04:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241100AbiKRLE4 (ORCPT ); Fri, 18 Nov 2022 06:04:56 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44612 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241415AbiKRLEz (ORCPT ); Fri, 18 Nov 2022 06:04:55 -0500 Received: from mail-wm1-x32a.google.com (mail-wm1-x32a.google.com [IPv6:2a00:1450:4864:20::32a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6114899E86 for ; Fri, 18 Nov 2022 03:04:45 -0800 (PST) Received: by mail-wm1-x32a.google.com with SMTP id c65-20020a1c3544000000b003cfffd00fc0so3277752wma.1 for ; Fri, 18 Nov 2022 03:04:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=GBJERhtOth+rBeLxVgFfkJsarNx9GtznV7fQ6VC3SrY=; b=vvdRx4XhO7STmF3ODXXs9rwYg2sCM9Fbli4LCPgXKFyjJe8pMcz+dyzPGZzvn67Yk8 0Na7a9HlLh9G5bnvBX7jfnE6BlcjIgQzODOm7EvmKfOfmwMDXTYlUDWLHHrze0GMO6bo tDwRXzapE4HZWUu0nLh0M4J5sDZfXHI+6u0aoVrkeaarympPczI5z6sajFhWBk+RZwT0 hwvixXzgkettkfYltivaVdJ+8X25LCTHQoVTNMUi8CkCYRiv3e4ioHqGPeVvzw042Sii cVsWm3Z2HiKFx9UiZ+V/il7ikboqZB2yg2Og2zVTGt23R/grQuR8WVeZ1yq9rqctmVkb P1vw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=GBJERhtOth+rBeLxVgFfkJsarNx9GtznV7fQ6VC3SrY=; b=kC+LRdHmbp9V1YnKA4WfCA4p1TI6HgKFfa1Q9JMOI9VVAj3UkIuHXXIllO+vdlEfyV LHaYOjOwXmba2xeObJST78KAQU4xmk0lriV+SN0+TNgolAzdhjWj4LbtYerNtsWEsWHa /Z/SVf32A+2DiuS7I3f2EwRBdv/K1h/E0dazaDywNAMux2bmkXW8pBed0pln9PiBwH8i EnYvB9u93F4iD3sHnaEb5uAzC1U/h2O9K/YhShr7My6zZMD1/4ErHJCQxgGV3/ePOoZg yFgTy+RG+D/zqFGpxGXA7E6evO3FXXJGKS3UxKkudH7VupKIG6HZOQD6/9EF0G0W31YG wWhw== X-Gm-Message-State: ANoB5pnvVCNOz+yt6WnBfPWT3YM6jFsIR3AUsSJSBaOL/EgFuptfY57S tHb0aHP7TFvUeDwpdx9lReXQHg== X-Google-Smtp-Source: AA0mqf41qGV0bEND0GwPSMQhFkrT1VnGlLZtWZn2lyPUA5nTaZUlKkh7q3SAfsl6Dc+JAGpnk4/4Gw== X-Received: by 2002:a05:600c:1e0f:b0:3cf:e9a4:3261 with SMTP id ay15-20020a05600c1e0f00b003cfe9a43261mr8273759wmb.41.1668769483874; Fri, 18 Nov 2022 03:04:43 -0800 (PST) Received: from [127.0.1.1] (210.145.15.109.rev.sfr.net. [109.15.145.210]) by smtp.googlemail.com with ESMTPSA id i14-20020adff30e000000b002368a6deaf8sm3316948wro.57.2022.11.18.03.04.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Nov 2022 03:04:43 -0800 (PST) From: Amjad Ouled-Ameur Date: Fri, 18 Nov 2022 12:04:27 +0100 Subject: [PATCH v7 1/4] dt-bindings: thermal: mediatek: add binding documentation for MT8365 SoC MIME-Version: 1.0 Message-Id: <20221018-up-i350-thermal-bringup-v7-1-ebf08ff2eddb@baylibre.com> References: <20221018-up-i350-thermal-bringup-v7-0-ebf08ff2eddb@baylibre.com> In-Reply-To: <20221018-up-i350-thermal-bringup-v7-0-ebf08ff2eddb@baylibre.com> To: "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Rob Herring , Krzysztof Kozlowski , Zhang Rui Cc: AngeloGioacchino Del Regno , Fabien Parent , Matthias Brugger , Markus Schneider-Pargmann , linux-pm@vger.kernel.org, Rob Herring , Michael Kao , linux-kernel@vger.kernel.org, Hsin-Yi Wang , Amjad Ouled-Ameur , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org X-Mailer: b4 0.10.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1668769481; l=1269; i=aouledameur@baylibre.com; s=20220920; h=from:subject:message-id; bh=fY1CncUk6oCKZLxDY+iXmY9IFHJPxuBaTQTmU142aZo=; b=Oqt0uOOMB8WLDgzdVBOKBcnTWdGXbWz+ipYlESQz5dRiUdvgrn/7hHmra43XQrdY49ee/m/RuMPb tUHkhzfMA8azF4mWIrudIIRQqMDPrbMJ5OHNnqlI88SliBqaaPis X-Developer-Key: i=aouledameur@baylibre.com; a=ed25519; pk=HgYWawSL4qLGPx+RzJ+Cuu+V8Pi/KQnDDm1wjWPMOFE= Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Fabien Parent Add the binding documentation for the thermal support on MT8365 SoC. Signed-off-by: Fabien Parent Signed-off-by: Amjad Ouled-Ameur Reviewed-by: Matthias Brugger Reviewed-by: AngeloGioacchino Del Regno Acked-by: Rob Herring --- Documentation/devicetree/bindings/thermal/mediatek-thermal.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt index 5c7e7bdd029a..ba4ebffeade4 100644 --- a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt @@ -14,6 +14,7 @@ Required properties: - "mediatek,mt2712-thermal" : For MT2712 family of SoCs - "mediatek,mt7622-thermal" : For MT7622 SoC - "mediatek,mt8183-thermal" : For MT8183 family of SoCs + - "mediatek,mt8365-thermal" : For MT8365 family of SoCs - "mediatek,mt8516-thermal", "mediatek,mt2701-thermal : For MT8516 family of SoCs - reg: Address range of the thermal controller - interrupts: IRQ for the thermal controller From patchwork Fri Nov 18 11:04:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amjad Ouled-Ameur X-Patchwork-Id: 13048065 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6CFEBC43217 for ; Fri, 18 Nov 2022 11:05:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241563AbiKRLFC (ORCPT ); Fri, 18 Nov 2022 06:05:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44744 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241539AbiKRLFB (ORCPT ); Fri, 18 Nov 2022 06:05:01 -0500 Received: from mail-wm1-x32d.google.com (mail-wm1-x32d.google.com [IPv6:2a00:1450:4864:20::32d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8150D970A4 for ; Fri, 18 Nov 2022 03:04:46 -0800 (PST) Received: by mail-wm1-x32d.google.com with SMTP id c65-20020a1c3544000000b003cfffd00fc0so3277791wma.1 for ; Fri, 18 Nov 2022 03:04:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=fyeoHLNYgE+7jRWrI7Gid0gjC7DyyjDTDuyVioxNv2s=; b=lnmpQeD29OtlmiLODfaUO4X03Cz3jnXA45M4S1331TbJxmDH6x8HQJ/zAySAh5xYdm a+4U2+ntc1abC9aVdCB4cRyd0Exx6+MHxKaWhH7l6YSRsX/hyJzaupSesQAwt69vVrA2 FlG+KFrvSWulI/s0kzqZwiurXraKgGbvgYsHK/8mf7Cu2PYSuzt2VJwaErMeIRuop2KE 6OnR3jy6i/ijsR+EGZlV7wjMfbrvic9WlCt3iPBtd8iGKEIQINaztz7QmYXydkRmxyVW rvbbLgJtz3FblUDr2iV0bjq31MEDLLUGzqW9f0iAtvhatcAjwPQpiYq6cq5Vm8chAlYx WxEw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=fyeoHLNYgE+7jRWrI7Gid0gjC7DyyjDTDuyVioxNv2s=; b=ysq9AA65+8kWS/6OqGmIkWRfIXGdXcWRKPV3sUnamoIwFD9KXTKO9w5UMkctUUpCDl rbflsuShn+xU2qcIPFLEDfi3MT63VkQJi3RpWI+it/vPnnGQaSDxeNMVmdOXRfp6itL3 26JgpaLEXhRu3o6y9peygb0y9AOaEiCiFwqlg5cw9DV2q9TKe+1gO+DOm3oWpfhj+AFT Xq6OrjwL2dP0ai1Y5BodmAdnzIkSgPYSzrz8euLnBctHdDxRRYBsIgvVW4jsSSyCQEg3 KK7enWmslLibPLRZHbYsk3XudIniiiPd+GjMnLIVoghydZurxA8OfrNBTn9OHjjh2wfk zEAQ== X-Gm-Message-State: ANoB5pnW43YVn522s6uIcm0ey9MJLOumg8zIiwCiTVNXBVc65PNp81ak mJ9zUoO8D+pAJQJElFn592BL7Q== X-Google-Smtp-Source: AA0mqf5Z2s7uT/ojkbi4kQH8ZukBjcYstw7H33D/YaQ6a6I60O8J6S4JZCXIyK7cgUZqBWAF7EE9/w== X-Received: by 2002:a05:600c:3b84:b0:3cf:b73f:c062 with SMTP id n4-20020a05600c3b8400b003cfb73fc062mr8004968wms.204.1668769484910; Fri, 18 Nov 2022 03:04:44 -0800 (PST) Received: from [127.0.1.1] (210.145.15.109.rev.sfr.net. [109.15.145.210]) by smtp.googlemail.com with ESMTPSA id i14-20020adff30e000000b002368a6deaf8sm3316948wro.57.2022.11.18.03.04.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Nov 2022 03:04:44 -0800 (PST) From: Amjad Ouled-Ameur Date: Fri, 18 Nov 2022 12:04:28 +0100 Subject: [PATCH v7 2/4] thermal: mediatek: control buffer enablement tweaks MIME-Version: 1.0 Message-Id: <20221018-up-i350-thermal-bringup-v7-2-ebf08ff2eddb@baylibre.com> References: <20221018-up-i350-thermal-bringup-v7-0-ebf08ff2eddb@baylibre.com> In-Reply-To: <20221018-up-i350-thermal-bringup-v7-0-ebf08ff2eddb@baylibre.com> To: "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Rob Herring , Krzysztof Kozlowski , Zhang Rui Cc: AngeloGioacchino Del Regno , Fabien Parent , Matthias Brugger , Markus Schneider-Pargmann , linux-pm@vger.kernel.org, Rob Herring , Michael Kao , linux-kernel@vger.kernel.org, Hsin-Yi Wang , Amjad Ouled-Ameur , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org X-Mailer: b4 0.10.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1668769481; l=2549; i=aouledameur@baylibre.com; s=20220920; h=from:subject:message-id; bh=BUYgiWUyEmLmv5YqBlzSOjPnRULIXZAPNGFdkdhmkOQ=; b=Hv/1oPehOoXJm/XPVk7GdRrpDq0r896Pz2DLWRzc0Hg/KUFU6HAQy0YmZUyUyIRjhZhl4uRFoH0m e7doajURDSExpVZ7R7vTDgdxAvRfsQ+qgSKZRaBIbMZjJeA6LcBF X-Developer-Key: i=aouledameur@baylibre.com; a=ed25519; pk=HgYWawSL4qLGPx+RzJ+Cuu+V8Pi/KQnDDm1wjWPMOFE= Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Markus Schneider-Pargmann Add logic in order to be able to turn on the control buffer on MT8365. This change now allows to have control buffer support for MTK_THERMAL_V1, and it allows to define the register offset, and mask used to enable it. Signed-off-by: Markus Schneider-Pargmann Signed-off-by: Fabien Parent Signed-off-by: Amjad Ouled-Ameur Reviewed-by: AngeloGioacchino Del Regno --- drivers/thermal/mtk_thermal.c | 25 ++++++++++++++++++------- 1 file changed, 18 insertions(+), 7 deletions(-) diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c index 8440692e3890..d8ddceb75372 100644 --- a/drivers/thermal/mtk_thermal.c +++ b/drivers/thermal/mtk_thermal.c @@ -271,6 +271,9 @@ struct mtk_thermal_data { bool need_switch_bank; struct thermal_bank_cfg bank_data[MAX_NUM_ZONES]; enum mtk_thermal_version version; + u32 apmixed_buffer_ctl_reg; + u32 apmixed_buffer_ctl_mask; + u32 apmixed_buffer_ctl_set; }; struct mtk_thermal { @@ -514,6 +517,9 @@ static const struct mtk_thermal_data mt7622_thermal_data = { .adcpnp = mt7622_adcpnp, .sensor_mux_values = mt7622_mux_values, .version = MTK_THERMAL_V2, + .apmixed_buffer_ctl_reg = APMIXED_SYS_TS_CON1, + .apmixed_buffer_ctl_mask = GENMASK(31, 6) | BIT(3), + .apmixed_buffer_ctl_set = BIT(0), }; /* @@ -963,14 +969,18 @@ static const struct of_device_id mtk_thermal_of_match[] = { }; MODULE_DEVICE_TABLE(of, mtk_thermal_of_match); -static void mtk_thermal_turn_on_buffer(void __iomem *apmixed_base) +static void mtk_thermal_turn_on_buffer(struct mtk_thermal *mt, + void __iomem *apmixed_base) { - int tmp; + u32 tmp; + + if (!mt->conf->apmixed_buffer_ctl_reg) + return; - tmp = readl(apmixed_base + APMIXED_SYS_TS_CON1); - tmp &= ~(0x37); - tmp |= 0x1; - writel(tmp, apmixed_base + APMIXED_SYS_TS_CON1); + tmp = readl(apmixed_base + mt->conf->apmixed_buffer_ctl_reg); + tmp &= mt->conf->apmixed_buffer_ctl_mask; + tmp |= mt->conf->apmixed_buffer_ctl_set; + writel(tmp, apmixed_base + mt->conf->apmixed_buffer_ctl_reg); udelay(200); } @@ -1070,8 +1080,9 @@ static int mtk_thermal_probe(struct platform_device *pdev) goto err_disable_clk_auxadc; } + mtk_thermal_turn_on_buffer(mt, apmixed_base); + if (mt->conf->version == MTK_THERMAL_V2) { - mtk_thermal_turn_on_buffer(apmixed_base); mtk_thermal_release_periodic_ts(mt, auxadc_base); } From patchwork Fri Nov 18 11:04:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amjad Ouled-Ameur X-Patchwork-Id: 13048066 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5EA44C43219 for ; Fri, 18 Nov 2022 11:05:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241647AbiKRLFG (ORCPT ); Fri, 18 Nov 2022 06:05:06 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44814 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234867AbiKRLFE (ORCPT ); Fri, 18 Nov 2022 06:05:04 -0500 Received: from mail-wm1-x336.google.com (mail-wm1-x336.google.com [IPv6:2a00:1450:4864:20::336]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9699C99E8F for ; Fri, 18 Nov 2022 03:04:47 -0800 (PST) Received: by mail-wm1-x336.google.com with SMTP id 5so3395063wmo.1 for ; Fri, 18 Nov 2022 03:04:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=JEWwvjO7xGoxwjM+6BZt85KGa3T/LYZTSrJmbqTF3bU=; b=MxkqzHNX4dIvac2ctpL2Ov1Eo2y0TQHlWsuaTRaoxGgbYR1Z6m+TzdZx/z4HZPmjXj tLg/9oYG0dP42sVOAEAmssspPG+2m/LYs4qfTXBbIpYJx5tcWabbVrbUxL09WUWde4bn jjbVLKSN4qsP249G7cHrD1pXLAR5sBsLSKJLU22ZiJq5gwr1ksAn+qhxexKa7G3Hf3/q vSTy6AH147vJqyeNURuF7erDKCy6skaRMZTC3kbzBSs23B3mM/L2dCO84G2Z62hozgC9 CHnmQszORwhnpNEbF/TY7IiGqSyPWE65PJFe0gBpRvFQYDv7XWMCi6enoAKajHAtSaDv ZKCw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=JEWwvjO7xGoxwjM+6BZt85KGa3T/LYZTSrJmbqTF3bU=; b=ZS3uIwVD/FiJ0IV4rM9Jadnq2VxBXuTFW51lUNyFXhFmnVb78497yCqKKSceGwUnh/ 9gbttSvx7FYcV4+BRcF+NNEfDazIEjqqZdqVy1mvoy7+1Y6dDoagrq9SDJVkSzPbU4hV sEcGA3DcSGPTGOBO/xYEoJlLBWFA663LtUWECsWOktUoOsCwhGjz5MoPngromZGsk2YA tnMuHRrlKmuPXEICwyUU16wMGHFhuxRnsELT0xwOWW4lZEtbcJVuUeqb3a+9rh3Wlt2e PIt4CFfGglXtH2IrksVNE2MVJTIyQhKY52O2ZV2XYVMQt0oUouq/Bf+DvslLHT1f28xO cC1w== X-Gm-Message-State: ANoB5pnbLfISGMq5cMf6A5pC/+GzYnqKUw14A1vdxhmF68cJdP/bkjza TCGY+MM//B/4uuEpoDbu62u55g== X-Google-Smtp-Source: AA0mqf6eZVLMpSrrv1w/0V981VmPrLB6d0Ec/FK4KH0meTVDBLRRQRGw5YlVckTx9UAvO3XAX7mzcQ== X-Received: by 2002:a05:600c:511c:b0:3cf:6c05:809e with SMTP id o28-20020a05600c511c00b003cf6c05809emr4589679wms.74.1668769486008; Fri, 18 Nov 2022 03:04:46 -0800 (PST) Received: from [127.0.1.1] (210.145.15.109.rev.sfr.net. [109.15.145.210]) by smtp.googlemail.com with ESMTPSA id i14-20020adff30e000000b002368a6deaf8sm3316948wro.57.2022.11.18.03.04.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Nov 2022 03:04:45 -0800 (PST) From: Amjad Ouled-Ameur Date: Fri, 18 Nov 2022 12:04:29 +0100 Subject: [PATCH v7 3/4] thermal: mediatek: add support for MT8365 SoC MIME-Version: 1.0 Message-Id: <20221018-up-i350-thermal-bringup-v7-3-ebf08ff2eddb@baylibre.com> References: <20221018-up-i350-thermal-bringup-v7-0-ebf08ff2eddb@baylibre.com> In-Reply-To: <20221018-up-i350-thermal-bringup-v7-0-ebf08ff2eddb@baylibre.com> To: "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Rob Herring , Krzysztof Kozlowski , Zhang Rui Cc: AngeloGioacchino Del Regno , Fabien Parent , Matthias Brugger , Markus Schneider-Pargmann , linux-pm@vger.kernel.org, Rob Herring , Michael Kao , linux-kernel@vger.kernel.org, Hsin-Yi Wang , Amjad Ouled-Ameur , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org X-Mailer: b4 0.10.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1668769481; l=4121; i=aouledameur@baylibre.com; s=20220920; h=from:subject:message-id; bh=HsISGoJEL6++3d6wc/n5aLyLD13GWmaS4gC5p+H31oE=; b=qIXNFOnmEaHDRp+6JyJy65AdFiqJFAcK2ZdjoYntRPxQ7dWrOTTzB89mSHuqLWQ5c7SSUpqaXv8H e+EUMsKuAZwqt0yWVTZMi2He74hQr4qhfsD18P72k1kKjuYiphtj X-Developer-Key: i=aouledameur@baylibre.com; a=ed25519; pk=HgYWawSL4qLGPx+RzJ+Cuu+V8Pi/KQnDDm1wjWPMOFE= Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Fabien Parent MT8365 is similar to the other SoCs supported by the driver. It has only one bank and 3 actual sensors that can be multiplexed. There is another one sensor that does not have usable data. Signed-off-by: Fabien Parent Signed-off-by: Amjad Ouled-Ameur Reviewed-by: AngeloGioacchino Del Regno --- drivers/thermal/mtk_thermal.c | 68 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 68 insertions(+) diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c index d8ddceb75372..3a5df1440822 100644 --- a/drivers/thermal/mtk_thermal.c +++ b/drivers/thermal/mtk_thermal.c @@ -31,6 +31,7 @@ #define AUXADC_CON2_V 0x010 #define AUXADC_DATA(channel) (0x14 + (channel) * 4) +#define APMIXED_SYS_TS_CON0 0x600 #define APMIXED_SYS_TS_CON1 0x604 /* Thermal Controller Registers */ @@ -245,6 +246,17 @@ enum mtk_thermal_version { /* The calibration coefficient of sensor */ #define MT8183_CALIBRATION 153 +/* MT8365 */ +#define MT8365_TEMP_AUXADC_CHANNEL 11 +#define MT8365_CALIBRATION 164 +#define MT8365_NUM_CONTROLLER 1 +#define MT8365_NUM_BANKS 1 +#define MT8365_NUM_SENSORS 3 +#define MT8365_NUM_SENSORS_PER_ZONE 3 +#define MT8365_TS1 0 +#define MT8365_TS2 1 +#define MT8365_TS3 2 + struct mtk_thermal; struct thermal_bank_cfg { @@ -389,6 +401,24 @@ static const int mt7622_mux_values[MT7622_NUM_SENSORS] = { 0, }; static const int mt7622_vts_index[MT7622_NUM_SENSORS] = { VTS1 }; static const int mt7622_tc_offset[MT7622_NUM_CONTROLLER] = { 0x0, }; +/* MT8365 thermal sensor data */ +static const int mt8365_bank_data[MT8365_NUM_SENSORS] = { + MT8365_TS1, MT8365_TS2, MT8365_TS3 +}; + +static const int mt8365_msr[MT8365_NUM_SENSORS_PER_ZONE] = { + TEMP_MSR0, TEMP_MSR1, TEMP_MSR2 +}; + +static const int mt8365_adcpnp[MT8365_NUM_SENSORS_PER_ZONE] = { + TEMP_ADCPNP0, TEMP_ADCPNP1, TEMP_ADCPNP2 +}; + +static const int mt8365_mux_values[MT8365_NUM_SENSORS] = { 0, 1, 2 }; +static const int mt8365_tc_offset[MT8365_NUM_CONTROLLER] = { 0 }; + +static const int mt8365_vts_index[MT8365_NUM_SENSORS] = { VTS1, VTS2, VTS3 }; + /* * The MT8173 thermal controller has four banks. Each bank can read up to * four temperature sensors simultaneously. The MT8173 has a total of 5 @@ -463,6 +493,40 @@ static const struct mtk_thermal_data mt2701_thermal_data = { .version = MTK_THERMAL_V1, }; +/* + * The MT8365 thermal controller has one bank, which can read up to + * four temperature sensors simultaneously. The MT8365 has a total of 3 + * temperature sensors. + * + * The thermal core only gets the maximum temperature of this one bank, + * so the bank concept wouldn't be necessary here. However, the SVS (Smart + * Voltage Scaling) unit makes its decisions based on the same bank + * data. + */ +static const struct mtk_thermal_data mt8365_thermal_data = { + .auxadc_channel = MT8365_TEMP_AUXADC_CHANNEL, + .num_banks = MT8365_NUM_BANKS, + .num_sensors = MT8365_NUM_SENSORS, + .vts_index = mt8365_vts_index, + .cali_val = MT8365_CALIBRATION, + .num_controller = MT8365_NUM_CONTROLLER, + .controller_offset = mt8365_tc_offset, + .need_switch_bank = false, + .bank_data = { + { + .num_sensors = MT8365_NUM_SENSORS, + .sensors = mt8365_bank_data + }, + }, + .msr = mt8365_msr, + .adcpnp = mt8365_adcpnp, + .sensor_mux_values = mt8365_mux_values, + .version = MTK_THERMAL_V1, + .apmixed_buffer_ctl_reg = APMIXED_SYS_TS_CON0, + .apmixed_buffer_ctl_mask = (u32) ~GENMASK(29, 28), + .apmixed_buffer_ctl_set = 0, +}; + /* * The MT2712 thermal controller has one bank, which can read up to * four temperature sensors simultaneously. The MT2712 has a total of 4 @@ -964,6 +1028,10 @@ static const struct of_device_id mtk_thermal_of_match[] = { { .compatible = "mediatek,mt8183-thermal", .data = (void *)&mt8183_thermal_data, + }, + { + .compatible = "mediatek,mt8365-thermal", + .data = (void *)&mt8365_thermal_data, }, { }, }; From patchwork Fri Nov 18 11:04:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amjad Ouled-Ameur X-Patchwork-Id: 13048067 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AC5C4C43217 for ; Fri, 18 Nov 2022 11:05:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241649AbiKRLFI (ORCPT ); Fri, 18 Nov 2022 06:05:08 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44864 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241626AbiKRLFG (ORCPT ); Fri, 18 Nov 2022 06:05:06 -0500 Received: from mail-wm1-x32f.google.com (mail-wm1-x32f.google.com [IPv6:2a00:1450:4864:20::32f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B028099E80 for ; Fri, 18 Nov 2022 03:04:48 -0800 (PST) Received: by mail-wm1-x32f.google.com with SMTP id t1so3377169wmi.4 for ; Fri, 18 Nov 2022 03:04:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=BXRPB3JgawBUJiVUofK6OmJyzttuKnkImFf/wIqxXmQ=; b=KXz1x7PVIRSygnZq/WJqqkYdJAeEDf2cq41xcS/VX2QD44aZpL/6lsm2HYsNKak+t8 /QWHfu2YG+yNalsfGy2TueUVs/X53k15FQI48MzsUPxpw1S4ln+wwSAsRAIvhDMmfXw0 KTAOa9lLsbcNgwNUn4Xs3JX0gY0CAHcO1+mbHfLhZc/n0nBYl/Xq5QJU6S3Y/8if/IBz NmkDpgR118kqV/5krIRGUAYrbm1+yjNiyTb7F/XHu5kCQQX9X0QX+WE+00NctK7bPhoH JBERSXbdr1NvnbpGMZTYdv2D30JElwiupgig90mF1sS0vBG6qHDz8GBnJ3rCQUensy7u vH+w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=BXRPB3JgawBUJiVUofK6OmJyzttuKnkImFf/wIqxXmQ=; b=rZIdb6twIQI8FGdINTf4plKDUD9hLVvVGRUYtv8ervaeBooj4KUifpu9oTiFX4e3Oe IHuWh2mjWH0fZNm/fxsx38nItuRQkmUgaPYYYwjH/3nTfM1DUiWn20TZ0jgExRrQoVdj +Hqvxn4HPpp0zStN0z/eKwwLH9OzSSbJANHk/Kd9/ciNM97R1MQx0qDJ4QsMYvoIinMy xZNbbd1BUruYuwoGzRwESI5mqqXD+RDf/eLHqcWoaOUW6PjhVx0S+Eg8ooEd480MZkN6 /BX0ynaCL+CAHF9LDfbcAo3JWwlpgPkFnl7Nj0hQThWtZMQerIOPcdIISKQ4SsS0WIcO lh7Q== X-Gm-Message-State: ANoB5pn+U92BlGDTHKXosFpM3Lmb+f4lcP0rMOYHbv/gm2RlQvWAxXuH BtYCmgCdnvv7h6LxMcmFPH6YcLj7mnhGVA== X-Google-Smtp-Source: AA0mqf4noqAkLrD8nO79AzLNSsDEAuGqJCo7qrG3F363wEgGHqzwkv5UvNt3lw56apWS3nKQ5YhY2Q== X-Received: by 2002:a1c:7318:0:b0:3cf:cb16:f24a with SMTP id d24-20020a1c7318000000b003cfcb16f24amr7919556wmb.182.1668769486966; Fri, 18 Nov 2022 03:04:46 -0800 (PST) Received: from [127.0.1.1] (210.145.15.109.rev.sfr.net. [109.15.145.210]) by smtp.googlemail.com with ESMTPSA id i14-20020adff30e000000b002368a6deaf8sm3316948wro.57.2022.11.18.03.04.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Nov 2022 03:04:46 -0800 (PST) From: Amjad Ouled-Ameur Date: Fri, 18 Nov 2022 12:04:30 +0100 Subject: [PATCH v7 4/4] thermal: mediatek: add another get_temp ops for thermal sensors MIME-Version: 1.0 Message-Id: <20221018-up-i350-thermal-bringup-v7-4-ebf08ff2eddb@baylibre.com> References: <20221018-up-i350-thermal-bringup-v7-0-ebf08ff2eddb@baylibre.com> In-Reply-To: <20221018-up-i350-thermal-bringup-v7-0-ebf08ff2eddb@baylibre.com> To: "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Rob Herring , Krzysztof Kozlowski , Zhang Rui Cc: AngeloGioacchino Del Regno , Fabien Parent , Matthias Brugger , Markus Schneider-Pargmann , linux-pm@vger.kernel.org, Rob Herring , Michael Kao , linux-kernel@vger.kernel.org, Hsin-Yi Wang , Amjad Ouled-Ameur , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org X-Mailer: b4 0.10.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1668769481; l=5806; i=aouledameur@baylibre.com; s=20220920; h=from:subject:message-id; bh=5USa4lcv1habf94U1XG70OWqS+dbiiwFE4XST76LPQw=; b=q86fGiC3Ko/ELXbxUMsvp4Vbrh6THMSWdimMwXIsJH+k/u3tdJb48xYGQChhrRRufTNbxy5XmkZE kcwXutTNAvno1UuMFE6rPBUgiToMXKGm3WKQ5GYFs0QFwK6+uWJg X-Developer-Key: i=aouledameur@baylibre.com; a=ed25519; pk=HgYWawSL4qLGPx+RzJ+Cuu+V8Pi/KQnDDm1wjWPMOFE= Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Provide thermal zone to read thermal sensor in the SoC. We can read all the thermal sensors value in the SoC by the node /sys/class/thermal/ In mtk_thermal_bank_temperature, return -EAGAIN instead of -EACCESS on the first read of sensor that often are bogus values. This can avoid following warning on boot: thermal thermal_zone6: failed to read out thermal zone (-13) Signed-off-by: Michael Kao Signed-off-by: Hsin-Yi Wang Signed-off-by: Amjad Ouled-Ameur Reviewed-by: AngeloGioacchino Del Regno --- drivers/thermal/mtk_thermal.c | 99 ++++++++++++++++++++++++++++++++----------- 1 file changed, 74 insertions(+), 25 deletions(-) diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c index 3a5df1440822..b1f4d19edd4f 100644 --- a/drivers/thermal/mtk_thermal.c +++ b/drivers/thermal/mtk_thermal.c @@ -259,6 +259,11 @@ enum mtk_thermal_version { struct mtk_thermal; +struct mtk_thermal_zone { + struct mtk_thermal *mt; + int id; +}; + struct thermal_bank_cfg { unsigned int num_sensors; const int *sensors; @@ -307,6 +312,8 @@ struct mtk_thermal { const struct mtk_thermal_data *conf; struct mtk_thermal_bank banks[MAX_NUM_ZONES]; + + int (*raw_to_mcelsius)(struct mtk_thermal *mt, int sensno, s32 raw); }; /* MT8183 thermal sensor data */ @@ -709,6 +716,29 @@ static void mtk_thermal_put_bank(struct mtk_thermal_bank *bank) mutex_unlock(&mt->lock); } +static int _get_sensor_temp(struct mtk_thermal *mt, int id) +{ + u32 raw; + int temp; + + const struct mtk_thermal_data *conf = mt->conf; + + raw = readl(mt->thermal_base + conf->msr[id]); + + temp = mt->raw_to_mcelsius(mt, id, raw); + + /* + * The first read of a sensor often contains very high bogus + * temperature value. Filter these out so that the system does + * not immediately shut down. + */ + + if (temp > 200000) + return -EAGAIN; + else + return temp; +} + /** * mtk_thermal_bank_temperature - get the temperature of a bank * @bank: The bank @@ -721,26 +751,9 @@ static int mtk_thermal_bank_temperature(struct mtk_thermal_bank *bank) struct mtk_thermal *mt = bank->mt; const struct mtk_thermal_data *conf = mt->conf; int i, temp = INT_MIN, max = INT_MIN; - u32 raw; for (i = 0; i < conf->bank_data[bank->id].num_sensors; i++) { - raw = readl(mt->thermal_base + conf->msr[i]); - - if (mt->conf->version == MTK_THERMAL_V1) { - temp = raw_to_mcelsius_v1( - mt, conf->bank_data[bank->id].sensors[i], raw); - } else { - temp = raw_to_mcelsius_v2( - mt, conf->bank_data[bank->id].sensors[i], raw); - } - - /* - * The first read of a sensor often contains very high bogus - * temperature value. Filter these out so that the system does - * not immediately shut down. - */ - if (temp > 200000) - temp = 0; + temp = _get_sensor_temp(mt, i); if (temp > max) max = temp; @@ -749,9 +762,10 @@ static int mtk_thermal_bank_temperature(struct mtk_thermal_bank *bank) return max; } -static int mtk_read_temp(struct thermal_zone_device *tz, int *temperature) +static int mtk_read_temp(struct thermal_zone_device *tzdev, int *temperature) { - struct mtk_thermal *mt = tz->devdata; + struct mtk_thermal_zone *tz = tzdev->devdata; + struct mtk_thermal *mt = tz->mt; int i; int tempmax = INT_MIN; @@ -770,10 +784,28 @@ static int mtk_read_temp(struct thermal_zone_device *tz, int *temperature) return 0; } +static int mtk_read_sensor_temp(struct thermal_zone_device *tzdev, int *temperature) +{ + struct mtk_thermal_zone *tz = tzdev->devdata; + struct mtk_thermal *mt = tz->mt; + int id = tz->id - 1; + + if (id < 0) + return -EACCES; + + *temperature = _get_sensor_temp(mt, id); + + return 0; +} + static const struct thermal_zone_device_ops mtk_thermal_ops = { .get_temp = mtk_read_temp, }; +static const struct thermal_zone_device_ops mtk_thermal_sensor_ops = { + .get_temp = mtk_read_sensor_temp, +}; + static void mtk_thermal_init_bank(struct mtk_thermal *mt, int num, u32 apmixed_phys_base, u32 auxadc_phys_base, int ctrl_id) @@ -1072,6 +1104,7 @@ static int mtk_thermal_probe(struct platform_device *pdev) u64 auxadc_phys_base, apmixed_phys_base; struct thermal_zone_device *tzdev; void __iomem *apmixed_base, *auxadc_base; + struct mtk_thermal_zone *tz; mt = devm_kzalloc(&pdev->dev, sizeof(*mt), GFP_KERNEL); if (!mt) @@ -1150,6 +1183,9 @@ static int mtk_thermal_probe(struct platform_device *pdev) mtk_thermal_turn_on_buffer(mt, apmixed_base); + mt->raw_to_mcelsius = (mt->conf->version == MTK_THERMAL_V1) ? + raw_to_mcelsius_v1 : raw_to_mcelsius_v2; + if (mt->conf->version == MTK_THERMAL_V2) { mtk_thermal_release_periodic_ts(mt, auxadc_base); } @@ -1161,11 +1197,24 @@ static int mtk_thermal_probe(struct platform_device *pdev) platform_set_drvdata(pdev, mt); - tzdev = devm_thermal_of_zone_register(&pdev->dev, 0, mt, - &mtk_thermal_ops); - if (IS_ERR(tzdev)) { - ret = PTR_ERR(tzdev); - goto err_disable_clk_peri_therm; + for (i = 0; i < mt->conf->num_sensors + 1; i++) { + tz = devm_kmalloc(&pdev->dev, sizeof(*tz), GFP_KERNEL); + if (!tz) + return -ENOMEM; + + tz->mt = mt; + tz->id = i; + + tzdev = devm_thermal_of_zone_register(&pdev->dev, i, tz, (i == 0) ? + &mtk_thermal_ops : + &mtk_thermal_sensor_ops); + + if (IS_ERR(tzdev)) { + ret = PTR_ERR(tzdev); + if (ret == -ENODEV) + continue; + goto err_disable_clk_peri_therm; + } } ret = devm_thermal_add_hwmon_sysfs(tzdev);