From patchwork Tue Nov 22 19:01:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 13052658 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E1CC8C433FE for ; Tue, 22 Nov 2022 19:01:17 +0000 (UTC) Received: by smtp.kernel.org (Postfix) id 9A894C433C1; Tue, 22 Nov 2022 19:01:17 +0000 (UTC) Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.kernel.org (Postfix) with ESMTPS id 11C82C433D6; Tue, 22 Nov 2022 19:01:15 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 smtp.kernel.org 11C82C433D6 Authentication-Results: smtp.kernel.org; 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Tue, 22 Nov 2022 13:01:07 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE106.ent.ti.com (10.64.6.27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Tue, 22 Nov 2022 13:01:07 -0600 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 2AMJ17i4121996; Tue, 22 Nov 2022 13:01:07 -0600 Date: Tue, 22 Nov 2022 13:01:07 -0600 From: Nishanth Menon List-Id: To: Olof Johansson , Arnd Bergmann , , CC: , , Santosh Shilimkar , Tony Lindgren , Nishanth Menon Subject: [GIT PULL 1/4] ARM: keystone: TI Updates for v6.2 Message-ID: <20221122185650.nrh7s2g5obndj5vj@dental> MIME-Version: 1.0 Content-Disposition: inline User-Agent: NeoMutt/20171215 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Hi, Please find the keystone2 related changes for v6.2-rc1 below. --- The following changes since commit 9abf2313adc1ca1b6180c508c25f22f9395cc780: Linux 6.1-rc1 (2022-10-16 15:36:24 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git tags/ti-keystone-soc-for-v6.2 for you to fetch changes up to 7e8edf55cf729367afdb5e9a8b182f1d47897800: ARM: keystone: Replace platform SMP with PSCI (2022-10-27 20:12:27 -0500) ---------------------------------------------------------------- ARM: keystone: TI Updates for v6.2 Updates: * Switch over to standard PSCI for keystone2 platforms. ---------------------------------------------------------------- Andrew Davis (1): ARM: keystone: Replace platform SMP with PSCI arch/arm/mach-keystone/Makefile | 4 +--- arch/arm/mach-keystone/keystone.c | 2 -- arch/arm/mach-keystone/keystone.h | 5 ----- arch/arm/mach-keystone/platsmp.c | 41 --------------------------------------- arch/arm/mach-keystone/smc.S | 26 ------------------------- 5 files changed, 1 insertion(+), 77 deletions(-) delete mode 100644 arch/arm/mach-keystone/platsmp.c delete mode 100644 arch/arm/mach-keystone/smc.S From patchwork Tue Nov 22 19:01:36 2022 Content-Type: text/plain; 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Tue, 22 Nov 2022 13:01:36 -0600 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Tue, 22 Nov 2022 13:01:36 -0600 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 2AMJ1aQE031362; Tue, 22 Nov 2022 13:01:36 -0600 Date: Tue, 22 Nov 2022 13:01:36 -0600 From: Nishanth Menon List-Id: To: Olof Johansson , Arnd Bergmann , , CC: , , Santosh Shilimkar , Tony Lindgren , Nishanth Menon Subject: [GIT PULL 2/4] soc: ti: TI updates for v6.2 Message-ID: <20221122190136.avoej5i6zccbcds3@ammonia> MIME-Version: 1.0 Content-Disposition: inline User-Agent: NeoMutt/20171215 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Hi, Please find the TI SoC driver changes for v6.2-rc1 below. --- The following changes since commit 9abf2313adc1ca1b6180c508c25f22f9395cc780: Linux 6.1-rc1 (2022-10-16 15:36:24 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git tags/ti-driver-soc-for-v6.2 for you to fetch changes up to 14c7137ac750d034580a38edbaf807064ae64699: soc: ti: k3-socinfo: Add AM62Ax JTAG ID (2022-11-21 10:29:28 -0600) ---------------------------------------------------------------- TI SoC driver updates for v6.2 * Minor bugfixes for knav_qmss_queue, smartreflex drivers * API optimizations including using devm, bitmap apis to ti-sci, soc-info drivers * k3-ringacc and k3-socinfo can now be built as modules for certain distros that mandate such usage. * k3-socinfo can now detect AM62A SoCs. ---------------------------------------------------------------- Chen Jiahao (1): drivers: soc: ti: knav_qmss_queue: Mark knav_acc_firmwares as static Christophe JAILLET (3): firmware: ti_sci: Use the bitmap API to allocate bitmaps firmware: ti_sci: Use the non-atomic bitmap API when applicable firmware: ti_sci: Use devm_bitmap_zalloc when applicable Georgi Vlaev (1): firmware: ti_sci: Fix polled mode during system suspend Nicolas Frayer (2): soc: ti: k3-socinfo: Convert allocations to devm soc: ti: k3-socinfo: Add module build support Peter Ujfalusi (1): soc: ti: k3-ringacc: Allow the driver to be built as module Vignesh Raghavendra (1): soc: ti: k3-socinfo: Add AM62Ax JTAG ID Zhang Qilong (2): soc: ti: knav_qmss_queue: Fix PM disable depth imbalance in knav_queue_probe soc: ti: smartreflex: Fix PM disable depth imbalance in omap_sr_probe arch/arm64/Kconfig.platforms | 1 - drivers/firmware/ti_sci.c | 24 +++++++++----------- drivers/soc/ti/Kconfig | 5 +++-- drivers/soc/ti/k3-ringacc.c | 28 +++++++++++++++++++++-- drivers/soc/ti/k3-socinfo.c | 48 ++++++++++++++++++++++++++-------------- drivers/soc/ti/knav_qmss_queue.c | 3 ++- drivers/soc/ti/smartreflex.c | 1 + 7 files changed, 73 insertions(+), 37 deletions(-) From patchwork Tue Nov 22 19:02:09 2022 Content-Type: text/plain; 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Tue, 22 Nov 2022 13:02:09 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Tue, 22 Nov 2022 13:02:09 -0600 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 2AMJ29Sw122597; Tue, 22 Nov 2022 13:02:09 -0600 Date: Tue, 22 Nov 2022 13:02:09 -0600 From: Nishanth Menon List-Id: To: Olof Johansson , Arnd Bergmann , , CC: , , Vignesh Raghavendra , Nishanth Menon , Tero Kristo Subject: [GIT PULL 3/4] arm64: dts: TI K3 updates for v6.2 Message-ID: <20221122190209.jwfj56d6kxpxdkua@untreated> MIME-Version: 1.0 Content-Disposition: inline User-Agent: NeoMutt/20171215 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Hi, Please find the TI K3 SoC related devicetree changes for v6.2-rc1 below. --- The following changes since commit 9abf2313adc1ca1b6180c508c25f22f9395cc780: Linux 6.1-rc1 (2022-10-16 15:36:24 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git tags/ti-k3-dt-for-v6.2 for you to fetch changes up to fae14a1cb8dddb83bb923093aade3470a872f048: arm64: dts: ti: Add k3-j721e-beagleboneai64 (2022-11-21 15:49:45 -0600) ---------------------------------------------------------------- TI K3 devicetree updates for v6.2 New Features: J721e: * PWMs, BeagleBone AI-64 platform. J721s2: * Crypto AM65/AM62: * General purpose Timer support (system timer is still arch timer) Fixes: * Bunch of fixes in crypto usage and GPIO intr * Minor schema related fixes for audio, addressing etc. Cleanups: * Refactor of device tree to "disable" peripherals at SoC level for nodes that are un-usable without board level properties. TI K3 devices have large number of peripherals of which only a smaller subset is actually enabled on platforms. Switching to this approach enables two benefits: lesser confusion in creating board level devicetrees as only relevant pinned out device nodes need enabled, as well as smaller board device trees as most un-used peripherals don't need to explicitly disabled. ---------------------------------------------------------------- Andrew Davis (43): arm64: dts: ti: k3-am64: Enable UART nodes at the board level arm64: dts: ti: k3-am64: Enable I2C nodes at the board level arm64: dts: ti: k3-am64: Enable SPI nodes at the board level arm64: dts: ti: k3-am64: Enable EPWM nodes at the board level arm64: dts: ti: k3-am64: Enable ECAP nodes at the board level arm64: dts: ti: k3-am64: Enable PCIe nodes at the board level arm64: dts: ti: k3-am64: MDIO pinmux should belong to the MDIO node arm64: dts: ti: k3-am64: Enable MDIO nodes at the board level arm64: dts: ti: k3-am64: Enable MCAN nodes at the board level arm64: dts: ti: k3-am64: Enable GPMC and ELM nodes at the board level arm64: dts: ti: k3-am62: Enable UART nodes at the board level arm64: dts: ti: k3-am62: Enable I2C nodes at the board level arm64: dts: ti: k3-am62: Enable SPI nodes at the board level arm64: dts: ti: k3-am62: Enable EPWM nodes at the board level arm64: dts: ti: k3-am62: Enable ECAP nodes at the board level arm64: dts: ti: k3-am62: MDIO pinmux should belong to the MDIO node arm64: dts: ti: k3-am62: Enable MDIO nodes at the board level arm64: dts: ti: k3-am62: Enable MCAN nodes at the board level arm64: dts: ti: k3-am62: Enable SDHCI nodes at the board level arm64: dts: ti: k3-am62: Enable OSPI nodes at the board level arm64: dts: ti: k3-j721e: Enable UART nodes at the board level arm64: dts: ti: k3-j721e: Enable I2C nodes at the board level arm64: dts: ti: k3-j721e: Enable MCASP nodes at the board level arm64: dts: ti: k3-j721e: Enable MCAN nodes at the board level arm64: dts: ti: k3-j7200: Enable UART nodes at the board level arm64: dts: ti: k3-j7200: Enable I2C nodes at the board level arm64: dts: ti: k3-j721s2: Enable UART nodes at the board level arm64: dts: ti: k3-j721e: Enable Mailbox nodes at the board level arm64: dts: ti: k3-j7200: Enable Mailbox nodes at the board level arm64: dts: ti: k3-j721s2: Enable Mailbox nodes at the board level arm64: dts: ti: k3-j721s2: Enable MCAN nodes at the board level arm64: dts: ti: k3-j721s2: Enable I2C nodes at the board level arm64: dts: ti: k3-am65: Enable UART nodes at the board level arm64: dts: ti: k3-am65: Enable I2C nodes at the board level arm64: dts: ti: k3-am65: Enable SPI nodes at the board level arm64: dts: ti: k3-am65: Enable EPWM nodes at the board level arm64: dts: ti: k3-am65: Enable ECAP nodes at the board level arm64: dts: ti: k3-am65: MDIO pinmux should belong to the MDIO node arm64: dts: ti: k3-am65: Enable MDIO nodes at the board level arm64: dts: ti: k3-am65: Enable MCAN nodes at the board level arm64: dts: ti: k3-am65: Enable PCIe nodes at the board level arm64: dts: ti: k3-am65: Enable Mailbox nodes at the board level arm64: dts: ti: k3-am65: Enable McASP nodes at the board level Jayesh Choudhary (8): arm64: dts: ti: k3-am65-main: Drop dma-coherent in crypto node arm64: dts: ti: k3-j721e-main: Drop dma-coherent in crypto node arm64: dts: ti: k3-j7200-mcu-wakeup: Drop dma-coherent in crypto node arm64: dts: ti: j721e-common-proc-board: Fix sound node-name arm64: dts: ti: k3-am65-main: Drop RNG clock arm64: dts: ti: k3-j721e-main: Drop RNG clock arm64: dts: ti: k3-am64-main: Drop RNG clock arm64: dts: ti: k3-j721s2-main: Enable crypto accelerator Keerthy (1): arm64: dts: ti: k3-j721s2: Fix the interrupt ranges property for main & wkup gpio intr Krzysztof Kozlowski (1): arm64: dts: ti: Trim addresses to 8 digits Matt Ranostay (1): arm64: dts: ti: Rename clock-names adc_tsc_fck to fck Rahul T R (1): arm64: dts: ti: k3-j721e-sk: Add pinmux for RPi Header Robert Nelson (2): dt-bindings: arm: ti: Add bindings for BeagleBone AI-64 arm64: dts: ti: Add k3-j721e-beagleboneai64 Tony Lindgren (3): arm64: dts: ti: k3-am65: Configure pinctrl for timer IO pads arm64: dts: ti: k3-am65: Add general purpose timers for am65 arm64: dts: ti: k3-am62: Add general purpose timers for am62 Vijay Pothukuchi (1): arm64: dts: ti: k3-j721e-main: Add dts nodes for EHRPWMs Documentation/devicetree/bindings/arm/ti/k3.yaml | 1 + arch/arm64/boot/dts/ti/Makefile | 1 + arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 122 +++ arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi | 49 + arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi | 4 +- arch/arm64/boot/dts/ti/k3-am625-sk.dts | 81 +- arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi | 2 +- arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 44 +- arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi | 6 + arch/arm64/boot/dts/ti/k3-am642-evm.dts | 119 +-- arch/arm64/boot/dts/ti/k3-am642-sk.dts | 142 +-- arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi | 101 +- arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 207 +++- arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi | 85 +- arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi | 2 + .../dts/ti/k3-am6528-iot2050-basic-common.dtsi | 1 + arch/arm64/boot/dts/ti/k3-am654-base-board.dts | 113 +-- .../dts/ti/k3-am6548-iot2050-advanced-common.dtsi | 4 - .../boot/dts/ti/k3-j7200-common-proc-board.dts | 48 +- arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 29 + arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 8 +- arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 42 +- arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts | 1055 ++++++++++++++++++++ .../boot/dts/ti/k3-j721e-common-proc-board.dts | 143 +-- arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 125 ++- arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 11 +- arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 205 ++-- arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi | 33 +- .../boot/dts/ti/k3-j721s2-common-proc-board.dts | 132 +-- arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 79 +- arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 9 +- arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi | 98 +- 32 files changed, 2007 insertions(+), 1094 deletions(-) create mode 100644 arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts From patchwork Tue Nov 22 19:02:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 13052675 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D2FFEC4332F for ; Tue, 22 Nov 2022 19:02:44 +0000 (UTC) Received: by smtp.kernel.org (Postfix) id B5EB8C433D7; Tue, 22 Nov 2022 19:02:44 +0000 (UTC) Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.kernel.org (Postfix) with ESMTPS id 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User-Agent: NeoMutt/20171215 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Hi, Please find the TI K3 SoC related defconfig changes for v6.2-rc1 below. --- The following changes since commit 9abf2313adc1ca1b6180c508c25f22f9395cc780: Linux 6.1-rc1 (2022-10-16 15:36:24 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git tags/ti-k3-config-for-v6.2 for you to fetch changes up to 9f7e3ed268520f4d539c03d4d48a604a9658ba37: arm64: defconfig: Enable TI_TFP410 DVI bridge (2022-11-03 21:44:23 -0500) ---------------------------------------------------------------- arm64: TI K3 defconfig updates for v6.2 * Enable TI_TFP410 DVI bridge as module for J721e-sk platform ---------------------------------------------------------------- Rahul T R (1): arm64: defconfig: Enable TI_TFP410 DVI bridge arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+)