From patchwork Mon Nov 28 15:23:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Ceresoli X-Patchwork-Id: 13057664 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8B933C4321E for ; Mon, 28 Nov 2022 15:24:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231778AbiK1PYl (ORCPT ); Mon, 28 Nov 2022 10:24:41 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33480 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231852AbiK1PY2 (ORCPT ); Mon, 28 Nov 2022 10:24:28 -0500 Received: from relay11.mail.gandi.net (relay11.mail.gandi.net [IPv6:2001:4b98:dc4:8::231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 014CA20367; Mon, 28 Nov 2022 07:23:57 -0800 (PST) Received: from booty.fritz.box (unknown [77.244.183.192]) (Authenticated sender: luca.ceresoli@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id 3E8A7100002; Mon, 28 Nov 2022 15:23:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1669649036; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ZKHAg1cVHEhagz6zCtsb8zjr1ngIs6Y68PTvy+DOXVk=; b=BeUo6hYVFhdXTHv65hQpc0YqNxqpX68WHeUq/wdKu3YJ/al/Nv9Y9OFhG8e8ro21iGjJyp UvgU29eXk4d0z5JOT+dWT36nwdSEVLhd5OdIwba+FnWRmsuDdSTrrNcrf5m0IAEWJItPOV 65LtlT72/Hm7oaYq5mClLm5Zq7GPdFyy9ad5LWL1CSQNhG3rqI2jk2RVVrCXQydELdmYui LTRcotkGB2a4bN3WWgw7tF77GA4yMB3Fh5gXqh8HiMrV7bUV26+thagCmk3S30/CWyKQRm 0qySvMNWAVodKy8LwQ7r1ZuFk1qPncpqPrFHCMPJY5Xp72oB47+1fQFif6m6iw== From: Luca Ceresoli To: David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , Mauro Carvalho Chehab , Greg Kroah-Hartman , Dmitry Osipenko , Hans Verkuil Cc: Luca Ceresoli , linux-media@vger.kernel.org, linux-tegra@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Thomas Petazzoni , Paul Kocialkowski , Richard Leitner Subject: [PATCH v2 01/21] dt-bindings: display: tegra: add Tegra20 VIP Date: Mon, 28 Nov 2022 16:23:16 +0100 Message-Id: <20221128152336.133953-2-luca.ceresoli@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221128152336.133953-1-luca.ceresoli@bootlin.com> References: <20221128152336.133953-1-luca.ceresoli@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org VIP is the parallel video capture component within the video input subsystem of Tegra20 (and other Tegra chips, apparently). Signed-off-by: Luca Ceresoli --- Changed in v2 (suggested by Krzysztof Kozlowski): - remove redundant "bindings" from subject line - remove $nodename - add channel@0 description - add reg: const: 0 --- .../display/tegra/nvidia,tegra20-vip.yaml | 63 +++++++++++++++++++ MAINTAINERS | 7 +++ 2 files changed, 70 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vip.yaml diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vip.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vip.yaml new file mode 100644 index 000000000000..44be2e16c9b4 --- /dev/null +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vip.yaml @@ -0,0 +1,63 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-vip.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NVIDIA Tegra VIP (parallel video capture) controller + +maintainers: + - Luca Ceresoli + +properties: + compatible: + enum: + - nvidia,tegra20-vip + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + channel@0: + description: parallel video capture interface for the VI + type: object + + properties: + reg: + const: 0 + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: + Port receiving the video stream from the sensor + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: + Port sending the video stream to the VI + + required: + - port@0 + - port@1 + + additionalProperties: false + + required: + - reg + - ports + +unevaluatedProperties: false + +required: + - compatible + - "#address-cells" + - "#size-cells" + - channel@0 + +# see nvidia,tegra20-vi.yaml for an example diff --git a/MAINTAINERS b/MAINTAINERS index 69565ac0c224..92c762f85f17 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -20315,6 +20315,13 @@ S: Maintained F: Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.yaml F: drivers/staging/media/tegra-video/ +TEGRA VIDEO DRIVER FOR TEGRA20 VIP (PARALLEL VIDEO CAPTURE) +M: Luca Ceresoli +L: linux-media@vger.kernel.org +L: linux-tegra@vger.kernel.org +S: Maintained +F: Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vip.yaml + TEGRA XUSB PADCTL DRIVER M: JC Kuo S: Supported From patchwork Mon Nov 28 15:23:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Ceresoli X-Patchwork-Id: 13057665 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 25B38C433FE for ; Mon, 28 Nov 2022 15:24:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232065AbiK1PYz (ORCPT ); Mon, 28 Nov 2022 10:24:55 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33624 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232056AbiK1PYc (ORCPT ); Mon, 28 Nov 2022 10:24:32 -0500 Received: from relay11.mail.gandi.net (relay11.mail.gandi.net [IPv6:2001:4b98:dc4:8::231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 921E223BDE; Mon, 28 Nov 2022 07:24:02 -0800 (PST) Received: from booty.fritz.box (unknown [77.244.183.192]) (Authenticated sender: luca.ceresoli@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id CD248100004; Mon, 28 Nov 2022 15:23:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1669649041; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=xyo/FmBThIW23NziE2w8WS8gyVQzTbmEFzYd5s8d+Vs=; b=VfmhFJx4tj0FHpwNIu1sXRL0zxnfhpXFFMKmdYkyVUisG4JjvSRapvWfmkxtPvSEN41fM/ UFprOsV0J+7Tiv9lYHxDn/5/iJqsJ92c74U7gYZj6yTd5nHS5vY3Kx8fM9TXcUYP5JnuGj Tu6IVyjSJJX0Qna8QrWJb4C6pgUeAuIqxYUlRKklf3+7DXDQIeRhJjI4gjYG/CMZxc1gzc 47QbYNURSsQogl4YBg+d/DumyLAzjQs/KliwZEKX9RUWlMmUMgf0D4bldByEazzBIPbBPT nOLkhJ6i+ss3mLC8wlenZbH0lam30NeaiO1fdyo+yBO9u0tbClNUoCkS76kJwg== From: Luca Ceresoli To: David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , Mauro Carvalho Chehab , Greg Kroah-Hartman , Dmitry Osipenko , Hans Verkuil Cc: Luca Ceresoli , linux-media@vger.kernel.org, linux-tegra@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Thomas Petazzoni , Paul Kocialkowski , Richard Leitner , Krzysztof Kozlowski Subject: [PATCH v2 02/21] dt-bindings: display: tegra: vi: add 'vip' property and example Date: Mon, 28 Nov 2022 16:23:17 +0100 Message-Id: <20221128152336.133953-3-luca.ceresoli@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221128152336.133953-1-luca.ceresoli@bootlin.com> References: <20221128152336.133953-1-luca.ceresoli@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The Tegra20 VI peripheral can receive parallel input from the VIP parallel input module. Add it to the allowed properties and augment the existing nvidia,tegra20-vi example to show a 'vip' property. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Luca Ceresoli --- Changed in v2 (suggested by Krzysztof Kozlowski): - rename "i2c3" -> "ic2" - add review tag --- .../display/tegra/nvidia,tegra20-vi.yaml | 68 +++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 69 insertions(+) diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml index 782a4b10150a..5b5583c2b562 100644 --- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml @@ -74,6 +74,22 @@ properties: avdd-dsi-csi-supply: description: DSI/CSI power supply. Must supply 1.2 V. + vip: + $ref: /schemas/display/tegra/nvidia,tegra20-vip.yaml + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: + Input from the VIP (parallel input capture) module + + properties: + endpoint: + $ref: /schemas/graph.yaml#/properties/endpoint + patternProperties: "^csi@[0-9a-f]+$": type: object @@ -109,6 +125,22 @@ examples: #include #include + i2c { + #address-cells = <1>; + #size-cells = <0>; + camera@48 { + compatible = "aptina,mt9v111"; + reg = <0x48>; + clocks = <&camera_clk>; + + port { + mt9v111_out: endpoint { + remote-endpoint = <&vi_vip_in>; + }; + }; + }; + }; + vi@54080000 { compatible = "nvidia,tegra20-vi"; reg = <0x54080000 0x00040000>; @@ -116,6 +148,42 @@ examples: clocks = <&tegra_car TEGRA20_CLK_VI>; resets = <&tegra_car 100>; reset-names = "vi"; + + vip { + compatible = "nvidia,tegra20-vip"; + #address-cells = <1>; + #size-cells = <0>; + channel@0 { + reg = <0>; + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + vi_vip_in: endpoint { + remote-endpoint = <&mt9v111_out>; + }; + }; + port@1 { + reg = <1>; + vi_vip_out: endpoint { + remote-endpoint = <&vi_in>; + }; + }; + }; + }; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + vi_in: endpoint { + remote-endpoint = <&vi_vip_out>; + }; + }; + }; }; - | diff --git a/MAINTAINERS b/MAINTAINERS index 92c762f85f17..0c97ce22735d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -20320,6 +20320,7 @@ M: Luca Ceresoli L: linux-media@vger.kernel.org L: linux-tegra@vger.kernel.org S: Maintained +F: Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml F: Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vip.yaml TEGRA XUSB PADCTL DRIVER From patchwork Mon Nov 28 15:23:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Ceresoli X-Patchwork-Id: 13057666 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A91F2C43217 for ; Mon, 28 Nov 2022 15:25:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232136AbiK1PZQ (ORCPT ); Mon, 28 Nov 2022 10:25:16 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33540 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231472AbiK1PYm (ORCPT ); Mon, 28 Nov 2022 10:24:42 -0500 Received: from relay11.mail.gandi.net (relay11.mail.gandi.net [217.70.178.231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 73828248E1; Mon, 28 Nov 2022 07:24:09 -0800 (PST) Received: from booty.fritz.box (unknown [77.244.183.192]) (Authenticated sender: luca.ceresoli@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id B9D7A10000B; Mon, 28 Nov 2022 15:24:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1669649048; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=bPx4tBfw7h+gvsEPNb76cRKwFVYUpeaYbykLmUstGkw=; b=kjQw2nZmpzWvV47Q8nEaUsV0ORj3ynAsAhaeVn+fffVJ2xInY+ahcLjklYKWP+hF7RuisI CB4AUefXpTAAzCit4sk/AbzyWf00e1a4j1um275MAEqGBCAymqfRco67WICoBka+cC+5wt c0JQaszFd9ldtCVXBqDh/KUxvOZdhcaPko727MLSxCDuj6NoJGTsMItga8oJfqm8pckKZW ANisFPuuKgsaUwNie0JZe7BfY1XeyEoo2p0hW8nafFS0n5CFNgDzEGacl+5npR0ecaoaq3 wPhktVbNiTh00I72kN+pgJw1e0BCMjaI8mwCJwfec5fipk4O/iSPh7PjwrFwIg== From: Luca Ceresoli To: David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , Mauro Carvalho Chehab , Greg Kroah-Hartman , Dmitry Osipenko , Hans Verkuil Cc: Luca Ceresoli , linux-media@vger.kernel.org, linux-tegra@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Thomas Petazzoni , Paul Kocialkowski , Richard Leitner Subject: [PATCH v2 03/21] staging: media: tegra-video: fix .vidioc_enum_fmt_vid_cap to return all formats Date: Mon, 28 Nov 2022 16:23:18 +0100 Message-Id: <20221128152336.133953-4-luca.ceresoli@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221128152336.133953-1-luca.ceresoli@bootlin.com> References: <20221128152336.133953-1-luca.ceresoli@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The .vidioc_enum_fmt_vid_cap (called tegra_channel_enum_format() here) should return all the supported formats. Instead the current implementation computes the intersection between the formats it supports and those supported by the first subdev in the stream (typically the image sensor). Remove all the unnecessary logic that supports such algorithm. In order to do this, also change the Tegra210 CSI TPG formats from the current open-coded implementation in vi_tpg_fmts_bitmap_init() to a const array in tegra210.c, just like the one that describes the regular formats. Fixes: 3d8a97eabef0 ("media: tegra-video: Add Tegra210 Video input driver") Signed-off-by: Luca Ceresoli --- No changes in v2 --- drivers/staging/media/tegra-video/tegra210.c | 7 +- drivers/staging/media/tegra-video/vi.c | 103 +------------------ drivers/staging/media/tegra-video/vi.h | 4 - 3 files changed, 9 insertions(+), 105 deletions(-) diff --git a/drivers/staging/media/tegra-video/tegra210.c b/drivers/staging/media/tegra-video/tegra210.c index d58370a84737..eb19dd5107ce 100644 --- a/drivers/staging/media/tegra-video/tegra210.c +++ b/drivers/staging/media/tegra-video/tegra210.c @@ -683,8 +683,12 @@ enum tegra210_image_format { V4L2_PIX_FMT_##FOURCC, \ } -/* Tegra210 supported video formats */ static const struct tegra_video_format tegra210_video_formats[] = { +#if IS_ENABLED(CONFIG_VIDEO_TEGRA_TPG) + /* VI only support 2 formats in TPG mode */ + TEGRA210_VIDEO_FMT(RAW10, 10, SRGGB10_1X10, 2, T_R16_I, SRGGB10), + TEGRA210_VIDEO_FMT(RGB888, 24, RGB888_1X32_PADHI, 4, T_A8B8G8R8, RGBX32), +#else /* RAW 8 */ TEGRA210_VIDEO_FMT(RAW8, 8, SRGGB8_1X8, 1, T_L8, SRGGB8), TEGRA210_VIDEO_FMT(RAW8, 8, SGRBG8_1X8, 1, T_L8, SGRBG8), @@ -714,6 +718,7 @@ static const struct tegra_video_format tegra210_video_formats[] = { TEGRA210_VIDEO_FMT(YUV422_8, 16, VYUY8_2X8, 2, T_V8_Y8__U8_Y8, YUYV), TEGRA210_VIDEO_FMT(YUV422_8, 16, YUYV8_2X8, 2, T_Y8_U8__Y8_V8, VYUY), TEGRA210_VIDEO_FMT(YUV422_8, 16, YVYU8_2X8, 2, T_Y8_V8__Y8_U8, UYVY), +#endif }; /* Tegra210 VI operations */ diff --git a/drivers/staging/media/tegra-video/vi.c b/drivers/staging/media/tegra-video/vi.c index 9d46a36cc014..0fe3c7f6d234 100644 --- a/drivers/staging/media/tegra-video/vi.c +++ b/drivers/staging/media/tegra-video/vi.c @@ -3,7 +3,6 @@ * Copyright (C) 2020 NVIDIA CORPORATION. All rights reserved. */ -#include #include #include #include @@ -73,15 +72,6 @@ static int tegra_get_format_idx_by_code(struct tegra_vi *vi, return -1; } -static u32 tegra_get_format_fourcc_by_idx(struct tegra_vi *vi, - unsigned int index) -{ - if (index >= vi->soc->nformats) - return -EINVAL; - - return vi->soc->video_formats[index].fourcc; -} - static const struct tegra_video_format * tegra_get_format_by_fourcc(struct tegra_vi *vi, u32 fourcc) { @@ -430,19 +420,12 @@ static int tegra_channel_enum_format(struct file *file, void *fh, struct v4l2_fmtdesc *f) { struct tegra_vi_channel *chan = video_drvdata(file); - unsigned int index = 0, i; - unsigned long *fmts_bitmap = chan->tpg_fmts_bitmap; - - if (!IS_ENABLED(CONFIG_VIDEO_TEGRA_TPG)) - fmts_bitmap = chan->fmts_bitmap; + const struct tegra_vi_soc *soc = chan->vi->soc; - if (f->index >= bitmap_weight(fmts_bitmap, MAX_FORMAT_NUM)) + if (f->index >= soc->nformats) return -EINVAL; - for (i = 0; i < f->index + 1; i++, index++) - index = find_next_bit(fmts_bitmap, MAX_FORMAT_NUM, index); - - f->pixelformat = tegra_get_format_fourcc_by_idx(chan->vi, index - 1); + f->pixelformat = soc->video_formats[f->index].fourcc; return 0; } @@ -1059,78 +1042,6 @@ static int tegra_channel_setup_ctrl_handler(struct tegra_vi_channel *chan) return 0; } -/* VI only support 2 formats in TPG mode */ -static void vi_tpg_fmts_bitmap_init(struct tegra_vi_channel *chan) -{ - int index; - - bitmap_zero(chan->tpg_fmts_bitmap, MAX_FORMAT_NUM); - - index = tegra_get_format_idx_by_code(chan->vi, - MEDIA_BUS_FMT_SRGGB10_1X10, 0); - bitmap_set(chan->tpg_fmts_bitmap, index, 1); - - index = tegra_get_format_idx_by_code(chan->vi, - MEDIA_BUS_FMT_RGB888_1X32_PADHI, - 0); - bitmap_set(chan->tpg_fmts_bitmap, index, 1); -} - -static int vi_fmts_bitmap_init(struct tegra_vi_channel *chan) -{ - int index, ret, match_code = 0; - struct v4l2_subdev *subdev; - struct v4l2_subdev_mbus_code_enum code = { - .which = V4L2_SUBDEV_FORMAT_ACTIVE, - }; - - bitmap_zero(chan->fmts_bitmap, MAX_FORMAT_NUM); - - /* - * Set the bitmap bits based on all the matched formats between the - * available media bus formats of sub-device and the pre-defined Tegra - * supported video formats. - */ - subdev = tegra_channel_get_remote_source_subdev(chan); - while (1) { - ret = v4l2_subdev_call(subdev, pad, enum_mbus_code, - NULL, &code); - if (ret < 0) - break; - - index = tegra_get_format_idx_by_code(chan->vi, code.code, 0); - while (index >= 0) { - bitmap_set(chan->fmts_bitmap, index, 1); - if (!match_code) - match_code = code.code; - /* look for other formats with same mbus code */ - index = tegra_get_format_idx_by_code(chan->vi, - code.code, - index + 1); - } - - code.index++; - } - - /* - * Set the bitmap bit corresponding to default tegra video format if - * there are no matched formats. - */ - if (!match_code) { - match_code = tegra_default_format.code; - index = tegra_get_format_idx_by_code(chan->vi, match_code, 0); - if (WARN_ON(index < 0)) - return -EINVAL; - - bitmap_set(chan->fmts_bitmap, index, 1); - } - - /* initialize channel format to the sub-device active format */ - tegra_channel_set_subdev_active_fmt(chan); - - return 0; -} - static void tegra_channel_host1x_syncpts_free(struct tegra_vi_channel *chan) { int i; @@ -1501,7 +1412,6 @@ int tegra_v4l2_nodes_setup_tpg(struct tegra_video_device *vid) goto cleanup; v4l2_set_subdev_hostdata(&csi_chan->subdev, vi_chan); - vi_tpg_fmts_bitmap_init(vi_chan); csi_chan = list_next_entry(csi_chan, list); } @@ -1721,13 +1631,6 @@ static int tegra_vi_graph_notify_complete(struct v4l2_async_notifier *notifier) goto unregister_video; } - ret = vi_fmts_bitmap_init(chan); - if (ret < 0) { - dev_err(vi->dev, - "failed to initialize formats bitmap: %d\n", ret); - goto unregister_video; - } - subdev = tegra_channel_get_remote_csi_subdev(chan); if (!subdev) { ret = -ENODEV; diff --git a/drivers/staging/media/tegra-video/vi.h b/drivers/staging/media/tegra-video/vi.h index a68e2c02c7b0..183796c8a46a 100644 --- a/drivers/staging/media/tegra-video/vi.h +++ b/drivers/staging/media/tegra-video/vi.h @@ -163,8 +163,6 @@ struct tegra_vi_graph_entity { * * @ctrl_handler: V4L2 control handler of this video channel * @syncpt_timeout_retry: syncpt timeout retry count for the capture - * @fmts_bitmap: a bitmap for supported formats matching v4l2 subdev formats - * @tpg_fmts_bitmap: a bitmap for supported TPG formats * @pg_mode: test pattern generator mode (disabled/direct/patch) * @notifier: V4L2 asynchronous subdevs notifier */ @@ -205,8 +203,6 @@ struct tegra_vi_channel { struct v4l2_ctrl_handler ctrl_handler; unsigned int syncpt_timeout_retry; - DECLARE_BITMAP(fmts_bitmap, MAX_FORMAT_NUM); - DECLARE_BITMAP(tpg_fmts_bitmap, MAX_FORMAT_NUM); enum tegra_vi_pg_mode pg_mode; struct v4l2_async_notifier notifier; From patchwork Mon Nov 28 15:23:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Ceresoli X-Patchwork-Id: 13057667 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E62F1C433FE for ; Mon, 28 Nov 2022 15:25:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232152AbiK1PZ3 (ORCPT ); Mon, 28 Nov 2022 10:25:29 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60260 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231796AbiK1PY5 (ORCPT ); Mon, 28 Nov 2022 10:24:57 -0500 Received: from relay11.mail.gandi.net (relay11.mail.gandi.net [217.70.178.231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AF9482495A; Mon, 28 Nov 2022 07:24:15 -0800 (PST) Received: from booty.fritz.box (unknown [77.244.183.192]) (Authenticated sender: luca.ceresoli@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id F310610000C; Mon, 28 Nov 2022 15:24:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1669649054; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=gl15CMrLV9vsbPaK+roIAuV2iVcUDUEVC8Co3Fa64Tw=; b=JcaxoD+jtOTUia4RUNIlp0lGRono/OPNcAE/+CmDa0K8UH9gd4/czBa8FoaqIrxOYIOr2z wiAT/jQLxCpJu1VEGRX1OrPUm/8B3tjj7/WcxMPt9B+ZdUW00EqVlLbKQBPjNPsuZ7P81c Dx+eCxNOMBHU9gITrAZmHUc3tMC9tFzx16mjST6tt+1q8NHwKbwHH0+ZE9tfC2dI8Tl6zv Sm0A7g3cvPcRifrggvZq8rf+56dLA7xixfOagpR9YHS2wEs9z6H6VOtq5Cqigx3d9jRoX9 zVGD8QsPHPTOfEoqTIhnfTiP1b83YxBojgnp8hL4L5XlqsNabpBV63zkhU6+ew== From: Luca Ceresoli To: David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , Mauro Carvalho Chehab , Greg Kroah-Hartman , Dmitry Osipenko , Hans Verkuil Cc: Luca Ceresoli , linux-media@vger.kernel.org, linux-tegra@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Thomas Petazzoni , Paul Kocialkowski , Richard Leitner Subject: [PATCH v2 04/21] staging: media: tegra-video: improve documentation of tegra_video_format fields Date: Mon, 28 Nov 2022 16:23:19 +0100 Message-Id: <20221128152336.133953-5-luca.ceresoli@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221128152336.133953-1-luca.ceresoli@bootlin.com> References: <20221128152336.133953-1-luca.ceresoli@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Some fields are irrelevant for Tegra20/VIP. Add a note to clarify that. Signed-off-by: Luca Ceresoli --- No changes in v2 --- drivers/staging/media/tegra-video/vi.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/staging/media/tegra-video/vi.h b/drivers/staging/media/tegra-video/vi.h index 183796c8a46a..dd35c3ac992b 100644 --- a/drivers/staging/media/tegra-video/vi.h +++ b/drivers/staging/media/tegra-video/vi.h @@ -256,11 +256,11 @@ enum tegra_image_dt { /** * struct tegra_video_format - Tegra video format description * - * @img_dt: image data type - * @bit_width: format width in bits per component + * @img_dt: MIPI CSI-2 data type (for CSI-2 only) + * @bit_width: format width in bits per component (for CSI/Tegra210 only) * @code: media bus format code * @bpp: bytes per pixel (when stored in memory) - * @img_fmt: image format + * @img_fmt: image format (for CSI/Tegra210 only) * @fourcc: V4L2 pixel format FCC identifier */ struct tegra_video_format { From patchwork Mon Nov 28 15:23:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Ceresoli X-Patchwork-Id: 13057668 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 297A4C4321E for ; Mon, 28 Nov 2022 15:25:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232004AbiK1PZu (ORCPT ); Mon, 28 Nov 2022 10:25:50 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60310 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232003AbiK1PZM (ORCPT ); Mon, 28 Nov 2022 10:25:12 -0500 Received: from relay11.mail.gandi.net (relay11.mail.gandi.net [217.70.178.231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8121324BD3; Mon, 28 Nov 2022 07:24:20 -0800 (PST) Received: from booty.fritz.box (unknown [77.244.183.192]) (Authenticated sender: luca.ceresoli@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id B75B8100006; Mon, 28 Nov 2022 15:24:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1669649059; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=RoMDwf3xqKYueuSpR2HfCTCREn/qoJjq+QmVjrebPsE=; b=mmGQEmMV8d3XHqD1H8VmQoYs68HeMrY7q/TucHaOrkeVwbWWr/khMJDOoSi+pD5sJDbBT5 hg4De2APQO1tZN+xoYlh8NfOiTLG9oC2MmhWErTzfsX4olF9nF9mq8xDaOAxCsjJ811LeM 5HCr/+tVzMRbppr4b6GaD+R9lZzv2wX/pliD/wevIASIoICmbzV8U0Jj9uISuwgbITKDST 1OpS25XYCScDlSlU4D8rRGmey0+WUdnYPO2FXKLV6nZgMd28gR96bz1+5MhZMcZ1Gf60rZ 65K7EqsJDsGnn0K3oErzgxy79eG54sAwGiOEkG/3shbrzTAZbVGoaElaXBg/pg== From: Luca Ceresoli To: David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , Mauro Carvalho Chehab , Greg Kroah-Hartman , Dmitry Osipenko , Hans Verkuil Cc: Luca Ceresoli , linux-media@vger.kernel.org, linux-tegra@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Thomas Petazzoni , Paul Kocialkowski , Richard Leitner Subject: [PATCH v2 05/21] staging: media: tegra-video: document tegra_channel_get_remote_source_subdev Date: Mon, 28 Nov 2022 16:23:20 +0100 Message-Id: <20221128152336.133953-6-luca.ceresoli@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221128152336.133953-1-luca.ceresoli@bootlin.com> References: <20221128152336.133953-1-luca.ceresoli@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Clarify what this function does. Signed-off-by: Luca Ceresoli --- No changes in v2 --- drivers/staging/media/tegra-video/vi.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/staging/media/tegra-video/vi.c b/drivers/staging/media/tegra-video/vi.c index 0fe3c7f6d234..8a7512ce2273 100644 --- a/drivers/staging/media/tegra-video/vi.c +++ b/drivers/staging/media/tegra-video/vi.c @@ -154,6 +154,9 @@ tegra_channel_get_remote_csi_subdev(struct tegra_vi_channel *chan) return media_entity_to_v4l2_subdev(pad->entity); } +/* + * Walk up the chain until the initial source (e.g. image sensor) + */ struct v4l2_subdev * tegra_channel_get_remote_source_subdev(struct tegra_vi_channel *chan) { From patchwork Mon Nov 28 15:23:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Ceresoli X-Patchwork-Id: 13057669 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 25D1FC43217 for ; Mon, 28 Nov 2022 15:26:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232062AbiK1P0X (ORCPT ); Mon, 28 Nov 2022 10:26:23 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60816 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232046AbiK1P0C (ORCPT ); Mon, 28 Nov 2022 10:26:02 -0500 Received: from relay11.mail.gandi.net (relay11.mail.gandi.net [217.70.178.231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F2F1CBCAA; Mon, 28 Nov 2022 07:24:36 -0800 (PST) Received: from booty.fritz.box (unknown [77.244.183.192]) (Authenticated sender: luca.ceresoli@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id 5FD1910000F; Mon, 28 Nov 2022 15:24:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1669649075; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=xURqg5VhnwpWjIFhJeVPGCVtr+haaQvdgkjCNGPG9f8=; b=jVYFNWHq+sJjS7uz59THV4bh6mQnodC7z6V/HeqtYVk19/PWhr3CfgtbuE5/Gk80yr9NWX Xh9ypfvpZdVy/j8Ms/UgNsXY/cG09cRREuwahll5Xi2WWNGYfLu8G6ubPcCgmlYpjvandq yp0XJqQtjKfBjxbyU9gAoA12KjT8GAfX4Ucc1/gx9Pgb9367tx4P850y23//ElUCLmvoj4 LQwjVeS/KbIsf/3RI+dMQsM4s3lrs3bGP7kRLF5UpnL2mTQk4ruE3g2btcOOcsJIwnKMSe 7f7x9X7aYHjRaPwvHhweyBnyfsgx4P3stT2BijC7AwZP2mUxZZ7bXym8/sxkMg== From: Luca Ceresoli To: David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , Mauro Carvalho Chehab , Greg Kroah-Hartman , Dmitry Osipenko , Hans Verkuil Cc: Luca Ceresoli , linux-media@vger.kernel.org, linux-tegra@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Thomas Petazzoni , Paul Kocialkowski , Richard Leitner Subject: [PATCH v2 06/21] staging: media: tegra-video: fix typos in comment Date: Mon, 28 Nov 2022 16:23:21 +0100 Message-Id: <20221128152336.133953-7-luca.ceresoli@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221128152336.133953-1-luca.ceresoli@bootlin.com> References: <20221128152336.133953-1-luca.ceresoli@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Add "skip" in "so we can *skip* the current channel" or it doesn't make sense. Also add articles where appropriate to fix English grammar. Signed-off-by: Luca Ceresoli --- No changes in v2 --- drivers/staging/media/tegra-video/vi.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/staging/media/tegra-video/vi.c b/drivers/staging/media/tegra-video/vi.c index 8a7512ce2273..b24b9353077f 100644 --- a/drivers/staging/media/tegra-video/vi.c +++ b/drivers/staging/media/tegra-video/vi.c @@ -1762,10 +1762,10 @@ static int tegra_vi_graph_init(struct tegra_vi *vi) * Walk the links to parse the full graph. Each channel will have * one endpoint of the composite node. Start by parsing the * composite node and parse the remote entities in turn. - * Each channel will register v4l2 async notifier to make the graph - * independent between the channels so we can the current channel + * Each channel will register a v4l2 async notifier to make the graph + * independent between the channels so we can skip the current channel * in case of something wrong during graph parsing and continue with - * next channels. + * the next channels. */ list_for_each_entry(chan, &vi->vi_chans, list) { struct fwnode_handle *ep, *remote; From patchwork Mon Nov 28 15:23:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Ceresoli X-Patchwork-Id: 13057670 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 91FF3C433FE for ; Mon, 28 Nov 2022 15:26:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231600AbiK1P01 (ORCPT ); Mon, 28 Nov 2022 10:26:27 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33462 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230386AbiK1P0G (ORCPT ); Mon, 28 Nov 2022 10:26:06 -0500 Received: from relay11.mail.gandi.net (relay11.mail.gandi.net [217.70.178.231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4F541252A2; Mon, 28 Nov 2022 07:24:45 -0800 (PST) Received: from booty.fritz.box (unknown [77.244.183.192]) (Authenticated sender: luca.ceresoli@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id 8628B100004; Mon, 28 Nov 2022 15:24:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1669649083; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=J271X6sQL9QKZKy2Whlnvafa/eus3qhzYlvnxAfUjx4=; b=KlaNEP9tZOiHw7nNF+L1AK3syIXiKdGT3edGbAZ+kCUMKS/rqgSLt/hIogg5K/uU0Iv5NT KPe8LTa4lWCiiQsyoa3CejGA6Uis0mwlWlPgt8SMwY4DSWYhP99wI4NntEwVzGTTsNQwjU FEx4S+LxBDuPHqPCHiJHYnVxsTS7ff8AM+2X4njaLzTeHWtfetV8Gazgwyh+/FY0ToIAc2 y6cQCKMAZh5v6Wz1Ta63j9LC3E94MMjTGm7uUHdtnZ1lLWHuFJg6KORGYZBJzsmBqaeoVd /sK9Kf7el1iRv+bDEqXJVJ01mhbB5XjdsaEizz7XeTBzfWUzXVfjgZEO+plgpA== From: Luca Ceresoli To: David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , Mauro Carvalho Chehab , Greg Kroah-Hartman , Dmitry Osipenko , Hans Verkuil Cc: Luca Ceresoli , linux-media@vger.kernel.org, linux-tegra@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Thomas Petazzoni , Paul Kocialkowski , Richard Leitner Subject: [PATCH v2 07/21] staging: media: tegra-video: improve error messages Date: Mon, 28 Nov 2022 16:23:22 +0100 Message-Id: <20221128152336.133953-8-luca.ceresoli@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221128152336.133953-1-luca.ceresoli@bootlin.com> References: <20221128152336.133953-1-luca.ceresoli@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org tegra_vi_channels_alloc() can primarily fail for two reasons: 1. "ports" node not found 2. port_num > vi->soc->vi_max_channels Case 1 prints nothing, case 2 has a dev_err(). The caller [tegra_vi_init()] has a generic dev_err() on any failure. This mean that in case 2 we print two messages, and in case 1 we only print a generic message. Remove the generic message and add a specific message when case 1 happens, so that we always have one specific message without even increasing the number of dev_dbg*() calls. Signed-off-by: Luca Ceresoli --- No changes in v2 --- drivers/staging/media/tegra-video/vi.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/drivers/staging/media/tegra-video/vi.c b/drivers/staging/media/tegra-video/vi.c index b24b9353077f..24de4ed1eaf0 100644 --- a/drivers/staging/media/tegra-video/vi.c +++ b/drivers/staging/media/tegra-video/vi.c @@ -1272,7 +1272,7 @@ static int tegra_vi_channels_alloc(struct tegra_vi *vi) ports = of_get_child_by_name(node, "ports"); if (!ports) - return -ENODEV; + return dev_err_probe(vi->dev, -ENODEV, "%pOF: missing 'ports' node\n", node); for_each_child_of_node(ports, port) { if (!of_node_name_eq(port, "port")) @@ -1824,11 +1824,8 @@ static int tegra_vi_init(struct host1x_client *client) ret = tegra_vi_tpg_channels_alloc(vi); else ret = tegra_vi_channels_alloc(vi); - if (ret < 0) { - dev_err(vi->dev, - "failed to allocate vi channels: %d\n", ret); + if (ret < 0) goto free_chans; - } ret = tegra_vi_channels_init(vi); if (ret < 0) From patchwork Mon Nov 28 15:23:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Ceresoli X-Patchwork-Id: 13057671 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 57074C43217 for ; Mon, 28 Nov 2022 15:26:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232265AbiK1P0h (ORCPT ); Mon, 28 Nov 2022 10:26:37 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33540 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231974AbiK1P0K (ORCPT ); Mon, 28 Nov 2022 10:26:10 -0500 Received: from relay11.mail.gandi.net (relay11.mail.gandi.net [217.70.178.231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ABA5223384; Mon, 28 Nov 2022 07:24:50 -0800 (PST) Received: from booty.fritz.box (unknown [77.244.183.192]) (Authenticated sender: luca.ceresoli@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id 69BC3100008; Mon, 28 Nov 2022 15:24:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1669649089; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=eZduwFmDHtlgeg2+JJFukQVp7zp/Hiu/ppOmNookfL8=; b=QOEPE5eRfqnQ3j613rQ7mMZuJ/rFEB12Hl+JJqJQOH9Z+xA15tht4tK6thY9dHGLiU7ZC7 y5+PiJhtcy4noYvoSyj8giSSz1v2hn6qDVReFuSM1eFZ7kio8JnxsqfUv5z1OKzJSO4emr giBxKdtqbeDivPv8IkgDVH/EsO2kWA1c6I725kyByrWjuMyiwxCosFsMTS6x+dHGoLB2sU 0XGHpKzIE4rZi+PSTW4EmJS8JoEdl2LLMcN1ajlHNN7GZ20WalhBwyw1306Foo/3EmpNg3 21EMsfQg7U0HtuBEnHN9zlSK6kc33eLVkeOhOiVy7gYTNACuu6ZpkVTIpVeH9w== From: Luca Ceresoli To: David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , Mauro Carvalho Chehab , Greg Kroah-Hartman , Dmitry Osipenko , Hans Verkuil Cc: Luca Ceresoli , linux-media@vger.kernel.org, linux-tegra@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Thomas Petazzoni , Paul Kocialkowski , Richard Leitner Subject: [PATCH v2 08/21] staging: media: tegra-video: slightly simplify cleanup on errors Date: Mon, 28 Nov 2022 16:23:23 +0100 Message-Id: <20221128152336.133953-9-luca.ceresoli@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221128152336.133953-1-luca.ceresoli@bootlin.com> References: <20221128152336.133953-1-luca.ceresoli@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org of_node_put(node) does nothing if node == NULL, so it can be moved to the cleanup section at the bottom. Signed-off-by: Luca Ceresoli --- No changes in v2 --- drivers/staging/media/tegra-video/vi.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/staging/media/tegra-video/vi.c b/drivers/staging/media/tegra-video/vi.c index 24de4ed1eaf0..2657207e5b7d 100644 --- a/drivers/staging/media/tegra-video/vi.c +++ b/drivers/staging/media/tegra-video/vi.c @@ -1263,7 +1263,7 @@ static int tegra_vi_channels_alloc(struct tegra_vi *vi) struct device_node *node = vi->dev->of_node; struct device_node *ep = NULL; struct device_node *ports; - struct device_node *port; + struct device_node *port = NULL; unsigned int port_num; struct device_node *parent; struct v4l2_fwnode_endpoint v4l2_ep = { .bus_type = 0 }; @@ -1286,7 +1286,6 @@ static int tegra_vi_channels_alloc(struct tegra_vi *vi) dev_err(vi->dev, "invalid port num %d for %pOF\n", port_num, port); ret = -EINVAL; - of_node_put(port); goto cleanup; } @@ -1309,13 +1308,12 @@ static int tegra_vi_channels_alloc(struct tegra_vi *vi) lanes = v4l2_ep.bus.mipi_csi2.num_data_lanes; ret = tegra_vi_channel_alloc(vi, port_num, port, lanes); - if (ret < 0) { - of_node_put(port); + if (ret < 0) goto cleanup; - } } cleanup: + of_node_put(port); of_node_put(ports); return ret; } From patchwork Mon Nov 28 15:23:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Ceresoli X-Patchwork-Id: 13057672 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6DC2BC433FE for ; Mon, 28 Nov 2022 15:26:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231738AbiK1P0j (ORCPT ); Mon, 28 Nov 2022 10:26:39 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60584 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232087AbiK1P0L (ORCPT ); Mon, 28 Nov 2022 10:26:11 -0500 Received: from relay11.mail.gandi.net (relay11.mail.gandi.net [217.70.178.231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A70AA25E82; Mon, 28 Nov 2022 07:24:58 -0800 (PST) Received: from booty.fritz.box (unknown [77.244.183.192]) (Authenticated sender: luca.ceresoli@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id DCC0D100006; Mon, 28 Nov 2022 15:24:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1669649097; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=EgVAaPNMJa89SI0rNjqHrlIDAE7eORtVFsqm8m2Ny+g=; b=WUrJKg9yzZ9NkoBqASH+lKBV0cype1yTj8T7j+hkookcsGFW/g/E2W01bYccLE5OVRR6kc FnMbKA74Fl+OTsb7Z9E1HHq7NcQZLY+KXfN0kaXo1V/5d8REQGbOIDRM9YOyc3Jo/caoIU CitO7VOwYMpKDfuE45PFXe2KjydQBANpYbJXDbjQKj0Dn5hI85GmJ69aqWe4qSf8USMsIj f+LQo5ZAW8o3IWBR3zX1xkmHIqofnvrtH45WSC5qMWi4aKnkp6CkHNK5M47J+aPe9dhsh1 D2pCbaw4aw3A2At9xVe68RNkMj6BoJRUWZiSpiJhPYr3/Gj0zbVghLvc4eVEMQ== From: Luca Ceresoli To: David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , Mauro Carvalho Chehab , Greg Kroah-Hartman , Dmitry Osipenko , Hans Verkuil Cc: Luca Ceresoli , linux-media@vger.kernel.org, linux-tegra@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Thomas Petazzoni , Paul Kocialkowski , Richard Leitner Subject: [PATCH v2 09/21] staging: media: tegra-video: move private struct declaration to C file Date: Mon, 28 Nov 2022 16:23:24 +0100 Message-Id: <20221128152336.133953-10-luca.ceresoli@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221128152336.133953-1-luca.ceresoli@bootlin.com> References: <20221128152336.133953-1-luca.ceresoli@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org struct tegra_vi_graph_entity is an internal implementation detail of the VI module. Move its declaration from vi.h to vi.c. Signed-off-by: Luca Ceresoli --- No changes in v2 --- drivers/staging/media/tegra-video/vi.c | 13 +++++++++++++ drivers/staging/media/tegra-video/vi.h | 13 ------------- 2 files changed, 13 insertions(+), 13 deletions(-) diff --git a/drivers/staging/media/tegra-video/vi.c b/drivers/staging/media/tegra-video/vi.c index 2657207e5b7d..55a135bef1a9 100644 --- a/drivers/staging/media/tegra-video/vi.c +++ b/drivers/staging/media/tegra-video/vi.c @@ -31,6 +31,19 @@ #define MAX_CID_CONTROLS 1 +/** + * struct tegra_vi_graph_entity - Entity in the video graph + * + * @asd: subdev asynchronous registration information + * @entity: media entity from the corresponding V4L2 subdev + * @subdev: V4L2 subdev + */ +struct tegra_vi_graph_entity { + struct v4l2_async_subdev asd; + struct media_entity *entity; + struct v4l2_subdev *subdev; +}; + static const struct tegra_video_format tegra_default_format = { .img_dt = TEGRA_IMAGE_DT_RAW10, .bit_width = 10, diff --git a/drivers/staging/media/tegra-video/vi.h b/drivers/staging/media/tegra-video/vi.h index dd35c3ac992b..dfd834a69848 100644 --- a/drivers/staging/media/tegra-video/vi.h +++ b/drivers/staging/media/tegra-video/vi.h @@ -98,19 +98,6 @@ struct tegra_vi { struct list_head vi_chans; }; -/** - * struct tegra_vi_graph_entity - Entity in the video graph - * - * @asd: subdev asynchronous registration information - * @entity: media entity from the corresponding V4L2 subdev - * @subdev: V4L2 subdev - */ -struct tegra_vi_graph_entity { - struct v4l2_async_subdev asd; - struct media_entity *entity; - struct v4l2_subdev *subdev; -}; - /** * struct tegra_vi_channel - Tegra video channel * From patchwork Mon Nov 28 15:23:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Ceresoli X-Patchwork-Id: 13057673 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 08C62C433FE for ; Mon, 28 Nov 2022 15:26:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232302AbiK1P0u (ORCPT ); Mon, 28 Nov 2022 10:26:50 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60796 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232013AbiK1P0V (ORCPT ); Mon, 28 Nov 2022 10:26:21 -0500 Received: from relay11.mail.gandi.net (relay11.mail.gandi.net [IPv6:2001:4b98:dc4:8::231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6416F2657B; Mon, 28 Nov 2022 07:25:03 -0800 (PST) Received: from booty.fritz.box (unknown [77.244.183.192]) (Authenticated sender: luca.ceresoli@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id 6854810000C; Mon, 28 Nov 2022 15:24:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1669649102; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Htge0wtQQvYLlWXFmvq8n3+3IQEsvyaTThTVMkcCXaE=; b=hAkG4pyTCIhF/6NAagPJb4l3gSP6gMxdSn9GS5vYhnTn6qjc7yh2f5t18WR3uwlBk+lI2Z 4CBcffSDuXmyLcOIRtzrJqTaZkUa+gkL7HVVHydK8nF/VEjQY2V7azFG7Ugx/MF48f5N0G gm+krpdO+FI7Aiz0yM+79OIA7D2/5gdJnhUyXELFXBhcWo1fo/144Egqa6di2u0GLP1h53 pwr8GQBBRXJldFL/tXdXN7g1CVCt8rYnIFkJeKmojHBUj496FCnipH6/Lc8E2o8drtfYCC lZ1gozOwBUrt7XJTr3EKoKM+CTx+cWOK/mMCpWMMQhtCTsVkcUj5q+1xadcZow== From: Luca Ceresoli To: David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , Mauro Carvalho Chehab , Greg Kroah-Hartman , Dmitry Osipenko , Hans Verkuil Cc: Luca Ceresoli , linux-media@vger.kernel.org, linux-tegra@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Thomas Petazzoni , Paul Kocialkowski , Richard Leitner Subject: [PATCH v2 10/21] staging: media: tegra-video: remove unneeded include Date: Mon, 28 Nov 2022 16:23:25 +0100 Message-Id: <20221128152336.133953-11-luca.ceresoli@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221128152336.133953-1-luca.ceresoli@bootlin.com> References: <20221128152336.133953-1-luca.ceresoli@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org There is only a pointer reference to struct tegra_vi in video.h, thus vi.h is not needed. Signed-off-by: Luca Ceresoli --- No changes in v2 --- drivers/staging/media/tegra-video/video.h | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/staging/media/tegra-video/video.h b/drivers/staging/media/tegra-video/video.h index fadaf2189dc9..1e9be1474a9c 100644 --- a/drivers/staging/media/tegra-video/video.h +++ b/drivers/staging/media/tegra-video/video.h @@ -12,7 +12,6 @@ #include #include "vi.h" -#include "csi.h" struct tegra_video_device { struct v4l2_device v4l2_dev; From patchwork Mon Nov 28 15:23:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Ceresoli X-Patchwork-Id: 13057674 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EF0E2C4321E for ; Mon, 28 Nov 2022 15:27:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232267AbiK1P1H (ORCPT ); Mon, 28 Nov 2022 10:27:07 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33554 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231843AbiK1P0h (ORCPT ); Mon, 28 Nov 2022 10:26:37 -0500 Received: from relay11.mail.gandi.net (relay11.mail.gandi.net [IPv6:2001:4b98:dc4:8::231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 035DE240A1; Mon, 28 Nov 2022 07:25:11 -0800 (PST) Received: from booty.fritz.box (unknown [77.244.183.192]) (Authenticated sender: luca.ceresoli@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id DE242100019; Mon, 28 Nov 2022 15:25:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1669649110; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=7GBrmkxGUxB90OXm4GjTfStVLla9ZUuwuKwKG2o+/lk=; b=NXeyMEmbp4qKoa/ZO0xNT9bueu0uHpG7m9N/wxlNvQx7rXHiM/b2a1/Nplufw8q4rHIMfB A/7onnKi+/WXuoxBPDZ7rMnD0UnGH+6kJPwiHGHRfm1vPjJztl8hcnFDPD0+aN49H7jCW2 cMvxGuGUmkZIaEu5bkD4+1IQIhTvEDiQUCGEPuMUuD1pGaHAK4O/FD2RfoFgKV8UODeLNZ kj+Y/sUiZG0G0KsYU69qyghSXBYIiY2mnetog3tsK8B4M5g6q22wMNVQVJFfBDdHgJuth1 IqxSKqUZWjTy/6Go+b9r+q2IyuCnwRIxDl7QsMjwwdyiA9rEaBJH8gwaSNSYdw== From: Luca Ceresoli To: David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , Mauro Carvalho Chehab , Greg Kroah-Hartman , Dmitry Osipenko , Hans Verkuil Cc: Luca Ceresoli , linux-media@vger.kernel.org, linux-tegra@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Thomas Petazzoni , Paul Kocialkowski , Richard Leitner Subject: [PATCH v2 11/21] staging: media: tegra-video: Kconfig: allow TPG only on Tegra210 Date: Mon, 28 Nov 2022 16:23:26 +0100 Message-Id: <20221128152336.133953-12-luca.ceresoli@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221128152336.133953-1-luca.ceresoli@bootlin.com> References: <20221128152336.133953-1-luca.ceresoli@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org We are about to add support for the Tegra20 parallel video capture, which has no TPG. In preparation for that, limit the VIDEO_TEGRA_TPG option to Tegra210 which is the only implementation currently provided by this driver. Signed-off-by: Luca Ceresoli --- No changes in v2 --- drivers/staging/media/tegra-video/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/staging/media/tegra-video/Kconfig b/drivers/staging/media/tegra-video/Kconfig index df1b2cff2417..c53441822fdf 100644 --- a/drivers/staging/media/tegra-video/Kconfig +++ b/drivers/staging/media/tegra-video/Kconfig @@ -15,5 +15,6 @@ config VIDEO_TEGRA config VIDEO_TEGRA_TPG bool "NVIDIA Tegra VI driver TPG mode" depends on VIDEO_TEGRA + depends on ARCH_TEGRA_210_SOC help Say yes here to enable Tegra internal TPG mode From patchwork Mon Nov 28 15:23:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Ceresoli X-Patchwork-Id: 13057706 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A19D9C43217 for ; Mon, 28 Nov 2022 15:27:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232354AbiK1P1R (ORCPT ); Mon, 28 Nov 2022 10:27:17 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33668 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229670AbiK1P0s (ORCPT ); Mon, 28 Nov 2022 10:26:48 -0500 Received: from relay11.mail.gandi.net (relay11.mail.gandi.net [IPv6:2001:4b98:dc4:8::231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 06B9725C4F; Mon, 28 Nov 2022 07:25:15 -0800 (PST) Received: from booty.fritz.box (unknown [77.244.183.192]) (Authenticated sender: luca.ceresoli@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id DC178100003; Mon, 28 Nov 2022 15:25:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1669649114; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=aXLPFC0kycNRZx/bctD3Dn2zkVipVfkGhwxHoAJIOfU=; b=InmxmfBeX7SoSP6tR+DIOKg2WkahVGkqydpOdtZIUMxyRoZdXkS7vDN1Eyp2S0yVBl/NGi 7GKTsjEosWWlLD9NU5QnVodKRrEzptOO9fBGteyWlnfxlS91TnMLPXVRHrKImospAFAAj1 no+BkKJ6XyoMX+VauCW6xs/unHsMSKtXnmuezpx/FJOLKoRpzwDZagxvoGCXcMeo/5+vx4 x0E0fqz2Xye6edEDKDZAstQoWx9iagG9VGc/kH9Wd/8woLK9qGO+o9Z7EtDGlOnOh4j0ES hckQuYiWByeLuRDJsq0eQ52sHgE9GRuMn9BDwFWXrnhd050O7/Gnbi5zsm0XgQ== From: Luca Ceresoli To: David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , Mauro Carvalho Chehab , Greg Kroah-Hartman , Dmitry Osipenko , Hans Verkuil Cc: Luca Ceresoli , linux-media@vger.kernel.org, linux-tegra@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Thomas Petazzoni , Paul Kocialkowski , Richard Leitner Subject: [PATCH v2 12/21] staging: media: tegra-video: move tegra_channel_fmt_align to a per-soc op Date: Mon, 28 Nov 2022 16:23:27 +0100 Message-Id: <20221128152336.133953-13-luca.ceresoli@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221128152336.133953-1-luca.ceresoli@bootlin.com> References: <20221128152336.133953-1-luca.ceresoli@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org tegra_channel_fmt_align() takes care of the size constraints, alignment and rounding requirements of the Tegra210 VI peripheral. Tegra20 has different constraints. In preparation for adding Tegra20 support, move this function to a new op in the soc-specific `struct tegra_vi_ops` . Also move to tegra210.c the T210-specific defines used in the moved code. No functional changes. Signed-off-by: Luca Ceresoli --- No changes in v2 --- drivers/staging/media/tegra-video/tegra210.c | 36 ++++++++++++++++++ drivers/staging/media/tegra-video/vi.c | 40 +++----------------- drivers/staging/media/tegra-video/vi.h | 9 ++--- 3 files changed, 44 insertions(+), 41 deletions(-) diff --git a/drivers/staging/media/tegra-video/tegra210.c b/drivers/staging/media/tegra-video/tegra210.c index eb19dd5107ce..71483d0c19bf 100644 --- a/drivers/staging/media/tegra-video/tegra210.c +++ b/drivers/staging/media/tegra-video/tegra210.c @@ -17,6 +17,13 @@ #include "csi.h" #include "vi.h" +#define TEGRA210_MIN_WIDTH 32U +#define TEGRA210_MAX_WIDTH 32768U +#define TEGRA210_MIN_HEIGHT 32U +#define TEGRA210_MAX_HEIGHT 32768U + +#define SURFACE_ALIGN_BYTES 64 + #define TEGRA_VI_SYNCPT_WAIT_TIMEOUT msecs_to_jiffies(200) /* Tegra210 VI registers */ @@ -172,6 +179,34 @@ static u32 vi_csi_read(struct tegra_vi_channel *chan, u8 portno, /* * Tegra210 VI channel capture operations */ +static void tegra210_fmt_align(struct v4l2_pix_format *pix, unsigned int bpp) +{ + unsigned int min_bpl; + unsigned int max_bpl; + unsigned int bpl; + + /* + * The transfer alignment requirements are expressed in bytes. + * Clamp the requested width and height to the limits. + */ + pix->width = clamp(pix->width, TEGRA210_MIN_WIDTH, TEGRA210_MAX_WIDTH); + pix->height = clamp(pix->height, TEGRA210_MIN_HEIGHT, TEGRA210_MAX_HEIGHT); + + /* Clamp the requested bytes per line value. If the maximum bytes per + * line value is zero, the module doesn't support user configurable + * line sizes. Override the requested value with the minimum in that + * case. + */ + min_bpl = pix->width * bpp; + max_bpl = rounddown(TEGRA210_MAX_WIDTH, SURFACE_ALIGN_BYTES); + bpl = roundup(pix->bytesperline, SURFACE_ALIGN_BYTES); + + pix->bytesperline = clamp(bpl, min_bpl, max_bpl); + pix->sizeimage = pix->bytesperline * pix->height; + if (pix->pixelformat == V4L2_PIX_FMT_NV16) + pix->sizeimage *= 2; +} + static int tegra_channel_capture_setup(struct tegra_vi_channel *chan, u8 portno) { @@ -723,6 +758,7 @@ static const struct tegra_video_format tegra210_video_formats[] = { /* Tegra210 VI operations */ static const struct tegra_vi_ops tegra210_vi_ops = { + .vi_fmt_align = tegra210_fmt_align, .vi_start_streaming = tegra210_vi_start_streaming, .vi_stop_streaming = tegra210_vi_stop_streaming, }; diff --git a/drivers/staging/media/tegra-video/vi.c b/drivers/staging/media/tegra-video/vi.c index 55a135bef1a9..12c2fa760c81 100644 --- a/drivers/staging/media/tegra-video/vi.c +++ b/drivers/staging/media/tegra-video/vi.c @@ -456,36 +456,6 @@ static int tegra_channel_get_format(struct file *file, void *fh, return 0; } -static void tegra_channel_fmt_align(struct tegra_vi_channel *chan, - struct v4l2_pix_format *pix, - unsigned int bpp) -{ - unsigned int min_bpl; - unsigned int max_bpl; - unsigned int bpl; - - /* - * The transfer alignment requirements are expressed in bytes. - * Clamp the requested width and height to the limits. - */ - pix->width = clamp(pix->width, TEGRA_MIN_WIDTH, TEGRA_MAX_WIDTH); - pix->height = clamp(pix->height, TEGRA_MIN_HEIGHT, TEGRA_MAX_HEIGHT); - - /* Clamp the requested bytes per line value. If the maximum bytes per - * line value is zero, the module doesn't support user configurable - * line sizes. Override the requested value with the minimum in that - * case. - */ - min_bpl = pix->width * bpp; - max_bpl = rounddown(TEGRA_MAX_WIDTH, SURFACE_ALIGN_BYTES); - bpl = roundup(pix->bytesperline, SURFACE_ALIGN_BYTES); - - pix->bytesperline = clamp(bpl, min_bpl, max_bpl); - pix->sizeimage = pix->bytesperline * pix->height; - if (pix->pixelformat == V4L2_PIX_FMT_NV16) - pix->sizeimage *= 2; -} - static int __tegra_channel_try_format(struct tegra_vi_channel *chan, struct v4l2_pix_format *pix) { @@ -561,7 +531,7 @@ static int __tegra_channel_try_format(struct tegra_vi_channel *chan, return ret; v4l2_fill_pix_format(pix, &fmt.format); - tegra_channel_fmt_align(chan, pix, fmtinfo->bpp); + chan->vi->ops->vi_fmt_align(pix, fmtinfo->bpp); __v4l2_subdev_state_free(sd_state); @@ -613,7 +583,7 @@ static int tegra_channel_set_format(struct file *file, void *fh, return ret; v4l2_fill_pix_format(pix, &fmt.format); - tegra_channel_fmt_align(chan, pix, fmtinfo->bpp); + chan->vi->ops->vi_fmt_align(pix, fmtinfo->bpp); chan->format = *pix; chan->fmtinfo = fmtinfo; @@ -649,7 +619,7 @@ static int tegra_channel_set_subdev_active_fmt(struct tegra_vi_channel *chan) chan->format.bytesperline = chan->format.width * chan->fmtinfo->bpp; chan->format.sizeimage = chan->format.bytesperline * chan->format.height; - tegra_channel_fmt_align(chan, &chan->format, chan->fmtinfo->bpp); + chan->vi->ops->vi_fmt_align(&chan->format, chan->fmtinfo->bpp); tegra_channel_update_gangports(chan); return 0; @@ -818,7 +788,7 @@ static int tegra_channel_s_dv_timings(struct file *file, void *fh, chan->format.height = bt->height; chan->format.bytesperline = bt->width * chan->fmtinfo->bpp; chan->format.sizeimage = chan->format.bytesperline * bt->height; - tegra_channel_fmt_align(chan, &chan->format, chan->fmtinfo->bpp); + chan->vi->ops->vi_fmt_align(&chan->format, chan->fmtinfo->bpp); tegra_channel_update_gangports(chan); return 0; @@ -1149,7 +1119,7 @@ static int tegra_channel_init(struct tegra_vi_channel *chan) chan->format.height = TEGRA_DEF_HEIGHT; chan->format.bytesperline = TEGRA_DEF_WIDTH * chan->fmtinfo->bpp; chan->format.sizeimage = chan->format.bytesperline * TEGRA_DEF_HEIGHT; - tegra_channel_fmt_align(chan, &chan->format, chan->fmtinfo->bpp); + vi->ops->vi_fmt_align(&chan->format, chan->fmtinfo->bpp); ret = tegra_channel_host1x_syncpt_init(chan); if (ret) diff --git a/drivers/staging/media/tegra-video/vi.h b/drivers/staging/media/tegra-video/vi.h index dfd834a69848..1021c730b595 100644 --- a/drivers/staging/media/tegra-video/vi.h +++ b/drivers/staging/media/tegra-video/vi.h @@ -25,17 +25,11 @@ #define V4L2_CID_TEGRA_SYNCPT_TIMEOUT_RETRY (V4L2_CTRL_CLASS_CAMERA | 0x1001) -#define TEGRA_MIN_WIDTH 32U -#define TEGRA_MAX_WIDTH 32768U -#define TEGRA_MIN_HEIGHT 32U -#define TEGRA_MAX_HEIGHT 32768U - #define TEGRA_DEF_WIDTH 1920 #define TEGRA_DEF_HEIGHT 1080 #define TEGRA_IMAGE_FORMAT_DEF 32 #define MAX_FORMAT_NUM 64 -#define SURFACE_ALIGN_BYTES 64 enum tegra_vi_pg_mode { TEGRA_VI_PG_DISABLED = 0, @@ -45,6 +39,8 @@ enum tegra_vi_pg_mode { /** * struct tegra_vi_ops - Tegra VI operations + * @vi_fmt_align: modify `pix` to fit the hardware alignment + * requirements and fill image geometry * @vi_start_streaming: starts media pipeline, subdevice streaming, sets up * VI for capture and runs capture start and capture finish * kthreads for capturing frames to buffer and returns them back. @@ -52,6 +48,7 @@ enum tegra_vi_pg_mode { * back any queued buffers. */ struct tegra_vi_ops { + void (*vi_fmt_align)(struct v4l2_pix_format *pix, unsigned int bpp); int (*vi_start_streaming)(struct vb2_queue *vq, u32 count); void (*vi_stop_streaming)(struct vb2_queue *vq); }; From patchwork Mon Nov 28 15:23:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Ceresoli X-Patchwork-Id: 13057707 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4A784C4167D for ; Mon, 28 Nov 2022 15:27:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232317AbiK1P10 (ORCPT ); Mon, 28 Nov 2022 10:27:26 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33456 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232191AbiK1P1C (ORCPT ); Mon, 28 Nov 2022 10:27:02 -0500 Received: from relay11.mail.gandi.net (relay11.mail.gandi.net [IPv6:2001:4b98:dc4:8::231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9D47925EA8; Mon, 28 Nov 2022 07:25:20 -0800 (PST) Received: from booty.fritz.box (unknown [77.244.183.192]) (Authenticated sender: luca.ceresoli@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id AD58F100007; Mon, 28 Nov 2022 15:25:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1669649119; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=UjvGbhMIPshNH6r+U4pNOMQErXxL1R+/BUmp5ombR6g=; b=pUno4S6koP2DDFvf1tyavj8bIjzBQKJ9UhviqdzkeKljSy1SYXaxgh9n4q+ZrFyx5KXhv0 mbLWxIN00431CfuZ0Q8CT6iCCKCOUjrWQ6JnuFYFCueA6mqVoszHjbDLYPvqj2TW6CDI0O bj6I9fTW1t3VbFBhJO2XoKxjFo0sobjnTB3KqFGj6mv7of1nVxmuOlIllQudrtp8cZH7uY UBYY2XzYzywcAlX3SuZymw9JB/K4cjKfFCnDJYlaJGFdiM5JBG0IgUpexZK6dYxIZkewPb ioNdaCTTJvdw1GPQoNUQk+oKJynjdTSK0gJ6Zv4igUvI5s9QkuTZDgNSdAbalg== From: Luca Ceresoli To: David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , Mauro Carvalho Chehab , Greg Kroah-Hartman , Dmitry Osipenko , Hans Verkuil Cc: Luca Ceresoli , linux-media@vger.kernel.org, linux-tegra@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Thomas Petazzoni , Paul Kocialkowski , Richard Leitner Subject: [PATCH v2 13/21] staging: media: tegra-video: move default format to soc-specific data Date: Mon, 28 Nov 2022 16:23:28 +0100 Message-Id: <20221128152336.133953-14-luca.ceresoli@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221128152336.133953-1-luca.ceresoli@bootlin.com> References: <20221128152336.133953-1-luca.ceresoli@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The tegra_default_format in vi.c is specific to Tegra210 CSI. In preparation for adding Tegra20 VIP support, move the default format to a new field in the soc-specific `struct tegra_vi_soc`. Instead of an entire format struct, only store a pointer to an item in the existing format array. No functional changes. The format pointed to is the same that used to be in vi.c. Signed-off-by: Luca Ceresoli --- No changes in v2 --- drivers/staging/media/tegra-video/tegra210.c | 2 ++ drivers/staging/media/tegra-video/vi.c | 11 +---------- drivers/staging/media/tegra-video/vi.h | 2 ++ 3 files changed, 5 insertions(+), 10 deletions(-) diff --git a/drivers/staging/media/tegra-video/tegra210.c b/drivers/staging/media/tegra-video/tegra210.c index 71483d0c19bf..28d3d05c12c4 100644 --- a/drivers/staging/media/tegra-video/tegra210.c +++ b/drivers/staging/media/tegra-video/tegra210.c @@ -771,8 +771,10 @@ const struct tegra_vi_soc tegra210_vi_soc = { .hw_revision = 3, .vi_max_channels = 6, #if IS_ENABLED(CONFIG_VIDEO_TEGRA_TPG) + .default_video_format = &tegra210_video_formats[0], .vi_max_clk_hz = 499200000, #else + .default_video_format = &tegra210_video_formats[4], .vi_max_clk_hz = 998400000, #endif }; diff --git a/drivers/staging/media/tegra-video/vi.c b/drivers/staging/media/tegra-video/vi.c index 12c2fa760c81..8b6cf50e1eae 100644 --- a/drivers/staging/media/tegra-video/vi.c +++ b/drivers/staging/media/tegra-video/vi.c @@ -44,15 +44,6 @@ struct tegra_vi_graph_entity { struct v4l2_subdev *subdev; }; -static const struct tegra_video_format tegra_default_format = { - .img_dt = TEGRA_IMAGE_DT_RAW10, - .bit_width = 10, - .code = MEDIA_BUS_FMT_SRGGB10_1X10, - .bpp = 2, - .img_fmt = TEGRA_IMAGE_FORMAT_DEF, - .fourcc = V4L2_PIX_FMT_SRGGB10, -}; - static inline struct tegra_vi * host1x_client_to_vi(struct host1x_client *client) { @@ -1111,7 +1102,7 @@ static int tegra_channel_init(struct tegra_vi_channel *chan) init_waitqueue_head(&chan->done_wait); /* initialize the video format */ - chan->fmtinfo = &tegra_default_format; + chan->fmtinfo = chan->vi->soc->default_video_format; chan->format.pixelformat = chan->fmtinfo->fourcc; chan->format.colorspace = V4L2_COLORSPACE_SRGB; chan->format.field = V4L2_FIELD_NONE; diff --git a/drivers/staging/media/tegra-video/vi.h b/drivers/staging/media/tegra-video/vi.h index 1021c730b595..879547073371 100644 --- a/drivers/staging/media/tegra-video/vi.h +++ b/drivers/staging/media/tegra-video/vi.h @@ -58,6 +58,7 @@ struct tegra_vi_ops { * * @video_formats: supported video formats * @nformats: total video formats + * @default_video_format: default video format (pointer to a @video_formats item) * @ops: vi operations * @hw_revision: VI hw_revision * @vi_max_channels: supported max streaming channels @@ -66,6 +67,7 @@ struct tegra_vi_ops { struct tegra_vi_soc { const struct tegra_video_format *video_formats; const unsigned int nformats; + const struct tegra_video_format *default_video_format; const struct tegra_vi_ops *ops; u32 hw_revision; unsigned int vi_max_channels; From patchwork Mon Nov 28 15:23:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Ceresoli X-Patchwork-Id: 13057708 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 03560C4321E for ; Mon, 28 Nov 2022 15:27:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231796AbiK1P1a (ORCPT ); Mon, 28 Nov 2022 10:27:30 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33520 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232336AbiK1P1E (ORCPT ); Mon, 28 Nov 2022 10:27:04 -0500 Received: from relay11.mail.gandi.net (relay11.mail.gandi.net [IPv6:2001:4b98:dc4:8::231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BF75624947; Mon, 28 Nov 2022 07:25:24 -0800 (PST) Received: from booty.fritz.box (unknown [77.244.183.192]) (Authenticated sender: luca.ceresoli@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id 6C134100016; Mon, 28 Nov 2022 15:25:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1669649123; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=oP8NU7I43xDY/ZPEn0/gmn7Nbc0npEub8Nu+wM5IK7w=; b=hYIrZn61Zm0+zP0YbUM2rRBF5L0sS4xUTIJ9knElrY5WL/+IVCVOdg9btrq2Ob/BLmJ+Ef 4TK8eBwREDfCNcJ9Le24os7b9E6yw+ye7wmjx2LrCP0I4GcAoVJQAkBrGS2P2M7jszw8YD X5j9s0dmDq3hkCBOTROKqaY8XN+RPZhKb9Wy4hH7ouk3je3jcP1BA/RpbTsa450DeZBKRE TkeJVM93/s5lMk8BwS9oMM0dNy28J+aIMIIWPczyoM5NYnM4KNgwJ11L5IV88tanQEUpmb l+ev8stvAcIn+rELl1d3+6tblqgl1X3BEbWp+kjS79Z5XeznyaYJyEzGJpME5A== From: Luca Ceresoli To: David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , Mauro Carvalho Chehab , Greg Kroah-Hartman , Dmitry Osipenko , Hans Verkuil Cc: Luca Ceresoli , linux-media@vger.kernel.org, linux-tegra@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Thomas Petazzoni , Paul Kocialkowski , Richard Leitner Subject: [PATCH v2 14/21] staging: media: tegra-video: move MIPI calibration calls from VI to CSI Date: Mon, 28 Nov 2022 16:23:29 +0100 Message-Id: <20221128152336.133953-15-luca.ceresoli@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221128152336.133953-1-luca.ceresoli@bootlin.com> References: <20221128152336.133953-1-luca.ceresoli@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The CSI module does not handle all the MIPI lane calibration procedure, leaving a small part of it to the VI module. In doing this, tegra_channel_enable_stream() (vi.c) manipulates the private data of the upstream subdev casting it to struct 'tegra_csi_channel', which will be wrong after introducing a VIP (parallel video input) channel. This prevents adding support for the VIP module. It also breaks the logical isolation between modules. Since the lane calibration requirement does not exist in the parallel input module, moving the calibration function to a per-module op is not optimal. Instead move the calibration procedure in the CSI module, together with the rest of the calibration procedures. After this change, tegra_channel_enable_stream() just calls v4l2_subdev_call() to ask for a stream start/stop to the CSI module, which in turn knows all the CSI-specific details to implement it. Signed-off-by: Luca Ceresoli --- No changes in v2 --- drivers/staging/media/tegra-video/csi.c | 44 ++++++++++++++++++++ drivers/staging/media/tegra-video/vi.c | 54 ++----------------------- 2 files changed, 48 insertions(+), 50 deletions(-) diff --git a/drivers/staging/media/tegra-video/csi.c b/drivers/staging/media/tegra-video/csi.c index 426e653bd55d..3a614f568a31 100644 --- a/drivers/staging/media/tegra-video/csi.c +++ b/drivers/staging/media/tegra-video/csi.c @@ -328,12 +328,42 @@ static int tegra_csi_enable_stream(struct v4l2_subdev *subdev) } csi_chan->pg_mode = chan->pg_mode; + + /* + * Tegra CSI receiver can detect the first LP to HS transition. + * So, start the CSI stream-on prior to sensor stream-on and + * vice-versa for stream-off. + */ ret = csi->ops->csi_start_streaming(csi_chan); if (ret < 0) goto finish_calibration; + if (csi_chan->mipi) { + struct v4l2_subdev *src_subdev; + /* + * TRM has incorrectly documented to wait for done status from + * calibration logic after CSI interface power on. + * As per the design, calibration results are latched and applied + * to the pads only when the link is in LP11 state which will happen + * during the sensor stream-on. + * CSI subdev stream-on triggers start of MIPI pads calibration. + * Wait for calibration to finish here after sensor subdev stream-on. + */ + src_subdev = tegra_channel_get_remote_source_subdev(chan); + ret = v4l2_subdev_call(src_subdev, video, s_stream, true); + err = tegra_mipi_finish_calibration(csi_chan->mipi); + + if (ret < 0 && ret != -ENOIOCTLCMD) + goto disable_csi_stream; + + if (err < 0) + dev_warn(csi->dev, "MIPI calibration failed: %d\n", err); + } + return 0; +disable_csi_stream: + csi->ops->csi_stop_streaming(csi_chan); finish_calibration: if (csi_chan->mipi) tegra_mipi_finish_calibration(csi_chan->mipi); @@ -352,10 +382,24 @@ static int tegra_csi_enable_stream(struct v4l2_subdev *subdev) static int tegra_csi_disable_stream(struct v4l2_subdev *subdev) { + struct tegra_vi_channel *chan = v4l2_get_subdev_hostdata(subdev); struct tegra_csi_channel *csi_chan = to_csi_chan(subdev); struct tegra_csi *csi = csi_chan->csi; int err; + /* + * Stream-off subdevices in reverse order to stream-on. + * Remote source subdev in TPG mode is same as CSI subdev. + */ + if (csi_chan->mipi) { + struct v4l2_subdev *src_subdev; + + src_subdev = tegra_channel_get_remote_source_subdev(chan); + err = v4l2_subdev_call(src_subdev, video, s_stream, false); + if (err < 0 && err != -ENOIOCTLCMD) + dev_err_probe(csi->dev, err, "source subdev stream off failed\n"); + } + csi->ops->csi_stop_streaming(csi_chan); if (csi_chan->mipi) { diff --git a/drivers/staging/media/tegra-video/vi.c b/drivers/staging/media/tegra-video/vi.c index 8b6cf50e1eae..2dd3c6c944a2 100644 --- a/drivers/staging/media/tegra-video/vi.c +++ b/drivers/staging/media/tegra-video/vi.c @@ -187,49 +187,15 @@ tegra_channel_get_remote_source_subdev(struct tegra_vi_channel *chan) static int tegra_channel_enable_stream(struct tegra_vi_channel *chan) { - struct v4l2_subdev *csi_subdev, *src_subdev; - struct tegra_csi_channel *csi_chan; - int ret, err; + struct v4l2_subdev *subdev; + int ret; - /* - * Tegra CSI receiver can detect the first LP to HS transition. - * So, start the CSI stream-on prior to sensor stream-on and - * vice-versa for stream-off. - */ - csi_subdev = tegra_channel_get_remote_csi_subdev(chan); - ret = v4l2_subdev_call(csi_subdev, video, s_stream, true); + subdev = tegra_channel_get_remote_csi_subdev(chan); + ret = v4l2_subdev_call(subdev, video, s_stream, true); if (ret < 0 && ret != -ENOIOCTLCMD) return ret; - if (IS_ENABLED(CONFIG_VIDEO_TEGRA_TPG)) - return 0; - - csi_chan = v4l2_get_subdevdata(csi_subdev); - /* - * TRM has incorrectly documented to wait for done status from - * calibration logic after CSI interface power on. - * As per the design, calibration results are latched and applied - * to the pads only when the link is in LP11 state which will happen - * during the sensor stream-on. - * CSI subdev stream-on triggers start of MIPI pads calibration. - * Wait for calibration to finish here after sensor subdev stream-on. - */ - src_subdev = tegra_channel_get_remote_source_subdev(chan); - ret = v4l2_subdev_call(src_subdev, video, s_stream, true); - err = tegra_mipi_finish_calibration(csi_chan->mipi); - - if (ret < 0 && ret != -ENOIOCTLCMD) - goto err_disable_csi_stream; - - if (err < 0) - dev_warn(csi_chan->csi->dev, - "MIPI calibration failed: %d\n", err); - return 0; - -err_disable_csi_stream: - v4l2_subdev_call(csi_subdev, video, s_stream, false); - return ret; } static int tegra_channel_disable_stream(struct tegra_vi_channel *chan) @@ -237,18 +203,6 @@ static int tegra_channel_disable_stream(struct tegra_vi_channel *chan) struct v4l2_subdev *subdev; int ret; - /* - * Stream-off subdevices in reverse order to stream-on. - * Remote source subdev in TPG mode is same as CSI subdev. - */ - subdev = tegra_channel_get_remote_source_subdev(chan); - ret = v4l2_subdev_call(subdev, video, s_stream, false); - if (ret < 0 && ret != -ENOIOCTLCMD) - return ret; - - if (IS_ENABLED(CONFIG_VIDEO_TEGRA_TPG)) - return 0; - subdev = tegra_channel_get_remote_csi_subdev(chan); ret = v4l2_subdev_call(subdev, video, s_stream, false); if (ret < 0 && ret != -ENOIOCTLCMD) From patchwork Mon Nov 28 15:23:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Ceresoli X-Patchwork-Id: 13057709 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 113F2C43217 for ; Mon, 28 Nov 2022 15:27:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232376AbiK1P1u (ORCPT ); Mon, 28 Nov 2022 10:27:50 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33620 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232197AbiK1P1H (ORCPT ); Mon, 28 Nov 2022 10:27:07 -0500 Received: from relay11.mail.gandi.net (relay11.mail.gandi.net [IPv6:2001:4b98:dc4:8::231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9CED924943; Mon, 28 Nov 2022 07:25:27 -0800 (PST) Received: from booty.fritz.box (unknown [77.244.183.192]) (Authenticated sender: luca.ceresoli@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id 70852100008; Mon, 28 Nov 2022 15:25:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1669649126; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=4L2vAgix/FUBMn0M/99DVyke1fXls4rI0uUzO7MX+jc=; b=iCt69+ylDHxiA2gkJhoPgSh+HTmr7PctRzItlxinwTagRevlXhbFQC4vdNlKMJWjUuGb09 YhYsA+DaD9xw6vR5a8aeBkcGnct2o4RJhx75x5QpZfcQsJfVxIADbhMfweVGUNWJXFCiMQ 6PEujs/MXTwEp1InPRytovxTJkJ+H0U2i6oY/kcw211LRtEAIdouwMP04Wvy0NK5DILnG9 sTqRtD/fJN3/ZTUO+lZtTjhGrTKrxl/hDa0D0jiAIrjeB0lzHcb/qdTp4mnm/ZnGMsZ12I MBBHOEuzgB+eS+To20n4cQDUGYyiniGfLspyGHphbHHI1KI8L4PaIaXJDRRKsg== From: Luca Ceresoli To: David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , Mauro Carvalho Chehab , Greg Kroah-Hartman , Dmitry Osipenko , Hans Verkuil Cc: Luca Ceresoli , linux-media@vger.kernel.org, linux-tegra@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Thomas Petazzoni , Paul Kocialkowski , Richard Leitner Subject: [PATCH v2 15/21] staging: media: tegra-video: add a per-soc enable/disable op Date: Mon, 28 Nov 2022 16:23:30 +0100 Message-Id: <20221128152336.133953-16-luca.ceresoli@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221128152336.133953-1-luca.ceresoli@bootlin.com> References: <20221128152336.133953-1-luca.ceresoli@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The Tegra20 VI needs an additional operation to enable the VI, add an operation for that. Signed-off-by: Luca Ceresoli --- No changes in v2 --- drivers/staging/media/tegra-video/vi.c | 7 +++++++ drivers/staging/media/tegra-video/vi.h | 4 ++++ 2 files changed, 11 insertions(+) diff --git a/drivers/staging/media/tegra-video/vi.c b/drivers/staging/media/tegra-video/vi.c index 2dd3c6c944a2..d0c387873d4e 100644 --- a/drivers/staging/media/tegra-video/vi.c +++ b/drivers/staging/media/tegra-video/vi.c @@ -1853,6 +1853,9 @@ static int tegra_vi_probe(struct platform_device *pdev) vi->client.ops = &vi_client_ops; vi->client.dev = &pdev->dev; + if (vi->ops->vi_enable) + vi->ops->vi_enable(vi, true); + ret = host1x_client_register(&vi->client); if (ret < 0) { dev_err(&pdev->dev, @@ -1863,6 +1866,8 @@ static int tegra_vi_probe(struct platform_device *pdev) return 0; rpm_disable: + if (vi->ops->vi_enable) + vi->ops->vi_enable(vi, false); pm_runtime_disable(&pdev->dev); return ret; } @@ -1879,6 +1884,8 @@ static int tegra_vi_remove(struct platform_device *pdev) return err; } + if (vi->ops->vi_enable) + vi->ops->vi_enable(vi, false); pm_runtime_disable(&pdev->dev); return 0; diff --git a/drivers/staging/media/tegra-video/vi.h b/drivers/staging/media/tegra-video/vi.h index 879547073371..851c4f3fcb91 100644 --- a/drivers/staging/media/tegra-video/vi.h +++ b/drivers/staging/media/tegra-video/vi.h @@ -37,8 +37,11 @@ enum tegra_vi_pg_mode { TEGRA_VI_PG_PATCH, }; +struct tegra_vi; + /** * struct tegra_vi_ops - Tegra VI operations + * @vi_enable: soc-specific operations needed to enable/disable the VI peripheral * @vi_fmt_align: modify `pix` to fit the hardware alignment * requirements and fill image geometry * @vi_start_streaming: starts media pipeline, subdevice streaming, sets up @@ -48,6 +51,7 @@ enum tegra_vi_pg_mode { * back any queued buffers. */ struct tegra_vi_ops { + int (*vi_enable)(struct tegra_vi *vi, bool on); void (*vi_fmt_align)(struct v4l2_pix_format *pix, unsigned int bpp); int (*vi_start_streaming)(struct vb2_queue *vq, u32 count); void (*vi_stop_streaming)(struct vb2_queue *vq); From patchwork Mon Nov 28 15:23:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Ceresoli X-Patchwork-Id: 13057710 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E38E9C4167D for ; Mon, 28 Nov 2022 15:28:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232396AbiK1P2A (ORCPT ); Mon, 28 Nov 2022 10:28:00 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60248 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230228AbiK1P1J (ORCPT ); Mon, 28 Nov 2022 10:27:09 -0500 Received: from relay11.mail.gandi.net (relay11.mail.gandi.net [217.70.178.231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8120E25E99; Mon, 28 Nov 2022 07:25:30 -0800 (PST) Received: from booty.fritz.box (unknown [77.244.183.192]) (Authenticated sender: luca.ceresoli@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id 7899F100012; Mon, 28 Nov 2022 15:25:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1669649129; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=oI61dlUOXaATSsX6dZBG7dsSutwFDp6QpvpLxRsKUR0=; b=iScIt5nrmmfM39onDVYzyVy5NbkiDcNNGHSs7E6KH4Nqj5Xr8eFeXky+cx4kkJDtqgrXIg 19UHgT/owPCgkPVTAMpOGCIbzzKX1NEEb4JNDCMjIqZj98a0ZoWCRkn5DZBU1aWlKgTGE7 kig2zNWPIsRleZIGPkUJOdi1tmWFdwR+RJOVzK7CTg4oejxaLf7Oxy57n1Au8BYBwIfScF oStpc/03x/HgEqx3s1Eqd0RQ+5k3vJZ24lY7bCB+F+RsR6C2BBRsiSjgyLLrnm8Iv0APiu FsggON6ouJ8gGfaYNmievBaWVFI72zszmbcpzzqjfFYcF3DaOq6Gm3/38HEAAg== From: Luca Ceresoli To: David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , Mauro Carvalho Chehab , Greg Kroah-Hartman , Dmitry Osipenko , Hans Verkuil Cc: Luca Ceresoli , linux-media@vger.kernel.org, linux-tegra@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Thomas Petazzoni , Paul Kocialkowski , Richard Leitner Subject: [PATCH v2 16/21] staging: media: tegra-video: move syncpt init/free to a per-soc op Date: Mon, 28 Nov 2022 16:23:31 +0100 Message-Id: <20221128152336.133953-17-luca.ceresoli@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221128152336.133953-1-luca.ceresoli@bootlin.com> References: <20221128152336.133953-1-luca.ceresoli@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org tegra_channel_host1x_syncpt_init() gets the host1x syncpts needed for the Tegra210 implementation, and tegra_channel_host1x_syncpts_free() puts them. Tegra20 needs to get and put a different syncpt. In preparation for adding Tegra20 support, move these functions to new ops in the soc-specific `struct tegra_vi_ops` . No functional changes. Signed-off-by: Luca Ceresoli --- No changes in v2 --- drivers/staging/media/tegra-video/tegra210.c | 52 ++++++++++++++++++++ drivers/staging/media/tegra-video/vi.c | 52 ++------------------ drivers/staging/media/tegra-video/vi.h | 5 ++ 3 files changed, 60 insertions(+), 49 deletions(-) diff --git a/drivers/staging/media/tegra-video/tegra210.c b/drivers/staging/media/tegra-video/tegra210.c index 28d3d05c12c4..d47ba79bac75 100644 --- a/drivers/staging/media/tegra-video/tegra210.c +++ b/drivers/staging/media/tegra-video/tegra210.c @@ -179,6 +179,56 @@ static u32 vi_csi_read(struct tegra_vi_channel *chan, u8 portno, /* * Tegra210 VI channel capture operations */ + +static int tegra210_channel_host1x_syncpt_init(struct tegra_vi_channel *chan) +{ + struct tegra_vi *vi = chan->vi; + unsigned long flags = HOST1X_SYNCPT_CLIENT_MANAGED; + struct host1x_syncpt *fs_sp; + struct host1x_syncpt *mw_sp; + int ret, i; + + for (i = 0; i < chan->numgangports; i++) { + fs_sp = host1x_syncpt_request(&vi->client, flags); + if (!fs_sp) { + dev_err(vi->dev, "failed to request frame start syncpoint\n"); + ret = -ENOMEM; + goto free_syncpts; + } + + mw_sp = host1x_syncpt_request(&vi->client, flags); + if (!mw_sp) { + dev_err(vi->dev, "failed to request memory ack syncpoint\n"); + host1x_syncpt_put(fs_sp); + ret = -ENOMEM; + goto free_syncpts; + } + + chan->frame_start_sp[i] = fs_sp; + chan->mw_ack_sp[i] = mw_sp; + spin_lock_init(&chan->sp_incr_lock[i]); + } + + return 0; + +free_syncpts: + for (i = 0; i < chan->numgangports; i++) { + host1x_syncpt_put(chan->mw_ack_sp[i]); + host1x_syncpt_put(chan->frame_start_sp[i]); + } + return ret; +} + +static void tegra210_channel_host1x_syncpt_free(struct tegra_vi_channel *chan) +{ + int i; + + for (i = 0; i < chan->numgangports; i++) { + host1x_syncpt_put(chan->mw_ack_sp[i]); + host1x_syncpt_put(chan->frame_start_sp[i]); + } +} + static void tegra210_fmt_align(struct v4l2_pix_format *pix, unsigned int bpp) { unsigned int min_bpl; @@ -758,6 +808,8 @@ static const struct tegra_video_format tegra210_video_formats[] = { /* Tegra210 VI operations */ static const struct tegra_vi_ops tegra210_vi_ops = { + .channel_host1x_syncpt_init = tegra210_channel_host1x_syncpt_init, + .channel_host1x_syncpt_free = tegra210_channel_host1x_syncpt_free, .vi_fmt_align = tegra210_fmt_align, .vi_start_streaming = tegra210_vi_start_streaming, .vi_stop_streaming = tegra210_vi_stop_streaming, diff --git a/drivers/staging/media/tegra-video/vi.c b/drivers/staging/media/tegra-video/vi.c index d0c387873d4e..854ffb4b5617 100644 --- a/drivers/staging/media/tegra-video/vi.c +++ b/drivers/staging/media/tegra-video/vi.c @@ -973,21 +973,11 @@ static int tegra_channel_setup_ctrl_handler(struct tegra_vi_channel *chan) return 0; } -static void tegra_channel_host1x_syncpts_free(struct tegra_vi_channel *chan) -{ - int i; - - for (i = 0; i < chan->numgangports; i++) { - host1x_syncpt_put(chan->mw_ack_sp[i]); - host1x_syncpt_put(chan->frame_start_sp[i]); - } -} - static void tegra_channel_cleanup(struct tegra_vi_channel *chan) { v4l2_ctrl_handler_free(&chan->ctrl_handler); media_entity_cleanup(&chan->video.entity); - tegra_channel_host1x_syncpts_free(chan); + chan->vi->ops->channel_host1x_syncpt_free(chan); mutex_destroy(&chan->video_lock); } @@ -1005,42 +995,6 @@ void tegra_channels_cleanup(struct tegra_vi *vi) } } -static int tegra_channel_host1x_syncpt_init(struct tegra_vi_channel *chan) -{ - struct tegra_vi *vi = chan->vi; - unsigned long flags = HOST1X_SYNCPT_CLIENT_MANAGED; - struct host1x_syncpt *fs_sp; - struct host1x_syncpt *mw_sp; - int ret, i; - - for (i = 0; i < chan->numgangports; i++) { - fs_sp = host1x_syncpt_request(&vi->client, flags); - if (!fs_sp) { - dev_err(vi->dev, "failed to request frame start syncpoint\n"); - ret = -ENOMEM; - goto free_syncpts; - } - - mw_sp = host1x_syncpt_request(&vi->client, flags); - if (!mw_sp) { - dev_err(vi->dev, "failed to request memory ack syncpoint\n"); - host1x_syncpt_put(fs_sp); - ret = -ENOMEM; - goto free_syncpts; - } - - chan->frame_start_sp[i] = fs_sp; - chan->mw_ack_sp[i] = mw_sp; - spin_lock_init(&chan->sp_incr_lock[i]); - } - - return 0; - -free_syncpts: - tegra_channel_host1x_syncpts_free(chan); - return ret; -} - static int tegra_channel_init(struct tegra_vi_channel *chan) { struct tegra_vi *vi = chan->vi; @@ -1066,7 +1020,7 @@ static int tegra_channel_init(struct tegra_vi_channel *chan) chan->format.sizeimage = chan->format.bytesperline * TEGRA_DEF_HEIGHT; vi->ops->vi_fmt_align(&chan->format, chan->fmtinfo->bpp); - ret = tegra_channel_host1x_syncpt_init(chan); + ret = vi->ops->channel_host1x_syncpt_init(chan); if (ret) return ret; @@ -1129,7 +1083,7 @@ static int tegra_channel_init(struct tegra_vi_channel *chan) cleanup_media: media_entity_cleanup(&chan->video.entity); free_syncpts: - tegra_channel_host1x_syncpts_free(chan); + vi->ops->channel_host1x_syncpt_free(chan); return ret; } diff --git a/drivers/staging/media/tegra-video/vi.h b/drivers/staging/media/tegra-video/vi.h index 851c4f3fcb91..8fadca33bcc9 100644 --- a/drivers/staging/media/tegra-video/vi.h +++ b/drivers/staging/media/tegra-video/vi.h @@ -38,10 +38,13 @@ enum tegra_vi_pg_mode { }; struct tegra_vi; +struct tegra_vi_channel; /** * struct tegra_vi_ops - Tegra VI operations * @vi_enable: soc-specific operations needed to enable/disable the VI peripheral + * @channel_host1x_syncpt_init: initialize synchronization points + * @channel_host1x_syncpt_free: free all synchronization points * @vi_fmt_align: modify `pix` to fit the hardware alignment * requirements and fill image geometry * @vi_start_streaming: starts media pipeline, subdevice streaming, sets up @@ -52,6 +55,8 @@ struct tegra_vi; */ struct tegra_vi_ops { int (*vi_enable)(struct tegra_vi *vi, bool on); + int (*channel_host1x_syncpt_init)(struct tegra_vi_channel *chan); + void (*channel_host1x_syncpt_free)(struct tegra_vi_channel *chan); void (*vi_fmt_align)(struct v4l2_pix_format *pix, unsigned int bpp); int (*vi_start_streaming)(struct vb2_queue *vq, u32 count); void (*vi_stop_streaming)(struct vb2_queue *vq); From patchwork Mon Nov 28 15:23:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Ceresoli X-Patchwork-Id: 13057711 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2465EC4321E for ; Mon, 28 Nov 2022 15:28:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232421AbiK1P2J (ORCPT ); Mon, 28 Nov 2022 10:28:09 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33716 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231886AbiK1P1T (ORCPT ); Mon, 28 Nov 2022 10:27:19 -0500 Received: from relay11.mail.gandi.net (relay11.mail.gandi.net [217.70.178.231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 15CBE24970; Mon, 28 Nov 2022 07:25:38 -0800 (PST) Received: from booty.fritz.box (unknown [77.244.183.192]) (Authenticated sender: luca.ceresoli@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id E9413100002; Mon, 28 Nov 2022 15:25:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1669649137; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=KAKVyFgksg4NSXevr0L+QPIAsthqMqdls7iQD9SYOTY=; b=WTSsCb/En4Ownxk3os3UhuBlYqEUxtb6B/S8PprqoJD6aWUVoaSSaCII0LMlcBh04drJ3a f1DzEn9XS/FONn/DxlMs7/AvCfYs3TLi1B6TJFfA9ZICSR3L0YiZIipStoENaWEqIQy20I +zjXU/a30rR3nGsgR+McYkjWV2XmSMMdp/1ZR1GgAWVD8oBx6igjyfmLQubPELjFg35dLT ntMCWBWqsG4hgCvpoE8tYkSb9/Nc9T5qaYGfB5otk8BrHNSO75opiZ3jQm3HuYGGX86vHS DBAyOdITvRJyV2wA7Ok+rFojWYg5nJJ+2kH9kugnmTNVYdGrFmVwYW+7cr429w== From: Luca Ceresoli To: David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , Mauro Carvalho Chehab , Greg Kroah-Hartman , Dmitry Osipenko , Hans Verkuil Cc: Luca Ceresoli , linux-media@vger.kernel.org, linux-tegra@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Thomas Petazzoni , Paul Kocialkowski , Richard Leitner Subject: [PATCH v2 17/21] staging: media: tegra-video: add syncpts for Tegra20 to struct tegra_vi Date: Mon, 28 Nov 2022 16:23:32 +0100 Message-Id: <20221128152336.133953-18-luca.ceresoli@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221128152336.133953-1-luca.ceresoli@bootlin.com> References: <20221128152336.133953-1-luca.ceresoli@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org In preparation to implement Tegra20 parallel video capture, add variables to hold the required syncpt. Signed-off-by: Luca Ceresoli --- No changes in v2 --- drivers/staging/media/tegra-video/vi.h | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/staging/media/tegra-video/vi.h b/drivers/staging/media/tegra-video/vi.h index 8fadca33bcc9..ba563cd17296 100644 --- a/drivers/staging/media/tegra-video/vi.h +++ b/drivers/staging/media/tegra-video/vi.h @@ -117,11 +117,13 @@ struct tegra_vi { * @vi: Tegra video input device structure * @frame_start_sp: host1x syncpoint pointer to synchronize programmed capture * start condition with hardware frame start events through host1x - * syncpoint counters. + * syncpoint counters. (Tegra210) * @mw_ack_sp: host1x syncpoint pointer to synchronize programmed memory write * ack trigger condition with hardware memory write done at end of - * frame through host1x syncpoint counters. + * frame through host1x syncpoint counters. (Tegra210) * @sp_incr_lock: protects cpu syncpoint increment. + * @out_sp: host1x syncpoint pointer for frame sync (Tegra20) + * @next_out_sp_idx: next expected value for @out_sp (Tegra20) * * @kthread_start_capture: kthread to start capture of single frame when * vb buffer is available. This thread programs VI CSI hardware @@ -173,6 +175,8 @@ struct tegra_vi_channel { struct host1x_syncpt *mw_ack_sp[GANG_PORTS_MAX]; /* protects the cpu syncpoint increment */ spinlock_t sp_incr_lock[GANG_PORTS_MAX]; + struct host1x_syncpt *out_sp; + u32 next_out_sp_idx; struct task_struct *kthread_start_capture; wait_queue_head_t start_wait; From patchwork Mon Nov 28 15:23:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Ceresoli X-Patchwork-Id: 13057712 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 507B2C4321E for ; Mon, 28 Nov 2022 15:28:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232331AbiK1P2Z (ORCPT ); Mon, 28 Nov 2022 10:28:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60584 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232251AbiK1P1h (ORCPT ); Mon, 28 Nov 2022 10:27:37 -0500 Received: from relay11.mail.gandi.net (relay11.mail.gandi.net [IPv6:2001:4b98:dc4:8::231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 86097264BC; Mon, 28 Nov 2022 07:25:47 -0800 (PST) Received: from booty.fritz.box (unknown [77.244.183.192]) (Authenticated sender: luca.ceresoli@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id 31C9810000F; Mon, 28 Nov 2022 15:25:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1669649146; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Zg4ShTE2huAFd/l9HQyuWaIeflGT7A+U2vvBjt6V8/U=; b=FdpTFgusnl2zyvqc/Wv5msDgnsUMatIcyGziizyckkGp6EEdkYDEY/l9Ujwin0ov1Xr3ou Zd0EjDwPuVibQAn+VWFGGrQzqKA1SqeXIA0wwS5YpvylrSUzs8pLthm4EaWN33PFqSoG+b rt9g/ghi4JUR+MwRXAYKXN9XBdDfP55lMKXYQGrsh6Z1lIHhKIQgvxHRHNzc09NN0q0u0y pT5e4Ff47uWICAcvaO0WFu9Rt+WzNLZXQdJpwVsn7HYuWxSufS+cRfcpvqKpM1HL2wu3OM 7YxH3ZT3Sr73AYSrsWzJc/aiIIgduytKhJsJad74pZtzP1D8+5wUMkMgWO0b3A== From: Luca Ceresoli To: David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , Mauro Carvalho Chehab , Greg Kroah-Hartman , Dmitry Osipenko , Hans Verkuil Cc: Luca Ceresoli , linux-media@vger.kernel.org, linux-tegra@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Thomas Petazzoni , Paul Kocialkowski , Richard Leitner Subject: [PATCH v2 18/21] staging: media: tegra-video: add hooks for planar YUV and H/V flip Date: Mon, 28 Nov 2022 16:23:33 +0100 Message-Id: <20221128152336.133953-19-luca.ceresoli@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221128152336.133953-1-luca.ceresoli@bootlin.com> References: <20221128152336.133953-1-luca.ceresoli@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Tegra20 supports planar YUV422 capture, which can be implemented by writing U and V base address registers in addition to the "main" base buffer address register. It also supports H and V flip, which among others requires to write the start address (i.e. the 1st offset to write, at the end of the buffer or line) in more registers for Y and, for planar formats, U and V. Add minimal hooks in VI to allow per-SoC optional support to those features: - variables in struct tegra_vi for the U and V buffer base offsets - variables in struct tegra_vi for the Y, U and V buffer start offsets - an optional per-soc VI operation to compute those values on queue setup Signed-off-by: Luca Ceresoli --- No changes in v2 --- drivers/staging/media/tegra-video/vi.c | 4 ++++ drivers/staging/media/tegra-video/vi.h | 14 ++++++++++++++ 2 files changed, 18 insertions(+) diff --git a/drivers/staging/media/tegra-video/vi.c b/drivers/staging/media/tegra-video/vi.c index 854ffb4b5617..ebb502a45e96 100644 --- a/drivers/staging/media/tegra-video/vi.c +++ b/drivers/staging/media/tegra-video/vi.c @@ -92,6 +92,7 @@ tegra_get_format_by_fourcc(struct tegra_vi *vi, u32 fourcc) /* * videobuf2 queue operations */ + static int tegra_channel_queue_setup(struct vb2_queue *vq, unsigned int *nbuffers, unsigned int *nplanes, @@ -107,6 +108,9 @@ static int tegra_channel_queue_setup(struct vb2_queue *vq, sizes[0] = chan->format.sizeimage; alloc_devs[0] = chan->vi->dev; + if (chan->vi->ops->channel_queue_setup) + chan->vi->ops->channel_queue_setup(chan); + return 0; } diff --git a/drivers/staging/media/tegra-video/vi.h b/drivers/staging/media/tegra-video/vi.h index ba563cd17296..a23ee8800d33 100644 --- a/drivers/staging/media/tegra-video/vi.h +++ b/drivers/staging/media/tegra-video/vi.h @@ -47,6 +47,7 @@ struct tegra_vi_channel; * @channel_host1x_syncpt_free: free all synchronization points * @vi_fmt_align: modify `pix` to fit the hardware alignment * requirements and fill image geometry + * @channel_queue_setup: additional operations at the end of vb2_ops::queue_setup * @vi_start_streaming: starts media pipeline, subdevice streaming, sets up * VI for capture and runs capture start and capture finish * kthreads for capturing frames to buffer and returns them back. @@ -58,6 +59,7 @@ struct tegra_vi_ops { int (*channel_host1x_syncpt_init)(struct tegra_vi_channel *chan); void (*channel_host1x_syncpt_free)(struct tegra_vi_channel *chan); void (*vi_fmt_align)(struct v4l2_pix_format *pix, unsigned int bpp); + void (*channel_queue_setup)(struct tegra_vi_channel *chan); int (*vi_start_streaming)(struct vb2_queue *vq, u32 count); void (*vi_stop_streaming)(struct vb2_queue *vq); }; @@ -148,6 +150,12 @@ struct tegra_vi { * @queue: vb2 buffers queue * @sequence: V4L2 buffers sequence number * + * @addr_offset_u: U plane base address, relative to buffer base address (only for planar) + * @addr_offset_v: V plane base address, relative to buffer base address (only for planar) + * @start_offset: 1st Y byte to write, relative to buffer base address (for H/V flip) + * @start_offset_u: 1st U byte to write, relative to buffer base address (for H/V flip) + * @start_offset_v: 1st V byte to write, relative to buffer base address (for H/V flip) + * * @capture: list of queued buffers for capture * @start_lock: protects the capture queued list * @done: list of capture done queued buffers @@ -188,6 +196,12 @@ struct tegra_vi_channel { struct vb2_queue queue; u32 sequence; + unsigned int addr_offset_u; + unsigned int addr_offset_v; + unsigned int start_offset; + unsigned int start_offset_u; + unsigned int start_offset_v; + struct list_head capture; /* protects the capture queued list */ spinlock_t start_lock; From patchwork Mon Nov 28 15:23:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Ceresoli X-Patchwork-Id: 13057713 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 15396C47089 for ; Mon, 28 Nov 2022 15:28:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232397AbiK1P2a (ORCPT ); Mon, 28 Nov 2022 10:28:30 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33664 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232283AbiK1P2A (ORCPT ); Mon, 28 Nov 2022 10:28:00 -0500 Received: from relay11.mail.gandi.net (relay11.mail.gandi.net [217.70.178.231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8664724BFD; Mon, 28 Nov 2022 07:25:51 -0800 (PST) Received: from booty.fritz.box (unknown [77.244.183.192]) (Authenticated sender: luca.ceresoli@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id 67DC9100008; Mon, 28 Nov 2022 15:25:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1669649150; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=SYnld2X6HcsXPPtJtXGrLJjXqLCvd2LPM1sx8+DcKyY=; b=fKl4MEugk9wkcRAnckj6mIHVyzraMJAvyicMm5eAsBgil27HnzbnqG5zeEe+s834II43EJ gpmegpjJfV+JVak7mhJOnOVW3Jydf8xPIoqgjwObVv2RH7+Kz0DSDvUxsG6ima+6MHcamv aSSReyh27CgIaAQKhNUpEKYXA+pjbmjq72H4+PC9N9ftHq7x2s6UnKbUxHmKNF/uZi1/7N 01ldNvqchsKV3o0+2P9NpuwOsrDCQ/of1eQ7jmJDzlG321BHzyo5gdeS+FIGhdwR8AuLoA K5FUfOxNRW82SdePOl6MkEemZrznZNYb/Ia2ETLJojRfO/EEu9Rp60O5MB2kXA== From: Luca Ceresoli To: David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , Mauro Carvalho Chehab , Greg Kroah-Hartman , Dmitry Osipenko , Hans Verkuil Cc: Luca Ceresoli , linux-media@vger.kernel.org, linux-tegra@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Thomas Petazzoni , Paul Kocialkowski , Richard Leitner Subject: [PATCH v2 19/21] staging: media: tegra-video: add H/V flip controls Date: Mon, 28 Nov 2022 16:23:34 +0100 Message-Id: <20221128152336.133953-20-luca.ceresoli@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221128152336.133953-1-luca.ceresoli@bootlin.com> References: <20221128152336.133953-1-luca.ceresoli@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Tegra20 can do horizontal and vertical image flip, but Tegra210 cannot (either the hardware, or this driver). In preparation to adding Tegra20 support, add a flag in struct tegra_vi_soc so the generic vi.c code knows whether the flip controls should be added or not. Also provide a generic implementation that simply sets two flags in the channel struct. The Tegra20 implementation will enable flipping at stream start based on those flags. Signed-off-by: Luca Ceresoli --- No changes in v2 --- drivers/staging/media/tegra-video/vi.c | 14 +++++++++++++- drivers/staging/media/tegra-video/vi.h | 8 ++++++++ 2 files changed, 21 insertions(+), 1 deletion(-) diff --git a/drivers/staging/media/tegra-video/vi.c b/drivers/staging/media/tegra-video/vi.c index ebb502a45e96..0dbc3da6f98c 100644 --- a/drivers/staging/media/tegra-video/vi.c +++ b/drivers/staging/media/tegra-video/vi.c @@ -29,7 +29,7 @@ #include "vi.h" #include "video.h" -#define MAX_CID_CONTROLS 1 +#define MAX_CID_CONTROLS 3 /** * struct tegra_vi_graph_entity - Entity in the video graph @@ -893,6 +893,12 @@ static int vi_s_ctrl(struct v4l2_ctrl *ctrl) case V4L2_CID_TEGRA_SYNCPT_TIMEOUT_RETRY: chan->syncpt_timeout_retry = ctrl->val; break; + case V4L2_CID_HFLIP: + chan->hflip = ctrl->val; + break; + case V4L2_CID_VFLIP: + chan->vflip = ctrl->val; + break; default: return -EINVAL; } @@ -964,6 +970,12 @@ static int tegra_channel_setup_ctrl_handler(struct tegra_vi_channel *chan) v4l2_ctrl_handler_free(&chan->ctrl_handler); return ret; } + + if (chan->vi->soc->has_h_v_flip) { + v4l2_ctrl_new_std(&chan->ctrl_handler, &vi_ctrl_ops, V4L2_CID_HFLIP, 0, 1, 1, 0); + v4l2_ctrl_new_std(&chan->ctrl_handler, &vi_ctrl_ops, V4L2_CID_VFLIP, 0, 1, 1, 0); + } + #endif /* setup the controls */ diff --git a/drivers/staging/media/tegra-video/vi.h b/drivers/staging/media/tegra-video/vi.h index a23ee8800d33..7cb038957f1b 100644 --- a/drivers/staging/media/tegra-video/vi.h +++ b/drivers/staging/media/tegra-video/vi.h @@ -74,6 +74,7 @@ struct tegra_vi_ops { * @hw_revision: VI hw_revision * @vi_max_channels: supported max streaming channels * @vi_max_clk_hz: VI clock max frequency + * @has_h_v_flip: the chip can do H adn V flip, and the driver implements it */ struct tegra_vi_soc { const struct tegra_video_format *video_formats; @@ -83,6 +84,7 @@ struct tegra_vi_soc { u32 hw_revision; unsigned int vi_max_channels; unsigned int vi_max_clk_hz; + bool has_h_v_flip:1; }; /** @@ -170,6 +172,9 @@ struct tegra_vi { * @syncpt_timeout_retry: syncpt timeout retry count for the capture * @pg_mode: test pattern generator mode (disabled/direct/patch) * @notifier: V4L2 asynchronous subdevs notifier + * + * @hflip: Horizontal flip is enabled + * @vflip: Vertical flip is enabled */ struct tegra_vi_channel { struct list_head list; @@ -219,6 +224,9 @@ struct tegra_vi_channel { enum tegra_vi_pg_mode pg_mode; struct v4l2_async_notifier notifier; + + bool hflip:1; + bool vflip:1; }; /** From patchwork Mon Nov 28 15:23:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Ceresoli X-Patchwork-Id: 13057714 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BFE09C4167D for ; Mon, 28 Nov 2022 15:28:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232413AbiK1P2h (ORCPT ); Mon, 28 Nov 2022 10:28:37 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60796 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232003AbiK1P2C (ORCPT ); Mon, 28 Nov 2022 10:28:02 -0500 Received: from relay11.mail.gandi.net (relay11.mail.gandi.net [IPv6:2001:4b98:dc4:8::231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5CFDA24F01; Mon, 28 Nov 2022 07:26:00 -0800 (PST) Received: from booty.fritz.box (unknown [77.244.183.192]) (Authenticated sender: luca.ceresoli@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id 22A3010000F; Mon, 28 Nov 2022 15:25:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1669649158; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=OoXUT9AdbVFMNOQAniPu8hp8jV2YODAHFkN2Ysky5NE=; b=ZZN3c1/UkAfE2mAI9i9VugV9EwP3ltAetbNEdfatM0P4bWuqUbGZ/WIsF/Jfp/TDqw2OnR 93aFCAzh1KMRD+mW9WM750syDgxEchH3qN24mi9SmJ5VIOWpQDUBfavE7LGxTQtxKLhVtJ P+BJ+6Lse5F2EDyB8UTQhkQ0YcLK7No8Pankwd/hlGhQ/PkmOPTplJmNAkuaUoNDEgyNzt d2sL5+hCfWF11pHPQD0X63njO0X0MyVn4Hp7zWBBtSG3WiOR6B45mx/P2sb17/QRTaRgUl 3632NUAPAS237mR69QoKaiIUxG2Rav33WDllPYzWGzLriAq3Cw8MElxsGIOLVA== From: Luca Ceresoli To: David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , Mauro Carvalho Chehab , Greg Kroah-Hartman , Dmitry Osipenko , Hans Verkuil Cc: Luca Ceresoli , linux-media@vger.kernel.org, linux-tegra@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Thomas Petazzoni , Paul Kocialkowski , Richard Leitner Subject: [PATCH v2 20/21] staging: media: tegra-video: add support for VIP (parallel video input) Date: Mon, 28 Nov 2022 16:23:35 +0100 Message-Id: <20221128152336.133953-21-luca.ceresoli@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221128152336.133953-1-luca.ceresoli@bootlin.com> References: <20221128152336.133953-1-luca.ceresoli@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The VI peripheral of Tegra supports capturing from MIPI CSI-2 or parallel video (called VIP in the docs). MIPI CSI-2 is already implemented. Add a VIP implementation. Signed-off-by: Luca Ceresoli --- No changes in v2 --- MAINTAINERS | 1 + drivers/staging/media/tegra-video/Makefile | 1 + drivers/staging/media/tegra-video/vip.c | 298 +++++++++++++++++++++ drivers/staging/media/tegra-video/vip.h | 72 +++++ 4 files changed, 372 insertions(+) create mode 100644 drivers/staging/media/tegra-video/vip.c create mode 100644 drivers/staging/media/tegra-video/vip.h diff --git a/MAINTAINERS b/MAINTAINERS index 0c97ce22735d..1601465e8e31 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -20322,6 +20322,7 @@ L: linux-tegra@vger.kernel.org S: Maintained F: Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml F: Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vip.yaml +F: drivers/staging/media/tegra-video/vip.* TEGRA XUSB PADCTL DRIVER M: JC Kuo diff --git a/drivers/staging/media/tegra-video/Makefile b/drivers/staging/media/tegra-video/Makefile index dfa2ef8f99ef..3c8ec1bb1f3e 100644 --- a/drivers/staging/media/tegra-video/Makefile +++ b/drivers/staging/media/tegra-video/Makefile @@ -2,6 +2,7 @@ tegra-video-objs := \ video.o \ vi.o \ + vip.o \ csi.o tegra-video-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210.o diff --git a/drivers/staging/media/tegra-video/vip.c b/drivers/staging/media/tegra-video/vip.c new file mode 100644 index 000000000000..cbf0c36fb098 --- /dev/null +++ b/drivers/staging/media/tegra-video/vip.c @@ -0,0 +1,298 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Parallel video capture module (VIP) for the Tegra VI. + * + * This file implements the VIP-specific infrastructure. + * + * Copyright (C) 2022 SKIDATA GmbH + * Author: Luca Ceresoli + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include "vip.h" + +static inline struct tegra_vip *host1x_client_to_vip(struct host1x_client *client) +{ + return container_of(client, struct tegra_vip, client); +} + +static inline struct tegra_vip_channel *subdev_to_vip_channel(struct v4l2_subdev *subdev) +{ + return container_of(subdev, struct tegra_vip_channel, subdev); +} + +static inline struct tegra_vip *vip_channel_to_vip(struct tegra_vip_channel *chan) +{ + return container_of(chan, struct tegra_vip, chan); +} + +/* Find the previous subdev in the pipeline (i.e. the one connected to our sink pad) */ +static struct v4l2_subdev *tegra_vip_channel_get_prev_subdev(struct tegra_vip_channel *chan) +{ + struct media_pad *remote_pad; + + remote_pad = media_pad_remote_pad_first(&chan->pads[TEGRA_VIP_PAD_SINK]); + if (!remote_pad) + return NULL; + + return media_entity_to_v4l2_subdev(remote_pad->entity); +} + +static int tegra_vip_enable_stream(struct v4l2_subdev *subdev) +{ + struct tegra_vip_channel *vip_chan = subdev_to_vip_channel(subdev); + struct tegra_vip *vip = vip_channel_to_vip(vip_chan); + struct v4l2_subdev *prev_subdev = tegra_vip_channel_get_prev_subdev(vip_chan); + int err; + + err = pm_runtime_resume_and_get(vip->dev); + if (err) + return dev_err_probe(vip->dev, err, "failed to get runtime PM\n"); + + err = vip->soc->ops->vip_start_streaming(vip_chan); + if (err < 0) + goto err_start_streaming; + + err = v4l2_subdev_call(prev_subdev, video, s_stream, true); + if (err < 0 && err != -ENOIOCTLCMD) + goto err_prev_subdev_start_stream; + + return 0; + +err_prev_subdev_start_stream: +err_start_streaming: + pm_runtime_put(vip->dev); + return err; +} + +static int tegra_vip_disable_stream(struct v4l2_subdev *subdev) +{ + struct tegra_vip_channel *vip_chan = subdev_to_vip_channel(subdev); + struct tegra_vip *vip = vip_channel_to_vip(vip_chan); + struct v4l2_subdev *prev_subdev = tegra_vip_channel_get_prev_subdev(vip_chan); + + v4l2_subdev_call(prev_subdev, video, s_stream, false); + + pm_runtime_put(vip->dev); + + return 0; +} + +static int tegra_vip_s_stream(struct v4l2_subdev *subdev, int enable) +{ + int err; + + if (enable) + err = tegra_vip_enable_stream(subdev); + else + err = tegra_vip_disable_stream(subdev); + + return err; +} + +static const struct v4l2_subdev_video_ops tegra_vip_video_ops = { + .s_stream = tegra_vip_s_stream, +}; + +static const struct v4l2_subdev_ops tegra_vip_ops = { + .video = &tegra_vip_video_ops, +}; + +static int tegra_vip_channel_of_parse(struct tegra_vip *vip) +{ + struct device *dev = vip->dev; + struct device_node *node; + struct v4l2_fwnode_endpoint v4l2_ep = { + .bus_type = V4L2_MBUS_PARALLEL + }; + struct fwnode_handle *fwh; + struct device_node *ep; + unsigned int portno, num_pads; + int err; + + node = of_get_child_by_name(dev->of_node, "channel"); + + err = of_property_read_u32(node, "reg", &portno); + if (err < 0) { + dev_err_probe(dev, err, "%pOF: error reading reg property\n", node); + goto err_node_put; + } + + if (portno != 0) { + err = -EINVAL; + dev_err_probe(dev, err, "%pOF: invalid reg property\n", node); + goto err_node_put; + } + + ep = of_graph_get_endpoint_by_regs(node, 0, 0); + if (!ep) { + err = -EINVAL; + dev_err_probe(dev, err, "%pOF: error getting endpoint node\n", node); + goto err_node_put; + } + + fwh = of_fwnode_handle(ep); + err = v4l2_fwnode_endpoint_parse(fwh, &v4l2_ep); + of_node_put(ep); + if (err) { + dev_err_probe(dev, err, "%pOF: failed to parse v4l2 endpoint\n", node); + goto err_node_put; + } + + num_pads = of_graph_get_endpoint_count(node); + if (num_pads != TEGRA_VIP_PADS_NUM) { + err = -EINVAL; + dev_err_probe(dev, err, "%pOF: need 2 pads, got %d\n", node, num_pads); + goto err_node_put; + } + + vip->chan.of_node = of_node_get(node); + vip->chan.pads[TEGRA_VIP_PAD_SINK].flags = MEDIA_PAD_FL_SINK; + vip->chan.pads[TEGRA_VIP_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE; + + return 0; + +err_node_put: + of_node_put(node); + return err; +} + +static int tegra_vip_channel_init(struct tegra_vip *vip) +{ + struct v4l2_subdev *subdev; + int err; + + subdev = &vip->chan.subdev; + v4l2_subdev_init(subdev, &tegra_vip_ops); + subdev->dev = vip->dev; + snprintf(subdev->name, V4L2_SUBDEV_NAME_SIZE, "%s", + kbasename(vip->chan.of_node->full_name)); + + v4l2_set_subdevdata(subdev, &vip->chan); + subdev->fwnode = of_fwnode_handle(vip->chan.of_node); + subdev->entity.function = MEDIA_ENT_F_VID_IF_BRIDGE; + + err = media_entity_pads_init(&subdev->entity, TEGRA_VIP_PADS_NUM, vip->chan.pads); + if (err) + return dev_err_probe(vip->dev, err, "failed to initialize media entity\n"); + + err = v4l2_async_register_subdev(subdev); + if (err) { + dev_err_probe(vip->dev, err, "failed to register subdev\n"); + goto err_register_subdev; + } + + return 0; + +err_register_subdev: + media_entity_cleanup(&subdev->entity); + return err; +} + +static int tegra_vip_init(struct host1x_client *client) +{ + struct tegra_vip *vip = host1x_client_to_vip(client); + int err; + + err = tegra_vip_channel_of_parse(vip); + if (err) + return err; + + err = tegra_vip_channel_init(vip); + if (err) + goto err_init; + + return 0; + +err_init: + of_node_put(vip->chan.of_node); + return err; +} + +static int tegra_vip_exit(struct host1x_client *client) +{ + struct tegra_vip *vip = host1x_client_to_vip(client); + struct v4l2_subdev *subdev = &vip->chan.subdev; + + v4l2_async_unregister_subdev(subdev); + media_entity_cleanup(&subdev->entity); + of_node_put(vip->chan.of_node); + + return 0; +} + +static const struct host1x_client_ops vip_client_ops = { + .init = tegra_vip_init, + .exit = tegra_vip_exit, +}; + +static int tegra_vip_probe(struct platform_device *pdev) +{ + struct tegra_vip *vip; + int err; + + dev_dbg(&pdev->dev, "Probing VIP \"%s\" from %pOF\n", pdev->name, pdev->dev.of_node); + + vip = devm_kzalloc(&pdev->dev, sizeof(*vip), GFP_KERNEL); + if (!vip) + return -ENOMEM; + + vip->soc = of_device_get_match_data(&pdev->dev); + + vip->dev = &pdev->dev; + platform_set_drvdata(pdev, vip); + + /* initialize host1x interface */ + INIT_LIST_HEAD(&vip->client.list); + vip->client.ops = &vip_client_ops; + vip->client.dev = &pdev->dev; + + err = host1x_client_register(&vip->client); + if (err) + return dev_err_probe(&pdev->dev, err, "failed to register host1x client\n"); + + pm_runtime_enable(&pdev->dev); + + return 0; +} + +static int tegra_vip_remove(struct platform_device *pdev) +{ + struct tegra_vip *vip = platform_get_drvdata(pdev); + int err; + + err = host1x_client_unregister(&vip->client); + if (err) + return dev_err_probe(&pdev->dev, err, "failed to unregister host1x client\n"); + + pm_runtime_disable(&pdev->dev); + + return 0; +} + +static const struct of_device_id tegra_vip_of_id_table[] = { +#if defined(CONFIG_ARCH_TEGRA_2x_SOC) + { .compatible = "nvidia,tegra20-vip", .data = &tegra20_vip_soc }, +#endif + { } +}; +MODULE_DEVICE_TABLE(of, tegra_vip_of_id_table); + +struct platform_driver tegra_vip_driver = { + .driver = { + .name = "tegra-vip", + .of_match_table = tegra_vip_of_id_table, + }, + .probe = tegra_vip_probe, + .remove = tegra_vip_remove, +}; diff --git a/drivers/staging/media/tegra-video/vip.h b/drivers/staging/media/tegra-video/vip.h new file mode 100644 index 000000000000..58b3ec28c364 --- /dev/null +++ b/drivers/staging/media/tegra-video/vip.h @@ -0,0 +1,72 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2022 SKIDATA GmbH + * Author: Luca Ceresoli + */ + +#ifndef __TEGRA_VIP_H__ +#define __TEGRA_VIP_H__ + +#include +#include +#include + +enum { + TEGRA_VIP_PAD_SINK, + TEGRA_VIP_PAD_SOURCE, + TEGRA_VIP_PADS_NUM, +}; + +struct tegra_vip; + +/** + * struct tegra_vip_channel - Tegra VIP (parallel video capture) channel + * + * @subdev: V4L2 subdevice associated with this channel + * @pads: media pads for the subdevice entity + * @of_node: vip device tree node + */ +struct tegra_vip_channel { + struct v4l2_subdev subdev; + struct media_pad pads[TEGRA_VIP_PADS_NUM]; + struct device_node *of_node; +}; + +/** + * struct tegra_vip_ops - Tegra VIP operations + * + * @vip_start_streaming: programs vip hardware to enable streaming. + */ +struct tegra_vip_ops { + int (*vip_start_streaming)(struct tegra_vip_channel *vip_chan); +}; + +/** + * struct tegra_vip_soc - NVIDIA Tegra VIP SoC structure + * + * @ops: vip hardware operations + */ +struct tegra_vip_soc { + const struct tegra_vip_ops *ops; +}; + +/** + * struct tegra_vip - NVIDIA Tegra VIP device structure + * + * @dev: device struct + * @client: host1x_client struct + * @soc: pointer to SoC data structure + * @chan: the VIP channel + */ +struct tegra_vip { + struct device *dev; + struct host1x_client client; + const struct tegra_vip_soc *soc; + struct tegra_vip_channel chan; +}; + +#if defined(CONFIG_ARCH_TEGRA_2x_SOC) +extern const struct tegra_vip_soc tegra20_vip_soc; +#endif + +#endif From patchwork Mon Nov 28 15:23:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Ceresoli X-Patchwork-Id: 13057715 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E498BC4321E for ; Mon, 28 Nov 2022 15:28:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232427AbiK1P2r (ORCPT ); Mon, 28 Nov 2022 10:28:47 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60522 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231863AbiK1P2K (ORCPT ); Mon, 28 Nov 2022 10:28:10 -0500 Received: from relay11.mail.gandi.net (relay11.mail.gandi.net [IPv6:2001:4b98:dc4:8::231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C1E9111A18; Mon, 28 Nov 2022 07:26:10 -0800 (PST) Received: from booty.fritz.box (unknown [77.244.183.192]) (Authenticated sender: luca.ceresoli@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id 4C34F100009; Mon, 28 Nov 2022 15:25:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1669649169; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=xdXrhPG0nMnVZkGqWG5Nps9bsJmZujugVgt8Zlukom8=; b=LA/NfJbyp4jY8FSmkomNVhPTCA2X/oeH8sfLShC+zvUW9c4a97ktYsRs9dQKqCfurz0uOG jOk/XI4kTK1AoJzEKXGbIwboCdjpCdWxC3RV3aOzGyLY9kX3jAdIWlynp/l0B/5/VyY+xi 06UcF1GWVD70E5EqcWtUzSVX5qBdXBKxPIT+i4YHdmG3JuyOdoFkX2wlfUfaqNQneoRxf+ 8aSVbAPf38NFGERVlh4owFza8oLF6O8CB3cQNCrGjemcvKLDMQ8M4Hus90pjuw0Qy+gt7X bRmUSIOTtRxNPcErUh5aV8+/3YntDhjeHBSuUnI5E4SIHRjQ5aL0ywplK3q8xg== From: Luca Ceresoli To: David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Thierry Reding , Jonathan Hunter , Sowjanya Komatineni , Mauro Carvalho Chehab , Greg Kroah-Hartman , Dmitry Osipenko , Hans Verkuil Cc: Luca Ceresoli , linux-media@vger.kernel.org, linux-tegra@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Thomas Petazzoni , Paul Kocialkowski , Richard Leitner Subject: [PATCH v2 21/21] staging: media: tegra-video: add tegra20 variant Date: Mon, 28 Nov 2022 16:23:36 +0100 Message-Id: <20221128152336.133953-22-luca.ceresoli@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221128152336.133953-1-luca.ceresoli@bootlin.com> References: <20221128152336.133953-1-luca.ceresoli@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The staging tegra-video driver currently implements MIPI CSI-2 video capture for Tegra210. Add support for parallel video capture (VIP) on Tegra20. With the generalizations added to the VI driver in previous commits, this is only a matter of adding the tegra20.c implementation and registering it. Unfortunately there was no documentation available for the VI or VIP peripherals of Tegra20 (or any other Tegra chips). This implementation has been based entirely on the code from a vendor kernel based on Linux 3.1 and massively adapted to fit into the tegra-video driver. Parts of this code is definitely non-optimal to say the least (especially tegra20_vi_enable() and the single-frame capture logic), but it was impossible to improve it. Signed-off-by: Luca Ceresoli --- Changed in v2: - fix tegra20_vi_enable() to clear bit when on==false - clamp width/height from set/try_fmt to avoid returning sizeimage=0 (fixes v4l2-compliance) --- MAINTAINERS | 1 + drivers/staging/media/tegra-video/Makefile | 1 + drivers/staging/media/tegra-video/tegra20.c | 661 ++++++++++++++++++++ drivers/staging/media/tegra-video/vi.c | 3 + drivers/staging/media/tegra-video/vi.h | 3 + drivers/staging/media/tegra-video/video.c | 5 + drivers/staging/media/tegra-video/video.h | 1 + 7 files changed, 675 insertions(+) create mode 100644 drivers/staging/media/tegra-video/tegra20.c diff --git a/MAINTAINERS b/MAINTAINERS index 1601465e8e31..9869746863b2 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -20322,6 +20322,7 @@ L: linux-tegra@vger.kernel.org S: Maintained F: Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml F: Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vip.yaml +F: drivers/staging/media/tegra-video/tegra20.c F: drivers/staging/media/tegra-video/vip.* TEGRA XUSB PADCTL DRIVER diff --git a/drivers/staging/media/tegra-video/Makefile b/drivers/staging/media/tegra-video/Makefile index 3c8ec1bb1f3e..6c7552e05109 100644 --- a/drivers/staging/media/tegra-video/Makefile +++ b/drivers/staging/media/tegra-video/Makefile @@ -5,5 +5,6 @@ tegra-video-objs := \ vip.o \ csi.o +tegra-video-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20.o tegra-video-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210.o obj-$(CONFIG_VIDEO_TEGRA) += tegra-video.o diff --git a/drivers/staging/media/tegra-video/tegra20.c b/drivers/staging/media/tegra-video/tegra20.c new file mode 100644 index 000000000000..002a66d12ecb --- /dev/null +++ b/drivers/staging/media/tegra-video/tegra20.c @@ -0,0 +1,661 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Tegra20-specific VI implementation + * + * Copyright (C) 2022 SKIDATA GmbH + * Author: Luca Ceresoli + */ + +/* + * This source file contains Tegra20 supported video formats, + * VI and VIP SoC specific data, operations and registers accessors. + */ + +#include +#include +#include +#include +#include +#include + +#include "vip.h" +#include "vi.h" + +#define TEGRA_VI_SYNCPT_WAIT_TIMEOUT msecs_to_jiffies(200) + +/* This are just good-sense numbers. The actual min/max is not documented. */ +#define TEGRA20_MIN_WIDTH 32U +#define TEGRA20_MIN_HEIGHT 32U +#define TEGRA20_MAX_WIDTH 2048U +#define TEGRA20_MAX_HEIGHT 2048U + +/* -------------------------------------------------------------------------- + * Registers + */ + +#define TEGRA_VI_CONT_SYNCPT_OUT_1 0x0060 +#define VI_CONT_SYNCPT_OUT_1_CONTINUOUS_SYNCPT BIT(8) +#define VI_CONT_SYNCPT_OUT_1_SYNCPT_IDX_SFT 0 + +#define TEGRA_VI_VI_INPUT_CONTROL 0x0088 +#define VI_INPUT_FIELD_DETECT BIT(27) +#define VI_INPUT_BT656 BIT(25) +#define VI_INPUT_YUV_INPUT_FORMAT_SFT 8 /* bits [9:8] */ +#define VI_INPUT_YUV_INPUT_FORMAT_UYVY (0 << VI_INPUT_YUV_INPUT_FORMAT_SFT) +#define VI_INPUT_YUV_INPUT_FORMAT_VYUY (1 << VI_INPUT_YUV_INPUT_FORMAT_SFT) +#define VI_INPUT_YUV_INPUT_FORMAT_YUYV (2 << VI_INPUT_YUV_INPUT_FORMAT_SFT) +#define VI_INPUT_YUV_INPUT_FORMAT_YVYU (3 << VI_INPUT_YUV_INPUT_FORMAT_SFT) +#define VI_INPUT_INPUT_FORMAT_SFT 2 /* bits [5:2] */ +#define VI_INPUT_INPUT_FORMAT_YUV422 (0 << VI_INPUT_INPUT_FORMAT_SFT) +#define VI_INPUT_VIP_INPUT_ENABLE BIT(1) + +#define TEGRA_VI_VI_CORE_CONTROL 0x008c +#define VI_VI_CORE_CONTROL_PLANAR_CONV_IN_SEL_EXT BIT(31) +#define VI_VI_CORE_CONTROL_CSC_INPUT_SEL_EXT BIT(30) +#define VI_VI_CORE_CONTROL_INPUT_TO_ALT_MUX_SFT 27 +#define VI_VI_CORE_CONTROL_INPUT_TO_CORE_EXT_SFT 24 +#define VI_VI_CORE_CONTROL_OUTPUT_TO_ISP_EXT_SFT 21 +#define VI_VI_CORE_CONTROL_ISP_HOST_STALL_OFF BIT(20) +#define VI_VI_CORE_CONTROL_V_DOWNSCALING BIT(19) +#define VI_VI_CORE_CONTROL_V_AVERAGING BIT(18) +#define VI_VI_CORE_CONTROL_H_DOWNSCALING BIT(17) +#define VI_VI_CORE_CONTROL_H_AVERAGING BIT(16) +#define VI_VI_CORE_CONTROL_CSC_INPUT_SEL BIT(11) +#define VI_VI_CORE_CONTROL_PLANAR_CONV_INPUT_SEL BIT(10) +#define VI_VI_CORE_CONTROL_INPUT_TO_CORE_SFT 8 +#define VI_VI_CORE_CONTROL_ISP_DOWNSAMPLE_SFT 5 +#define VI_VI_CORE_CONTROL_OUTPUT_TO_EPP_SFT 2 +#define VI_VI_CORE_CONTROL_OUTPUT_TO_ISP_SFT 0 + +#define TEGRA_VI_VI_FIRST_OUTPUT_CONTROL 0x0090 +#define VI_OUTPUT_FORMAT_EXT BIT(22) +#define VI_OUTPUT_V_DIRECTION BIT(20) +#define VI_OUTPUT_H_DIRECTION BIT(19) +#define VI_OUTPUT_YUV_OUTPUT_FORMAT_SFT 17 +#define VI_OUTPUT_YUV_OUTPUT_FORMAT_UYVY (0 << VI_OUTPUT_YUV_OUTPUT_FORMAT_SFT) +#define VI_OUTPUT_YUV_OUTPUT_FORMAT_VYUY (1 << VI_OUTPUT_YUV_OUTPUT_FORMAT_SFT) +#define VI_OUTPUT_YUV_OUTPUT_FORMAT_YUYV (2 << VI_OUTPUT_YUV_OUTPUT_FORMAT_SFT) +#define VI_OUTPUT_YUV_OUTPUT_FORMAT_YVYU (3 << VI_OUTPUT_YUV_OUTPUT_FORMAT_SFT) +#define VI_OUTPUT_OUTPUT_BYTE_SWAP BIT(16) +#define VI_OUTPUT_LAST_PIXEL_DUPLICATION BIT(8) +#define VI_OUTPUT_OUTPUT_FORMAT_SFT 0 +#define VI_OUTPUT_OUTPUT_FORMAT_YUV422POST (3 << VI_OUTPUT_OUTPUT_FORMAT_SFT) +#define VI_OUTPUT_OUTPUT_FORMAT_YUV420PLANAR (6 << VI_OUTPUT_OUTPUT_FORMAT_SFT) + +#define TEGRA_VI_VIP_H_ACTIVE 0x00a4 +#define VI_VIP_H_ACTIVE_PERIOD_SFT 16 /* active pixels/line, must be even */ +#define VI_VIP_H_ACTIVE_START_SFT 0 + +#define TEGRA_VI_VIP_V_ACTIVE 0x00a8 +#define VI_VIP_V_ACTIVE_PERIOD_SFT 16 /* active lines */ +#define VI_VIP_V_ACTIVE_START_SFT 0 + +#define TEGRA_VI_VB0_START_ADDRESS_FIRST 0x00c4 +#define TEGRA_VI_VB0_BASE_ADDRESS_FIRST 0x00c8 +#define TEGRA_VI_VB0_START_ADDRESS_U 0x00cc +#define TEGRA_VI_VB0_BASE_ADDRESS_U 0x00d0 +#define TEGRA_VI_VB0_START_ADDRESS_V 0x00d4 +#define TEGRA_VI_VB0_BASE_ADDRESS_V 0x00d8 + +#define TEGRA_VI_FIRST_OUTPUT_FRAME_SIZE 0x00e0 +#define VI_FIRST_OUTPUT_FRAME_HEIGHT_SFT 16 +#define VI_FIRST_OUTPUT_FRAME_WIDTH_SFT 0 + +#define TEGRA_VI_VB0_COUNT_FIRST 0x00e4 + +#define TEGRA_VI_VB0_SIZE_FIRST 0x00e8 +#define VI_VB0_SIZE_FIRST_V_SFT 16 +#define VI_VB0_SIZE_FIRST_H_SFT 0 + +#define TEGRA_VI_VB0_BUFFER_STRIDE_FIRST 0x00ec +#define VI_VB0_BUFFER_STRIDE_FIRST_CHROMA_SFT 30 +#define VI_VB0_BUFFER_STRIDE_FIRST_LUMA_SFT 0 + +#define TEGRA_VI_H_LPF_CONTROL 0x0108 +#define VI_H_LPF_CONTROL_CHROMA_SFT 16 +#define VI_H_LPF_CONTROL_LUMA_SFT 0 + +#define TEGRA_VI_H_DOWNSCALE_CONTROL 0x010c +#define TEGRA_VI_V_DOWNSCALE_CONTROL 0x0110 + +#define TEGRA_VI_VIP_INPUT_STATUS 0x0144 + +#define TEGRA_VI_VI_DATA_INPUT_CONTROL 0x0168 +#define VI_DATA_INPUT_SFT 0 /* [11:0] = mask pin inputs to VI core */ + +#define TEGRA_VI_PIN_INPUT_ENABLE 0x016c +#define VI_PIN_INPUT_VSYNC BIT(14) +#define VI_PIN_INPUT_HSYNC BIT(13) +#define VI_PIN_INPUT_VD_SFT 0 /* [11:0] = data bin N input enable */ + +#define TEGRA_VI_PIN_INVERSION 0x0174 +#define VI_PIN_INVERSION_VSYNC_ACTIVE_HIGH BIT(1) +#define VI_PIN_INVERSION_HSYNC_ACTIVE_HIGH BIT(0) + +#define TEGRA_VI_CAMERA_CONTROL 0x01a0 +#define VI_CAMERA_CONTROL_STOP_CAPTURE BIT(2) +#define VI_CAMERA_CONTROL_TEST_MODE BIT(1) +#define VI_CAMERA_CONTROL_VIP_ENABLE BIT(0) + +#define TEGRA_VI_VI_ENABLE 0x01a4 +#define VI_VI_ENABLE_SW_FLOW_CONTROL_OUT1 BIT(1) +#define VI_VI_ENABLE_FIRST_OUTPUT_TO_MEM_DISABLE BIT(0) + +#define TEGRA_VI_VI_RAISE 0x01ac +#define VI_VI_RAISE_ON_EDGE BIT(0) + +/* -------------------------------------------------------------------------- + * VI + */ + +static void tegra20_vi_write(struct tegra_vi_channel *chan, unsigned int addr, u32 val) +{ + writel(val, chan->vi->iomem + addr); +} + +/* + * Get the main input format (YUV/RGB...) and the YUV variant as values to + * be written into registers for the current VI input mbus code. + */ +static void tegra20_vi_get_input_formats(struct tegra_vi_channel *chan, + unsigned int *main_input_format, + unsigned int *yuv_input_format) +{ + unsigned int input_mbus_code = chan->fmtinfo->code; + + (*main_input_format) = VI_INPUT_INPUT_FORMAT_YUV422; + + switch (input_mbus_code) { + case MEDIA_BUS_FMT_UYVY8_2X8: + (*yuv_input_format) = VI_INPUT_YUV_INPUT_FORMAT_UYVY; + break; + case MEDIA_BUS_FMT_VYUY8_2X8: + (*yuv_input_format) = VI_INPUT_YUV_INPUT_FORMAT_VYUY; + break; + case MEDIA_BUS_FMT_YUYV8_2X8: + (*yuv_input_format) = VI_INPUT_YUV_INPUT_FORMAT_YUYV; + break; + case MEDIA_BUS_FMT_YVYU8_2X8: + (*yuv_input_format) = VI_INPUT_YUV_INPUT_FORMAT_YVYU; + break; + } +} + +/* + * Get the main output format (YUV/RGB...) and the YUV variant as values to + * be written into registers for the current VI output pixel format. + */ +static void tegra20_vi_get_output_formats(struct tegra_vi_channel *chan, + unsigned int *main_output_format, + unsigned int *yuv_output_format) +{ + u32 output_fourcc = chan->format.pixelformat; + + /* Default to YUV422 non-planar (U8Y8V8Y8) after downscaling */ + (*main_output_format) = VI_OUTPUT_OUTPUT_FORMAT_YUV422POST; + (*yuv_output_format) = VI_OUTPUT_YUV_OUTPUT_FORMAT_UYVY; + + switch (output_fourcc) { + case V4L2_PIX_FMT_UYVY: + (*yuv_output_format) = VI_OUTPUT_YUV_OUTPUT_FORMAT_UYVY; + break; + case V4L2_PIX_FMT_VYUY: + (*yuv_output_format) = VI_OUTPUT_YUV_OUTPUT_FORMAT_VYUY; + break; + case V4L2_PIX_FMT_YUYV: + (*yuv_output_format) = VI_OUTPUT_YUV_OUTPUT_FORMAT_YUYV; + break; + case V4L2_PIX_FMT_YVYU: + (*yuv_output_format) = VI_OUTPUT_YUV_OUTPUT_FORMAT_YVYU; + break; + case V4L2_PIX_FMT_YUV420: + case V4L2_PIX_FMT_YVU420: + (*main_output_format) = VI_OUTPUT_OUTPUT_FORMAT_YUV420PLANAR; + break; + } +} + +/* + * Make the VI to be accessible (needed on Tegra20). + * + * This function writes an unknown bit into an unknown register. The code + * comes from a downstream 3.1 kernel that has a working VIP driver for + * Tegra20, and removing it makes the VI completely unaccessible. It should + * be rewritten and possibly moved elsewhere, but the appropriate location + * and implementation is unknown due to a total lack of documentation. + */ +static int tegra20_vi_enable(struct tegra_vi *vi, bool on) +{ + /* from arch/arm/mach-tegra/iomap.h */ + const phys_addr_t TEGRA_APB_MISC_BASE = 0x70000000; + const unsigned long reg_offset = 0x42c; + void __iomem *apb_misc; + u32 val; + + apb_misc = ioremap(TEGRA_APB_MISC_BASE, PAGE_SIZE); + if (!apb_misc) + apb_misc = ERR_PTR(-ENOENT); + if (IS_ERR(apb_misc)) + return dev_err_probe(vi->dev, PTR_ERR(apb_misc), "cannot access APB_MISC"); + + val = readl(apb_misc + reg_offset); + val &= ~BIT(0); + val |= on ? BIT(0) : 0; + writel(val, apb_misc + reg_offset); + iounmap(apb_misc); + + return 0; +} + +static int tegra20_channel_host1x_syncpt_init(struct tegra_vi_channel *chan) +{ + struct tegra_vi *vi = chan->vi; + struct host1x_syncpt *out_sp; + + out_sp = host1x_syncpt_request(&vi->client, HOST1X_SYNCPT_CLIENT_MANAGED); + if (!out_sp) + return dev_err_probe(vi->dev, -ENOMEM, "failed to request syncpoint\n"); + + chan->out_sp = out_sp; + + return 0; +} + +static void tegra20_channel_host1x_syncpt_free(struct tegra_vi_channel *chan) +{ + host1x_syncpt_put(chan->out_sp); +} + +static void tegra20_fmt_align(struct v4l2_pix_format *pix, unsigned int bpp) +{ + pix->width = clamp(pix->width, TEGRA20_MIN_WIDTH, TEGRA20_MAX_WIDTH); + pix->height = clamp(pix->height, TEGRA20_MIN_HEIGHT, TEGRA20_MAX_HEIGHT); + + switch (pix->pixelformat) { + case V4L2_PIX_FMT_UYVY: + case V4L2_PIX_FMT_VYUY: + case V4L2_PIX_FMT_YUYV: + case V4L2_PIX_FMT_YVYU: + pix->bytesperline = roundup(pix->width, 2) * 2; + pix->sizeimage = roundup(pix->width, 2) * 2 * pix->height; + break; + case V4L2_PIX_FMT_YUV420: + case V4L2_PIX_FMT_YVU420: + pix->bytesperline = roundup(pix->width, 8); + pix->sizeimage = roundup(pix->width, 8) * pix->height * 3 / 2; + break; + } +} + +/* + * Compute buffer offsets once per stream so that + * tegra20_channel_vi_buffer_setup() only has to do very simple maths for + * each buffer. + */ +static void tegra20_channel_queue_setup(struct tegra_vi_channel *chan) +{ + unsigned int stride = chan->format.bytesperline; + unsigned int height = chan->format.height; + + chan->start_offset = 0; + + switch (chan->format.pixelformat) { + case V4L2_PIX_FMT_UYVY: + case V4L2_PIX_FMT_VYUY: + case V4L2_PIX_FMT_YUYV: + case V4L2_PIX_FMT_YVYU: + if (chan->vflip) + chan->start_offset += stride * (height - 1); + if (chan->hflip) + chan->start_offset += stride - 1; + break; + + case V4L2_PIX_FMT_YUV420: + case V4L2_PIX_FMT_YVU420: + chan->addr_offset_u = stride * height; + chan->addr_offset_v = chan->addr_offset_u + stride * height / 4; + + /* For YVU420, we swap the locations of the U and V planes. */ + if (chan->format.pixelformat == V4L2_PIX_FMT_YVU420) { + unsigned long temp; + + temp = chan->addr_offset_u; + chan->addr_offset_u = chan->addr_offset_v; + chan->addr_offset_v = temp; + } + + chan->start_offset_u = chan->addr_offset_u; + chan->start_offset_v = chan->addr_offset_v; + + if (chan->vflip) { + chan->start_offset += stride * (height - 1); + chan->start_offset_u += (stride / 2) * ((height / 2) - 1); + chan->start_offset_v += (stride / 2) * ((height / 2) - 1); + } + if (chan->hflip) { + chan->start_offset += stride - 1; + chan->start_offset_u += (stride / 2) - 1; + chan->start_offset_v += (stride / 2) - 1; + } + break; + } +} + +static void release_buffer(struct tegra_vi_channel *chan, + struct tegra_channel_buffer *buf, + enum vb2_buffer_state state) +{ + struct vb2_v4l2_buffer *vb = &buf->buf; + + vb->sequence = chan->sequence++; + vb->field = V4L2_FIELD_NONE; + vb->vb2_buf.timestamp = ktime_get_ns(); + vb2_buffer_done(&vb->vb2_buf, state); +} + +static void tegra20_channel_vi_buffer_setup(struct tegra_vi_channel *chan, + struct tegra_channel_buffer *buf) +{ + dma_addr_t base = buf->addr; + + switch (chan->fmtinfo->fourcc) { + case V4L2_PIX_FMT_YUV420: + case V4L2_PIX_FMT_YVU420: + tegra20_vi_write(chan, TEGRA_VI_VB0_BASE_ADDRESS_U, base + chan->addr_offset_u); + tegra20_vi_write(chan, TEGRA_VI_VB0_START_ADDRESS_U, base + chan->start_offset_u); + tegra20_vi_write(chan, TEGRA_VI_VB0_BASE_ADDRESS_V, base + chan->addr_offset_v); + tegra20_vi_write(chan, TEGRA_VI_VB0_START_ADDRESS_V, base + chan->start_offset_v); + fallthrough; + + case V4L2_PIX_FMT_UYVY: + case V4L2_PIX_FMT_VYUY: + case V4L2_PIX_FMT_YUYV: + case V4L2_PIX_FMT_YVYU: + tegra20_vi_write(chan, TEGRA_VI_VB0_BASE_ADDRESS_FIRST, base); + tegra20_vi_write(chan, TEGRA_VI_VB0_START_ADDRESS_FIRST, base + chan->start_offset); + break; + } +} + +static int tegra20_channel_capture_frame(struct tegra_vi_channel *chan, + struct tegra_channel_buffer *buf) +{ + u32 value; + int err; + + chan->next_out_sp_idx++; + + tegra20_channel_vi_buffer_setup(chan, buf); + + tegra20_vi_write(chan, TEGRA_VI_CAMERA_CONTROL, VI_CAMERA_CONTROL_VIP_ENABLE); + + /* Wait for syncpt counter to reach frame start event threshold */ + err = host1x_syncpt_wait(chan->out_sp, chan->next_out_sp_idx, + TEGRA_VI_SYNCPT_WAIT_TIMEOUT, &value); + if (err) { + host1x_syncpt_incr(chan->out_sp); + dev_err_ratelimited(&chan->video.dev, "frame start syncpt timeout: %d\n", err); + release_buffer(chan, buf, VB2_BUF_STATE_ERROR); + return err; + } + + tegra20_vi_write(chan, TEGRA_VI_CAMERA_CONTROL, + VI_CAMERA_CONTROL_STOP_CAPTURE | VI_CAMERA_CONTROL_VIP_ENABLE); + + release_buffer(chan, buf, VB2_BUF_STATE_DONE); + + return 0; +} + +static int tegra20_chan_capture_kthread_start(void *data) +{ + struct tegra_vi_channel *chan = data; + struct tegra_channel_buffer *buf; + unsigned int retries = 0; + int err = 0; + + while (1) { + /* + * Source is not streaming if error is non-zero. + * So, do not dequeue buffers on error and let the thread sleep + * till kthread stop signal is received. + */ + wait_event_interruptible(chan->start_wait, + kthread_should_stop() || + (!list_empty(&chan->capture) && !err)); + + if (kthread_should_stop()) + break; + + /* dequeue the buffer and start capture */ + spin_lock(&chan->start_lock); + if (list_empty(&chan->capture)) { + spin_unlock(&chan->start_lock); + continue; + } + + buf = list_first_entry(&chan->capture, struct tegra_channel_buffer, queue); + list_del_init(&buf->queue); + spin_unlock(&chan->start_lock); + + err = tegra20_channel_capture_frame(chan, buf); + if (!err) { + retries = 0; + continue; + } + + if (retries++ > chan->syncpt_timeout_retry) + vb2_queue_error(&chan->queue); + else + err = 0; + } + + return 0; +} + +static void tegra20_camera_capture_setup(struct tegra_vi_channel *chan) +{ + u32 output_fourcc = chan->format.pixelformat; + int width = chan->format.width; + int height = chan->format.height; + int stride_l = chan->format.bytesperline; + int stride_c = (output_fourcc == V4L2_PIX_FMT_YUV420 || + output_fourcc == V4L2_PIX_FMT_YVU420) ? 1 : 0; + int main_output_format; + int yuv_output_format; + + tegra20_vi_get_output_formats(chan, &main_output_format, &yuv_output_format); + + /* + * Set up low pass filter. Use 0x240 for chromaticity and 0x240 + * for luminance, which is the default and means not to touch + * anything. + */ + tegra20_vi_write(chan, TEGRA_VI_H_LPF_CONTROL, + 0x0240 << VI_H_LPF_CONTROL_LUMA_SFT | + 0x0240 << VI_H_LPF_CONTROL_CHROMA_SFT); + + /* Set up raise-on-edge, so we get an interrupt on end of frame. */ + tegra20_vi_write(chan, TEGRA_VI_VI_RAISE, VI_VI_RAISE_ON_EDGE); + + tegra20_vi_write(chan, TEGRA_VI_VI_FIRST_OUTPUT_CONTROL, + (chan->vflip ? VI_OUTPUT_V_DIRECTION : 0) | + (chan->hflip ? VI_OUTPUT_H_DIRECTION : 0) | + yuv_output_format << VI_OUTPUT_YUV_OUTPUT_FORMAT_SFT | + main_output_format << VI_OUTPUT_OUTPUT_FORMAT_SFT); + + /* Set up frame size */ + tegra20_vi_write(chan, TEGRA_VI_FIRST_OUTPUT_FRAME_SIZE, + height << VI_FIRST_OUTPUT_FRAME_HEIGHT_SFT | + width << VI_FIRST_OUTPUT_FRAME_WIDTH_SFT); + + /* First output memory enabled */ + tegra20_vi_write(chan, TEGRA_VI_VI_ENABLE, 0); + + /* Set the number of frames in the buffer */ + tegra20_vi_write(chan, TEGRA_VI_VB0_COUNT_FIRST, 1); + + /* Set up buffer frame size */ + tegra20_vi_write(chan, TEGRA_VI_VB0_SIZE_FIRST, + height << VI_VB0_SIZE_FIRST_V_SFT | + width << VI_VB0_SIZE_FIRST_H_SFT); + + tegra20_vi_write(chan, TEGRA_VI_VB0_BUFFER_STRIDE_FIRST, + stride_l << VI_VB0_BUFFER_STRIDE_FIRST_LUMA_SFT | + stride_c << VI_VB0_BUFFER_STRIDE_FIRST_CHROMA_SFT); + + tegra20_vi_write(chan, TEGRA_VI_VI_ENABLE, 0); +} + +static int tegra20_vi_start_streaming(struct vb2_queue *vq, u32 count) +{ + struct tegra_vi_channel *chan = vb2_get_drv_priv(vq); + struct media_pipeline *pipe = &chan->video.pipe; + int err; + + chan->next_out_sp_idx = host1x_syncpt_read(chan->out_sp); + + err = video_device_pipeline_start(&chan->video, pipe); + if (err) + goto error_pipeline_start; + + tegra20_camera_capture_setup(chan); + + err = tegra_channel_set_stream(chan, true); + if (err) + goto error_set_stream; + + chan->sequence = 0; + + chan->kthread_start_capture = kthread_run(tegra20_chan_capture_kthread_start, + chan, "%s:0", chan->video.name); + if (IS_ERR(chan->kthread_start_capture)) { + err = PTR_ERR(chan->kthread_start_capture); + chan->kthread_start_capture = NULL; + dev_err_probe(&chan->video.dev, err, "failed to run capture kthread\n"); + goto error_kthread_start; + } + + return 0; + +error_kthread_start: + tegra_channel_set_stream(chan, false); +error_set_stream: + video_device_pipeline_stop(&chan->video); +error_pipeline_start: + tegra_channel_release_buffers(chan, VB2_BUF_STATE_QUEUED); + + return err; +} + +static void tegra20_vi_stop_streaming(struct vb2_queue *vq) +{ + struct tegra_vi_channel *chan = vb2_get_drv_priv(vq); + + if (chan->kthread_start_capture) { + kthread_stop(chan->kthread_start_capture); + chan->kthread_start_capture = NULL; + } + + tegra_channel_release_buffers(chan, VB2_BUF_STATE_ERROR); + tegra_channel_set_stream(chan, false); + video_device_pipeline_stop(&chan->video); +} + +static const struct tegra_vi_ops tegra20_vi_ops = { + .vi_enable = tegra20_vi_enable, + .channel_host1x_syncpt_init = tegra20_channel_host1x_syncpt_init, + .channel_host1x_syncpt_free = tegra20_channel_host1x_syncpt_free, + .vi_fmt_align = tegra20_fmt_align, + .channel_queue_setup = tegra20_channel_queue_setup, + .vi_start_streaming = tegra20_vi_start_streaming, + .vi_stop_streaming = tegra20_vi_stop_streaming, +}; + +#define TEGRA20_VIDEO_FMT(MBUS_CODE, BPP, FOURCC) \ +{ \ + .code = MEDIA_BUS_FMT_##MBUS_CODE, \ + .bpp = BPP, \ + .fourcc = V4L2_PIX_FMT_##FOURCC, \ +} + +static const struct tegra_video_format tegra20_video_formats[] = { + TEGRA20_VIDEO_FMT(UYVY8_2X8, 2, UYVY), + TEGRA20_VIDEO_FMT(VYUY8_2X8, 2, VYUY), + TEGRA20_VIDEO_FMT(YUYV8_2X8, 2, YUYV), + TEGRA20_VIDEO_FMT(YVYU8_2X8, 2, YVYU), + TEGRA20_VIDEO_FMT(UYVY8_2X8, 1, YUV420), + TEGRA20_VIDEO_FMT(UYVY8_2X8, 1, YVU420), +}; + +const struct tegra_vi_soc tegra20_vi_soc = { + .video_formats = tegra20_video_formats, + .nformats = ARRAY_SIZE(tegra20_video_formats), + .default_video_format = &tegra20_video_formats[0], + .ops = &tegra20_vi_ops, + .vi_max_channels = 1, /* parallel input (VIP) */ + .vi_max_clk_hz = 150000000, + .has_h_v_flip = true, +}; + +/* -------------------------------------------------------------------------- + * VIP + */ + +/* + * VIP-specific configuration for stream start. + * + * Whatever is common among VIP and CSI is done by the VI component (see + * tegra20_vi_start_streaming()). Here we do what is VIP-specific. + */ +static int tegra20_vip_start_streaming(struct tegra_vip_channel *vip_chan) +{ + struct tegra_vi_channel *vi_chan = v4l2_get_subdev_hostdata(&vip_chan->subdev); + int width = vi_chan->format.width; + int height = vi_chan->format.height; + + unsigned int main_input_format; + unsigned int yuv_input_format; + + tegra20_vi_get_input_formats(vi_chan, &main_input_format, &yuv_input_format); + + tegra20_vi_write(vi_chan, TEGRA_VI_VI_CORE_CONTROL, 0); + + tegra20_vi_write(vi_chan, TEGRA_VI_VI_INPUT_CONTROL, + VI_INPUT_VIP_INPUT_ENABLE | main_input_format | yuv_input_format); + + tegra20_vi_write(vi_chan, TEGRA_VI_V_DOWNSCALE_CONTROL, 0); + tegra20_vi_write(vi_chan, TEGRA_VI_H_DOWNSCALE_CONTROL, 0); + + tegra20_vi_write(vi_chan, TEGRA_VI_VIP_V_ACTIVE, height << VI_VIP_V_ACTIVE_PERIOD_SFT); + tegra20_vi_write(vi_chan, TEGRA_VI_VIP_H_ACTIVE, + roundup(width, 2) << VI_VIP_H_ACTIVE_PERIOD_SFT); + + /* + * For VIP, D9..D2 is mapped to the video decoder's P7..P0. + * Disable/mask out the other Dn wires. When not in BT656 + * mode we also need the V/H sync. + */ + tegra20_vi_write(vi_chan, TEGRA_VI_PIN_INPUT_ENABLE, + GENMASK(9, 2) << VI_PIN_INPUT_VD_SFT | + VI_PIN_INPUT_HSYNC | VI_PIN_INPUT_VSYNC); + tegra20_vi_write(vi_chan, TEGRA_VI_VI_DATA_INPUT_CONTROL, + GENMASK(9, 2) << VI_DATA_INPUT_SFT); + tegra20_vi_write(vi_chan, TEGRA_VI_PIN_INVERSION, 0); + + tegra20_vi_write(vi_chan, TEGRA_VI_CONT_SYNCPT_OUT_1, + VI_CONT_SYNCPT_OUT_1_CONTINUOUS_SYNCPT | + host1x_syncpt_id(vi_chan->out_sp) << VI_CONT_SYNCPT_OUT_1_SYNCPT_IDX_SFT); + + tegra20_vi_write(vi_chan, TEGRA_VI_CAMERA_CONTROL, VI_CAMERA_CONTROL_STOP_CAPTURE); + + return 0; +} + +static const struct tegra_vip_ops tegra20_vip_ops = { + .vip_start_streaming = tegra20_vip_start_streaming, +}; + +const struct tegra_vip_soc tegra20_vip_soc = { + .ops = &tegra20_vip_ops, +}; diff --git a/drivers/staging/media/tegra-video/vi.c b/drivers/staging/media/tegra-video/vi.c index 0dbc3da6f98c..193ef948542a 100644 --- a/drivers/staging/media/tegra-video/vi.c +++ b/drivers/staging/media/tegra-video/vi.c @@ -1862,6 +1862,9 @@ static int tegra_vi_remove(struct platform_device *pdev) } static const struct of_device_id tegra_vi_of_id_table[] = { +#if defined(CONFIG_ARCH_TEGRA_2x_SOC) + { .compatible = "nvidia,tegra20-vi", .data = &tegra20_vi_soc }, +#endif #if defined(CONFIG_ARCH_TEGRA_210_SOC) { .compatible = "nvidia,tegra210-vi", .data = &tegra210_vi_soc }, #endif diff --git a/drivers/staging/media/tegra-video/vi.h b/drivers/staging/media/tegra-video/vi.h index 7cb038957f1b..d11822c7b6ed 100644 --- a/drivers/staging/media/tegra-video/vi.h +++ b/drivers/staging/media/tegra-video/vi.h @@ -293,6 +293,9 @@ struct tegra_video_format { u32 fourcc; }; +#if defined(CONFIG_ARCH_TEGRA_2x_SOC) +extern const struct tegra_vi_soc tegra20_vi_soc; +#endif #if defined(CONFIG_ARCH_TEGRA_210_SOC) extern const struct tegra_vi_soc tegra210_vi_soc; #endif diff --git a/drivers/staging/media/tegra-video/video.c b/drivers/staging/media/tegra-video/video.c index d966b319553f..074ad0dc56ca 100644 --- a/drivers/staging/media/tegra-video/video.c +++ b/drivers/staging/media/tegra-video/video.c @@ -123,6 +123,10 @@ static int host1x_video_remove(struct host1x_device *dev) } static const struct of_device_id host1x_video_subdevs[] = { +#if defined(CONFIG_ARCH_TEGRA_2x_SOC) + { .compatible = "nvidia,tegra20-vip", }, + { .compatible = "nvidia,tegra20-vi", }, +#endif #if defined(CONFIG_ARCH_TEGRA_210_SOC) { .compatible = "nvidia,tegra210-csi", }, { .compatible = "nvidia,tegra210-vi", }, @@ -141,6 +145,7 @@ static struct host1x_driver host1x_video_driver = { static struct platform_driver * const drivers[] = { &tegra_csi_driver, + &tegra_vip_driver, &tegra_vi_driver, }; diff --git a/drivers/staging/media/tegra-video/video.h b/drivers/staging/media/tegra-video/video.h index 1e9be1474a9c..7275affa6558 100644 --- a/drivers/staging/media/tegra-video/video.h +++ b/drivers/staging/media/tegra-video/video.h @@ -24,5 +24,6 @@ int tegra_v4l2_nodes_setup_tpg(struct tegra_video_device *vid); void tegra_v4l2_nodes_cleanup_tpg(struct tegra_video_device *vid); extern struct platform_driver tegra_vi_driver; +extern struct platform_driver tegra_vip_driver; extern struct platform_driver tegra_csi_driver; #endif