From patchwork Tue Nov 29 14:30:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 13058643 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EDC93C4321E for ; Tue, 29 Nov 2022 14:31:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=nLDSdqYmB12ntEm8pPYrTFdmxa8MGLx9gPsedP33QpQ=; b=gispkiBjhFntos KLgKVB4Z84mP3PBhrgYhtY3oscZS2yJXBgQC0uQuBiIXzF4LkHQtY4woxommgMWJhnQgmR0xN6KfT zJLP971fFKzJlAC+LNVsX7fB7ej59AI/WRMIPRGR2BAjshUpUNIgUnzDKoAF1uP0Gl4DA/puMZTlI ffZaqzRhWVUjw3WBGqQKVG1hawPE1QqoP0htiRUg3bkBQQPStBzkCEKt0/b/Af6tuflOZi6xMmCKo NJWQ0UGb3PjSz8AOIK7wxTXPWHR6bkINPD1ANTOEJdJkSCrQROlVhV006t9HrUoACSB7F+cGpfVwf uRHLhO+CLd4fs00FBlWg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1p01cu-009GYN-D9; Tue, 29 Nov 2022 14:30:24 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1p01cr-009GXK-E2 for linux-arm-kernel@lists.infradead.org; Tue, 29 Nov 2022 14:30:22 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id B12D661761; Tue, 29 Nov 2022 14:30:20 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 81B1EC433D6; Tue, 29 Nov 2022 14:30:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1669732220; bh=MlhtwiHuYuF+COJdE6vhuaaE1E9JXkLMkiHNoSjoAtM=; h=From:To:Cc:Subject:Date:From; b=FDfSN+Cyp1Rnm+P7xe1pcsql6Jy5PgNg7HZXmQ+ZKM4+cJFMR1FYmSmEIkSeu8Rmm hXk0iVzp3pOF8O8g4e/Fh9XCtbMfGfTD1SGGr8+vhHV/DP5bHPVUyrRvQW1zTtZnqg AwpxcNVcVEPTBfYq4Im2HpGJMqXRkMLBh0lOPcD5CY/VZ1xHNn+iV6ioFPH0lpyiLA IjGLKFrvF70GNNRdBoGh8cLK5ArD4p3rl/PTVSYd7iJjpLRoIzDNIIxt56lqoYpqIU 8E2lywApSHRa275kB2w8mKY8TPuXqWf7VIKVY9CG2PLGpffbmFf3Oiziby0DNh3cK7 VVxsl434FtW2g== From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org Cc: catalin.marinas@arm.com, will@kernel.org, anshuman.khandual@arm.com, maz@kernel.org, mark.rutland@arm.com, Ard Biesheuvel Subject: [PATCH v2] arm64: mm: Align PGDs to at least 64 bytes Date: Tue, 29 Nov 2022 15:30:12 +0100 Message-Id: <20221129143012.1806274-1-ardb@kernel.org> X-Mailer: git-send-email 2.35.1 MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1824; i=ardb@kernel.org; h=from:subject; bh=MlhtwiHuYuF+COJdE6vhuaaE1E9JXkLMkiHNoSjoAtM=; b=owEB7QES/pANAwAKAcNPIjmS2Y8kAcsmYgBjhhdzTqsvkJg6e2mUFZMlEJv4jdubqs5+z5C9Da2N jiE1iVGJAbMEAAEKAB0WIQT72WJ8QGnJQhU3VynDTyI5ktmPJAUCY4YXcwAKCRDDTyI5ktmPJH5/C/ 4+d+evhwlrXav+1oGcroXgspw1HPraXguTEnG4CXwEPqZ+zf29fpPwu9C/UcplDD2CpCcTcAhuxX82 0tYExItUQRW9oRDtT9FBsqqhcumfhx68L7RoriK3sm6qWljB22o+mm/dHcIB6ALIpqFwKx4EDR+Jiq RxBiGjhHNEt6hm/aSVhIHUHofUy5DRAvwE08JHBZulKz6l1xzuAj7GWNK3KUPxe9LS/tqxvYwnY9RW FBPac0UAFBPlBWz/spgIvtGBrEhPTbOT02ypYryA3M4fR3vwzwFb8zD5lO0M5vp3a0AinxaoJ3XD+2 eG6E72GpvyBOXJP+QVCA7XYns/qm7PmTajxSQJD15YcGL3w79/7ljNvtbrTnkjGMpJV2yrhiSPEFRX Skxq18JJnJD7V5UuWbYQXURSjaDqmUhl9IZdpYoRDQdNsbhG+Pcxjn6WMNgEOVTOh7gy77vzQTKj14 05wkB25XkOjpzotwo7S8r4+ZkEAJWw6ydLHW88w2V8Rfg= X-Developer-Key: i=ardb@kernel.org; a=openpgp; fpr=F43D03328115A198C90016883D200E9CA6329909 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221129_063021_567983_63835720 X-CRM114-Status: GOOD ( 14.64 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org My copy of the ARM ARM (DDI 0487I.a) no longer describes the 64 byte minimum alignment of root page tables as being conditional on whether 52-bit physical addressing is supported and enabled, even though I seem to remember that this was the case formerly (and our code suggests the same). Section D17.2.144 "TTBR0_EL1, Translation Table Base Register 0 (EL1)" contains the following wording: ----Note---- A translation table is required to be aligned to the size of the table. If a table contains fewer than eight entries, it must be aligned on a 64 byte address boundary So align pgd_t[] allocations to 64 bytes. Note that this change only affects 16k/4 levels configurations, which are unlikely to be in wide use. Signed-off-by: Ard Biesheuvel Acked-by: Catalin Marinas --- arch/arm64/mm/pgd.c | 15 ++++----------- 1 file changed, 4 insertions(+), 11 deletions(-) diff --git a/arch/arm64/mm/pgd.c b/arch/arm64/mm/pgd.c index 4a64089e5771c1e2..48989b9c9035e8b9 100644 --- a/arch/arm64/mm/pgd.c +++ b/arch/arm64/mm/pgd.c @@ -40,17 +40,10 @@ void __init pgtable_cache_init(void) if (PGD_SIZE == PAGE_SIZE) return; -#ifdef CONFIG_ARM64_PA_BITS_52 /* - * With 52-bit physical addresses, the architecture requires the - * top-level table to be aligned to at least 64 bytes. + * Naturally aligned pgds required by the architecture, with a minimum + * alignment of 64 bytes. */ - BUILD_BUG_ON(PGD_SIZE < 64); -#endif - - /* - * Naturally aligned pgds required by the architecture. - */ - pgd_cache = kmem_cache_create("pgd_cache", PGD_SIZE, PGD_SIZE, - SLAB_PANIC, NULL); + pgd_cache = kmem_cache_create("pgd_cache", PGD_SIZE, + max(PGD_SIZE, 64UL), SLAB_PANIC, NULL); }