From patchwork Thu Dec 8 19:20:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 13068692 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DD1A1C4167B for ; Thu, 8 Dec 2022 19:20:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229691AbiLHTUi (ORCPT ); Thu, 8 Dec 2022 14:20:38 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45308 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229612AbiLHTUg (ORCPT ); Thu, 8 Dec 2022 14:20:36 -0500 Received: from mail-pj1-x102b.google.com (mail-pj1-x102b.google.com [IPv6:2607:f8b0:4864:20::102b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6BF908F0B3 for ; Thu, 8 Dec 2022 11:20:32 -0800 (PST) Received: by mail-pj1-x102b.google.com with SMTP id gt4so844836pjb.1 for ; Thu, 08 Dec 2022 11:20:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=mU15PmQ7y4jCLhzpRiDgBwZPVlqL2rxQ5MC828vQiLw=; b=UtZBnVwuE1PrB9zKCulUevgNmkD3pmq5tiL+Ard+l0p/FsDDyKgRZOr6mI5GO/cwi0 G75JjAG+E2Zf5gO0nim5H8WlklfKjtuSB7iRUKUIXLz6Soe4y5w1JK98KRj2z3F/rGRi cdz6Gvr6WqpUlCm8Clr2G2YPnYKsm5asVhARM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=mU15PmQ7y4jCLhzpRiDgBwZPVlqL2rxQ5MC828vQiLw=; b=q68ATJRsZccu0f4rC3KBXaRxqKZoO7Gs1QyvgMEn8Ixpx8mA39e9zyw06paF1qBTh7 5wWwCinC9h/gWN46gKBJTk74FwIOM6T/ALw0ORHtBvaIKAPDapvHfYvc8WVbpj1ZbhLL fG8yrKEZHU7/rGTX4Zi0rcbzkotKumyfyxPnaFUOwM40Q9Sk8MnMnF1Tk8sFNbavqWGk ucN7c0LEp5x0n7Sx/DzvCJ7m79ra4j41ju6dC5z7BHe5I4z5xJrRwlhnNyPMs9oBvqyo M3WEdpBT3MN+W/2jhi6KNf0NerqJH7MQNCNhdkx/pw+QPqLkyjs8FxpojO70a68zb/5+ fzJg== X-Gm-Message-State: ANoB5pmv5xdPPpu2FY56M681M6bTU50uykqm6q0lcRZZVsPXbXSFYI9i UydenbNtGr113nZc0gHCYVQI8XgigtE1VQsp X-Google-Smtp-Source: AA0mqf4yVAiZHjwlp/KwHCa/AKRbwhwwJPJpOKG+mWu/pk9FEGcH6atyJYZwqS+NbHGnEnd3Q0MT6Q== X-Received: by 2002:a17:902:6b05:b0:185:441f:7087 with SMTP id o5-20020a1709026b0500b00185441f7087mr2916552plk.12.1670527231917; Thu, 08 Dec 2022 11:20:31 -0800 (PST) Received: from tictac2.mtv.corp.google.com ([2620:15c:9d:2:3aa1:2c62:9ac:4468]) by smtp.gmail.com with ESMTPSA id u5-20020a170902e5c500b00186a2274382sm17112019plf.76.2022.12.08.11.20.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Dec 2022 11:20:31 -0800 (PST) From: Douglas Anderson To: Bjorn Andersson , Dmitry Torokhov Cc: mka@chromium.org, swboyd@chromium.org, linux-arm-msm@vger.kernel.org, linux-input@vger.kernel.org, Yunlong Jia , Konrad Dybcio , Douglas Anderson , Andy Gross , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/5] arm64: dts: qcom: sc7180: Bump up trogdor ts_reset_l drive strength Date: Thu, 8 Dec 2022 11:20:02 -0800 Message-Id: <20221208111910.1.I39c387f1e3176fcf340039ec12d54047de9f8526@changeid> X-Mailer: git-send-email 2.39.0.rc1.256.g54fd8350bd-goog In-Reply-To: <20221208192006.1070898-1-dianders@chromium.org> References: <20221208192006.1070898-1-dianders@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On at least one board (pazquel360) the reset line for the touchscreen was scoped and found to take almost 2 ms to fall when we drove it low. This wasn't great because the Linux driver for the touchscreen (the elants_i2c driver) thinks it can do a 500 us reset pulse. If we bump the drive strength to 8 mA then the reset line went down in ~421 us. NOTE: we could apply this fix just for pazquel360, but: * Probably other trogdor devices have similar timings and it's just that nobody has noticed it before. * There are other trogdor boards using the same elan driver that tries to do 500 us reset pulses. * Bumping the drive strength to 8mA across the board won't hurt. This isn't a high speed signal or anything. Signed-off-by: Douglas Anderson Reviewed-by: Matthias Kaehlcke --- arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi index f1defb94d670..ff1c7aa6a722 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi @@ -1376,7 +1376,15 @@ ts_reset_l: ts-reset-l-state { pins = "gpio8"; function = "gpio"; bias-disable; - drive-strength = <2>; + + /* + * The reset GPIO to the touchscreen takes almost 2ms to drop + * at the default drive strength. When we bump it up to 8mA it + * falls in under 500us. We want this to be fast since the Elan + * datasheet (and any drivers written based on it) talk about using + * a 500 us reset pulse. + */ + drive-strength = <8>; }; sdc1_on: sdc1-on-state { From patchwork Thu Dec 8 19:20:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 13068694 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DE751C10F1E for ; Thu, 8 Dec 2022 19:20:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229737AbiLHTUg (ORCPT ); Thu, 8 Dec 2022 14:20:36 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45294 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229704AbiLHTUf (ORCPT ); Thu, 8 Dec 2022 14:20:35 -0500 Received: from mail-pj1-x1034.google.com (mail-pj1-x1034.google.com [IPv6:2607:f8b0:4864:20::1034]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 11D289951A for ; Thu, 8 Dec 2022 11:20:34 -0800 (PST) Received: by mail-pj1-x1034.google.com with SMTP id q17-20020a17090aa01100b002194cba32e9so5691405pjp.1 for ; Thu, 08 Dec 2022 11:20:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=RXZFKzf8SEbO5MJF/tbRe/Hy6ddvI0OXNJGHZyfmauA=; b=RtJ6gvU4u20lqWyhOPFyXMpF2NNgS93C/PcBqKyQgBoFU/M+fleiQZVu+iLC5JcJ7M k1BnmfKE+l26w6sOkxNlZblsmHXxnqW6B51hWf7K1Fx8xpIAta67G1itL2XTPNVkTqMF rTDYvm+ygXrkJIXQrKCfRD4GXpt6a3f9bTeSc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=RXZFKzf8SEbO5MJF/tbRe/Hy6ddvI0OXNJGHZyfmauA=; b=5mJ7bW+Ol5UCx3VT/svQtE5BkxkWgJZeYNn9Qnv7IlQpKxCfAJb/s2a77HK5MAd/Rp m/kYXN3KHEnouDy3etXUIXOHMchX2KRp3lfNFUsjN13UGqAaehNVFkKScr25Wcza4bXz g5WruCqmDXYX5+QCsbZhUTbArhcok3ue+SiSZQBh16uVvhM7KAExSNG11GXeQvc+08df yusqGNO0vwQllWlrvQ7syiQ8Q9ZjL325OZldXT/xS9BA4M+D2T134lHNw2qLZgKrC3B3 83UERpaf2J09P9FQK3sSAtPI0p22Ctr+1NIL26TLzmlGW+Y02j7A6Az+qwO6Ruz66BBl XvPw== X-Gm-Message-State: ANoB5pmgUHnTnoq/gWkhlOWxlhScQ1EvQRDPBsmrt6wYUdLx05CZuaXn KZczes4m80WVzSmEdM9am209Hw== X-Google-Smtp-Source: AA0mqf6oAueA5N3ojF9g2UU8lo98Akl0XQg6efVKCgb/OgaGdyGx3oRASvhK8156nzOWVHnnI212Nw== X-Received: by 2002:a17:902:ab57:b0:189:4de5:6c7f with SMTP id ij23-20020a170902ab5700b001894de56c7fmr2866574plb.3.1670527233568; Thu, 08 Dec 2022 11:20:33 -0800 (PST) Received: from tictac2.mtv.corp.google.com ([2620:15c:9d:2:3aa1:2c62:9ac:4468]) by smtp.gmail.com with ESMTPSA id u5-20020a170902e5c500b00186a2274382sm17112019plf.76.2022.12.08.11.20.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Dec 2022 11:20:33 -0800 (PST) From: Douglas Anderson To: Bjorn Andersson , Dmitry Torokhov Cc: mka@chromium.org, swboyd@chromium.org, linux-arm-msm@vger.kernel.org, linux-input@vger.kernel.org, Yunlong Jia , Konrad Dybcio , Douglas Anderson , Andy Gross , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/5] arm64: dts: qcom: sc7180: Add trogdor eDP/touchscreen regulator off-on-time Date: Thu, 8 Dec 2022 11:20:03 -0800 Message-Id: <20221208111910.2.I65ac577411b017eff50e7a4fda254e5583ccdc48@changeid> X-Mailer: git-send-email 2.39.0.rc1.256.g54fd8350bd-goog In-Reply-To: <20221208192006.1070898-1-dianders@chromium.org> References: <20221208192006.1070898-1-dianders@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org In general, the timing diagrams for components specify a minimum time for power cycling the component. When we remove power from a device we need to let the device fully discharge and get to a quiescent state before applying power again. If we power a device on too soon then it might not have fully powered off and might be in a weird in-between / invalid state. eDP panels typically have a time that's at least 500 ms here. You can see that in Linux's panel-edp driver that nearly every device specifies a "unprepare" time of at least 500 ms. This is a common minimum and the 500 ms is even in the example in the eDP spec. In Linux, the "panel-edp" driver enforces this delay for its own control of the regulator, but the "panel-edp" driver can't do anything about other control of the regulator (for instance, by the touchpanel driver). Let's add 500 ms as a board constraint for the regulator that's used for eDP/touchpanel on trogdor boards. If a given trogdor board stuffs only panels that can use a shorter time or stuff some panels that need a larger time then they can manually adjust this timing. We'll only do this minimum delay for trogdor devices with eDP (ones that use either bridge chip), not for devices with MIPI panels. MIPI panels could have similar constraints but the 500 ms isn't necessarily as standard and there are no known cases where this delay is needed. For most trogdor boards, this doesn't actually seem to affect anything when testing against shipping Linux. However, with pazqel360 it seems that this does make a difference. It seems that the touchscreen on this board _also_ needs some time for the regulator to discharge. That time is much less than 500 ms, so we'll just put the eDP panel 500 ms in there since the board constraint should be the "max" of the components. Signed-off-by: Douglas Anderson Reviewed-by: Matthias Kaehlcke --- .../boot/dts/qcom/sc7180-trogdor-parade-ps8640.dtsi | 12 ++++++++++++ .../boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi | 12 ++++++++++++ 2 files changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-parade-ps8640.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-parade-ps8640.dtsi index ebd6765e2afa..e27a769f8cd4 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-parade-ps8640.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-parade-ps8640.dtsi @@ -26,6 +26,18 @@ pp3300_brij_ps8640: pp3300-brij-ps8640-regulator { }; }; +/* + * ADDITIONS TO FIXED REGULATORS DEFINED IN PARENT DEVICE TREE FILES + * + * Sort order matches the order in the parent files (parents before children). + */ + +&pp3300_dx_edp { + off-on-delay-us = <500000>; +}; + +/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */ + &dsi0_out { remote-endpoint = <&ps8640_in>; }; diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi index 65333709e529..3188788306d0 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi @@ -7,6 +7,18 @@ #include +/* + * ADDITIONS TO FIXED REGULATORS DEFINED IN PARENT DEVICE TREE FILES + * + * Sort order matches the order in the parent files (parents before children). + */ + +&pp3300_dx_edp { + off-on-delay-us = <500000>; +}; + +/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */ + &dsi0_out { remote-endpoint = <&sn65dsi86_in>; }; From patchwork Thu Dec 8 19:20:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 13068693 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CEBAAC4332F for ; Thu, 8 Dec 2022 19:20:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229743AbiLHTUj (ORCPT ); Thu, 8 Dec 2022 14:20:39 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45322 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229650AbiLHTUi (ORCPT ); Thu, 8 Dec 2022 14:20:38 -0500 Received: from mail-pj1-x1032.google.com (mail-pj1-x1032.google.com [IPv6:2607:f8b0:4864:20::1032]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A8EB299F0C for ; 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Thu, 08 Dec 2022 11:20:35 -0800 (PST) Received: from tictac2.mtv.corp.google.com ([2620:15c:9d:2:3aa1:2c62:9ac:4468]) by smtp.gmail.com with ESMTPSA id u5-20020a170902e5c500b00186a2274382sm17112019plf.76.2022.12.08.11.20.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Dec 2022 11:20:34 -0800 (PST) From: Douglas Anderson To: Bjorn Andersson , Dmitry Torokhov Cc: mka@chromium.org, swboyd@chromium.org, linux-arm-msm@vger.kernel.org, linux-input@vger.kernel.org, Yunlong Jia , Konrad Dybcio , Douglas Anderson , Andy Gross , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/5] arm64: dts: qcom: sc7180: Start the trogdor eDP/touchscreen regulator on Date: Thu, 8 Dec 2022 11:20:04 -0800 Message-Id: <20221208111910.3.I7050a61ba3a48e44b86053f265265b5e3c0cee31@changeid> X-Mailer: git-send-email 2.39.0.rc1.256.g54fd8350bd-goog In-Reply-To: <20221208192006.1070898-1-dianders@chromium.org> References: <20221208192006.1070898-1-dianders@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Now that we've added the `off-on-delay-us` for the touchpanel regulator, we can see that we're actually hitting that delay at bootup. I saw about 200 ms of delay. Let's avoid that delay by starting the regulator on. We'll only do this for eDP devices for the time being. NOTE: we _won't_ do this for homestar. Homestar's panel really likes to be power cycled. It's why the Linux driver for this panel has a pm_runtime_put_sync_suspend() when the panel is being unprepared but the normal panel-edp driver doesn't. It's also why this hardware has a separate power rail for eDP vs. touchscreen, unlike all the other trogdor boards. We won't start homestar's regulator on. While this could mean a slight delay on homestar, it is probably a _correct_ delay. The bootloader might have left the regulator on (it does so in dev and recovery modes), so if we turned the regulator off at probe time and we actually hit the delay then we were probably violating T12 in the panel spec. Signed-off-by: Douglas Anderson Reviewed-by: Matthias Kaehlcke --- .../boot/dts/qcom/sc7180-trogdor-homestar.dtsi | 18 ++++++++++++++++++ .../dts/qcom/sc7180-trogdor-parade-ps8640.dtsi | 8 ++++++++ .../dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi | 8 ++++++++ 3 files changed, 34 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi index d3cf64c16dcd..b3ba23a88a0b 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi @@ -85,6 +85,24 @@ map1 { }; }; +/* + * ADDITIONS TO FIXED REGULATORS DEFINED IN PARENT DEVICE TREE FILES + * + * Sort order matches the order in the parent files (parents before children). + */ + +&pp3300_dx_edp { + /* + * The atna33xc20 really likes to be power cycled to keep it from + * getting in a bad state. This is the reason that the touchscreen + * rail and eDP rails are separate from each other on homestar (but + * not other trogdor devices) Make sure it starts "off" at bootup. + */ + /delete-property/ regulator-boot-on; +}; + +/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */ + ap_ts_pen_1v8: &i2c4 { status = "okay"; clock-frequency = <400000>; diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-parade-ps8640.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-parade-ps8640.dtsi index e27a769f8cd4..5aa7949b5328 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-parade-ps8640.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-parade-ps8640.dtsi @@ -34,6 +34,14 @@ pp3300_brij_ps8640: pp3300-brij-ps8640-regulator { &pp3300_dx_edp { off-on-delay-us = <500000>; + + /* + * It's nicer to start with this regulator enabled. The + * bootloader may have left it on and it's nice not to cause an + * extra power cycle of the touchscreen and eDP panel at bootup. + * This should help speed bootup because we have off-on-delay-us. + */ + regulator-boot-on; }; /* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */ diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi index 3188788306d0..e52b8776755d 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi @@ -15,6 +15,14 @@ &pp3300_dx_edp { off-on-delay-us = <500000>; + + /* + * It's nicer to start with this regulator enabled. The + * bootloader may have left it on and it's nice not to cause an + * extra power cycle of the touchscreen and eDP panel at bootup. + * This should help speed bootup because we have off-on-delay-us. + */ + regulator-boot-on; }; /* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */ From patchwork Thu Dec 8 19:20:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 13068695 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 87F4FC001B2 for ; Thu, 8 Dec 2022 19:21:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229468AbiLHTVN (ORCPT ); Thu, 8 Dec 2022 14:21:13 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45428 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229704AbiLHTUj (ORCPT ); Thu, 8 Dec 2022 14:20:39 -0500 Received: from mail-pl1-x62e.google.com (mail-pl1-x62e.google.com [IPv6:2607:f8b0:4864:20::62e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 40FB299F2A for ; Thu, 8 Dec 2022 11:20:37 -0800 (PST) Received: by mail-pl1-x62e.google.com with SMTP id g10so2458333plo.11 for ; Thu, 08 Dec 2022 11:20:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=SghZa+kW7wIj2RUcdePRPR1tV1IHuHFiC2Ew9exQVO0=; b=ak7msN6Am+PYdy9SBwDyO8HiaGzwCdF79wcoo7pb8KdOw8kNKiwvT04KD8UeG3l4yf GHh80N84AQqX/dKIQiW+9jBDoDh48Vvk/EYWPaYl9SreZxA583cg2J/RuMvZaT2uBUXF DerpsC3NQVtxvjdcQP0Sp8sv2U5KgcCeb+5A4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=SghZa+kW7wIj2RUcdePRPR1tV1IHuHFiC2Ew9exQVO0=; b=tHaJ38EOXpH1Qr/duGh6ixGn1CLu1XWhs1pYHi2EzBhh3igEZK+RjsAKQ4uee1ZbTz X8ew2Ls0pbtzf8tm1zjYuaXuIzp3UxCEwmFFAnHnQ9YOE54iyv29Vr/kqmrmvN5KeBBe r7pSl18lrxzhJ9H6053o0lChu7+f/d715X6uo15xetuPfJcwtGqPQGNVKKBLqknwxMMe Y56UkxepqUPJYLPaU4SCyako2ZrCiJhELLhhmW/M7z9lcFNd5pWXr5awP1vU9uR7oAjR mQAXDG+yIOGJIKsck43jjOuvI1fA95y/QgHFtSUKliuADeKSeSyy6w3L6j9fnijnCIU4 +PPw== X-Gm-Message-State: ANoB5pnpCS5z2Pu3H/D4+aYSneuiu8v0KyV4DA5xBrw7mJC+42BNexGv FGq+EByYhQ+7qJzv9AxFMquqew== X-Google-Smtp-Source: AA0mqf4m92QMQvWjvOsl2lEdbxbWHxT+FcSa9B07bLEQjj7z+eqgTBCjsv8IKmgo4AM2FSVhzN8t3w== X-Received: by 2002:a17:902:f7ca:b0:189:b203:9e2f with SMTP id h10-20020a170902f7ca00b00189b2039e2fmr2971988plw.56.1670527236814; Thu, 08 Dec 2022 11:20:36 -0800 (PST) Received: from tictac2.mtv.corp.google.com ([2620:15c:9d:2:3aa1:2c62:9ac:4468]) by smtp.gmail.com with ESMTPSA id u5-20020a170902e5c500b00186a2274382sm17112019plf.76.2022.12.08.11.20.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Dec 2022 11:20:36 -0800 (PST) From: Douglas Anderson To: Bjorn Andersson , Dmitry Torokhov Cc: mka@chromium.org, swboyd@chromium.org, linux-arm-msm@vger.kernel.org, linux-input@vger.kernel.org, Yunlong Jia , Konrad Dybcio , Douglas Anderson , Andy Gross , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 4/5] arm64: dts: qcom: sc7180: Add pazquel360 touschreen Date: Thu, 8 Dec 2022 11:20:05 -0800 Message-Id: <20221208111910.4.Id132522bda31fd97684cb076a44a0907cd28097d@changeid> X-Mailer: git-send-email 2.39.0.rc1.256.g54fd8350bd-goog In-Reply-To: <20221208192006.1070898-1-dianders@chromium.org> References: <20221208192006.1070898-1-dianders@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The touchscreen was supposed to have been added when pazquel360 first was added upstream but was missed. Add it now. Signed-off-by: Douglas Anderson Reviewed-by: Matthias Kaehlcke --- .../dts/qcom/sc7180-trogdor-pazquel360.dtsi | 21 +++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-pazquel360.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-pazquel360.dtsi index 5702325d0c7b..54b89def8402 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-pazquel360.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-pazquel360.dtsi @@ -14,6 +14,27 @@ &alc5682 { realtek,dmic-clk-rate-hz = <2048000>; }; +ap_ts_pen_1v8: &i2c4 { + status = "okay"; + clock-frequency = <400000>; + + ap_ts: touchscreen@10 { + compatible = "elan,ekth3915", "elan,ekth3500"; + reg = <0x10>; + pinctrl-names = "default"; + pinctrl-0 = <&ts_int_l>, <&ts_reset_l>; + + interrupt-parent = <&tlmm>; + interrupts = <9 IRQ_TYPE_LEVEL_LOW>; + + hid-descr-addr = <0x0001>; + + vcc33-supply = <&pp3300_ts>; + vccio-supply = <&pp1800_l10a>; + reset-gpios = <&tlmm 8 GPIO_ACTIVE_LOW>; + }; +}; + &keyboard_controller { function-row-physmap = < MATRIX_KEY(0x00, 0x02, 0) /* T1 */ From patchwork Thu Dec 8 19:20:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 13068696 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C7E04C4332F for ; Thu, 8 Dec 2022 19:21:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229776AbiLHTVP (ORCPT ); Thu, 8 Dec 2022 14:21:15 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45820 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229722AbiLHTUx (ORCPT ); Thu, 8 Dec 2022 14:20:53 -0500 Received: from mail-pj1-x1030.google.com (mail-pj1-x1030.google.com [IPv6:2607:f8b0:4864:20::1030]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DECE52A406 for ; Thu, 8 Dec 2022 11:20:38 -0800 (PST) Received: by mail-pj1-x1030.google.com with SMTP id o1-20020a17090a678100b00219cf69e5f0so5686007pjj.2 for ; Thu, 08 Dec 2022 11:20:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=qBUYq/f5W1QpvWQ1L0owj+9liBAfVOZ5HyYf2BUvGw4=; b=Yq20ujLHdDmxfsm6nXV56O+R5s3byqsOzEHjK+WiS1J/KE/7s2Me27w3dKPKEBUPXj EBxaZvKRup2jGETzG6pHkC4C/xO67Cr3V2UFuWIZ7iYRcD+t8/x/7b6NpJY4r9h9ugBF i2f52c853182eqqlzGcIlS/0+SsTPdNlNu2oo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=qBUYq/f5W1QpvWQ1L0owj+9liBAfVOZ5HyYf2BUvGw4=; b=Ix2Df5ODL9ROO0L7kkKgjMMicWknzcWmv2kGjNkch0j9b8catXNX+vPyjkj/NB4SuQ WYHuDta1Bv8cXR/ALqT0RrJHxcSKF/eNFPUm5r+Huzm7djpKbGwUYKJzFaqdsYxksUVl EKgIJD/etOdufbxU5+T3MRogNV62wUMbghNV/l+hmLyPtRAnCsmoRL+dPja5Fi4htPbT xNBvqAs/v1Ggtk0nz4UNaVKhOtz7Js1tPL82hs1nT8JhAUWx3lVBopnDPAJSTw4Xfxyr hL2MZQF/RFARR0WftOcMxhJ6SJeG5QQCPPwmvZ+FPlEiQwm/6FILnzLhddzMIkpBpQvt RAAg== X-Gm-Message-State: ANoB5pniqj0pFvSUuwDQzI3iZOtFFUwdxY66KRUURQCUU5Jl7wjTBCEG FJ3T8xKGIblLI4DU8G5Rk6BtuQ== X-Google-Smtp-Source: AA0mqf7pK4FpReUS3h/Hh2p63l51HOF6nGWZ47zSsvE4GtKIA0vxz1NbgiSFJHh7GgCAGq05255THA== X-Received: by 2002:a17:903:40cf:b0:189:ccb2:f20a with SMTP id t15-20020a17090340cf00b00189ccb2f20amr3555544pld.49.1670527238392; Thu, 08 Dec 2022 11:20:38 -0800 (PST) Received: from tictac2.mtv.corp.google.com ([2620:15c:9d:2:3aa1:2c62:9ac:4468]) by smtp.gmail.com with ESMTPSA id u5-20020a170902e5c500b00186a2274382sm17112019plf.76.2022.12.08.11.20.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Dec 2022 11:20:37 -0800 (PST) From: Douglas Anderson To: Bjorn Andersson , Dmitry Torokhov Cc: mka@chromium.org, swboyd@chromium.org, linux-arm-msm@vger.kernel.org, linux-input@vger.kernel.org, Yunlong Jia , Konrad Dybcio , Douglas Anderson , Johnny Chuang , linux-kernel@vger.kernel.org Subject: [PATCH 5/5] Input: elants_i2c: Delay longer with reset asserted Date: Thu, 8 Dec 2022 11:20:06 -0800 Message-Id: <20221208111910.5.I6edfb3f459662c041563a54e5b7df727c27caaba@changeid> X-Mailer: git-send-email 2.39.0.rc1.256.g54fd8350bd-goog In-Reply-To: <20221208192006.1070898-1-dianders@chromium.org> References: <20221208192006.1070898-1-dianders@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The elan touchscreen datasheet says that the reset GPIO only needs to be asserted for 500us in order to reset the regulator. The problem is that some boards need a level shifter between the signals on the GPIO controller and the signals on the touchscreen. All of these extra components on the line can slow the transition of the signals. On one board, we measured the reset line and saw that it took almost 1.8ms to go low. Even after we bumped up the "drive strength" of the signal from the default 2mA to 8mA we still saw it take 421us for the signal to go low. In order to account for this we let's lengthen the amount of time that we keep the reset asserted. Let's bump it up from 500us to 5000us. That's still a relatively short amount of time and is much safer. It should be noted that this fixes real problems. Case in point: 1. The touchscreen power rail may be shared with another device (like an eDP panel). That means that at probe time power might already be on. 2. In probe we grab the reset GPIO and assert it (make it low). 3. We turn on power (a noop since it was already on). 4. We wait 500us. 5. We deassert the reset GPIO. With the above case and only a 500us delay we saw only a partial reset asserted, which is bad. Giving it 5ms is overkill but feels safer in case someone else has a different level shifter setup. Signed-off-by: Douglas Anderson Reviewed-by: Matthias Kaehlcke --- drivers/input/touchscreen/elants_i2c.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/input/touchscreen/elants_i2c.c b/drivers/input/touchscreen/elants_i2c.c index 879a4d984c90..377adf89b25c 100644 --- a/drivers/input/touchscreen/elants_i2c.c +++ b/drivers/input/touchscreen/elants_i2c.c @@ -114,7 +114,7 @@ /* calibration timeout definition */ #define ELAN_CALI_TIMEOUT_MSEC 12000 -#define ELAN_POWERON_DELAY_USEC 500 +#define ELAN_POWERON_DELAY_USEC 5000 #define ELAN_RESET_DELAY_MSEC 20 /* FW boot code version */