From patchwork Thu Dec 8 21:28:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Williams X-Patchwork-Id: 13068918 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CFA5AC4332F for ; Thu, 8 Dec 2022 21:28:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229750AbiLHV2H (ORCPT ); Thu, 8 Dec 2022 16:28:07 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40406 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229478AbiLHV2G (ORCPT ); Thu, 8 Dec 2022 16:28:06 -0500 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3B9EE8424A for ; Thu, 8 Dec 2022 13:28:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1670534885; x=1702070885; h=subject:from:to:cc:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=hF7aOjqB6MekPgEgck3DysnpsehuCNY7mBILiSKV3V8=; b=eP9l7+Ii5a0n4UnOfKHxjn8YryWbMUrYXE+K5aNwa7w8HsxGDpCvRc/J xYDVm1TTMyHVec+rNKun0ikqGsgFWl/k2zdSCN+vRNldK12i38gVtCeL+ 2Qaonea13ReRziazlO6Ssjol3XOXWH9PIXdsBn8GYd0MdOhdsgPkqxwwW HHcpbkRhUZM7EvvI/H+EFHnVbDkejx2/xu7rkxqdJRv4b8/UO6RIKEHt2 +ojSRY2ItGQJYmkt7TGwymCMakRXWxhnXAuW/fK8DYzV9rbPFRjqiLsjS afvzdXApokQjSZIOgbUJdj4liIcBvO5zoVlBb4GmIJHR+NXrfcVyv6AvM Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10555"; a="318458725" X-IronPort-AV: E=Sophos;i="5.96,228,1665471600"; d="scan'208";a="318458725" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2022 13:28:05 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10555"; a="976046997" X-IronPort-AV: E=Sophos;i="5.96,228,1665471600"; d="scan'208";a="976046997" Received: from kputnam-mobl1.amr.corp.intel.com (HELO dwillia2-xfh.jf.intel.com) ([10.251.25.149]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2022 13:28:04 -0800 Subject: [ndctl PATCH v2 01/18] ndctl/test: Move firmware-update.sh to the 'destructive' set From: Dan Williams To: linux-cxl@vger.kernel.org Cc: Yi Zhang , vishal.l.verma@intel.com, alison.schofield@intel.com, nvdimm@lists.linux.dev, vishal.l.verma@intel.com Date: Thu, 08 Dec 2022 13:28:03 -0800 Message-ID: <167053488383.582963.12851797514973259163.stgit@dwillia2-xfh.jf.intel.com> In-Reply-To: <167053487710.582963.17616889985000817682.stgit@dwillia2-xfh.jf.intel.com> References: <167053487710.582963.17616889985000817682.stgit@dwillia2-xfh.jf.intel.com> User-Agent: StGit/0.18-3-g996c MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org The firmware update test attempts a system-suspend test which may break systems that have a broken driver, or otherwise are not prepared to support suspend. Link: https://github.com/pmem/ndctl/issues/221 Reported-by: Yi Zhang Signed-off-by: Dan Williams Reviewed-by: Alison Schofield --- test/meson.build | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/test/meson.build b/test/meson.build index 5953c286d13f..c31d8eac66c5 100644 --- a/test/meson.build +++ b/test/meson.build @@ -170,7 +170,6 @@ tests = [ [ 'btt-errors.sh', btt_errors, 'ndctl' ], [ 'hugetlb', hugetlb, 'ndctl' ], [ 'btt-pad-compat.sh', btt_pad_compat, 'ndctl' ], - [ 'firmware-update.sh', firmware_update, 'ndctl' ], [ 'ack-shutdown-count-set', ack_shutdown_count, 'ndctl' ], [ 'rescan-partitions.sh', rescan_partitions, 'ndctl' ], [ 'inject-smart.sh', inject_smart, 'ndctl' ], @@ -196,6 +195,7 @@ if get_option('destructive').enabled() mmap_test = find_program('mmap.sh') tests += [ + [ 'firmware-update.sh', firmware_update, 'ndctl' ], [ 'pmem-ns', pmem_ns, 'ndctl' ], [ 'sub-section.sh', sub_section, 'dax' ], [ 'dax-dev', dax_dev, 'dax' ], From patchwork Thu Dec 8 21:28:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Williams X-Patchwork-Id: 13068919 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7CA7FC4332F for ; Thu, 8 Dec 2022 21:28:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229635AbiLHV2M (ORCPT ); Thu, 8 Dec 2022 16:28:12 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40426 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229478AbiLHV2L (ORCPT ); Thu, 8 Dec 2022 16:28:11 -0500 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F38F084265 for ; Thu, 8 Dec 2022 13:28:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1670534891; x=1702070891; h=subject:from:to:cc:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=NoWS9D6wnTNeLKyoMLfd4hRdhlgdi4frHXHBXCJJhGk=; b=e573kj/YfIa0jP5aW615XUVzrIjXXuzbyLrzNPY/rbekJ88dEb6EtQBp ZQDJtvWE+i2953QzXWZbfaMWizWdzFeqM05jPe/qZqvmb879oMgzXuYo7 udshJVNHA0WuB8niLFaloYkFUSmMJzgcqLVtvVfwEjHc58ui2BUCNqoU2 /DHsOkkPkG6+3gCt84UI0rPMjdIVdfmo/ffNABnNBbLo5YuGCaM1byb+1 O0XI/aWviUe2HDPI71RiodlLDYWlo3fPMljZl+guoHnOFQuhWlNMHkJN2 HaLdb0DE4ndBsk/WgsXj9MIqgzGzEs4JTCArZMtVdl3zL5z+rXQxUQ0IM w==; X-IronPort-AV: E=McAfee;i="6500,9779,10555"; a="318458744" X-IronPort-AV: E=Sophos;i="5.96,228,1665471600"; d="scan'208";a="318458744" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2022 13:28:10 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10555"; a="976047038" X-IronPort-AV: E=Sophos;i="5.96,228,1665471600"; d="scan'208";a="976047038" Received: from kputnam-mobl1.amr.corp.intel.com (HELO dwillia2-xfh.jf.intel.com) ([10.251.25.149]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2022 13:28:10 -0800 Subject: [ndctl PATCH v2 02/18] ndctl/test: Add kernel backtrace detection to some dax tests From: Dan Williams To: linux-cxl@vger.kernel.org Cc: Alison Schofield , vishal.l.verma@intel.com, nvdimm@lists.linux.dev, vishal.l.verma@intel.com Date: Thu, 08 Dec 2022 13:28:09 -0800 Message-ID: <167053488991.582963.6703486459060296948.stgit@dwillia2-xfh.jf.intel.com> In-Reply-To: <167053487710.582963.17616889985000817682.stgit@dwillia2-xfh.jf.intel.com> References: <167053487710.582963.17616889985000817682.stgit@dwillia2-xfh.jf.intel.com> User-Agent: StGit/0.18-3-g996c MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org It is useful to fail a test if it triggers a backtrace. Generalize the mechanism from test/cxl-topology.sh and add it to tests that want to validate clean kernel logs. Reviewed-by: Alison Schofield Signed-off-by: Dan Williams --- test/common | 10 ++++++++++ test/cxl-region-sysfs.sh | 4 +--- test/cxl-topology.sh | 5 +---- test/dax.sh | 2 ++ test/daxdev-errors.sh | 2 ++ test/multi-dax.sh | 2 ++ 6 files changed, 18 insertions(+), 7 deletions(-) diff --git a/test/common b/test/common index 65615cc09a3e..44cc352f6009 100644 --- a/test/common +++ b/test/common @@ -132,3 +132,13 @@ json2var() { sed -e "s/[{}\",]//g; s/\[//g; s/\]//g; s/:/=/g" } + +# check_dmesg +# $1: line number where this is called +check_dmesg() +{ + # validate no WARN or lockdep report during the run + log=$(journalctl -r -k --since "-$((SECONDS+1))s") + grep -q "Call Trace" <<< $log && err $1 + true +} diff --git a/test/cxl-region-sysfs.sh b/test/cxl-region-sysfs.sh index 63186b60dfec..e128406cd8c8 100644 --- a/test/cxl-region-sysfs.sh +++ b/test/cxl-region-sysfs.sh @@ -164,8 +164,6 @@ readarray -t endpoint < <($CXL free-dpa -t pmem ${mem[*]} | jq -r ".[] | .decoder.decoder") echo "$region released ${#endpoint[@]} targets: ${endpoint[@]}" -# validate no WARN or lockdep report during the run -log=$(journalctl -r -k --since "-$((SECONDS+1))s") -grep -q "Call Trace" <<< $log && err "$LINENO" +check_dmesg "$LINENO" modprobe -r cxl_test diff --git a/test/cxl-topology.sh b/test/cxl-topology.sh index f7e390d22680..1f15d29f0600 100644 --- a/test/cxl-topology.sh +++ b/test/cxl-topology.sh @@ -169,9 +169,6 @@ done # validate that the bus can be disabled without issue $CXL disable-bus $root -f - -# validate no WARN or lockdep report during the run -log=$(journalctl -r -k --since "-$((SECONDS+1))s") -grep -q "Call Trace" <<< $log && err "$LINENO" +check_dmesg "$LINENO" modprobe -r cxl_test diff --git a/test/dax.sh b/test/dax.sh index bb9848b10ecc..3ffbc8079eba 100755 --- a/test/dax.sh +++ b/test/dax.sh @@ -118,4 +118,6 @@ else run_xfs fi +check_dmesg "$LINENO" + exit 0 diff --git a/test/daxdev-errors.sh b/test/daxdev-errors.sh index 7f79718113d0..84ef93499acf 100755 --- a/test/daxdev-errors.sh +++ b/test/daxdev-errors.sh @@ -71,6 +71,8 @@ if read sector len < /sys/bus/platform/devices/nfit_test.0/$busdev/$region/badbl fi [ -n "$sector" ] && echo "fail: $LINENO" && exit 1 +check_dmesg "$LINENO" + _cleanup exit 0 diff --git a/test/multi-dax.sh b/test/multi-dax.sh index 04070adb18e4..d471e1c96b5e 100755 --- a/test/multi-dax.sh +++ b/test/multi-dax.sh @@ -28,6 +28,8 @@ chardev1=$(echo $json | jq ". | select(.mode == \"devdax\") | .daxregion.devices json=$($NDCTL create-namespace -b $NFIT_TEST_BUS0 -r $region -t pmem -m devdax -a $ALIGN_SIZE -s 16M) chardev2=$(echo $json | jq ". | select(.mode == \"devdax\") | .daxregion.devices[0].chardev") +check_dmesg "$LINENO" + _cleanup exit 0 From patchwork Thu Dec 8 21:28:15 2022 Content-Type: text/plain; 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08 Dec 2022 13:28:16 -0800 Subject: [ndctl PATCH v2 03/18] ndctl/clang-format: Move minimum version to 6 From: Dan Williams To: linux-cxl@vger.kernel.org Cc: vishal.l.verma@intel.com, alison.schofield@intel.com, nvdimm@lists.linux.dev, vishal.l.verma@intel.com Date: Thu, 08 Dec 2022 13:28:15 -0800 Message-ID: <167053489567.582963.2992876970826532169.stgit@dwillia2-xfh.jf.intel.com> In-Reply-To: <167053487710.582963.17616889985000817682.stgit@dwillia2-xfh.jf.intel.com> References: <167053487710.582963.17616889985000817682.stgit@dwillia2-xfh.jf.intel.com> User-Agent: StGit/0.18-3-g996c MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org Follow the kernel change that did the same: sed -i 's/^\(\s*\)#\(\S*\s\+\S*\) # Unknown to clang-format.*/\1\2/' .clang-format commit 96232c7d4f84 ("clang-format: Update to clang-format >= 6") Signed-off-by: Dan Williams --- .clang-format | 36 ++++++++++++++++++------------------ 1 file changed, 18 insertions(+), 18 deletions(-) diff --git a/.clang-format b/.clang-format index b6169e15097c..f372823c3248 100644 --- a/.clang-format +++ b/.clang-format @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 # -# clang-format configuration file. Intended for clang-format >= 4. +# clang-format configuration file. Intended for clang-format >= 6. # Copied from Linux's .clang-format # # For more information, see: @@ -13,7 +13,7 @@ AccessModifierOffset: -4 AlignAfterOpenBracket: Align AlignConsecutiveAssignments: false AlignConsecutiveDeclarations: false -#AlignEscapedNewlines: Left # Unknown to clang-format-4.0 +AlignEscapedNewlines: Left AlignOperands: true AlignTrailingComments: false AllowAllParametersOfDeclarationOnNextLine: false @@ -37,24 +37,24 @@ BraceWrapping: AfterObjCDeclaration: false AfterStruct: false AfterUnion: false - #AfterExternBlock: false # Unknown to clang-format-5.0 + AfterExternBlock: false BeforeCatch: false BeforeElse: false IndentBraces: false - #SplitEmptyFunction: true # Unknown to clang-format-4.0 - #SplitEmptyRecord: true # Unknown to clang-format-4.0 - #SplitEmptyNamespace: true # Unknown to clang-format-4.0 + SplitEmptyFunction: true + SplitEmptyRecord: true + SplitEmptyNamespace: true BreakBeforeBinaryOperators: None BreakBeforeBraces: Custom -#BreakBeforeInheritanceComma: false # Unknown to clang-format-4.0 +BreakBeforeInheritanceComma: false BreakBeforeTernaryOperators: false BreakConstructorInitializersBeforeComma: false -#BreakConstructorInitializers: BeforeComma # Unknown to clang-format-4.0 +BreakConstructorInitializers: BeforeComma BreakAfterJavaFieldAnnotations: false BreakStringLiterals: false ColumnLimit: 80 CommentPragmas: '^ IWYU pragma:' -#CompactNamespaces: false # Unknown to clang-format-4.0 +CompactNamespaces: false ConstructorInitializerAllOnOneLineOrOnePerLine: false ConstructorInitializerIndentWidth: 8 ContinuationIndentWidth: 8 @@ -62,7 +62,7 @@ Cpp11BracedListStyle: false DerivePointerAlignment: false DisableFormat: false ExperimentalAutoDetectBinPacking: false -#FixNamespaceComments: false # Unknown to clang-format-4.0 +FixNamespaceComments: false # Taken from: # while read -r sym; do @@ -118,13 +118,13 @@ ForEachMacros: - 'ndctl_region_foreach' - 'udev_list_entry_foreach' -#IncludeBlocks: Preserve # Unknown to clang-format-5.0 +IncludeBlocks: Preserve IncludeCategories: - Regex: '.*' Priority: 1 IncludeIsMainRegex: '(Test)?$' IndentCaseLabels: false -#IndentPPDirectives: None # Unknown to clang-format-5.0 +IndentPPDirectives: None IndentWidth: 8 IndentWrappedFunctionNames: false JavaScriptQuotes: Leave @@ -134,13 +134,13 @@ MacroBlockBegin: '' MacroBlockEnd: '' MaxEmptyLinesToKeep: 1 NamespaceIndentation: None -#ObjCBinPackProtocolList: Auto # Unknown to clang-format-5.0 +ObjCBinPackProtocolList: Auto ObjCBlockIndentWidth: 8 ObjCSpaceAfterProperty: true ObjCSpaceBeforeProtocolList: true # Taken from git's rules -#PenaltyBreakAssignment: 10 # Unknown to clang-format-4.0 +PenaltyBreakAssignment: 10 PenaltyBreakBeforeFirstCallParameter: 30 PenaltyBreakComment: 10 PenaltyBreakFirstLessLess: 0 @@ -151,14 +151,14 @@ PenaltyReturnTypeOnItsOwnLine: 60 PointerAlignment: Right ReflowComments: false SortIncludes: false -#SortUsingDeclarations: false # Unknown to clang-format-4.0 +SortUsingDeclarations: false SpaceAfterCStyleCast: false SpaceAfterTemplateKeyword: true SpaceBeforeAssignmentOperators: true -#SpaceBeforeCtorInitializerColon: true # Unknown to clang-format-5.0 -#SpaceBeforeInheritanceColon: true # Unknown to clang-format-5.0 +SpaceBeforeCtorInitializerColon: true +SpaceBeforeInheritanceColon: true SpaceBeforeParens: ControlStatements -#SpaceBeforeRangeBasedForLoopColon: true # Unknown to clang-format-5.0 +SpaceBeforeRangeBasedForLoopColon: true SpaceInEmptyParentheses: false SpacesBeforeTrailingComments: 1 SpacesInAngles: false From patchwork Thu Dec 8 21:28:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Williams X-Patchwork-Id: 13068921 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4AA35C4332F for ; Thu, 8 Dec 2022 21:28:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229795AbiLHV2Y (ORCPT ); Thu, 8 Dec 2022 16:28:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40470 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229478AbiLHV2X (ORCPT ); Thu, 8 Dec 2022 16:28:23 -0500 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C96B18424A for ; Thu, 8 Dec 2022 13:28:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; 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08 Dec 2022 13:28:21 -0800 Subject: [ndctl PATCH v2 04/18] ndctl/clang-format: Fix space after for_each macros From: Dan Williams To: linux-cxl@vger.kernel.org Cc: vishal.l.verma@intel.com, alison.schofield@intel.com, nvdimm@lists.linux.dev, vishal.l.verma@intel.com Date: Thu, 08 Dec 2022 13:28:21 -0800 Message-ID: <167053490140.582963.14276565576884840344.stgit@dwillia2-xfh.jf.intel.com> In-Reply-To: <167053487710.582963.17616889985000817682.stgit@dwillia2-xfh.jf.intel.com> References: <167053487710.582963.17616889985000817682.stgit@dwillia2-xfh.jf.intel.com> User-Agent: StGit/0.18-3-g996c MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org Copy the approach taken in the kernel via: commit 781121a7f6d1 ("clang-format: Fix space after for_each macros") Signed-off-by: Dan Williams Reviewed-by: Alison Schofield --- .clang-format | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/.clang-format b/.clang-format index f372823c3248..448b7e7211ae 100644 --- a/.clang-format +++ b/.clang-format @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 # -# clang-format configuration file. Intended for clang-format >= 6. +# clang-format configuration file. Intended for clang-format >= 11. # Copied from Linux's .clang-format # # For more information, see: @@ -157,7 +157,7 @@ SpaceAfterTemplateKeyword: true SpaceBeforeAssignmentOperators: true SpaceBeforeCtorInitializerColon: true SpaceBeforeInheritanceColon: true -SpaceBeforeParens: ControlStatements +SpaceBeforeParens: ControlStatementsExceptForEachMacros SpaceBeforeRangeBasedForLoopColon: true SpaceInEmptyParentheses: false SpacesBeforeTrailingComments: 1 From patchwork Thu Dec 8 21:28:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Williams X-Patchwork-Id: 13068941 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6C3FFC4332F for ; Thu, 8 Dec 2022 21:28:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229796AbiLHV2a (ORCPT ); Thu, 8 Dec 2022 16:28:30 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40496 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229478AbiLHV2a (ORCPT ); Thu, 8 Dec 2022 16:28:30 -0500 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DF3258424A for ; Thu, 8 Dec 2022 13:28:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1670534908; x=1702070908; h=subject:from:to:cc:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=OSg3tRXeh2ljbNLBilzvesOZ52kfpIGevHWDmk6y0Dk=; b=DYCLI+YTma/f0tGd5Nvf8y9utIFso24KwAKzjND4sbV3bQoEr+kUEge9 ehb8P7AqEoiNND/cOV1mQKTrZSiwhgiZlBaWAjN5Jx2Y+OGRjSJc/K3Oz GPf2ZybSaJGcztpm9xzIHXpGooa5wVqniitvAyd4ey4XaGrgHDDFZQgz4 BYIM0hhNQ2UCUGhWVM9Mx4xZTdcUoVQVePp/6HODDhbBycG5KXYKu0jQ5 IT8nD2Ne8DBWJpS2O1y4I0Qiy/9/hQehTKUOZFLxqPvswMjsVHzrjRjFR RTcvG3jUt/UjzrIddJdQGusFeG9HKbd7uGRgA92YehgToTMkKsMi74YR6 A==; X-IronPort-AV: E=McAfee;i="6500,9779,10555"; a="318458793" X-IronPort-AV: E=Sophos;i="5.96,228,1665471600"; d="scan'208";a="318458793" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2022 13:28:28 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10555"; a="976047130" X-IronPort-AV: E=Sophos;i="5.96,228,1665471600"; d="scan'208";a="976047130" Received: from kputnam-mobl1.amr.corp.intel.com (HELO dwillia2-xfh.jf.intel.com) ([10.251.25.149]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2022 13:28:27 -0800 Subject: [ndctl PATCH v2 05/18] cxl/list: Always attempt to collect child objects From: Dan Williams To: linux-cxl@vger.kernel.org Cc: Vishal Verma , alison.schofield@intel.com, nvdimm@lists.linux.dev, vishal.l.verma@intel.com Date: Thu, 08 Dec 2022 13:28:27 -0800 Message-ID: <167053490730.582963.12731194244577097943.stgit@dwillia2-xfh.jf.intel.com> In-Reply-To: <167053487710.582963.17616889985000817682.stgit@dwillia2-xfh.jf.intel.com> References: <167053487710.582963.17616889985000817682.stgit@dwillia2-xfh.jf.intel.com> User-Agent: StGit/0.18-3-g996c MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org The evolution of the hierarchical listing left warts like the following: if (p->memdevs && !p->ports && !p->endpoints) { jchilddevs = json_object_new_array(); ...whereby it tried to avoid creating a container for child devices if another container deeper in the hierarchy might supersede the upper-level containers. I.e. if endpoints are included in the listing then there will be nothing to report at the bus level. The protection is unnnecessary because cond_add_put_array_suffix() already handles the case of dropping empty containers when a lower level container subsumes all the objects. Moreover, it's a broken check when adding objects at new levels of the topology. CXL devices attached to an RCH cause memdevs to appear directly beneath a bus object, and not an intervening port. So in preparation for that change, delete all the unnecessary special casing for "jchildobj" container creation. Reported-by: Vishal Verma Fixes: 41d6769393f4 ("cxl/list: Move enabled memdevs underneath their endpoint") Signed-off-by: Dan Williams --- cxl/filter.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/cxl/filter.c b/cxl/filter.c index 56c659965891..040e7deefb3e 100644 --- a/cxl/filter.c +++ b/cxl/filter.c @@ -971,7 +971,7 @@ walk_child_ports(struct cxl_port *parent_port, struct cxl_filter_params *p, continue; } - if (p->memdevs && !p->endpoints) { + if (p->memdevs) { jchilddevs = json_object_new_array(); if (!jchilddevs) { err(p, @@ -1151,7 +1151,7 @@ int cxl_filter_walk(struct cxl_ctx *ctx, struct cxl_filter_params *p) } } - if (p->memdevs && !p->ports && !p->endpoints) { + if (p->memdevs) { jchilddevs = json_object_new_array(); if (!jchilddevs) { err(p, @@ -1169,7 +1169,7 @@ int cxl_filter_walk(struct cxl_ctx *ctx, struct cxl_filter_params *p) continue; } } - if (p->regions && !p->decoders) { + if (p->regions) { jchildregions = json_object_new_array(); if (!jchildregions) { err(p, From patchwork Thu Dec 8 21:28:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Williams X-Patchwork-Id: 13068942 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 16BA5C4332F for ; Thu, 8 Dec 2022 21:28:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229656AbiLHV2k (ORCPT ); Thu, 8 Dec 2022 16:28:40 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40526 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229478AbiLHV2j (ORCPT ); Thu, 8 Dec 2022 16:28:39 -0500 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 80A4A8424A for ; Thu, 8 Dec 2022 13:28:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1670534918; x=1702070918; h=subject:from:to:cc:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=lRuQG05UP4XfJ3wVJcSrMxD4UPUTHzbZPDP3e8Hdh+8=; b=DeYCExv1zX6LYoFPVS84tFp0jCgye81lD3gkTH7mvXFlzClAcfpconYD vLV0cI9eLata4hChtPJZzrW9D1YCvx+32qzDELNFuchnTYQLTaAiDjG1Q lfjpyTYBPeNODxyWncADXIoCGGOuv3KLuljyafWCNzYbkCf7Kau6jPGtc pjdxVYJa8izQjT5g2TWz1gZgV8yc+9Cr9ZHKXj3xBdlSOdhQEHeFGt89c rXfrsQTccoKOLb407ZB57r4KoOxSPErmUJWaOM6CCwdzxSkc6XnhWt2IO gqyp9ASApPSj/OAzLDYgqvHrMQ0BWROK86z92EXdvEhXDdN2UOKQ2G6cu A==; X-IronPort-AV: E=McAfee;i="6500,9779,10555"; a="319170302" X-IronPort-AV: E=Sophos;i="5.96,228,1665471600"; d="scan'208";a="319170302" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2022 13:28:34 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10555"; a="753756104" X-IronPort-AV: E=Sophos;i="5.96,228,1665471600"; d="scan'208";a="753756104" Received: from kputnam-mobl1.amr.corp.intel.com (HELO dwillia2-xfh.jf.intel.com) ([10.251.25.149]) by fmsmga002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2022 13:28:33 -0800 Subject: [ndctl PATCH v2 06/18] cxl/list: Add a 'firmware_node' alias From: Dan Williams To: linux-cxl@vger.kernel.org Cc: vishal.l.verma@intel.com, alison.schofield@intel.com, nvdimm@lists.linux.dev, vishal.l.verma@intel.com Date: Thu, 08 Dec 2022 13:28:33 -0800 Message-ID: <167053491307.582963.8109215191948535895.stgit@dwillia2-xfh.jf.intel.com> In-Reply-To: <167053487710.582963.17616889985000817682.stgit@dwillia2-xfh.jf.intel.com> References: <167053487710.582963.17616889985000817682.stgit@dwillia2-xfh.jf.intel.com> User-Agent: StGit/0.18-3-g996c MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org In preparation for the kernel switching from ACPI0016 devices as the dport identifier to the corresponding host-bridge as the identifier, add support for listing the dport firmware_node as an alias, and determining when the dev_path is the phys_path for a dport or a target. The code paths that depend on phys_path like cxl_target_maps_memdev() and cxl_dport_maps_memdev() already have appropriate fallbacks to dev_path. Signed-off-by: Dan Williams --- cxl/json.c | 20 +++++++++++++++++--- cxl/lib/libcxl.c | 31 +++++++++++++++++++++++++++++++ cxl/lib/libcxl.sym | 6 ++++++ cxl/lib/private.h | 2 ++ cxl/libcxl.h | 2 ++ 5 files changed, 58 insertions(+), 3 deletions(-) diff --git a/cxl/json.c b/cxl/json.c index 63c17519aba1..5cff532acb13 100644 --- a/cxl/json.c +++ b/cxl/json.c @@ -384,7 +384,7 @@ void util_cxl_dports_append_json(struct json_object *jport, cxl_dport_foreach(port, dport) { struct json_object *jdport; - const char *phys_node; + const char *phys_node, *fw_node; if (!util_cxl_dport_filter_by_memdev(dport, ident, serial)) continue; @@ -404,6 +404,13 @@ void util_cxl_dports_append_json(struct json_object *jport, json_object_object_add(jdport, "alias", jobj); } + fw_node = cxl_dport_get_firmware_node(dport); + if (fw_node) { + jobj = json_object_new_string(fw_node); + if (jobj) + json_object_object_add(jdport, "alias", jobj); + } + val = cxl_dport_get_id(dport); jobj = util_json_object_hex(val, flags); if (jobj) @@ -711,9 +718,9 @@ void util_cxl_targets_append_json(struct json_object *jdecoder, return; cxl_target_foreach(decoder, target) { - struct json_object *jtarget; - const char *phys_node; const char *devname; + struct json_object *jtarget; + const char *phys_node, *fw_node; if (!util_cxl_target_filter_by_memdev(target, ident, serial)) continue; @@ -734,6 +741,13 @@ void util_cxl_targets_append_json(struct json_object *jdecoder, json_object_object_add(jtarget, "alias", jobj); } + fw_node = cxl_target_get_firmware_node(target); + if (fw_node) { + jobj = json_object_new_string(fw_node); + if (jobj) + json_object_object_add(jtarget, "alias", jobj); + } + val = cxl_target_get_position(target); jobj = json_object_new_int(val); if (jobj) diff --git a/cxl/lib/libcxl.c b/cxl/lib/libcxl.c index e8c5d4444dd0..a69e31bc8a6e 100644 --- a/cxl/lib/libcxl.c +++ b/cxl/lib/libcxl.c @@ -77,6 +77,7 @@ static void free_target(struct cxl_target *target, struct list_head *head) list_del_from(head, &target->list); free(target->dev_path); free(target->phys_path); + free(target->fw_path); free(target); } @@ -134,6 +135,7 @@ static void free_dport(struct cxl_dport *dport, struct list_head *head) free(dport->dev_buf); free(dport->dev_path); free(dport->phys_path); + free(dport->fw_path); free(dport); } @@ -1856,6 +1858,15 @@ static void *add_cxl_decoder(void *parent, int id, const char *cxldecoder_base) dbg(ctx, "%s: target%ld %s phys_path: %s\n", devname, i, target->dev_path, target->phys_path ? target->phys_path : "none"); + + sprintf(port->dev_buf, "%s/dport%d/firmware_node", port->dev_path, did); + target->fw_path = realpath(port->dev_buf, NULL); + dbg(ctx, "%s: target%ld %s fw_path: %s\n", devname, i, + target->dev_path, + target->fw_path ? target->fw_path : "none"); + + if (!target->phys_path && target->fw_path) + target->phys_path = strdup(target->dev_path); list_add(&decoder->targets, &target->list); } @@ -2288,6 +2299,13 @@ CXL_EXPORT const char *cxl_target_get_physical_node(struct cxl_target *target) return devpath_to_devname(target->phys_path); } +CXL_EXPORT const char *cxl_target_get_firmware_node(struct cxl_target *target) +{ + if (!target->fw_path) + return NULL; + return devpath_to_devname(target->fw_path); +} + CXL_EXPORT struct cxl_target * cxl_decoder_get_target_by_memdev(struct cxl_decoder *decoder, struct cxl_memdev *memdev) @@ -2569,6 +2587,12 @@ static void *add_cxl_dport(void *parent, int id, const char *cxldport_base) sprintf(dport->dev_buf, "%s/physical_node", cxldport_base); dport->phys_path = realpath(dport->dev_buf, NULL); + sprintf(dport->dev_buf, "%s/firmware_node", cxldport_base); + dport->fw_path = realpath(dport->dev_buf, NULL); + + if (!dport->phys_path && dport->fw_path) + dport->phys_path = strdup(dport->dev_path); + cxl_dport_foreach(port, dport_dup) if (dport_dup->id == dport->id) { free_dport(dport, NULL); @@ -2629,6 +2653,13 @@ CXL_EXPORT const char *cxl_dport_get_physical_node(struct cxl_dport *dport) return devpath_to_devname(dport->phys_path); } +CXL_EXPORT const char *cxl_dport_get_firmware_node(struct cxl_dport *dport) +{ + if (!dport->fw_path) + return NULL; + return devpath_to_devname(dport->fw_path); +} + CXL_EXPORT int cxl_dport_get_id(struct cxl_dport *dport) { return dport->id; diff --git a/cxl/lib/libcxl.sym b/cxl/lib/libcxl.sym index 8bb91e05638b..490ed1fda5d3 100644 --- a/cxl/lib/libcxl.sym +++ b/cxl/lib/libcxl.sym @@ -217,3 +217,9 @@ global: cxl_decoder_get_max_available_extent; cxl_decoder_get_region; } LIBCXL_2; + +LIBCXL_4 { +global: + cxl_target_get_firmware_node; + cxl_dport_get_firmware_node; +} LIBCXL_3; diff --git a/cxl/lib/private.h b/cxl/lib/private.h index 437eadeb670a..e378339ec353 100644 --- a/cxl/lib/private.h +++ b/cxl/lib/private.h @@ -45,6 +45,7 @@ struct cxl_dport { size_t buf_len; char *dev_path; char *phys_path; + char *fw_path; struct cxl_port *port; struct list_node list; }; @@ -93,6 +94,7 @@ struct cxl_target { struct cxl_decoder *decoder; char *dev_path; char *phys_path; + char *fw_path; int id, position; }; diff --git a/cxl/libcxl.h b/cxl/libcxl.h index 9fe4e99263dd..1e0076908901 100644 --- a/cxl/libcxl.h +++ b/cxl/libcxl.h @@ -116,6 +116,7 @@ struct cxl_dport *cxl_dport_get_first(struct cxl_port *port); struct cxl_dport *cxl_dport_get_next(struct cxl_dport *dport); const char *cxl_dport_get_devname(struct cxl_dport *dport); const char *cxl_dport_get_physical_node(struct cxl_dport *dport); +const char *cxl_dport_get_firmware_node(struct cxl_dport *dport); struct cxl_port *cxl_dport_get_port(struct cxl_dport *dport); int cxl_dport_get_id(struct cxl_dport *dport); bool cxl_dport_maps_memdev(struct cxl_dport *dport, struct cxl_memdev *memdev); @@ -225,6 +226,7 @@ const char *cxl_target_get_devname(struct cxl_target *target); bool cxl_target_maps_memdev(struct cxl_target *target, struct cxl_memdev *memdev); const char *cxl_target_get_physical_node(struct cxl_target *target); +const char *cxl_target_get_firmware_node(struct cxl_target *target); #define cxl_target_foreach(decoder, target) \ for (target = cxl_target_get_first(decoder); target != NULL; \ From patchwork Thu Dec 8 21:28:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Williams X-Patchwork-Id: 13068943 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 465C9C4167B for ; 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X-IronPort-AV: E=McAfee;i="6500,9779,10555"; a="319170322" X-IronPort-AV: E=Sophos;i="5.96,228,1665471600"; d="scan'208";a="319170322" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2022 13:28:40 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10555"; a="753756119" X-IronPort-AV: E=Sophos;i="5.96,228,1665471600"; d="scan'208";a="753756119" Received: from kputnam-mobl1.amr.corp.intel.com (HELO dwillia2-xfh.jf.intel.com) ([10.251.25.149]) by fmsmga002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2022 13:28:39 -0800 Subject: [ndctl PATCH v2 07/18] cxl/list: Add parent_dport attribute to port listings From: Dan Williams To: linux-cxl@vger.kernel.org Cc: vishal.l.verma@intel.com, alison.schofield@intel.com, nvdimm@lists.linux.dev, vishal.l.verma@intel.com Date: Thu, 08 Dec 2022 13:28:39 -0800 Message-ID: <167053491908.582963.7783814693644991382.stgit@dwillia2-xfh.jf.intel.com> In-Reply-To: <167053487710.582963.17616889985000817682.stgit@dwillia2-xfh.jf.intel.com> References: <167053487710.582963.17616889985000817682.stgit@dwillia2-xfh.jf.intel.com> User-Agent: StGit/0.18-3-g996c MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org --- cxl/json.c | 8 ++++++++ cxl/lib/libcxl.c | 38 ++++++++++++++++++++++++++++++++++++++ cxl/lib/libcxl.sym | 1 + cxl/lib/private.h | 2 ++ cxl/libcxl.h | 1 + 5 files changed, 50 insertions(+) diff --git a/cxl/json.c b/cxl/json.c index 5cff532acb13..2f3639ede2f8 100644 --- a/cxl/json.c +++ b/cxl/json.c @@ -783,6 +783,14 @@ static struct json_object *__util_cxl_port_to_json(struct cxl_port *port, if (jobj) json_object_object_add(jport, "host", jobj); + if (cxl_port_get_parent_dport(port)) { + struct cxl_dport *dport = cxl_port_get_parent_dport(port); + + jobj = json_object_new_string(cxl_dport_get_devname(dport)); + if (jobj) + json_object_object_add(jport, "parent_dport", jobj); + } + jobj = json_object_new_int(cxl_port_get_depth(port)); if (jobj) json_object_object_add(jport, "depth", jobj); diff --git a/cxl/lib/libcxl.c b/cxl/lib/libcxl.c index a69e31bc8a6e..9475d0e51f8c 100644 --- a/cxl/lib/libcxl.c +++ b/cxl/lib/libcxl.c @@ -162,6 +162,7 @@ static void __free_port(struct cxl_port *port, struct list_head *head) free(port->dev_buf); free(port->dev_path); free(port->uport); + free(port->parent_dport_path); } static void free_port(struct cxl_port *port, struct list_head *head) @@ -1488,6 +1489,20 @@ static int cxl_port_init(struct cxl_port *port, struct cxl_port *parent_port, if (!port->uport) goto err; + /* + * CXL root devices have no parents and level 1 ports are both + * CXL root targets and hosts of the next level, so: + * parent_dport == uport + * ...at depth == 1 + */ + if (port->depth > 1) { + rc = snprintf(port->dev_buf, port->buf_len, "%s/parent_dport", + cxlport_base); + if (rc >= port->buf_len) + goto err; + port->parent_dport_path = realpath(port->dev_buf, NULL); + } + sprintf(path, "%s/modalias", cxlport_base); if (sysfs_read_attr(ctx, path, buf) == 0) port->module = util_modalias_to_module(ctx, buf); @@ -2465,6 +2480,29 @@ CXL_EXPORT const char *cxl_port_get_host(struct cxl_port *port) return devpath_to_devname(port->uport); } +CXL_EXPORT struct cxl_dport *cxl_port_get_parent_dport(struct cxl_port *port) +{ + struct cxl_port *parent; + struct cxl_dport *dport; + const char *name; + + if (port->parent_dport) + return port->parent_dport; + + if (!port->parent_dport_path) + return NULL; + + parent = cxl_port_get_parent(port); + name = devpath_to_devname(port->parent_dport_path); + cxl_dport_foreach(parent, dport) + if (strcmp(cxl_dport_get_devname(dport), name) == 0) { + port->parent_dport = dport; + return dport; + } + + return NULL; +} + CXL_EXPORT bool cxl_port_hosts_memdev(struct cxl_port *port, struct cxl_memdev *memdev) { diff --git a/cxl/lib/libcxl.sym b/cxl/lib/libcxl.sym index 490ed1fda5d3..cc5c1d543484 100644 --- a/cxl/lib/libcxl.sym +++ b/cxl/lib/libcxl.sym @@ -222,4 +222,5 @@ LIBCXL_4 { global: cxl_target_get_firmware_node; cxl_dport_get_firmware_node; + cxl_port_get_parent_dport; } LIBCXL_3; diff --git a/cxl/lib/private.h b/cxl/lib/private.h index e378339ec353..da2fce33cb07 100644 --- a/cxl/lib/private.h +++ b/cxl/lib/private.h @@ -62,6 +62,8 @@ struct cxl_port { size_t buf_len; char *dev_path; char *uport; + char *parent_dport_path; + struct cxl_dport *parent_dport; int ports_init; int endpoints_init; int decoders_init; diff --git a/cxl/libcxl.h b/cxl/libcxl.h index 1e0076908901..8d75330886f8 100644 --- a/cxl/libcxl.h +++ b/cxl/libcxl.h @@ -96,6 +96,7 @@ bool cxl_port_is_endpoint(struct cxl_port *port); struct cxl_endpoint *cxl_port_to_endpoint(struct cxl_port *port); struct cxl_bus *cxl_port_get_bus(struct cxl_port *port); const char *cxl_port_get_host(struct cxl_port *port); +struct cxl_dport *cxl_port_get_parent_dport(struct cxl_port *port); bool cxl_port_hosts_memdev(struct cxl_port *port, struct cxl_memdev *memdev); int cxl_port_get_nr_dports(struct cxl_port *port); int cxl_port_disable_invalidate(struct cxl_port *port); From patchwork Thu Dec 8 21:28:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Williams X-Patchwork-Id: 13068944 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8069FC4332F for ; Thu, 8 Dec 2022 21:28:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229478AbiLHV2s (ORCPT ); Thu, 8 Dec 2022 16:28:48 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40558 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229798AbiLHV2r (ORCPT ); Thu, 8 Dec 2022 16:28:47 -0500 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 758F68424A for ; Thu, 8 Dec 2022 13:28:46 -0800 (PST) DKIM-Signature: v=1; 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d="scan'208";a="753756139" Received: from kputnam-mobl1.amr.corp.intel.com (HELO dwillia2-xfh.jf.intel.com) ([10.251.25.149]) by fmsmga002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2022 13:28:45 -0800 Subject: [ndctl PATCH v2 08/18] cxl/list: Skip emitting pmem_size when it is zero From: Dan Williams To: linux-cxl@vger.kernel.org Cc: Alison Schofield , vishal.l.verma@intel.com, nvdimm@lists.linux.dev, vishal.l.verma@intel.com Date: Thu, 08 Dec 2022 13:28:45 -0800 Message-ID: <167053492504.582963.9545867906512429034.stgit@dwillia2-xfh.jf.intel.com> In-Reply-To: <167053487710.582963.17616889985000817682.stgit@dwillia2-xfh.jf.intel.com> References: <167053487710.582963.17616889985000817682.stgit@dwillia2-xfh.jf.intel.com> User-Agent: StGit/0.18-3-g996c MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org The typical case is that CXL devices are pure ram devices. Only emit capacity sizes when they are non-zero to avoid confusion around whether pmem is available via partitioning or not. The confusion being that a user may assign more meaning to the zero size value than it actually deserves. A zero value for either pmem or ram, doesn't indicate the devices capability for either mode. Use the -I option to cxl list to include paritition info in the memdev listing. That will explicitly show the ram and pmem capabilities of the device. Do the same for ram_size on the odd case that someone builds a pure pmem device. Cc: Alison Schofield [alison: clarify changelog] Signed-off-by: Dan Williams Reviewed-by: Alison Schofield --- Documentation/cxl/cxl-list.txt | 5 ----- cxl/json.c | 20 +++++++++++++------- 2 files changed, 13 insertions(+), 12 deletions(-) diff --git a/Documentation/cxl/cxl-list.txt b/Documentation/cxl/cxl-list.txt index 14a2b4bb5c2a..56229abcb053 100644 --- a/Documentation/cxl/cxl-list.txt +++ b/Documentation/cxl/cxl-list.txt @@ -70,7 +70,6 @@ configured. { "memdev":"mem0", "pmem_size":"256.00 MiB (268.44 MB)", - "ram_size":0, "serial":"0", "host":"0000:35:00.0" } @@ -88,7 +87,6 @@ EXAMPLE { "memdev":"mem0", "pmem_size":268435456, - "ram_size":0, "serial":0, "host":"0000:35:00.0" } @@ -101,7 +99,6 @@ EXAMPLE { "memdev":"mem0", "pmem_size":"256.00 MiB (268.44 MB)", - "ram_size":0, "serial":"0" } ] @@ -129,7 +126,6 @@ OPTIONS { "memdev":"mem0", "pmem_size":268435456, - "ram_size":0, "serial":0 }, { @@ -204,7 +200,6 @@ OPTIONS [ { "memdev":"mem0", - "pmem_size":0, "ram_size":273535729664, "partition_info":{ "total_size":273535729664, diff --git a/cxl/json.c b/cxl/json.c index 2f3639ede2f8..292e8428ccee 100644 --- a/cxl/json.c +++ b/cxl/json.c @@ -305,7 +305,7 @@ struct json_object *util_cxl_memdev_to_json(struct cxl_memdev *memdev, { const char *devname = cxl_memdev_get_devname(memdev); struct json_object *jdev, *jobj; - unsigned long long serial; + unsigned long long serial, size; int numa_node; jdev = json_object_new_object(); @@ -316,13 +316,19 @@ struct json_object *util_cxl_memdev_to_json(struct cxl_memdev *memdev, if (jobj) json_object_object_add(jdev, "memdev", jobj); - jobj = util_json_object_size(cxl_memdev_get_pmem_size(memdev), flags); - if (jobj) - json_object_object_add(jdev, "pmem_size", jobj); + size = cxl_memdev_get_pmem_size(memdev); + if (size) { + jobj = util_json_object_size(size, flags); + if (jobj) + json_object_object_add(jdev, "pmem_size", jobj); + } - jobj = util_json_object_size(cxl_memdev_get_ram_size(memdev), flags); - if (jobj) - json_object_object_add(jdev, "ram_size", jobj); + size = cxl_memdev_get_ram_size(memdev); + if (size) { + jobj = util_json_object_size(size, flags); + if (jobj) + json_object_object_add(jdev, "ram_size", jobj); + } if (flags & UTIL_JSON_HEALTH) { jobj = util_cxl_memdev_health_to_json(memdev, flags); From patchwork Thu Dec 8 21:28:50 2022 Content-Type: text/plain; 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08 Dec 2022 13:28:51 -0800 Subject: [ndctl PATCH v2 09/18] cxl/filter: Return json-c topology From: Dan Williams To: linux-cxl@vger.kernel.org Cc: vishal.l.verma@intel.com, alison.schofield@intel.com, nvdimm@lists.linux.dev, vishal.l.verma@intel.com Date: Thu, 08 Dec 2022 13:28:50 -0800 Message-ID: <167053493095.582963.5155962994216061570.stgit@dwillia2-xfh.jf.intel.com> In-Reply-To: <167053487710.582963.17616889985000817682.stgit@dwillia2-xfh.jf.intel.com> References: <167053487710.582963.17616889985000817682.stgit@dwillia2-xfh.jf.intel.com> User-Agent: StGit/0.18-3-g996c MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org In preparation for cxl_filter_walk() to be used to collect and publish cxl objects for other utilities, return the resulting json_object directly. Move the responsibility of freeing and optionally printing the object to the caller. Signed-off-by: Dan Williams Tested-by: Alison Schofield --- cxl/filter.c | 30 ++++++------------------------ cxl/filter.h | 22 +++++++++++++++++++++- cxl/list.c | 7 ++++++- 3 files changed, 33 insertions(+), 26 deletions(-) diff --git a/cxl/filter.c b/cxl/filter.c index 040e7deefb3e..8499450ded01 100644 --- a/cxl/filter.c +++ b/cxl/filter.c @@ -672,23 +672,6 @@ util_cxl_decoder_filter_by_region(struct cxl_decoder *decoder, return decoder; } -static unsigned long params_to_flags(struct cxl_filter_params *param) -{ - unsigned long flags = 0; - - if (param->idle) - flags |= UTIL_JSON_IDLE; - if (param->human) - flags |= UTIL_JSON_HUMAN; - if (param->health) - flags |= UTIL_JSON_HEALTH; - if (param->targets) - flags |= UTIL_JSON_TARGETS; - if (param->partition) - flags |= UTIL_JSON_PARTITION; - return flags; -} - static void splice_array(struct cxl_filter_params *p, struct json_object *jobjs, struct json_object *platform, const char *container_name, bool do_container) @@ -1027,11 +1010,12 @@ walk_children: } } -int cxl_filter_walk(struct cxl_ctx *ctx, struct cxl_filter_params *p) +struct json_object *cxl_filter_walk(struct cxl_ctx *ctx, + struct cxl_filter_params *p) { struct json_object *jdevs = NULL, *jbuses = NULL, *jports = NULL; struct json_object *jplatform = json_object_new_array(); - unsigned long flags = params_to_flags(p); + unsigned long flags = cxl_filter_to_flags(p); struct json_object *jportdecoders = NULL; struct json_object *jbusdecoders = NULL; struct json_object *jepdecoders = NULL; @@ -1044,7 +1028,7 @@ int cxl_filter_walk(struct cxl_ctx *ctx, struct cxl_filter_params *p) if (!jplatform) { dbg(p, "platform object allocation failure\n"); - return -ENOMEM; + return NULL; } janondevs = json_object_new_array(); @@ -1232,9 +1216,7 @@ walk_children: top_level_objs > 1); splice_array(p, jregions, jplatform, "regions", top_level_objs > 1); - util_display_json_array(stdout, jplatform, flags); - - return 0; + return jplatform; err: json_object_put(janondevs); json_object_put(jbuses); @@ -1246,5 +1228,5 @@ err: json_object_put(jepdecoders); json_object_put(jregions); json_object_put(jplatform); - return -ENOMEM; + return NULL; } diff --git a/cxl/filter.h b/cxl/filter.h index 256df49c3d0c..2bda6ddd77ca 100644 --- a/cxl/filter.h +++ b/cxl/filter.h @@ -5,6 +5,7 @@ #include #include +#include struct cxl_filter_params { const char *memdev_filter; @@ -59,6 +60,25 @@ struct cxl_dport *util_cxl_dport_filter_by_memdev(struct cxl_dport *dport, const char *serial); struct cxl_decoder *util_cxl_decoder_filter(struct cxl_decoder *decoder, const char *__ident); -int cxl_filter_walk(struct cxl_ctx *ctx, struct cxl_filter_params *param); +struct json_object *cxl_filter_walk(struct cxl_ctx *ctx, + struct cxl_filter_params *param); + +static inline unsigned long cxl_filter_to_flags(struct cxl_filter_params *param) +{ + unsigned long flags = 0; + + if (param->idle) + flags |= UTIL_JSON_IDLE; + if (param->human) + flags |= UTIL_JSON_HUMAN; + if (param->health) + flags |= UTIL_JSON_HEALTH; + if (param->targets) + flags |= UTIL_JSON_TARGETS; + if (param->partition) + flags |= UTIL_JSON_PARTITION; + return flags; +} + bool cxl_filter_has(const char *needle, const char *__filter); #endif /* _CXL_UTIL_FILTER_H_ */ diff --git a/cxl/list.c b/cxl/list.c index 8c48fbbaaec3..2026de2b548b 100644 --- a/cxl/list.c +++ b/cxl/list.c @@ -72,6 +72,7 @@ int cmd_list(int argc, const char **argv, struct cxl_ctx *ctx) "cxl list []", NULL }; + struct json_object *jtopology; int i; argc = parse_options(argc, argv, options, u, 0); @@ -140,5 +141,9 @@ int cmd_list(int argc, const char **argv, struct cxl_ctx *ctx) param.endpoints = true; dbg(¶m, "walk topology\n"); - return cxl_filter_walk(ctx, ¶m); + jtopology = cxl_filter_walk(ctx, ¶m); + if (!jtopology) + return -ENOMEM; + util_display_json_array(stdout, jtopology, cxl_filter_to_flags(¶m)); + return 0; } From patchwork Thu Dec 8 21:28:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Williams X-Patchwork-Id: 13068946 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 74A15C4332F for ; Thu, 8 Dec 2022 21:29:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229773AbiLHV3A (ORCPT ); Thu, 8 Dec 2022 16:29:00 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40606 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229589AbiLHV27 (ORCPT ); Thu, 8 Dec 2022 16:28:59 -0500 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B0C0584266 for ; Thu, 8 Dec 2022 13:28:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1670534938; x=1702070938; h=subject:from:to:cc:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=b5zCfVzP38kgV3vnEfsEYSIHMCATSezT0YD9e5AI4I0=; b=SlpY7/GVIjIAnskb1LFuaJLBBAxWIZPlB4prTAe8qqvrAQIFvDlqc3A3 HK0hsGgk5UlQLuVKpVvTjiiIDSxQW+9f4PaYU8b5b5wH2UM1mPhxccmTl RsOrkt8+q6mlpejZL2NfxKYEnsImbQBDXJ4xu84qjzPw/6nE8trcsmu7V IE3pHM28Gt7Z+fKu0UuUHEiTT/g+C1Zb/3BS76FElyRbkqu1keLWCwTXl nXOQvtAcP/Qo+H0CdNLX4ZrdYGF+zBimp8mHUj6HzsnuNGsRGbFrIL5JU ybQIRyiN1Xp68HlXXt1ZeuPT3/4vRD7V+DtZ57EE65eqeUjwkmyMHnX8P Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10555"; a="319170390" X-IronPort-AV: E=Sophos;i="5.96,228,1665471600"; d="scan'208";a="319170390" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2022 13:28:58 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10555"; a="753756193" X-IronPort-AV: E=Sophos;i="5.96,228,1665471600"; d="scan'208";a="753756193" Received: from kputnam-mobl1.amr.corp.intel.com (HELO dwillia2-xfh.jf.intel.com) ([10.251.25.149]) by fmsmga002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2022 13:28:57 -0800 Subject: [ndctl PATCH v2 10/18] cxl/list: Record cxl objects in json objects From: Dan Williams To: linux-cxl@vger.kernel.org Cc: vishal.l.verma@intel.com, alison.schofield@intel.com, nvdimm@lists.linux.dev, vishal.l.verma@intel.com Date: Thu, 08 Dec 2022 13:28:57 -0800 Message-ID: <167053493696.582963.9963151335296712050.stgit@dwillia2-xfh.jf.intel.com> In-Reply-To: <167053487710.582963.17616889985000817682.stgit@dwillia2-xfh.jf.intel.com> References: <167053487710.582963.17616889985000817682.stgit@dwillia2-xfh.jf.intel.com> User-Agent: StGit/0.18-3-g996c MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org In preparation for reusing 'cxl list' object selection in other utilities, like 'cxl create-region', record the associated cxl object in the json object. For example, enable 'cxl create-region -d decoderX.Y' to lookup the memdevs that result from 'cxl list -M -d decoderX.Y'. This sets up future design decisions for code that wants to walk the topology. It can either open-code its own object walk, or get the json-c representation of a query and use that. Unless the use case knows exactly the object it wants it is likely more powerful to specify a cxl_filter_walk() query and then walk the topology result. Signed-off-by: Dan Williams Reviewed-by: Alison Schofield --- cxl/json.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/cxl/json.c b/cxl/json.c index 292e8428ccee..844bc089a4b7 100644 --- a/cxl/json.c +++ b/cxl/json.c @@ -365,6 +365,8 @@ struct json_object *util_cxl_memdev_to_json(struct cxl_memdev *memdev, if (jobj) json_object_object_add(jdev, "partition_info", jobj); } + + json_object_set_userdata(jdev, memdev, NULL); return jdev; } @@ -423,6 +425,7 @@ void util_cxl_dports_append_json(struct json_object *jport, json_object_object_add(jdport, "id", jobj); json_object_array_add(jdports, jdport); + json_object_set_userdata(jdport, dport, NULL); } json_object_object_add(jport, "dports", jdports); @@ -446,6 +449,7 @@ struct json_object *util_cxl_bus_to_json(struct cxl_bus *bus, if (jobj) json_object_object_add(jbus, "provider", jobj); + json_object_set_userdata(jbus, bus, NULL); return jbus; } @@ -570,6 +574,7 @@ struct json_object *util_cxl_decoder_to_json(struct cxl_decoder *decoder, jobj); } + json_object_set_userdata(jdecoder, decoder, NULL); return jdecoder; } @@ -628,6 +633,7 @@ void util_cxl_mappings_append_json(struct json_object *jregion, json_object_object_add(jmapping, "decoder", jobj); json_object_array_add(jmappings, jmapping); + json_object_set_userdata(jmapping, mapping, NULL); } json_object_object_add(jregion, "mappings", jmappings); @@ -693,6 +699,7 @@ struct json_object *util_cxl_region_to_json(struct cxl_region *region, util_cxl_mappings_append_json(jregion, region, flags); + json_object_set_userdata(jregion, region, NULL); return jregion; } @@ -765,6 +772,7 @@ void util_cxl_targets_append_json(struct json_object *jdecoder, json_object_object_add(jtarget, "id", jobj); json_object_array_add(jtargets, jtarget); + json_object_set_userdata(jtarget, target, NULL); } json_object_object_add(jdecoder, "targets", jtargets); @@ -807,6 +815,7 @@ static struct json_object *__util_cxl_port_to_json(struct cxl_port *port, json_object_object_add(jport, "state", jobj); } + json_object_set_userdata(jport, port, NULL); return jport; } From patchwork Thu Dec 8 21:29:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Williams X-Patchwork-Id: 13068947 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CAADAC4332F for ; Thu, 8 Dec 2022 21:29:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229798AbiLHV3G (ORCPT ); Thu, 8 Dec 2022 16:29:06 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40636 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229589AbiLHV3F (ORCPT ); Thu, 8 Dec 2022 16:29:05 -0500 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8E1FE8426B for ; Thu, 8 Dec 2022 13:29:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1670534944; x=1702070944; h=subject:from:to:cc:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=NJHZn6/cXtZFPw8koUObH+vbAw1TMznWvoJVYXV7BeE=; b=X0JFWsNWET5hvSkI6j3UFCnza8IB6HHCrbAOArU/oS8q5qPtX2lnoQsw ehZBS5ba6jVK4J4AFn60SM71RG+IIutnrp7tzPQHUlaAP6mczYOgjz4BP GGKKMhVByRAhTlfiwh1ubCCZjuIN3Mvh8b2sDeh9USd6c4fnVjZeyeoio hzKkuClTGMzNmSK26UShyz2g2VdmVGHoFFFAMGPJyP2net+0asaf1i53G O1+TLNroGwYTP695candNNsF2FdNgrQ+2l4WIAel8WrV/piIOO6/CFKA+ a3HYGIOq8WlYyWqq46aL1p7oS7STgiDhtgSriwdPSOoC3hFsBOUGQsBc8 A==; X-IronPort-AV: E=McAfee;i="6500,9779,10555"; a="304950712" X-IronPort-AV: E=Sophos;i="5.96,228,1665471600"; d="scan'208";a="304950712" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2022 13:29:04 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10555"; a="649323076" X-IronPort-AV: E=Sophos;i="5.96,228,1665471600"; d="scan'208";a="649323076" Received: from kputnam-mobl1.amr.corp.intel.com (HELO dwillia2-xfh.jf.intel.com) ([10.251.25.149]) by fmsmga007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2022 13:29:03 -0800 Subject: [ndctl PATCH v2 11/18] cxl/region: Make ways an integer argument From: Dan Williams To: linux-cxl@vger.kernel.org Cc: vishal.l.verma@intel.com, alison.schofield@intel.com, nvdimm@lists.linux.dev, vishal.l.verma@intel.com Date: Thu, 08 Dec 2022 13:29:03 -0800 Message-ID: <167053494297.582963.8195034137436682440.stgit@dwillia2-xfh.jf.intel.com> In-Reply-To: <167053487710.582963.17616889985000817682.stgit@dwillia2-xfh.jf.intel.com> References: <167053487710.582963.17616889985000817682.stgit@dwillia2-xfh.jf.intel.com> User-Agent: StGit/0.18-3-g996c MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org Since --ways does not take a unit value like --size, just make it an integer argument directly and skip the hand coded conversion. Signed-off-by: Dan Williams Reviewed-by: Alison Schofield --- cxl/region.c | 41 +++++++++++++++++++---------------------- 1 file changed, 19 insertions(+), 22 deletions(-) diff --git a/cxl/region.c b/cxl/region.c index 334fcc291de7..494da5139c05 100644 --- a/cxl/region.c +++ b/cxl/region.c @@ -21,21 +21,23 @@ static struct region_params { const char *bus; const char *size; - const char *ways; const char *granularity; const char *type; const char *root_decoder; const char *region; + int ways; bool memdevs; bool force; bool human; bool debug; -} param; +} param = { + .ways = INT_MAX, +}; struct parsed_params { u64 size; u64 ep_min_size; - unsigned int ways; + int ways; unsigned int granularity; const char **targets; int num_targets; @@ -63,9 +65,8 @@ OPT_BOOLEAN(0, "debug", ¶m.debug, "turn on debug") OPT_STRING('s', "size", ¶m.size, \ "size in bytes or with a K/M/G etc. suffix", \ "total size desired for the resulting region."), \ -OPT_STRING('w', "ways", ¶m.ways, \ - "number of interleave ways", \ - "number of memdevs participating in the regions interleave set"), \ +OPT_INTEGER('w', "ways", ¶m.ways, \ + "number of memdevs participating in the regions interleave set"), \ OPT_STRING('g', "granularity", \ ¶m.granularity, "interleave granularity", \ "granularity of the interleave set"), \ @@ -126,15 +127,11 @@ static int parse_create_options(int argc, const char **argv, } } - if (param.ways) { - unsigned long ways = strtoul(param.ways, NULL, 0); - - if (ways == ULONG_MAX || (int)ways <= 0) { - log_err(&rl, "Invalid interleave ways: %s\n", - param.ways); - return -EINVAL; - } - p->ways = ways; + if (param.ways <= 0) { + log_err(&rl, "Invalid interleave ways: %d\n", param.ways); + return -EINVAL; + } else if (param.ways < INT_MAX) { + p->ways = param.ways; } else if (argc) { p->ways = argc; } else { @@ -155,13 +152,13 @@ static int parse_create_options(int argc, const char **argv, } - if (argc > (int)p->ways) { + if (argc > p->ways) { for (i = p->ways; i < argc; i++) log_err(&rl, "extra argument: %s\n", p->targets[i]); return -EINVAL; } - if (argc < (int)p->ways) { + if (argc < p->ways) { log_err(&rl, "too few target arguments (%d) for interleave ways (%u)\n", argc, p->ways); @@ -253,7 +250,7 @@ static bool validate_memdev(struct cxl_memdev *memdev, const char *target, static int validate_config_memdevs(struct cxl_ctx *ctx, struct parsed_params *p) { - unsigned int i, matched = 0; + int i, matched = 0; for (i = 0; i < p->ways; i++) { struct cxl_memdev *memdev; @@ -393,7 +390,8 @@ static int cxl_region_determine_granularity(struct cxl_region *region, struct parsed_params *p) { const char *devname = cxl_region_get_devname(region); - unsigned int granularity, ways; + unsigned int granularity; + int ways; /* Default granularity will be the root decoder's granularity */ granularity = cxl_decoder_get_interleave_granularity(p->root_decoder); @@ -408,7 +406,7 @@ static int cxl_region_determine_granularity(struct cxl_region *region, return granularity; ways = cxl_decoder_get_interleave_ways(p->root_decoder); - if (ways == 0 || ways == UINT_MAX) { + if (ways == 0 || ways == -1) { log_err(&rl, "%s: unable to determine root decoder ways\n", devname); return -ENXIO; @@ -436,12 +434,11 @@ static int create_region(struct cxl_ctx *ctx, int *count, { unsigned long flags = UTIL_JSON_TARGETS; struct json_object *jregion; - unsigned int i, granularity; struct cxl_region *region; + int i, rc, granularity; u64 size, max_extent; const char *devname; uuid_t uuid; - int rc; rc = create_region_validate_config(ctx, p); if (rc) From patchwork Thu Dec 8 21:29:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Williams X-Patchwork-Id: 13068948 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8D46EC4332F for ; Thu, 8 Dec 2022 21:29:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229809AbiLHV3N (ORCPT ); Thu, 8 Dec 2022 16:29:13 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40708 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229838AbiLHV3K (ORCPT ); Thu, 8 Dec 2022 16:29:10 -0500 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E2F618E593 for ; Thu, 8 Dec 2022 13:29:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1670534949; x=1702070949; h=subject:from:to:cc:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=wH0kGeai/cpvOxG0zFKnev7rIw6TBDR69wboanX1i7Q=; b=nWc6OBmrb6oPn2FH1t2ezHsuLfjwP19n/Mi2EnAfZhhHb98XmzKM9Jzu /Wf/nXp7VzaKxR+goZJ3xB48Qd5+Fuv5Fan1X2orlU2e87WixkaJ9s2ic znV2S87UuWHhT+QDZT7IJ32rnbIpamuQGATfPlGoCH3nIFlEnCzFm4VwO RP61nnvCFPqdLYptpcK0HekcLhF3xyoDtkTSre87PYaUwo14mU2yX1Ly3 8gITNwIH4yxBJgvrA++h6cc6FaPDpXhmWiAOpH2ZL9u15dJxSXOynsXGy 7CdgYMJHlYtFKxn0CU8jZlwdFEO3IWtImEgutdL8H8kJ+P/uREAWHxmIx g==; X-IronPort-AV: E=McAfee;i="6500,9779,10555"; a="304950740" X-IronPort-AV: E=Sophos;i="5.96,228,1665471600"; d="scan'208";a="304950740" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2022 13:29:09 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10555"; a="649323091" X-IronPort-AV: E=Sophos;i="5.96,228,1665471600"; d="scan'208";a="649323091" Received: from kputnam-mobl1.amr.corp.intel.com (HELO dwillia2-xfh.jf.intel.com) ([10.251.25.149]) by fmsmga007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2022 13:29:09 -0800 Subject: [ndctl PATCH v2 12/18] cxl/region: Make granularity an integer argument From: Dan Williams To: linux-cxl@vger.kernel.org Cc: vishal.l.verma@intel.com, alison.schofield@intel.com, nvdimm@lists.linux.dev, vishal.l.verma@intel.com Date: Thu, 08 Dec 2022 13:29:08 -0800 Message-ID: <167053494873.582963.9998892394422308576.stgit@dwillia2-xfh.jf.intel.com> In-Reply-To: <167053487710.582963.17616889985000817682.stgit@dwillia2-xfh.jf.intel.com> References: <167053487710.582963.17616889985000817682.stgit@dwillia2-xfh.jf.intel.com> User-Agent: StGit/0.18-3-g996c MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org Since --granularity does not take a unit value like --size, just make it an integer argument directly and skip the hand coded conversion. Signed-off-by: Dan Williams Reviewed-by: Alison Schofield --- cxl/region.c | 26 +++++++++++--------------- 1 file changed, 11 insertions(+), 15 deletions(-) diff --git a/cxl/region.c b/cxl/region.c index 494da5139c05..c6d7d1a973a8 100644 --- a/cxl/region.c +++ b/cxl/region.c @@ -21,24 +21,25 @@ static struct region_params { const char *bus; const char *size; - const char *granularity; const char *type; const char *root_decoder; const char *region; int ways; + int granularity; bool memdevs; bool force; bool human; bool debug; } param = { .ways = INT_MAX, + .granularity = INT_MAX, }; struct parsed_params { u64 size; u64 ep_min_size; int ways; - unsigned int granularity; + int granularity; const char **targets; int num_targets; struct cxl_decoder *root_decoder; @@ -67,9 +68,8 @@ OPT_STRING('s', "size", ¶m.size, \ "total size desired for the resulting region."), \ OPT_INTEGER('w', "ways", ¶m.ways, \ "number of memdevs participating in the regions interleave set"), \ -OPT_STRING('g', "granularity", \ - ¶m.granularity, "interleave granularity", \ - "granularity of the interleave set"), \ +OPT_INTEGER('g', "granularity", ¶m.granularity, \ + "granularity of the interleave set"), \ OPT_STRING('t', "type", ¶m.type, \ "region type", "region type - 'pmem' or 'ram'"), \ OPT_BOOLEAN('m', "memdevs", ¶m.memdevs, \ @@ -140,18 +140,15 @@ static int parse_create_options(int argc, const char **argv, return -EINVAL; } - if (param.granularity) { - unsigned long granularity = strtoul(param.granularity, NULL, 0); - - if (granularity == ULONG_MAX || (int)granularity <= 0) { - log_err(&rl, "Invalid interleave granularity: %s\n", + if (param.granularity < INT_MAX) { + if (param.granularity <= 0) { + log_err(&rl, "Invalid interleave granularity: %d\n", param.granularity); return -EINVAL; } - p->granularity = granularity; + p->granularity = param.granularity; } - if (argc > p->ways) { for (i = p->ways; i < argc; i++) log_err(&rl, "extra argument: %s\n", p->targets[i]); @@ -390,12 +387,11 @@ static int cxl_region_determine_granularity(struct cxl_region *region, struct parsed_params *p) { const char *devname = cxl_region_get_devname(region); - unsigned int granularity; - int ways; + int granularity, ways; /* Default granularity will be the root decoder's granularity */ granularity = cxl_decoder_get_interleave_granularity(p->root_decoder); - if (granularity == 0 || granularity == UINT_MAX) { + if (granularity == 0 || granularity == -1) { log_err(&rl, "%s: unable to determine root decoder granularity\n", devname); return -ENXIO; From patchwork Thu Dec 8 21:29:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Williams X-Patchwork-Id: 13068949 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 783ACC4332F for ; Thu, 8 Dec 2022 21:29:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229838AbiLHV3T (ORCPT ); Thu, 8 Dec 2022 16:29:19 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40714 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229612AbiLHV3R (ORCPT ); Thu, 8 Dec 2022 16:29:17 -0500 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 47154A507C for ; Thu, 8 Dec 2022 13:29:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1670534956; x=1702070956; h=subject:from:to:cc:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=VgxML5jp/JNmm/O7hN2KsFk45+SRMFHpMtCwachHHWU=; b=fC4hceSvMWGY31JVr68FXrWzEXq9zmpYS4W4yY7WtLWm6i3Auxg1CA9s RDIYdDHlrcxxqkJzFFbEr443uXshohK/Kz9WoAmYKZsUu2Pq6R0nw2sFm mPBKFaWH1a53ClslFtbfxK6l05mGLgnYOYBOtac5X59Gzols7dvuVCQIM lZWI7DQc71ckgbV5DpyyWdQWCoefYJT3jOjEAPO2WK1NviGRwUBkmjnlt o5h7j+G4cLv+r/ngu3DxbSjO5Tk67xulsydWNWoMJO9LnrBM76pGCIDak Hi1RYVFQD2ce+F9v2aFlqASlSwgJiKAleTuerII0iWFZTtWoSX9zjV0gb A==; X-IronPort-AV: E=McAfee;i="6500,9779,10555"; a="304950756" X-IronPort-AV: E=Sophos;i="5.96,228,1665471600"; d="scan'208";a="304950756" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2022 13:29:15 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10555"; a="649323120" X-IronPort-AV: E=Sophos;i="5.96,228,1665471600"; d="scan'208";a="649323120" Received: from kputnam-mobl1.amr.corp.intel.com (HELO dwillia2-xfh.jf.intel.com) ([10.251.25.149]) by fmsmga007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2022 13:29:15 -0800 Subject: [ndctl PATCH v2 13/18] cxl/region: Use cxl_filter_walk() to gather create-region targets From: Dan Williams To: linux-cxl@vger.kernel.org Cc: vishal.l.verma@intel.com, alison.schofield@intel.com, nvdimm@lists.linux.dev, vishal.l.verma@intel.com Date: Thu, 08 Dec 2022 13:29:14 -0800 Message-ID: <167053495444.582963.8894875924785665365.stgit@dwillia2-xfh.jf.intel.com> In-Reply-To: <167053487710.582963.17616889985000817682.stgit@dwillia2-xfh.jf.intel.com> References: <167053487710.582963.17616889985000817682.stgit@dwillia2-xfh.jf.intel.com> User-Agent: StGit/0.18-3-g996c MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org The core of 'cxl list' knows, among other things, how to filter memdevs by their connectivity to a root decoder, enabled status, and how to identify memdevs by name, id, serial number. Use the fact that the json-c object array returned by cxl_filter_walk() also includes the corresponding libcxl objects to populate and validate the memdev target list for 'cxl create-region'. With this in place a default set of memdev targets can be derived from the specified root decoder, and the connectivity is validated by the same logic that prepares the hierarchical json topology. The argument list becomes as tolerant of different id formats as 'cxl list'. For example "mem9" and "9" are equivalent. Comma and space separated lists are also allowed, e.g. "mem9,mem10". Note that 'cxl list' order groups memdevs by port, later this will need to augmented with a sort implementation that orders memdevs by a topology compatible decode order. Signed-off-by: Dan Williams --- cxl/region.c | 334 +++++++++++++++++++++++++++++++++++++++------------------- util/util.h | 9 ++ 2 files changed, 234 insertions(+), 109 deletions(-) diff --git a/cxl/region.c b/cxl/region.c index c6d7d1a973a8..36ebc8e5210f 100644 --- a/cxl/region.c +++ b/cxl/region.c @@ -40,8 +40,10 @@ struct parsed_params { u64 ep_min_size; int ways; int granularity; - const char **targets; - int num_targets; + struct json_object *memdevs; + int num_memdevs; + int argc; + const char **argv; struct cxl_decoder *root_decoder; enum cxl_decoder_mode mode; }; @@ -99,16 +101,190 @@ static const struct option destroy_options[] = { OPT_END(), }; -static int parse_create_options(int argc, const char **argv, - struct parsed_params *p) +/* + * Convert an array of strings that can be a mixture of single items, a + * command separted list, or a space separated list, into a flattened + * comma-separated string. That single string can then be used as a + * filter argument to cxl_filter_walk(), or an ordering constraint for + * json_object_array_sort() + * + * On entry @count is the number of elements in the strings array, on + * exit, @count is the number of elements in the csv. + */ +static const char *to_csv(int *count, const char **strings) { - int i; + ssize_t len = 0, cursor = 0; + char *csv, *list, *save; + int i, new_count = 0; + const char *arg; + + if (!*count) + return NULL; + + for (i = 0; i < *count; i++) { + /* + * An entry in strings may itself by a space or comma + * separated list, so decompose that for the final csv + */ + list = strdup(strings[i]); + if (!list) + return NULL; + + for (arg = strtok_r(list, which_sep(list), &save); arg; + arg = strtok_r(NULL, which_sep(list), &save)) { + len += strlen(arg); + new_count++; + } + + free(list); + + } + + len += new_count + 1; + csv = calloc(1, len); + if (!csv) + return NULL; + for (i = 0; i < *count; i++) { + list = strdup(strings[i]); + if (!list) + return NULL; + + for (arg = strtok_r(list, which_sep(list), &save); arg; + arg = strtok_r(NULL, which_sep(list), &save)) { + cursor += snprintf(csv + cursor, len - cursor, "%s%s", + arg, i + 1 < new_count ? "," : ""); + if (cursor >= len) { + csv[len] = 0; + break; + } + } + free(list); + } + *count = new_count; + return csv; +} + +static struct sort_context { + const char *csv; +} sort_context; + +static int memdev_filter_pos(struct json_object *jobj, const char *_csv) +{ + struct cxl_memdev *memdev = json_object_get_userdata(jobj); + char *csv, *save; + const char *arg; + int pos; + + csv = strdup(_csv); + if (!csv) + return -1; + + for (pos = 0, arg = strtok_r(csv, which_sep(csv), &save); arg; + arg = strtok_r(NULL, which_sep(csv), &save), pos++) + if (util_cxl_memdev_filter(memdev, arg, NULL)) + return pos; + free(csv); + + return pos; +} + +static int memdev_sort(const void *a, const void *b) +{ + struct json_object **a_obj, **b_obj; + int a_pos, b_pos; + + a_obj = (struct json_object **) a; + b_obj = (struct json_object **) b; + + a_pos = memdev_filter_pos(*a_obj, sort_context.csv); + b_pos = memdev_filter_pos(*b_obj, sort_context.csv); + + if (a_pos < 0 || b_pos < 0) + return 0; + + return a_pos - b_pos; +} + +static struct json_object *collect_memdevs(struct cxl_ctx *ctx, + const char *decoder, int *count, + const char **mems) +{ + const char *csv = to_csv(count, mems); + struct cxl_filter_params filter_params = { + .decoder_filter = decoder, + .memdevs = true, + .memdev_filter = csv, + }; + struct json_object *jmemdevs; + + jmemdevs = cxl_filter_walk(ctx, &filter_params); + + if (!jmemdevs) { + log_err(&rl, "failed to retrieve memdevs\n"); + goto out; + } + + if (json_object_array_length(jmemdevs) == 0) { + log_err(&rl, + "no active memdevs found: decoder: %s filter: %s\n", + decoder, csv ? csv : "none"); + json_object_put(jmemdevs); + jmemdevs = NULL; + goto out; + } + + if (csv) { + sort_context.csv = csv, + json_object_array_sort(jmemdevs, memdev_sort); + } +out: + free((void *)csv); + return jmemdevs; +} + +static bool validate_ways(struct parsed_params *p, int count) +{ + /* + * Validate interleave ways against targets found in the topology. If + * the targets were specified, then non-default param.ways must equal + * that number of targets. + */ + if (p->ways > p->num_memdevs || (count && p->ways != p->num_memdevs)) { + log_err(&rl, + "Interleave ways %d is %s than number of memdevs %s: %d\n", + p->ways, p->ways > p->num_memdevs ? "greater" : "less", + count ? "specified" : "found", p->num_memdevs); + return false; + } + return true; +} + +static int parse_create_options(struct cxl_ctx *ctx, int count, + const char **mems, struct parsed_params *p) +{ if (!param.root_decoder) { log_err(&rl, "no root decoder specified\n"); return -EINVAL; } + /* + * For all practical purposes, -m is the default target type, but + * hold off on actively making that decision until a second target + * option is available. + */ + if (!param.memdevs) { + log_err(&rl, + "must specify option for target object types (-m)\n"); + return -EINVAL; + } + + /* Collect the valid memdevs relative to the given root decoder */ + p->memdevs = collect_memdevs(ctx, param.root_decoder, &count, mems); + if (!p->memdevs) + return -ENXIO; + p->num_memdevs = json_object_array_length(p->memdevs); + if (param.type) { p->mode = cxl_decoder_mode_from_ident(param.type); if (p->mode == CXL_DECODER_MODE_NONE) { @@ -132,8 +308,12 @@ static int parse_create_options(int argc, const char **argv, return -EINVAL; } else if (param.ways < INT_MAX) { p->ways = param.ways; - } else if (argc) { - p->ways = argc; + if (!validate_ways(p, count)) + return -EINVAL; + } else if (count) { + p->ways = count; + if (!validate_ways(p, count)) + return -EINVAL; } else { log_err(&rl, "couldn't determine interleave ways from options or arguments\n"); @@ -149,19 +329,6 @@ static int parse_create_options(int argc, const char **argv, p->granularity = param.granularity; } - if (argc > p->ways) { - for (i = p->ways; i < argc; i++) - log_err(&rl, "extra argument: %s\n", p->targets[i]); - return -EINVAL; - } - - if (argc < p->ways) { - log_err(&rl, - "too few target arguments (%d) for interleave ways (%u)\n", - argc, p->ways); - return -EINVAL; - } - if (p->size && p->ways) { if (p->size % p->ways) { log_err(&rl, @@ -171,17 +338,6 @@ static int parse_create_options(int argc, const char **argv, } } - /* - * For all practical purposes, -m is the default target type, but - * hold off on actively making that decision until a second target - * option is available. - */ - if (!param.memdevs) { - log_err(&rl, - "must specify option for target object types (-m)\n"); - return -EINVAL; - } - return 0; } @@ -196,8 +352,8 @@ static int parse_region_options(int argc, const char **argv, }; argc = parse_options(argc, argv, options, u, 0); - p->targets = argv; - p->num_targets = argc; + p->argc = argc; + p->argv = argv; if (param.debug) { cxl_set_log_priority(ctx, LOG_DEBUG); @@ -207,62 +363,27 @@ static int parse_region_options(int argc, const char **argv, switch(action) { case ACTION_CREATE: - return parse_create_options(argc, argv, p); + return parse_create_options(ctx, argc, argv, p); default: return 0; } } -/** - * validate_memdev() - match memdev with the target provided, - * and determine its size contribution - * @memdev: cxl_memdev being tested for a match against the named target - * @target: target memdev - * @p: params structure - * - * This is called for each memdev in the system, and only returns 'true' if - * the memdev name matches the target argument being tested. Additionally, - * it sets an ep_min_size attribute that always contains the size of the - * smallest target in the provided list. This is used during the automatic - * size determination later, to ensure that all targets contribute equally - * to the region in case of unevenly sized memdevs. - */ -static bool validate_memdev(struct cxl_memdev *memdev, const char *target, - struct parsed_params *p) -{ - const char *devname = cxl_memdev_get_devname(memdev); - u64 size; - - if (strcmp(devname, target) != 0) - return false; - - size = cxl_memdev_get_pmem_size(memdev); - if (!p->ep_min_size) - p->ep_min_size = size; - else - p->ep_min_size = min(p->ep_min_size, size); - - return true; -} - -static int validate_config_memdevs(struct cxl_ctx *ctx, struct parsed_params *p) +static void collect_minsize(struct cxl_ctx *ctx, struct parsed_params *p) { - int i, matched = 0; + int i; for (i = 0; i < p->ways; i++) { - struct cxl_memdev *memdev; + struct json_object *jobj = + json_object_array_get_idx(p->memdevs, i); + struct cxl_memdev *memdev = json_object_get_userdata(jobj); + u64 size = cxl_memdev_get_pmem_size(memdev); - cxl_memdev_foreach(ctx, memdev) - if (validate_memdev(memdev, p->targets[i], p)) - matched++; - } - if (matched != p->ways) { - log_err(&rl, - "one or more memdevs not found in CXL topology\n"); - return -ENXIO; + if (!p->ep_min_size) + p->ep_min_size = size; + else + p->ep_min_size = min(p->ep_min_size, size); } - - return 0; } static int validate_decoder(struct cxl_decoder *decoder, @@ -330,26 +451,18 @@ found: if (rc) return rc; - return validate_config_memdevs(ctx, p); + collect_minsize(ctx, p); + return 0; } -static struct cxl_decoder * -cxl_memdev_target_find_decoder(struct cxl_ctx *ctx, const char *memdev_name) +static struct cxl_decoder *cxl_memdev_find_decoder(struct cxl_memdev *memdev) { - struct cxl_endpoint *ep = NULL; + const char *memdev_name = cxl_memdev_get_devname(memdev); struct cxl_decoder *decoder; - struct cxl_memdev *memdev; + struct cxl_endpoint *ep; struct cxl_port *port; - cxl_memdev_foreach(ctx, memdev) { - const char *devname = cxl_memdev_get_devname(memdev); - - if (strcmp(devname, memdev_name) != 0) - continue; - - ep = cxl_memdev_get_endpoint(memdev); - } - + ep = cxl_memdev_get_endpoint(memdev); if (!ep) { log_err(&rl, "could not get an endpoint for %s\n", memdev_name); @@ -379,7 +492,7 @@ do { \ prefix##_get_devname(dev), \ strerror(abs(__rc))); \ rc = __rc; \ - goto err_delete; \ + goto out; \ } \ } while (0) @@ -478,7 +591,7 @@ static int create_region(struct cxl_ctx *ctx, int *count, rc = cxl_region_determine_granularity(region, p); if (rc < 0) - goto err_delete; + goto out; granularity = rc; uuid_generate(uuid); @@ -488,12 +601,15 @@ static int create_region(struct cxl_ctx *ctx, int *count, try(cxl_region, set_size, region, size); for (i = 0; i < p->ways; i++) { - struct cxl_decoder *ep_decoder = NULL; + struct cxl_decoder *ep_decoder; + struct json_object *jobj = + json_object_array_get_idx(p->memdevs, i); + struct cxl_memdev *memdev = json_object_get_userdata(jobj); - ep_decoder = cxl_memdev_target_find_decoder(ctx, p->targets[i]); + ep_decoder = cxl_memdev_find_decoder(memdev); if (!ep_decoder) { rc = -ENXIO; - goto err_delete; + goto out; } if (cxl_decoder_get_mode(ep_decoder) != p->mode) { /* @@ -508,8 +624,8 @@ static int create_region(struct cxl_ctx *ctx, int *count, rc = cxl_region_set_target(region, i, ep_decoder); if (rc) { log_err(&rl, "%s: failed to set target%d to %s\n", - devname, i, p->targets[i]); - goto err_delete; + devname, i, cxl_memdev_get_devname(memdev)); + goto out; } } @@ -517,14 +633,14 @@ static int create_region(struct cxl_ctx *ctx, int *count, if (rc) { log_err(&rl, "%s: failed to commit decode: %s\n", devname, strerror(-rc)); - goto err_delete; + goto out; } rc = cxl_region_enable(region); if (rc) { log_err(&rl, "%s: failed to enable: %s\n", devname, strerror(-rc)); - goto err_delete; + goto out; } *count = 1; @@ -535,10 +651,10 @@ static int create_region(struct cxl_ctx *ctx, int *count, printf("%s\n", json_object_to_json_string_ext(jregion, JSON_C_TO_STRING_PRETTY)); - return 0; - -err_delete: - cxl_region_delete(region); +out: + json_object_put(p->memdevs); + if (rc) + cxl_region_delete(region); return rc; } @@ -630,8 +746,8 @@ static int decoder_region_action(struct parsed_params *p, cxl_region_foreach_safe (decoder, region, _r) { int i, match = 0; - for (i = 0; i < p->num_targets; i++) { - if (util_cxl_region_filter(region, p->targets[i])) { + for (i = 0; i < p->argc; i++) { + if (util_cxl_region_filter(region, p->argv[i])) { match = 1; break; } @@ -665,7 +781,7 @@ static int region_action(int argc, const char **argv, struct cxl_ctx *ctx, return rc; if (action == ACTION_CREATE) - return create_region(ctx, count, p); + rc = create_region(ctx, count, p); cxl_bus_foreach(ctx, bus) { struct cxl_decoder *decoder; diff --git a/util/util.h b/util/util.h index b2b4ae6503aa..58db06530c37 100644 --- a/util/util.h +++ b/util/util.h @@ -79,6 +79,15 @@ static inline const char *skip_prefix(const char *str, const char *prefix) return strncmp(str, prefix, len) ? NULL : str + len; } +static inline const char *which_sep(const char *filter) +{ + if (strchr(filter, ' ')) + return " "; + if (strchr(filter, ',')) + return ","; + return " "; +} + static inline int is_absolute_path(const char *path) { return path[0] == '/'; From patchwork Thu Dec 8 21:29:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Williams X-Patchwork-Id: 13068950 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 530B8C4332F for ; Thu, 8 Dec 2022 21:29:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229612AbiLHV3X (ORCPT ); Thu, 8 Dec 2022 16:29:23 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40908 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229840AbiLHV3W (ORCPT ); Thu, 8 Dec 2022 16:29:22 -0500 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2004E92A19 for ; Thu, 8 Dec 2022 13:29:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1670534962; x=1702070962; h=subject:from:to:cc:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=UxXMmxQvRHOB+EhTRe3756DB2jI5Fe7wMbKv5vdQX1U=; b=djECri2ySnFAhEEy05h3p1W7KXCoPllrdxac5W06nI0kyTTc92afO2P7 Vqz4Lr1ljWYiQTNMeN5dy89muRWVa2D+OJx5hIOqqGfHtJEuLeLXhoN2U 3qeIkUVYWQIUD7d3CETZSZIJaaTnZr7Vfd+1IPNJM1yNKMUWPBpvB1tuz YngYmL5iLixq7j2cr/r/wJ6UBuOdlNNoTiIMkrGArXQ6XD+RhvdGn7dWC +Nz5yXCdoIK8qKnq8mF+GtxlSfync2HvexYU6vzj8PNHW0K+HfMcekxu0 aVIpruQJo8rr29kpLMf/EF/izyDnwIu7gwumg5O3I35zQj5iyixs2mU34 A==; X-IronPort-AV: E=McAfee;i="6500,9779,10555"; a="304950775" X-IronPort-AV: E=Sophos;i="5.96,228,1665471600"; d="scan'208";a="304950775" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2022 13:29:21 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10555"; a="649323128" X-IronPort-AV: E=Sophos;i="5.96,228,1665471600"; d="scan'208";a="649323128" Received: from kputnam-mobl1.amr.corp.intel.com (HELO dwillia2-xfh.jf.intel.com) ([10.251.25.149]) by fmsmga007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2022 13:29:21 -0800 Subject: [ndctl PATCH v2 14/18] cxl/region: Trim region size by max available extent From: Dan Williams To: linux-cxl@vger.kernel.org Cc: vishal.l.verma@intel.com, alison.schofield@intel.com, nvdimm@lists.linux.dev, vishal.l.verma@intel.com Date: Thu, 08 Dec 2022 13:29:20 -0800 Message-ID: <167053496075.582963.15276731392463349632.stgit@dwillia2-xfh.jf.intel.com> In-Reply-To: <167053487710.582963.17616889985000817682.stgit@dwillia2-xfh.jf.intel.com> References: <167053487710.582963.17616889985000817682.stgit@dwillia2-xfh.jf.intel.com> User-Agent: StGit/0.18-3-g996c MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org When a size is not specified, limit the size to either the available DPA capacity, or the max available extent in the root decoder, whichever is smaller. Signed-off-by: Dan Williams Reviewed-by: Alison Schofield --- cxl/region.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/cxl/region.c b/cxl/region.c index 36ebc8e5210f..286c358f1a34 100644 --- a/cxl/region.c +++ b/cxl/region.c @@ -544,6 +544,7 @@ static int create_region(struct cxl_ctx *ctx, int *count, unsigned long flags = UTIL_JSON_TARGETS; struct json_object *jregion; struct cxl_region *region; + bool default_size = true; int i, rc, granularity; u64 size, max_extent; const char *devname; @@ -555,6 +556,7 @@ static int create_region(struct cxl_ctx *ctx, int *count, if (p->size) { size = p->size; + default_size = false; } else if (p->ep_min_size) { size = p->ep_min_size * p->ways; } else { @@ -567,13 +569,16 @@ static int create_region(struct cxl_ctx *ctx, int *count, cxl_decoder_get_devname(p->root_decoder)); return -EINVAL; } - if (size > max_extent) { + if (!default_size && size > max_extent) { log_err(&rl, "%s: region size %#lx exceeds max available space\n", cxl_decoder_get_devname(p->root_decoder), size); return -ENOSPC; } + if (size > max_extent) + size = ALIGN_DOWN(max_extent, SZ_256M * p->ways); + if (p->mode == CXL_DECODER_MODE_PMEM) { region = cxl_decoder_create_pmem_region(p->root_decoder); if (!region) { From patchwork Thu Dec 8 21:29:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Williams X-Patchwork-Id: 13068951 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9F526C4332F for ; Thu, 8 Dec 2022 21:29:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229715AbiLHV3b (ORCPT ); Thu, 8 Dec 2022 16:29:31 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40998 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229843AbiLHV32 (ORCPT ); Thu, 8 Dec 2022 16:29:28 -0500 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 10315A507A for ; Thu, 8 Dec 2022 13:29:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1670534968; x=1702070968; h=subject:from:to:cc:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=QAJFQRhtPwzwpUKZtzMWwK4wTVkkYfpEnNbLpyK/lBE=; b=Ba621qUfXq25xbpeYs4tU0QDpNj/dvmchB5NiVVtDzeZdhcPszWelnB2 z4pZ+CX9y6UiFB2kW/k+I+1/u2vN55Xw+1W7S1LqPzUbkjhNoPH+/O7Uz ZLk+7Ali10rg9oDhN1Ia/U1+moKBgsG9bLKcXJ8ThBCcLdr7BmL08NTeb rtcl63hJ2T4/2brHq5pbFWIbfsJxmTQszVPDAMj8fInKvDHMIBDdIBxLi WNxuZgOtFSXD+YfEaAilLJLiJ0HNtut9TuiBR6PSagrbJgoD88HdpPjDr gavkhDZ5WoCOsHzve68Aro+vbLobD4UwMZRzGbVUclh+mR2lCtz4/nSNY A==; X-IronPort-AV: E=McAfee;i="6500,9779,10555"; a="304950801" X-IronPort-AV: E=Sophos;i="5.96,228,1665471600"; d="scan'208";a="304950801" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2022 13:29:27 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10555"; a="649323145" X-IronPort-AV: E=Sophos;i="5.96,228,1665471600"; d="scan'208";a="649323145" Received: from kputnam-mobl1.amr.corp.intel.com (HELO dwillia2-xfh.jf.intel.com) ([10.251.25.149]) by fmsmga007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2022 13:29:27 -0800 Subject: [ndctl PATCH v2 15/18] cxl/Documentation: Fix whitespace typos in create-region man page From: Dan Williams To: linux-cxl@vger.kernel.org Cc: vishal.l.verma@intel.com, alison.schofield@intel.com, nvdimm@lists.linux.dev, vishal.l.verma@intel.com Date: Thu, 08 Dec 2022 13:29:26 -0800 Message-ID: <167053496662.582963.12739035781728195815.stgit@dwillia2-xfh.jf.intel.com> In-Reply-To: <167053487710.582963.17616889985000817682.stgit@dwillia2-xfh.jf.intel.com> References: <167053487710.582963.17616889985000817682.stgit@dwillia2-xfh.jf.intel.com> User-Agent: StGit/0.18-3-g996c MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org --- Documentation/cxl/cxl-create-region.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Alison Schofield Signed-off-by: Dan Williams diff --git a/Documentation/cxl/cxl-create-region.txt b/Documentation/cxl/cxl-create-region.txt index 6b740d5b8d96..e0e6818cfdd1 100644 --- a/Documentation/cxl/cxl-create-region.txt +++ b/Documentation/cxl/cxl-create-region.txt @@ -28,7 +28,7 @@ be emitted on stderr. EXAMPLE ------- ---- -#cxl create - region - m - d decoder0 .1 - w 2 - g 1024 mem0 mem1 +#cxl create-region -m -d decoder0.1 -w 2 -g 1024 mem0 mem1 { "region":"region0", "resource":"0xc90000000", From patchwork Thu Dec 8 21:29:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Williams X-Patchwork-Id: 13068952 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8BA47C4332F for ; Thu, 8 Dec 2022 21:29:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229813AbiLHV3f (ORCPT ); Thu, 8 Dec 2022 16:29:35 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41022 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229807AbiLHV3e (ORCPT ); Thu, 8 Dec 2022 16:29:34 -0500 Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9392684266 for ; Thu, 8 Dec 2022 13:29:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1670534973; x=1702070973; h=subject:from:to:cc:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=z2gYGo+7HC2gLAQmyRxAm/yZrTFndTCQOyakXbHun88=; b=GksTPpcfUiAa997R9cki572M7urYRlq7vCqzPMWlBcrj+IB1o9j7Zz3p jSx7rl6cyOuYn4qNViorV4iA5gfUi7FLJmAX3Q70MWNiG/fdzneCCpaHH RUkT5BAu5zA0fYEzOpVRvFXupOW7HdeD5Wa3GW7oTSarmD/cNn31gcPBj xeFSZLsi7TAbsg5rDhQmDzxAVYVXZ/Ra768JWc0wVZdWiBYT9ZVTz72Qh c9QBIPck+Fig62Qo2IR51uRlP0uF1vXCfyF9ygG+j4UUX76ClU+NDcURE cBk0sZFSfmB34KPOYtvVMnOwgUWJKyMiKPB12M0eJCk4K8BmIdP22gtHl Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10555"; a="296988306" X-IronPort-AV: E=Sophos;i="5.96,228,1665471600"; d="scan'208";a="296988306" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2022 13:29:33 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10555"; a="649323156" X-IronPort-AV: E=Sophos;i="5.96,228,1665471600"; d="scan'208";a="649323156" Received: from kputnam-mobl1.amr.corp.intel.com (HELO dwillia2-xfh.jf.intel.com) ([10.251.25.149]) by fmsmga007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2022 13:29:33 -0800 Subject: [ndctl PATCH v2 16/18] cxl/region: Autoselect memdevs for create-region From: Dan Williams To: linux-cxl@vger.kernel.org Cc: vishal.l.verma@intel.com, alison.schofield@intel.com, nvdimm@lists.linux.dev, vishal.l.verma@intel.com Date: Thu, 08 Dec 2022 13:29:32 -0800 Message-ID: <167053497261.582963.1274754281124548404.stgit@dwillia2-xfh.jf.intel.com> In-Reply-To: <167053487710.582963.17616889985000817682.stgit@dwillia2-xfh.jf.intel.com> References: <167053487710.582963.17616889985000817682.stgit@dwillia2-xfh.jf.intel.com> User-Agent: StGit/0.18-3-g996c MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org Now that parse_create_region() uses cxl_filter_walk() to gather memdevs use that as the target list in case no target list is provided. In other words the result of "cxl list -M -d $decoder" returns all the potential memdevs that can comprise a region under $decoder, so just go ahead and try to use that as the target list by default. Note though that the order of devices returned by cxl_filter_walk() may not be a suitable region creation order. So this porcelain helps for simple topologies, but needs a follow-on patch to sort the memdevs by valid region order, and/or discover cases where deviceA or deviceB can be in the region, but not both. Outside of those cases: cxl create-region -d decoderX.Y ...is sufficient to create a region. Signed-off-by: Dan Williams Reviewed-by: Alison Schofield --- Documentation/cxl/cxl-create-region.txt | 10 ++++++---- cxl/region.c | 16 ++++++++-------- 2 files changed, 14 insertions(+), 12 deletions(-) diff --git a/Documentation/cxl/cxl-create-region.txt b/Documentation/cxl/cxl-create-region.txt index e0e6818cfdd1..286779eff9ed 100644 --- a/Documentation/cxl/cxl-create-region.txt +++ b/Documentation/cxl/cxl-create-region.txt @@ -53,16 +53,18 @@ OPTIONS ------- :: The CXL targets that should be used to form the region. The number of -'target' arguments must match the '--ways' option (if provided). The -targets are memdev names such as 'mem0', 'mem1' etc. +'target' arguments must match the '--ways' option (if provided). include::bus-option.txt[] -m:: --memdevs:: Indicate that the non-option arguments for 'target(s)' refer to memdev - names. Currently this is the only option supported, and must be - specified. + device names. If this option is omitted and no targets are specified + then create-region uses the equivalent of 'cxl list -M -d $decoder' + internally as the target list. Note that depending on the topology, for + example with switches, the automatic target list ordering may not be + valid and manual specification of the target list is required. -s:: --size=:: diff --git a/cxl/region.c b/cxl/region.c index 286c358f1a34..15cac64a158c 100644 --- a/cxl/region.c +++ b/cxl/region.c @@ -269,10 +269,13 @@ static int parse_create_options(struct cxl_ctx *ctx, int count, } /* - * For all practical purposes, -m is the default target type, but - * hold off on actively making that decision until a second target - * option is available. + * For all practical purposes, -m is the default target type, but hold + * off on actively making that decision until a second target option is + * available. Unless there are no arguments then just assume memdevs. */ + if (!count) + param.memdevs = true; + if (!param.memdevs) { log_err(&rl, "must specify option for target object types (-m)\n"); @@ -314,11 +317,8 @@ static int parse_create_options(struct cxl_ctx *ctx, int count, p->ways = count; if (!validate_ways(p, count)) return -EINVAL; - } else { - log_err(&rl, - "couldn't determine interleave ways from options or arguments\n"); - return -EINVAL; - } + } else + p->ways = p->num_memdevs; if (param.granularity < INT_MAX) { if (param.granularity <= 0) { From patchwork Thu Dec 8 21:29:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Williams X-Patchwork-Id: 13068953 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7C56BC4332F for ; Thu, 8 Dec 2022 21:29:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229807AbiLHV3l (ORCPT ); Thu, 8 Dec 2022 16:29:41 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41056 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229791AbiLHV3k (ORCPT ); Thu, 8 Dec 2022 16:29:40 -0500 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1AF8A92A19 for ; Thu, 8 Dec 2022 13:29:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1670534980; x=1702070980; h=subject:from:to:cc:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Y2qsFszn+mP0hy2RxCP0ZQdFrN5xKj92BcFOK/t8ENw=; b=Sw/fXUzcpwGCobu8VJQPPFEV8GL4U+JDWQp+MBJ2xWIfsQGjXrfEIYbt SC4aY73tekIsd87k4sP2Nww00K6VXLmZasSuJbkkntAZ61czKKIe6EoZO uYu8kNMeZULUy13tEUGJDpyXxExv+1G5T2q0Vg0SyPOD6SU8E3DwLg7EM muUkAI/JTX1HPojPO2INa/wNARO2WH1NSsLG6DU6/Dv3CUPwFBEzldKMG m5X6PsSCjq9/LuRJvagu/+sP4zf79qiAoE6Xav6KcM1pYTNM5GidcVuR+ yjfmmxtkVQXwvHcFiyYlyFKdp8cPDfmM3QRrd1S5KkDwmw9vyGeiIAcVr w==; X-IronPort-AV: E=McAfee;i="6500,9779,10555"; a="344343311" X-IronPort-AV: E=Sophos;i="5.96,228,1665471600"; d="scan'208";a="344343311" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2022 13:29:39 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10555"; a="647170269" X-IronPort-AV: E=Sophos;i="5.96,228,1665471600"; d="scan'208";a="647170269" Received: from kputnam-mobl1.amr.corp.intel.com (HELO dwillia2-xfh.jf.intel.com) ([10.251.25.149]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2022 13:29:38 -0800 Subject: [ndctl PATCH v2 17/18] cxl/test: Extend cxl-topology.sh for a single root-port host-bridge From: Dan Williams To: linux-cxl@vger.kernel.org Cc: Jonathan Cameron , Alison Schofield , vishal.l.verma@intel.com, nvdimm@lists.linux.dev, vishal.l.verma@intel.com Date: Thu, 08 Dec 2022 13:29:38 -0800 Message-ID: <167053497831.582963.5641985826495628885.stgit@dwillia2-xfh.jf.intel.com> In-Reply-To: <167053487710.582963.17616889985000817682.stgit@dwillia2-xfh.jf.intel.com> References: <167053487710.582963.17616889985000817682.stgit@dwillia2-xfh.jf.intel.com> User-Agent: StGit/0.18-3-g996c MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org A recent extension of cxl_test adds 2 memory devices attached through a switch to a single ported host-bridge to reproduce a bug report. Reported-by: Jonathan Cameron Link: http://lore.kernel.org/r/20221010172057.00001559@huawei.com Tested-by: Alison Schofield Signed-off-by: Dan Williams --- test/cxl-topology.sh | 48 +++++++++++++++++++++++++++++------------------- 1 file changed, 29 insertions(+), 19 deletions(-) diff --git a/test/cxl-topology.sh b/test/cxl-topology.sh index 1f15d29f0600..362fffa6d539 100644 --- a/test/cxl-topology.sh +++ b/test/cxl-topology.sh @@ -29,27 +29,30 @@ count=$(jq "length" <<< $json) root=$(jq -r ".[] | .bus" <<< $json) -# validate 2 host bridges under a root port +# validate 2 or 3 host bridges under a root port port_sort="sort_by(.port | .[4:] | tonumber)" json=$($CXL list -b cxl_test -BP) count=$(jq ".[] | .[\"ports:$root\"] | length" <<< $json) -((count == 2)) || err "$LINENO" +((count == 2)) || ((count == 3)) || err "$LINENO" +bridges=$count bridge[0]=$(jq -r ".[] | .[\"ports:$root\"] | $port_sort | .[0].port" <<< $json) bridge[1]=$(jq -r ".[] | .[\"ports:$root\"] | $port_sort | .[1].port" <<< $json) +((bridges > 2)) && bridge[2]=$(jq -r ".[] | .[\"ports:$root\"] | $port_sort | .[2].port" <<< $json) +# validate root ports per host bridge +check_host_bridge() +{ + json=$($CXL list -b cxl_test -T -p $1) + count=$(jq ".[] | .dports | length" <<< $json) + ((count == $2)) || err "$3" +} -# validate 2 root ports per host bridge -json=$($CXL list -b cxl_test -T -p ${bridge[0]}) -count=$(jq ".[] | .dports | length" <<< $json) -((count == 2)) || err "$LINENO" - -json=$($CXL list -b cxl_test -T -p ${bridge[1]}) -count=$(jq ".[] | .dports | length" <<< $json) -((count == 2)) || err "$LINENO" +check_host_bridge ${bridge[0]} 2 $LINENO +check_host_bridge ${bridge[1]} 2 $LINENO +((bridges > 2)) && check_host_bridge ${bridge[2]} 1 $LINENO - -# validate 2 switches per-root port +# validate 2 switches per root-port json=$($CXL list -b cxl_test -P -p ${bridge[0]}) count=$(jq ".[] | .[\"ports:${bridge[0]}\"] | length" <<< $json) ((count == 2)) || err "$LINENO" @@ -65,9 +68,9 @@ switch[2]=$(jq -r ".[] | .[\"ports:${bridge[1]}\"] | $port_sort | .[0].host" <<< switch[3]=$(jq -r ".[] | .[\"ports:${bridge[1]}\"] | $port_sort | .[1].host" <<< $json) -# validate the expected properties of the 4 root decoders -# use the size of the first decoder to determine the cxl_test version / -# properties +# validate the expected properties of the 4 or 5 root decoders +# use the size of the first decoder to determine the +# cxl_test version / properties json=$($CXL list -b cxl_test -D -d root) port_id=${root:4} port_id_len=${#port_id} @@ -103,12 +106,19 @@ count=$(jq "[ $decoder_sort | .[3] | select(.nr_targets == 2) ] | length" <<< $json) ((count == 1)) || err "$LINENO" +if (( bridges == 3 )); then + count=$(jq "[ $decoder_sort | .[4] | + select(.pmem_capable == true) | + select(.size == $decoder_base_size) | + select(.nr_targets == 1) ] | length" <<< $json) + ((count == 1)) || err "$LINENO" +fi -# check that all 8 cxl_test memdevs are enabled by default and have a +# check that all 8 or 10 cxl_test memdevs are enabled by default and have a # pmem size of 256M, or 1G json=$($CXL list -b cxl_test -M) count=$(jq "map(select(.pmem_size == $pmem_size)) | length" <<< $json) -((count == 8)) || err "$LINENO" +((bridges == 2 && count == 8 || bridges == 3 && count == 10)) || err "$LINENO" # check that switch ports disappear after all of their memdevs have been @@ -151,8 +161,8 @@ do done -# validate host bridge tear down -for b in ${bridge[@]} +# validate host bridge tear down for the first 2 bridges +for b in ${bridge[0]} ${bridge[1]} do $CXL disable-port $b -f json=$($CXL list -M -i -p $b) From patchwork Thu Dec 8 21:29:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Williams X-Patchwork-Id: 13068954 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D0311C4332F for ; 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X-IronPort-AV: E=McAfee;i="6500,9779,10555"; a="344343322" X-IronPort-AV: E=Sophos;i="5.96,228,1665471600"; d="scan'208";a="344343322" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2022 13:29:44 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10555"; a="647170307" X-IronPort-AV: E=Sophos;i="5.96,228,1665471600"; d="scan'208";a="647170307" Received: from kputnam-mobl1.amr.corp.intel.com (HELO dwillia2-xfh.jf.intel.com) ([10.251.25.149]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Dec 2022 13:29:44 -0800 Subject: [ndctl PATCH v2 18/18] cxl/test: Test single-port host-bridge region creation From: Dan Williams To: linux-cxl@vger.kernel.org Cc: Bobo WL , Jonathan Cameron , Alison Schofield , vishal.l.verma@intel.com, nvdimm@lists.linux.dev, vishal.l.verma@intel.com Date: Thu, 08 Dec 2022 13:29:44 -0800 Message-ID: <167053498406.582963.2052790353158387141.stgit@dwillia2-xfh.jf.intel.com> In-Reply-To: <167053487710.582963.17616889985000817682.stgit@dwillia2-xfh.jf.intel.com> References: <167053487710.582963.17616889985000817682.stgit@dwillia2-xfh.jf.intel.com> User-Agent: StGit/0.18-3-g996c MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org The original port decoder programming algorithm in the kernel failed to acommodate the corner case of a passthrough port connected to a fan-out port. Use the 5th cxl_test decoder to regression test this scenario. Reported-by: Bobo WL Reported-by: Jonathan Cameron Link: http://lore.kernel.org/r/20221010172057.00001559@huawei.com Tested-by: Alison Schofield Signed-off-by: Dan Williams --- test/cxl-create-region.sh | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/test/cxl-create-region.sh b/test/cxl-create-region.sh index 82aad3a7285a..47aed44848ab 100644 --- a/test/cxl-create-region.sh +++ b/test/cxl-create-region.sh @@ -110,6 +110,34 @@ create_subregions() done } +create_single() +{ + # the 5th cxl_test decoder is expected to target a single-port + # host-bridge. Older cxl_test implementations may not define it, + # so skip the test in that case. + decoder=$($CXL list -b cxl_test -D -d root | + jq -r ".[4] | + select(.pmem_capable == true) | + select(.nr_targets == 1) | + .decoder") + + if [[ ! $decoder ]]; then + echo "no single-port host-bridge decoder found, skipping" + return + fi + + region=$($CXL create-region -d "$decoder" | jq -r ".region") + if [[ ! $region ]]; then + echo "failed to create single-port host-bridge region" + err "$LINENO" + fi + + destroy_regions "$region" +} + +# test region creation on devices behind a single-port host-bridge +create_single + # test reading labels directly through cxl-cli readarray -t mems < <("$CXL" list -b cxl_test -M | jq -r '.[].memdev')