From patchwork Fri Dec 9 09:36:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13069388 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B01DDC4332F for ; Fri, 9 Dec 2022 09:37:51 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p3ZoZ-0004EX-L9; Fri, 09 Dec 2022 04:37:07 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p3ZoS-0004Db-Lb for qemu-devel@nongnu.org; Fri, 09 Dec 2022 04:37:05 -0500 Received: from mail-wm1-x332.google.com ([2a00:1450:4864:20::332]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p3ZoQ-0003kV-KC for qemu-devel@nongnu.org; Fri, 09 Dec 2022 04:36:59 -0500 Received: by mail-wm1-x332.google.com with SMTP id 125-20020a1c0283000000b003d1e906ca23so2842916wmc.3 for ; Fri, 09 Dec 2022 01:36:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=hqbawvL4vHvZpY+2DyinzrBtHU1TrIUtt76G41fXH68=; b=U198fHmPFbp0ue9DQeYt8z4UFPNtjBZ1pcRFkxzV4JSOU0rBM8ywKuzzkIoMIuVfX7 GkCDvsps7ExKS1aQ/Tfu/B1yM9Bq1dZJxh4pC/dFHRdeaKPNiWmRRpcz+zkJ+L01peiA UEf63os82eKL5MqzxL+n71Buobypn5mM5bFUVKm4n+RADR8RfWXb4i50R40LzBtS1MMl 5haUqH3boZ+0QqkTgBkzmX6OGlnrSxuexleNQSVYjpRvDOO98HZMlpZXiYqbFp8pkk2E R7L2Ip/Kg3lEN9YlRyquncFlyilbg8CVJNRK2E+aVxJAD7Go9F0u3HE9tWUE5kOKyOq+ F9KA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hqbawvL4vHvZpY+2DyinzrBtHU1TrIUtt76G41fXH68=; b=x+PnlU/yIakzKWO2VP7A3u7MPwadgBZrURiW40lL/GbmTyGmaLrGos/d39ow5JJh4I cR9nsjNDAtfPVmxCemMxOgVIUwbthVH55f8XaFZVvDFtBJJ18ccUorYyXuYlXC3I9j36 SrselJEH5DlMjLnApdLIyafqLQD65+ZFOSzWcTKX5a0HqDvPPxTheWeDSh72ulUFex38 TPuMLqkUkTmSmWK7v0cE4Z3xzF6x+QzYkGkATOdi3LxG430STOSTNoIBdlGE21bnvL7B uVoYbQZRUBkeW70+7nPdxz/SON2D+JMxsuuRZBAyRLtQUVaXKl74tN7P79zk6K4UXWVI DSDA== X-Gm-Message-State: ANoB5pmBZoX9QryDvj6a9nEfZ4p/sAnE5FwIJGMFx09fQB8pFEfZMANp VW36ucWLH0biFmPXUh45dQluugIvQvKtCPqr7eA= X-Google-Smtp-Source: AA0mqf5WNexLcFWoVXjangt0NlfSbtV5LlhlR8n9u3uHGVVUxls6+CmZbh7vMyaEy0Un/HIGy1+qMg== X-Received: by 2002:a05:600c:1d83:b0:3c7:a5:610c with SMTP id p3-20020a05600c1d8300b003c700a5610cmr4137749wms.16.1670578616525; Fri, 09 Dec 2022 01:36:56 -0800 (PST) Received: from localhost.localdomain ([81.0.6.76]) by smtp.gmail.com with ESMTPSA id o30-20020a05600c511e00b003a3442f1229sm8603629wms.29.2022.12.09.01.36.55 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 09 Dec 2022 01:36:56 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?utf-8?q?Alex_Benn?= =?utf-8?q?=C3=A9e?= , Paolo Bonzini , Stefan Hajnoczi , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH-for-8.0 1/5] accel/tcg: Restrict cpu_io_recompile() to system emulation Date: Fri, 9 Dec 2022 10:36:45 +0100 Message-Id: <20221209093649.43738-2-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221209093649.43738-1-philmd@linaro.org> References: <20221209093649.43738-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=philmd@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Missed in commit 6526919224 ("accel/tcg: Restrict cpu_io_recompile() from other accelerators"). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée --- accel/tcg/internal.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/accel/tcg/internal.h b/accel/tcg/internal.h index e1429a53ac..35419f3fe1 100644 --- a/accel/tcg/internal.h +++ b/accel/tcg/internal.h @@ -43,12 +43,12 @@ void tb_invalidate_phys_page_fast(struct page_collection *pages, struct page_collection *page_collection_lock(tb_page_addr_t start, tb_page_addr_t end); void page_collection_unlock(struct page_collection *set); +G_NORETURN void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr); #endif /* CONFIG_SOFTMMU */ TranslationBlock *tb_gen_code(CPUState *cpu, target_ulong pc, target_ulong cs_base, uint32_t flags, int cflags); -G_NORETURN void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr); void page_init(void); void tb_htable_init(void); void tb_reset_jump(TranslationBlock *tb, int n); From patchwork Fri Dec 9 09:36:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13069390 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 68826C4332F for ; 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Fri, 09 Dec 2022 01:37:01 -0800 (PST) Received: from localhost.localdomain ([81.0.6.76]) by smtp.gmail.com with ESMTPSA id g6-20020a05600c4ec600b003cf57329221sm8899073wmq.14.2022.12.09.01.37.00 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 09 Dec 2022 01:37:01 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?utf-8?q?Alex_Benn?= =?utf-8?q?=C3=A9e?= , Paolo Bonzini , Stefan Hajnoczi , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH-for-8.0 2/5] accel/tcg: Remove trace events from trace-root.h Date: Fri, 9 Dec 2022 10:36:46 +0100 Message-Id: <20221209093649.43738-3-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221209093649.43738-1-philmd@linaro.org> References: <20221209093649.43738-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=philmd@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Commit d9bb58e510 ("tcg: move tcg related files into accel/tcg/ subdirectory") introduced accel/tcg/trace-events, so we don't need to use the root trace-events anymore. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée --- accel/tcg/cputlb.c | 2 +- accel/tcg/trace-events | 4 ++++ trace-events | 4 ---- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 6f1c00682b..ac459478f4 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -33,7 +33,7 @@ #include "qemu/atomic.h" #include "qemu/atomic128.h" #include "exec/translate-all.h" -#include "trace/trace-root.h" +#include "trace.h" #include "tb-hash.h" #include "internal.h" #ifdef CONFIG_PLUGIN diff --git a/accel/tcg/trace-events b/accel/tcg/trace-events index 59eab96f26..4e9b450520 100644 --- a/accel/tcg/trace-events +++ b/accel/tcg/trace-events @@ -6,5 +6,9 @@ exec_tb(void *tb, uintptr_t pc) "tb:%p pc=0x%"PRIxPTR exec_tb_nocache(void *tb, uintptr_t pc) "tb:%p pc=0x%"PRIxPTR exec_tb_exit(void *last_tb, unsigned int flags) "tb:%p flags=0x%x" +# cputlb.c +memory_notdirty_write_access(uint64_t vaddr, uint64_t ram_addr, unsigned size) "0x%" PRIx64 " ram_addr 0x%" PRIx64 " size %u" +memory_notdirty_set_dirty(uint64_t vaddr) "0x%" PRIx64 + # translate-all.c translate_block(void *tb, uintptr_t pc, const void *tb_code) "tb:%p, pc:0x%"PRIxPTR", tb_code:%p" diff --git a/trace-events b/trace-events index 035f3d570d..b6b84b175e 100644 --- a/trace-events +++ b/trace-events @@ -42,10 +42,6 @@ find_ram_offset(uint64_t size, uint64_t offset) "size: 0x%" PRIx64 " @ 0x%" PRIx find_ram_offset_loop(uint64_t size, uint64_t candidate, uint64_t offset, uint64_t next, uint64_t mingap) "trying size: 0x%" PRIx64 " @ 0x%" PRIx64 ", offset: 0x%" PRIx64" next: 0x%" PRIx64 " mingap: 0x%" PRIx64 ram_block_discard_range(const char *rbname, void *hva, size_t length, bool need_madvise, bool need_fallocate, int ret) "%s@%p + 0x%zx: madvise: %d fallocate: %d ret: %d" -# accel/tcg/cputlb.c -memory_notdirty_write_access(uint64_t vaddr, uint64_t ram_addr, unsigned size) "0x%" PRIx64 " ram_addr 0x%" PRIx64 " size %u" -memory_notdirty_set_dirty(uint64_t vaddr) "0x%" PRIx64 - # job.c job_state_transition(void *job, int ret, const char *legal, const char *s0, const char *s1) "job %p (ret: %d) attempting %s transition (%s-->%s)" job_apply_verb(void *job, const char *state, const char *verb, const char *legal) "job %p in state %s; applying verb %s (%s)" From patchwork Fri Dec 9 09:36:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13069392 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 11426C4332F for ; Fri, 9 Dec 2022 09:38:35 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p3Zod-0004F3-JF; Fri, 09 Dec 2022 04:37:11 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p3Zob-0004Es-V9 for qemu-devel@nongnu.org; Fri, 09 Dec 2022 04:37:10 -0500 Received: from mail-wm1-x32c.google.com ([2a00:1450:4864:20::32c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1p3ZoZ-0003rP-TR for qemu-devel@nongnu.org; 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Fri, 09 Dec 2022 01:37:05 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?utf-8?q?Alex_Benn?= =?utf-8?q?=C3=A9e?= , Paolo Bonzini , Stefan Hajnoczi , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH-for-8.0 3/5] accel/tcg: Rename tb_invalidate_phys_page_[locked_]fast() Date: Fri, 9 Dec 2022 10:36:47 +0100 Message-Id: <20221209093649.43738-4-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221209093649.43738-1-philmd@linaro.org> References: <20221209093649.43738-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=philmd@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Emphasize this function is called with pages locked. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée --- accel/tcg/cputlb.c | 2 +- accel/tcg/internal.h | 6 +++--- accel/tcg/tb-maint.c | 6 +++--- 3 files changed, 7 insertions(+), 7 deletions(-) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index ac459478f4..6402fe11c1 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -1510,7 +1510,7 @@ static void notdirty_write(CPUState *cpu, vaddr mem_vaddr, unsigned size, if (!cpu_physical_memory_get_dirty_flag(ram_addr, DIRTY_MEMORY_CODE)) { struct page_collection *pages = page_collection_lock(ram_addr, ram_addr + size); - tb_invalidate_phys_page_fast(pages, ram_addr, size, retaddr); + tb_invalidate_phys_page_locked_fast(pages, ram_addr, size, retaddr); page_collection_unlock(pages); } diff --git a/accel/tcg/internal.h b/accel/tcg/internal.h index 35419f3fe1..d8b58c1e70 100644 --- a/accel/tcg/internal.h +++ b/accel/tcg/internal.h @@ -37,9 +37,9 @@ void page_table_config_init(void); #ifdef CONFIG_SOFTMMU struct page_collection; -void tb_invalidate_phys_page_fast(struct page_collection *pages, - tb_page_addr_t start, int len, - uintptr_t retaddr); +void tb_invalidate_phys_page_locked_fast(struct page_collection *pages, + tb_page_addr_t start, int len, + uintptr_t retaddr); struct page_collection *page_collection_lock(tb_page_addr_t start, tb_page_addr_t end); void page_collection_unlock(struct page_collection *set); diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c index 0c56e81d8c..bf84728910 100644 --- a/accel/tcg/tb-maint.c +++ b/accel/tcg/tb-maint.c @@ -1200,9 +1200,9 @@ void tb_invalidate_phys_range(tb_page_addr_t start, tb_page_addr_t end) * * Call with all @pages in the range [@start, @start + len[ locked. */ -void tb_invalidate_phys_page_fast(struct page_collection *pages, - tb_page_addr_t start, int len, - uintptr_t retaddr) +void tb_invalidate_phys_page_locked_fast(struct page_collection *pages, + tb_page_addr_t start, int len, + uintptr_t retaddr) { PageDesc *p; From patchwork Fri Dec 9 09:36:48 2022 Content-Type: text/plain; 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Fri, 09 Dec 2022 01:37:10 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?utf-8?q?Alex_Benn?= =?utf-8?q?=C3=A9e?= , Paolo Bonzini , Stefan Hajnoczi , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH-for-8.0 4/5] accel/tcg: Factor tb_invalidate_phys_range_fast() out Date: Fri, 9 Dec 2022 10:36:48 +0100 Message-Id: <20221209093649.43738-5-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221209093649.43738-1-philmd@linaro.org> References: <20221209093649.43738-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=philmd@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée --- accel/tcg/cputlb.c | 5 +---- accel/tcg/internal.h | 3 +++ accel/tcg/tb-maint.c | 21 +++++++++++++++++---- 3 files changed, 21 insertions(+), 8 deletions(-) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 6402fe11c1..03674d598f 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -1508,10 +1508,7 @@ static void notdirty_write(CPUState *cpu, vaddr mem_vaddr, unsigned size, trace_memory_notdirty_write_access(mem_vaddr, ram_addr, size); if (!cpu_physical_memory_get_dirty_flag(ram_addr, DIRTY_MEMORY_CODE)) { - struct page_collection *pages - = page_collection_lock(ram_addr, ram_addr + size); - tb_invalidate_phys_page_locked_fast(pages, ram_addr, size, retaddr); - page_collection_unlock(pages); + tb_invalidate_phys_range_fast(ram_addr, size, retaddr); } /* diff --git a/accel/tcg/internal.h b/accel/tcg/internal.h index d8b58c1e70..db078390b1 100644 --- a/accel/tcg/internal.h +++ b/accel/tcg/internal.h @@ -42,6 +42,9 @@ void tb_invalidate_phys_page_locked_fast(struct page_collection *pages, uintptr_t retaddr); struct page_collection *page_collection_lock(tb_page_addr_t start, tb_page_addr_t end); +void tb_invalidate_phys_range_fast(ram_addr_t ram_addr, + unsigned size, + uintptr_t retaddr); void page_collection_unlock(struct page_collection *set); G_NORETURN void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr); #endif /* CONFIG_SOFTMMU */ diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c index bf84728910..4dc2fa1060 100644 --- a/accel/tcg/tb-maint.c +++ b/accel/tcg/tb-maint.c @@ -1194,10 +1194,6 @@ void tb_invalidate_phys_range(tb_page_addr_t start, tb_page_addr_t end) } /* - * len must be <= 8 and start must be a multiple of len. - * Called via softmmu_template.h when code areas are written to with - * iothread mutex not held. - * * Call with all @pages in the range [@start, @start + len[ locked. */ void tb_invalidate_phys_page_locked_fast(struct page_collection *pages, @@ -1215,4 +1211,21 @@ void tb_invalidate_phys_page_locked_fast(struct page_collection *pages, tb_invalidate_phys_page_range__locked(pages, p, start, start + len, retaddr); } + +/* + * len must be <= 8 and start must be a multiple of len. + * Called via softmmu_template.h when code areas are written to with + * iothread mutex not held. + */ +void tb_invalidate_phys_range_fast(ram_addr_t ram_addr, + unsigned size, + uintptr_t retaddr) +{ + struct page_collection *pages; + + pages = page_collection_lock(ram_addr, ram_addr + size); + tb_invalidate_phys_page_locked_fast(pages, ram_addr, size, retaddr); + page_collection_unlock(pages); +} + #endif /* CONFIG_USER_ONLY */ From patchwork Fri Dec 9 09:36:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13069393 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 41CF3C4332F for ; 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Fri, 09 Dec 2022 01:37:15 -0800 (PST) Received: from localhost.localdomain ([81.0.6.76]) by smtp.gmail.com with ESMTPSA id k24-20020a05600c1c9800b003d1b4d957aasm1299607wms.36.2022.12.09.01.37.15 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 09 Dec 2022 01:37:15 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?utf-8?q?Alex_Benn?= =?utf-8?q?=C3=A9e?= , Paolo Bonzini , Stefan Hajnoczi , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH-for-8.0 5/5] accel/tcg: Restrict page_collection structure to system TB maintainance Date: Fri, 9 Dec 2022 10:36:49 +0100 Message-Id: <20221209093649.43738-6-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221209093649.43738-1-philmd@linaro.org> References: <20221209093649.43738-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=philmd@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Only the system emulation part of TB maintainance uses the page_collection structure. Restrict its declaration (and the functions requiring it) to tb-maint.c. Convert the 'len' argument of tb_invalidate_phys_page_locked_fast() from signed to unsigned. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alex Bennée --- accel/tcg/internal.h | 7 ------- accel/tcg/tb-maint.c | 12 ++++++------ 2 files changed, 6 insertions(+), 13 deletions(-) diff --git a/accel/tcg/internal.h b/accel/tcg/internal.h index db078390b1..6edff16fb0 100644 --- a/accel/tcg/internal.h +++ b/accel/tcg/internal.h @@ -36,16 +36,9 @@ void page_table_config_init(void); #endif #ifdef CONFIG_SOFTMMU -struct page_collection; -void tb_invalidate_phys_page_locked_fast(struct page_collection *pages, - tb_page_addr_t start, int len, - uintptr_t retaddr); -struct page_collection *page_collection_lock(tb_page_addr_t start, - tb_page_addr_t end); void tb_invalidate_phys_range_fast(ram_addr_t ram_addr, unsigned size, uintptr_t retaddr); -void page_collection_unlock(struct page_collection *set); G_NORETURN void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr); #endif /* CONFIG_SOFTMMU */ diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c index 4dc2fa1060..10d7e4b7a8 100644 --- a/accel/tcg/tb-maint.c +++ b/accel/tcg/tb-maint.c @@ -523,8 +523,8 @@ static gint tb_page_addr_cmp(gconstpointer ap, gconstpointer bp, gpointer udata) * intersecting TBs. * Locking order: acquire locks in ascending order of page index. */ -struct page_collection * -page_collection_lock(tb_page_addr_t start, tb_page_addr_t end) +static struct page_collection *page_collection_lock(tb_page_addr_t start, + tb_page_addr_t end) { struct page_collection *set = g_malloc(sizeof(*set)); tb_page_addr_t index; @@ -568,7 +568,7 @@ page_collection_lock(tb_page_addr_t start, tb_page_addr_t end) return set; } -void page_collection_unlock(struct page_collection *set) +static void page_collection_unlock(struct page_collection *set) { /* entries are unlocked and freed via page_entry_destroy */ g_tree_destroy(set->tree); @@ -1196,9 +1196,9 @@ void tb_invalidate_phys_range(tb_page_addr_t start, tb_page_addr_t end) /* * Call with all @pages in the range [@start, @start + len[ locked. */ -void tb_invalidate_phys_page_locked_fast(struct page_collection *pages, - tb_page_addr_t start, int len, - uintptr_t retaddr) +static void tb_invalidate_phys_page_locked_fast(struct page_collection *pages, + tb_page_addr_t start, + unsigned len, uintptr_t retaddr) { PageDesc *p;