From patchwork Fri Dec 9 17:12:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 13070033 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AB2D1C4332F for ; Fri, 9 Dec 2022 17:13:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229939AbiLIRNX (ORCPT ); Fri, 9 Dec 2022 12:13:23 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34810 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229734AbiLIRNV (ORCPT ); Fri, 9 Dec 2022 12:13:21 -0500 Received: from mail-pj1-x1033.google.com (mail-pj1-x1033.google.com [IPv6:2607:f8b0:4864:20::1033]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8B30C4093E for ; Fri, 9 Dec 2022 09:13:14 -0800 (PST) Received: by mail-pj1-x1033.google.com with SMTP id k88-20020a17090a4ce100b00219d0b857bcso5618977pjh.1 for ; Fri, 09 Dec 2022 09:13:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=M88P4SMh5VCPJCyuLc/w2B8fWJUsM71IvdRT7VAjmHQ=; b=fGd3e82N31A7l0GFrD4RELU4+SmeP8YESrYNFW7YbDq/1R5jPqb8HNf+yew8ZNCRFM C7/4ccIgu7oVj7ehikAIRQtjKtveYz2hYbWdeapMVOiPP2ZlFmwVaQBpTsw0kUPnRo+M A6RKaIjdiuS+DXbkVcxHNSKfFI/mfyREzSE9s= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=M88P4SMh5VCPJCyuLc/w2B8fWJUsM71IvdRT7VAjmHQ=; b=tSi8ih5hbn9RK6RoaW1gQ5cX9WsOSR3dZKnAtT/sbwm124BfKTjVfTSpiF0nIX9HtJ g/KC/dD7/WNzka6mXJvwucmkFUcmFNmpnzKWFUB4CToAXAtQbtb8c82rs133OOBYy5DG s5gnaqLb22ULtGLRQB+wFzf9TGcspH1OrV7qt2OgIApUtizMDEkDZBRnTWc5HET9jMrB 7HcwhYsfEnqkEC5Xoad7heE1E8mOnx5aUVSrIFRa8oWx5y9HkS7XrUjoD1rV2omAOC82 nHVcKv6/RfFNg39+rxWQ29Qg3tCRverYZwXVoyJeq4UnEhcdpPa7fWr/aM8PxcQNNjSx 6gDQ== X-Gm-Message-State: ANoB5pnEb+sMyF7yLle3EVKB/s08Ci5zc1CS7ZlY6aQRbde6dFUdtNTI sOOhliLqadz1VZsoLtpOQvQ+6g== X-Google-Smtp-Source: AA0mqf5o0cdOIYZpQg4mEqTBzOqbSQQI2YnX0/UwHmDG/Y+0EqLsG00JvO50nunOCSXjjf7bSa5orQ== X-Received: by 2002:a17:902:aa08:b0:189:fb78:a7d4 with SMTP id be8-20020a170902aa0800b00189fb78a7d4mr6267571plb.21.1670605994046; Fri, 09 Dec 2022 09:13:14 -0800 (PST) Received: from tictac2.mtv.corp.google.com ([2620:15c:9d:2:9a82:7898:7bf4:b4f]) by smtp.gmail.com with ESMTPSA id j16-20020a170902da9000b00189c62eac37sm1597503plx.32.2022.12.09.09.13.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Dec 2022 09:13:13 -0800 (PST) From: Douglas Anderson To: Bjorn Andersson Cc: swboyd@chromium.org, Dmitry Torokhov , mka@chromium.org, Yunlong Jia , linux-arm-msm@vger.kernel.org, Konrad Dybcio , linux-input@vger.kernel.org, Douglas Anderson , Andy Gross , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 1/4] arm64: dts: qcom: sc7180: Bump up trogdor ts_reset_l drive strength Date: Fri, 9 Dec 2022 09:12:37 -0800 Message-Id: <20221209091234.v3.1.I39c387f1e3176fcf340039ec12d54047de9f8526@changeid> X-Mailer: git-send-email 2.39.0.rc1.256.g54fd8350bd-goog In-Reply-To: <20221209171240.1614904-1-dianders@chromium.org> References: <20221209171240.1614904-1-dianders@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On at least one board (pazquel360) the reset line for the touchscreen was scoped and found to take almost 2 ms to fall when we drove it low. This wasn't great because the Linux driver for the touchscreen (the elants_i2c driver) thinks it can do a 500 us reset pulse. If we bump the drive strength to 8 mA then the reset line went down in ~421 us. NOTE: we could apply this fix just for pazquel360, but: * Probably other trogdor devices have similar timings and it's just that nobody has noticed it before. * There are other trogdor boards using the same elan driver that tries to do 500 us reset pulses. * Bumping the drive strength to 8mA across the board won't hurt. This isn't a high speed signal or anything. Signed-off-by: Douglas Anderson Reviewed-by: Matthias Kaehlcke Reviewed-by: Konrad Dybcio --- (no changes since v1) arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi index f1defb94d670..ff1c7aa6a722 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi @@ -1376,7 +1376,15 @@ ts_reset_l: ts-reset-l-state { pins = "gpio8"; function = "gpio"; bias-disable; - drive-strength = <2>; + + /* + * The reset GPIO to the touchscreen takes almost 2ms to drop + * at the default drive strength. When we bump it up to 8mA it + * falls in under 500us. We want this to be fast since the Elan + * datasheet (and any drivers written based on it) talk about using + * a 500 us reset pulse. + */ + drive-strength = <8>; }; sdc1_on: sdc1-on-state { From patchwork Fri Dec 9 17:12:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 13070034 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8A35EC10F1E for ; Fri, 9 Dec 2022 17:13:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230018AbiLIRN0 (ORCPT ); Fri, 9 Dec 2022 12:13:26 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34842 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229888AbiLIRNW (ORCPT ); Fri, 9 Dec 2022 12:13:22 -0500 Received: from mail-pl1-x62e.google.com (mail-pl1-x62e.google.com [IPv6:2607:f8b0:4864:20::62e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9CAB542981 for ; Fri, 9 Dec 2022 09:13:16 -0800 (PST) Received: by mail-pl1-x62e.google.com with SMTP id k7so5531540pll.6 for ; Fri, 09 Dec 2022 09:13:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=30dMEap98zmC9FjobmK4HAr7EsnBPy2I728S8irHPHo=; b=SqpXkBzUzzGdcOEoAZiSACFm/WChD89j4Uxx9+5wm9SE08kj3TH0SDV2/fXJRh5+qK aV4iJdKWBV8EzVE91QPEG6iCBSwF7jeXbR9Z+mCho7sHhrPP7WGsD4B30zu3aSq682pa vt5znMBOCJDHjSVvhlRMW1B44dTeLKeDF6RmA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=30dMEap98zmC9FjobmK4HAr7EsnBPy2I728S8irHPHo=; b=geckEOmNZLoeKGeFht9mhzTf/+KsYBHYvRhKqzG/wGj4+SVru8GJH8wbdikc7DdtKP v8XGTFDk/rc7ZkS3drtRTfXW1ZTiJOuyDTVlX4MVuqcVfiu1mblZxeWwSRE/0tQ1Dir6 K+CRysJg9MrcRPUaPlN+UeYb+BQnbH8Vavz6V7KDRVRDObpvhbCXcL3yIZuHUymwq7R4 oQ2YWlWWK1+8M9C2yl3I4CVwDpnqOii5tKRJ1aZeHwtc55LLqJxsHBaU+b13K5VQSOn8 ioVpAEkXdp4gGH7ldxSYXPVA0VxERTzzgUzAPoMSk5p+7SCOs0BpyTNVV45RXsTkXgZ4 bqkg== X-Gm-Message-State: ANoB5pmd+w5pZedHnzYnp2IqE0tgDKlTBVR6Vpit86oU/60+ca1FcQX5 AGB/beTRnB4gQPb48AAtlZKtww== X-Google-Smtp-Source: AA0mqf7EnY6+VbLUEEY1RBV1EuWIccn+GFpNszeaWwG5gFJuHFttoTTi32iO7IMLJwflvkCf77UVRw== X-Received: by 2002:a17:902:9881:b0:185:441e:4d0e with SMTP id s1-20020a170902988100b00185441e4d0emr6484880plp.62.1670605996123; Fri, 09 Dec 2022 09:13:16 -0800 (PST) Received: from tictac2.mtv.corp.google.com ([2620:15c:9d:2:9a82:7898:7bf4:b4f]) by smtp.gmail.com with ESMTPSA id j16-20020a170902da9000b00189c62eac37sm1597503plx.32.2022.12.09.09.13.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Dec 2022 09:13:15 -0800 (PST) From: Douglas Anderson To: Bjorn Andersson Cc: swboyd@chromium.org, Dmitry Torokhov , mka@chromium.org, Yunlong Jia , linux-arm-msm@vger.kernel.org, Konrad Dybcio , linux-input@vger.kernel.org, Douglas Anderson , Andy Gross , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 2/4] arm64: dts: qcom: sc7180: Add trogdor eDP/touchscreen regulator off-on-time Date: Fri, 9 Dec 2022 09:12:38 -0800 Message-Id: <20221209091234.v3.2.I65ac577411b017eff50e7a4fda254e5583ccdc48@changeid> X-Mailer: git-send-email 2.39.0.rc1.256.g54fd8350bd-goog In-Reply-To: <20221209171240.1614904-1-dianders@chromium.org> References: <20221209171240.1614904-1-dianders@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org In general, the timing diagrams for components specify a minimum time for power cycling the component. When we remove power from a device we need to let the device fully discharge and get to a quiescent state before applying power again. If we power a device on too soon then it might not have fully powered off and might be in a weird in-between / invalid state. eDP panels typically have a time that's at least 500 ms here. You can see that in Linux's panel-edp driver nearly every device specifies a "unprepare" time of at least 500 ms. This is a common minimum and the 500 ms is even in the example in the eDP spec. In Linux, the "panel-edp" driver enforces this delay for its own control of the regulator, but the "panel-edp" driver can't do anything about other control of the regulator (for instance, by the touchpanel driver). Let's add 500 ms as a board constraint for the regulator that's used for eDP/touchpanel on trogdor boards. If a given trogdor board stuffs only panels that can use a shorter time or stuff some panels that need a larger time then they can manually adjust this timing. We'll only do this minimum delay for trogdor devices with eDP (ones that use either bridge chip), not for devices with MIPI panels. MIPI panels could have similar constraints but the 500 ms isn't necessarily as standard and there are no known cases where this delay is needed. For most trogdor boards, this doesn't actually seem to affect anything when testing against shipping Linux. However, with pazqel360 it seems that this does make a difference. It seems that the touchscreen on this board _also_ needs some time for the regulator to discharge. That time is much less than 500 ms, so we'll just put the eDP panel 500 ms in there since the board constraint should be the "max" of the components. Signed-off-by: Douglas Anderson Reviewed-by: Matthias Kaehlcke --- (no changes since v2) Changes in v2: - Fix typo in commit message (Matthias) .../boot/dts/qcom/sc7180-trogdor-parade-ps8640.dtsi | 12 ++++++++++++ .../boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi | 12 ++++++++++++ 2 files changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-parade-ps8640.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-parade-ps8640.dtsi index ebd6765e2afa..e27a769f8cd4 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-parade-ps8640.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-parade-ps8640.dtsi @@ -26,6 +26,18 @@ pp3300_brij_ps8640: pp3300-brij-ps8640-regulator { }; }; +/* + * ADDITIONS TO FIXED REGULATORS DEFINED IN PARENT DEVICE TREE FILES + * + * Sort order matches the order in the parent files (parents before children). + */ + +&pp3300_dx_edp { + off-on-delay-us = <500000>; +}; + +/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */ + &dsi0_out { remote-endpoint = <&ps8640_in>; }; diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi index 65333709e529..3188788306d0 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi @@ -7,6 +7,18 @@ #include +/* + * ADDITIONS TO FIXED REGULATORS DEFINED IN PARENT DEVICE TREE FILES + * + * Sort order matches the order in the parent files (parents before children). + */ + +&pp3300_dx_edp { + off-on-delay-us = <500000>; +}; + +/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */ + &dsi0_out { remote-endpoint = <&sn65dsi86_in>; }; From patchwork Fri Dec 9 17:12:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 13070035 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 91D98C4708E for ; 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Fri, 09 Dec 2022 09:13:17 -0800 (PST) From: Douglas Anderson To: Bjorn Andersson Cc: swboyd@chromium.org, Dmitry Torokhov , mka@chromium.org, Yunlong Jia , linux-arm-msm@vger.kernel.org, Konrad Dybcio , linux-input@vger.kernel.org, Douglas Anderson , Andy Gross , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 3/4] arm64: dts: qcom: sc7180: Start the trogdor eDP/touchscreen regulator on Date: Fri, 9 Dec 2022 09:12:39 -0800 Message-Id: <20221209091234.v3.3.I7050a61ba3a48e44b86053f265265b5e3c0cee31@changeid> X-Mailer: git-send-email 2.39.0.rc1.256.g54fd8350bd-goog In-Reply-To: <20221209171240.1614904-1-dianders@chromium.org> References: <20221209171240.1614904-1-dianders@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Now that we've added the `off-on-delay-us` for the touchpanel regulator, we can see that we're actually hitting that delay at bootup. I saw about 200 ms of delay. Let's avoid that delay by starting the regulator on. We'll only do this for eDP devices for the time being. NOTE: we _won't_ do this for homestar. Homestar's panel really likes to be power cycled. It's why the Linux driver for this panel has a pm_runtime_put_sync_suspend() when the panel is being unprepared but the normal panel-edp driver doesn't. It's also why this hardware has a separate power rail for eDP vs. touchscreen, unlike all the other trogdor boards. We won't start homestar's regulator on. While this could mean a slight delay on homestar, it is probably a _correct_ delay. The bootloader might have left the regulator on (it does so in dev and recovery modes), so if we turned the regulator off at probe time and we actually hit the delay then we were probably violating T12 in the panel spec. Signed-off-by: Douglas Anderson Reviewed-by: Matthias Kaehlcke --- (no changes since v1) .../boot/dts/qcom/sc7180-trogdor-homestar.dtsi | 18 ++++++++++++++++++ .../dts/qcom/sc7180-trogdor-parade-ps8640.dtsi | 8 ++++++++ .../dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi | 8 ++++++++ 3 files changed, 34 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi index d3cf64c16dcd..b3ba23a88a0b 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi @@ -85,6 +85,24 @@ map1 { }; }; +/* + * ADDITIONS TO FIXED REGULATORS DEFINED IN PARENT DEVICE TREE FILES + * + * Sort order matches the order in the parent files (parents before children). + */ + +&pp3300_dx_edp { + /* + * The atna33xc20 really likes to be power cycled to keep it from + * getting in a bad state. This is the reason that the touchscreen + * rail and eDP rails are separate from each other on homestar (but + * not other trogdor devices) Make sure it starts "off" at bootup. + */ + /delete-property/ regulator-boot-on; +}; + +/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */ + ap_ts_pen_1v8: &i2c4 { status = "okay"; clock-frequency = <400000>; diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-parade-ps8640.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-parade-ps8640.dtsi index e27a769f8cd4..5aa7949b5328 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-parade-ps8640.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-parade-ps8640.dtsi @@ -34,6 +34,14 @@ pp3300_brij_ps8640: pp3300-brij-ps8640-regulator { &pp3300_dx_edp { off-on-delay-us = <500000>; + + /* + * It's nicer to start with this regulator enabled. The + * bootloader may have left it on and it's nice not to cause an + * extra power cycle of the touchscreen and eDP panel at bootup. + * This should help speed bootup because we have off-on-delay-us. + */ + regulator-boot-on; }; /* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */ diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi index 3188788306d0..e52b8776755d 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi @@ -15,6 +15,14 @@ &pp3300_dx_edp { off-on-delay-us = <500000>; + + /* + * It's nicer to start with this regulator enabled. The + * bootloader may have left it on and it's nice not to cause an + * extra power cycle of the touchscreen and eDP panel at bootup. + * This should help speed bootup because we have off-on-delay-us. + */ + regulator-boot-on; }; /* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */ From patchwork Fri Dec 9 17:12:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 13070036 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E71D7C4332F for ; Fri, 9 Dec 2022 17:13:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229913AbiLIRNa (ORCPT ); Fri, 9 Dec 2022 12:13:30 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34866 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229930AbiLIRNX (ORCPT ); Fri, 9 Dec 2022 12:13:23 -0500 Received: from mail-pj1-x1033.google.com (mail-pj1-x1033.google.com [IPv6:2607:f8b0:4864:20::1033]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 44D49450A9 for ; Fri, 9 Dec 2022 09:13:20 -0800 (PST) Received: by mail-pj1-x1033.google.com with SMTP id k88-20020a17090a4ce100b00219d0b857bcso5619302pjh.1 for ; Fri, 09 Dec 2022 09:13:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=PXmK3nCiI+cY6qMJ9PawYnDke2Ff9u+237akMobAAqY=; b=IqgadLnjVNwyCp2QMMG0Nu8AsLBPgJgJ3n8Je131hOobY9YARQ0RMklSCn/mpKZ/DP Ro2PNmTYWvF/xo/40eE+NsHshil39bw/D+I2JWiRk3M1SRUzPSiTLu6MpVQlMSzjfcYl fZUOMiob21JBgRv01lTZvlInVn+OKcqRRPHgE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=PXmK3nCiI+cY6qMJ9PawYnDke2Ff9u+237akMobAAqY=; b=U0cv0z5PvrN/+N/XGJ2rekcf0i//eVLe1+n6PBSZ/dGKrA4blj++x1c4CS1OjP/MRR QZiteAF3R5gtKT4rrirv5oy8DwGMxQFpRyoH5clZ6FWrODCQv17bNTiORulQMTQZ9ZFS /NfEYmnKHF0D7ow4SdKHZv0k1vI5Xq11RsG3lnzioCTU0KwPakI7VV8224M5gNK5Ccju iT8hrgOIvQ3gFhLv4T3VrKeNXyTHTXJJ7Fqvppwu4RnnQv52WcxZ/fSevQOcmR7khrsM wfKmnIZtAJG7t/WoKBRIHd/XW/Vv5nmLGoAoIiZ/Dx9E/5BC8zHXDCva1g6cYreQmkky vMSw== X-Gm-Message-State: ANoB5pl/PnkS8/x4B9u4UomUhq4jUKsya7nYn1dkx3Ml54p3faGb7PWZ 7efStpmDDU5lGsS69M+YMA7elA== X-Google-Smtp-Source: AA0mqf4E+hKNzII74vjCTHWDSOlIGqI7LLSVAx/UJE8yG1YELb55UaxBwq/en6iLoY+Fp7tg31MhsA== X-Received: by 2002:a17:903:4283:b0:189:7100:c50e with SMTP id ju3-20020a170903428300b001897100c50emr7136974plb.48.1670605999890; Fri, 09 Dec 2022 09:13:19 -0800 (PST) Received: from tictac2.mtv.corp.google.com ([2620:15c:9d:2:9a82:7898:7bf4:b4f]) by smtp.gmail.com with ESMTPSA id j16-20020a170902da9000b00189c62eac37sm1597503plx.32.2022.12.09.09.13.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Dec 2022 09:13:19 -0800 (PST) From: Douglas Anderson To: Bjorn Andersson Cc: swboyd@chromium.org, Dmitry Torokhov , mka@chromium.org, Yunlong Jia , linux-arm-msm@vger.kernel.org, Konrad Dybcio , linux-input@vger.kernel.org, Douglas Anderson , Andy Gross , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 4/4] arm64: dts: qcom: sc7180: Add pazquel360 touschreen Date: Fri, 9 Dec 2022 09:12:40 -0800 Message-Id: <20221209091234.v3.4.Id132522bda31fd97684cb076a44a0907cd28097d@changeid> X-Mailer: git-send-email 2.39.0.rc1.256.g54fd8350bd-goog In-Reply-To: <20221209171240.1614904-1-dianders@chromium.org> References: <20221209171240.1614904-1-dianders@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The touchscreen was supposed to have been added when pazquel360 first was added upstream but was missed. Add it now. Signed-off-by: Douglas Anderson Reviewed-by: Matthias Kaehlcke --- Changes in v3: - Removed hid-descr-addr .../dts/qcom/sc7180-trogdor-pazquel360.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-pazquel360.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-pazquel360.dtsi index 5702325d0c7b..ff9dd6857f8b 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-pazquel360.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-pazquel360.dtsi @@ -14,6 +14,25 @@ &alc5682 { realtek,dmic-clk-rate-hz = <2048000>; }; +ap_ts_pen_1v8: &i2c4 { + status = "okay"; + clock-frequency = <400000>; + + ap_ts: touchscreen@10 { + compatible = "elan,ekth3915", "elan,ekth3500"; + reg = <0x10>; + pinctrl-names = "default"; + pinctrl-0 = <&ts_int_l>, <&ts_reset_l>; + + interrupt-parent = <&tlmm>; + interrupts = <9 IRQ_TYPE_LEVEL_LOW>; + + vcc33-supply = <&pp3300_ts>; + vccio-supply = <&pp1800_l10a>; + reset-gpios = <&tlmm 8 GPIO_ACTIVE_LOW>; + }; +}; + &keyboard_controller { function-row-physmap = < MATRIX_KEY(0x00, 0x02, 0) /* T1 */