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Sun, 11 Dec 2022 03:59:01 -0800 Received: from nps-server-23.mtl.labs.mlnx (10.126.230.37) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Sun, 11 Dec 2022 03:58:59 -0800 From: Shay Drory To: , Stephen Hemminger , David Ahern , Subject: [PATCH iproute2-next 1/4] devlink: Add uapi changes for roce and migratable port function attrs Date: Sun, 11 Dec 2022 13:58:46 +0200 Message-ID: <20221211115849.510284-2-shayd@nvidia.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221211115849.510284-1-shayd@nvidia.com> References: <20221211115849.510284-1-shayd@nvidia.com> MIME-Version: 1.0 X-Originating-IP: [10.126.230.37] X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT026:EE_|BY5PR12MB4902:EE_ X-MS-Office365-Filtering-Correlation-Id: af09a586-80ef-4858-cb64-08dadb6f185e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Dec 2022 11:59:02.0877 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: af09a586-80ef-4858-cb64-08dadb6f185e X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT026.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB4902 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: dsahern@gmail.com Updating UAPI according to the changes merged to net-next. https://lore.kernel.org/netdev/20221206185119.380138-1-shayd@nvidia.com/ Signed-off-by: Shay Drory --- include/uapi/linux/devlink.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/include/uapi/linux/devlink.h b/include/uapi/linux/devlink.h index 7538d93f..ae96e481 100644 --- a/include/uapi/linux/devlink.h +++ b/include/uapi/linux/devlink.h @@ -658,11 +658,24 @@ enum devlink_resource_unit { DEVLINK_RESOURCE_UNIT_ENTRY, }; +enum devlink_port_fn_attr_cap { + DEVLINK_PORT_FN_ATTR_CAP_ROCE_BIT, + DEVLINK_PORT_FN_ATTR_CAP_MIGRATABLE_BIT, + + /* Add new caps above */ + __DEVLINK_PORT_FN_ATTR_CAPS_MAX, +}; + +#define DEVLINK_PORT_FN_CAP_ROCE _BITUL(DEVLINK_PORT_FN_ATTR_CAP_ROCE_BIT) +#define DEVLINK_PORT_FN_CAP_MIGRATABLE \ + _BITUL(DEVLINK_PORT_FN_ATTR_CAP_MIGRATABLE_BIT) + enum devlink_port_function_attr { DEVLINK_PORT_FUNCTION_ATTR_UNSPEC, DEVLINK_PORT_FUNCTION_ATTR_HW_ADDR, /* binary */ DEVLINK_PORT_FN_ATTR_STATE, /* u8 */ DEVLINK_PORT_FN_ATTR_OPSTATE, /* u8 */ + DEVLINK_PORT_FN_ATTR_CAPS, /* bitfield32 */ __DEVLINK_PORT_FUNCTION_ATTR_MAX, DEVLINK_PORT_FUNCTION_ATTR_MAX = __DEVLINK_PORT_FUNCTION_ATTR_MAX - 1 From patchwork Sun Dec 11 11:58:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shay Drori X-Patchwork-Id: 13070576 X-Patchwork-Delegate: dsahern@gmail.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 598E3C4332F for ; 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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by DM6NAM11FT086.mail.protection.outlook.com (10.13.173.75) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5901.17 via Frontend Transport; Sun, 11 Dec 2022 11:59:03 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Sun, 11 Dec 2022 03:59:03 -0800 Received: from nps-server-23.mtl.labs.mlnx (10.126.230.37) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Sun, 11 Dec 2022 03:59:01 -0800 From: Shay Drory To: , Stephen Hemminger , David Ahern , Subject: [PATCH iproute2-next 2/4] devlink: Support setting port function roce cap Date: Sun, 11 Dec 2022 13:58:47 +0200 Message-ID: <20221211115849.510284-3-shayd@nvidia.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221211115849.510284-1-shayd@nvidia.com> References: <20221211115849.510284-1-shayd@nvidia.com> MIME-Version: 1.0 X-Originating-IP: [10.126.230.37] X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT086:EE_|DM6PR12MB4316:EE_ X-MS-Office365-Filtering-Correlation-Id: 107a2e13-dc8c-46a6-d07d-08dadb6f1964 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Dec 2022 11:59:03.8830 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 107a2e13-dc8c-46a6-d07d-08dadb6f1964 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT086.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4316 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: dsahern@gmail.com Support port function commands to enable / disable RoCE, this is used to control the port RoCE device capabilities. When RoCE is disabled for a function of the port, function cannot create any RoCE specific resources (e.g GID table). It also saves system memory utilization. For example disabling RoCE enable a VF/SF to save 1 Mbytes of system memory per function. Example of a PCI VF port which supports a port function: $ devlink port show pci/0000:06:00.0/2 pci/0000:06:00.0/2: type eth netdev enp6s0pf0vf1 flavour pcivf pfnum 0 vfnum 1 function: hw_addr 00:00:00:00:00:00 roce enabled $ devlink port function set pci/0000:06:00.0/2 roce disable $ devlink port show pci/0000:06:00.0/2 pci/0000:06:00.0/2: type eth netdev enp6s0pf0vf1 flavour pcivf pfnum 0 vfnum 1 function: hw_addr 00:00:00:00:00:00 roce disabled Signed-off-by: Yishai Hadas Signed-off-by: Shay Drory Reviewed-by: Moshe Shemesh --- devlink/devlink.c | 35 +++++++++++++++++++++++++++++++++-- 1 file changed, 33 insertions(+), 2 deletions(-) diff --git a/devlink/devlink.c b/devlink/devlink.c index 4a5eee7a..66cc0415 100644 --- a/devlink/devlink.c +++ b/devlink/devlink.c @@ -297,6 +297,7 @@ static void ifname_map_free(struct ifname_map *ifname_map) #define DL_OPT_SELFTESTS BIT(54) #define DL_OPT_PORT_FN_RATE_TX_PRIORITY BIT(55) #define DL_OPT_PORT_FN_RATE_TX_WEIGHT BIT(56) +#define DL_OPT_PORT_FN_CAPS BIT(57) struct dl_opts { uint64_t present; /* flags of present items */ @@ -362,6 +363,7 @@ struct dl_opts { uint32_t linecard_index; const char *linecard_type; bool selftests_opt[DEVLINK_ATTR_SELFTEST_ID_MAX + 1]; + struct nla_bitfield32 port_fn_caps; }; struct dl { @@ -2116,6 +2118,18 @@ static int dl_argv_parse(struct dl *dl, uint64_t o_required, dl_arg_inc(dl); opts->linecard_type = ""; o_found |= DL_OPT_LINECARD_TYPE; + } else if (dl_argv_match(dl, "roce") && + (o_all & DL_OPT_PORT_FN_CAPS)) { + bool roce; + + dl_arg_inc(dl); + err = dl_argv_bool(dl, &roce); + if (err) + return err; + opts->port_fn_caps.selector |= DEVLINK_PORT_FN_CAP_ROCE; + if (roce) + opts->port_fn_caps.value |= DEVLINK_PORT_FN_CAP_ROCE; + o_found |= DL_OPT_PORT_FN_CAPS; } else { pr_err("Unknown option \"%s\"\n", dl_argv(dl)); return -EINVAL; @@ -2146,6 +2160,10 @@ dl_function_attr_put(struct nlmsghdr *nlh, const struct dl_opts *opts) if (opts->present & DL_OPT_PORT_FUNCTION_STATE) mnl_attr_put_u8(nlh, DEVLINK_PORT_FN_ATTR_STATE, opts->port_fn_state); + if (opts->present & DL_OPT_PORT_FN_CAPS) + mnl_attr_put(nlh, DEVLINK_PORT_FN_ATTR_CAPS, + sizeof(opts->port_fn_caps), &opts->port_fn_caps); + mnl_attr_nest_end(nlh, nest); } @@ -2336,7 +2354,8 @@ static void dl_opts_put(struct nlmsghdr *nlh, struct dl *dl) if (opts->present & DL_OPT_TRAP_POLICER_BURST) mnl_attr_put_u64(nlh, DEVLINK_ATTR_TRAP_POLICER_BURST, opts->trap_policer_burst); - if (opts->present & (DL_OPT_PORT_FUNCTION_HW_ADDR | DL_OPT_PORT_FUNCTION_STATE)) + if (opts->present & (DL_OPT_PORT_FUNCTION_HW_ADDR | DL_OPT_PORT_FUNCTION_STATE | + DL_OPT_PORT_FN_CAPS)) dl_function_attr_put(nlh, opts); if (opts->present & DL_OPT_PORT_FLAVOUR) mnl_attr_put_u16(nlh, DEVLINK_ATTR_PORT_FLAVOUR, opts->port_flavour); @@ -4386,6 +4405,7 @@ static void cmd_port_help(void) pr_err(" devlink port split DEV/PORT_INDEX count COUNT\n"); pr_err(" devlink port unsplit DEV/PORT_INDEX\n"); pr_err(" devlink port function set DEV/PORT_INDEX [ hw_addr ADDR ] [ state { active | inactive } ]\n"); + pr_err(" [ roce { enable | disable } ]\n"); pr_err(" devlink port function rate { help | show | add | del | set }\n"); pr_err(" devlink port param set DEV/PORT_INDEX name PARAMETER value VALUE cmode { permanent | driverinit | runtime }\n"); pr_err(" devlink port param show [DEV/PORT_INDEX name PARAMETER]\n"); @@ -4499,6 +4519,15 @@ static void pr_out_port_function(struct dl *dl, struct nlattr **tb_port) print_string(PRINT_ANY, "opstate", " opstate %s", port_fn_opstate(state)); } + if (tb[DEVLINK_PORT_FN_ATTR_CAPS]) { + struct nla_bitfield32 *port_fn_caps = + mnl_attr_get_payload(tb[DEVLINK_PORT_FN_ATTR_CAPS]); + + if (port_fn_caps->selector & DEVLINK_PORT_FN_CAP_ROCE) + print_string(PRINT_ANY, "roce", " roce %s", + port_fn_caps->value & DEVLINK_PORT_FN_CAP_ROCE ? + "enable" : "disable"); + } if (!dl->json_output) __pr_out_indent_dec(); @@ -4693,6 +4722,7 @@ static int cmd_port_param_show(struct dl *dl) static void cmd_port_function_help(void) { pr_err("Usage: devlink port function set DEV/PORT_INDEX [ hw_addr ADDR ] [ state STATE ]\n"); + pr_err(" [ roce { enable | disable } ]\n"); pr_err(" devlink port function rate { help | show | add | del | set }\n"); } @@ -4706,7 +4736,8 @@ static int cmd_port_function_set(struct dl *dl) return 0; } err = dl_argv_parse(dl, DL_OPT_HANDLEP, - DL_OPT_PORT_FUNCTION_HW_ADDR | DL_OPT_PORT_FUNCTION_STATE); + DL_OPT_PORT_FUNCTION_HW_ADDR | DL_OPT_PORT_FUNCTION_STATE | + DL_OPT_PORT_FN_CAPS); if (err) return err; From patchwork Sun Dec 11 11:58:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shay Drori X-Patchwork-Id: 13070577 X-Patchwork-Delegate: dsahern@gmail.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A6B08C4332F for ; Sun, 11 Dec 2022 11:59:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230247AbiLKL7c (ORCPT ); Sun, 11 Dec 2022 06:59:32 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37356 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230173AbiLKL7Q (ORCPT ); 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Sun, 11 Dec 2022 03:59:05 -0800 Received: from nps-server-23.mtl.labs.mlnx (10.126.230.37) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Sun, 11 Dec 2022 03:59:03 -0800 From: Shay Drory To: , Stephen Hemminger , David Ahern , Subject: [PATCH iproute2-next 3/4] devlink: Support setting port function migratable cap Date: Sun, 11 Dec 2022 13:58:48 +0200 Message-ID: <20221211115849.510284-4-shayd@nvidia.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221211115849.510284-1-shayd@nvidia.com> References: <20221211115849.510284-1-shayd@nvidia.com> MIME-Version: 1.0 X-Originating-IP: [10.126.230.37] X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT026:EE_|SJ1PR12MB6097:EE_ X-MS-Office365-Filtering-Correlation-Id: 567b4baf-3d9c-43e5-4094-08dadb6f1dd6 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Dec 2022 11:59:11.2748 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 567b4baf-3d9c-43e5-4094-08dadb6f1dd6 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT026.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ1PR12MB6097 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: dsahern@gmail.com Suppor port function commands to enable / disable migratable capability, this is used to set the port function as migratable. Live migration is the process of transferring a live virtual machine from one physical host to another without disrupting its normal operation. In order for a VM to be able to perform LM, all the VM components must be able to perform migration. e.g.: to be migratable. In order for VF to be migratable, VF must be bound to VFIO driver with migration support. When migratable capability is enable for a function of the port, the device is making the necessary preparations for the function to be migratable, which might include disabling features which cannot be migrated. Example of LM with migratable function configuration: Set migratable of the VF's port function. $ devlink port show pci/0000:06:00.0/2 pci/0000:06:00.0/2: type eth netdev enp6s0pf0vf1 flavour pcivf pfnum 0 vfnum 1 function: hw_addr 00:00:00:00:00:00 migratable disable $ devlink port function set pci/0000:06:00.0/2 migratable enable $ devlink port show pci/0000:06:00.0/2 pci/0000:06:00.0/2: type eth netdev enp6s0pf0vf1 flavour pcivf pfnum 0 vfnum 1 function: hw_addr 00:00:00:00:00:00 migratable enable Bind VF to VFIO driver with migration support: $ echo > /sys/bus/pci/devices/0000:08:00.0/driver/unbind $ echo mlx5_vfio_pci > /sys/bus/pci/devices/0000:08:00.0/driver_override $ echo > /sys/bus/pci/devices/0000:08:00.0/driver/bind Attach VF to the VM. Start the VM. Perform LM. Signed-off-by: Shay Drory Reviewed-by: Moshe Shemesh --- devlink/devlink.c | 20 ++++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) diff --git a/devlink/devlink.c b/devlink/devlink.c index 66cc0415..be0c1455 100644 --- a/devlink/devlink.c +++ b/devlink/devlink.c @@ -2130,6 +2130,18 @@ static int dl_argv_parse(struct dl *dl, uint64_t o_required, if (roce) opts->port_fn_caps.value |= DEVLINK_PORT_FN_CAP_ROCE; o_found |= DL_OPT_PORT_FN_CAPS; + } else if (dl_argv_match(dl, "migratable") && + (o_all & DL_OPT_PORT_FN_CAPS)) { + bool mig; + + dl_arg_inc(dl); + err = dl_argv_bool(dl, &mig); + if (err) + return err; + opts->port_fn_caps.selector |= DEVLINK_PORT_FN_CAP_MIGRATABLE; + if (mig) + opts->port_fn_caps.value |= DEVLINK_PORT_FN_CAP_MIGRATABLE; + o_found |= DL_OPT_PORT_FN_CAPS; } else { pr_err("Unknown option \"%s\"\n", dl_argv(dl)); return -EINVAL; @@ -4405,7 +4417,7 @@ static void cmd_port_help(void) pr_err(" devlink port split DEV/PORT_INDEX count COUNT\n"); pr_err(" devlink port unsplit DEV/PORT_INDEX\n"); pr_err(" devlink port function set DEV/PORT_INDEX [ hw_addr ADDR ] [ state { active | inactive } ]\n"); - pr_err(" [ roce { enable | disable } ]\n"); + pr_err(" [ roce { enable | disable } ] [ migratable { enable | disable } ]\n"); pr_err(" devlink port function rate { help | show | add | del | set }\n"); pr_err(" devlink port param set DEV/PORT_INDEX name PARAMETER value VALUE cmode { permanent | driverinit | runtime }\n"); pr_err(" devlink port param show [DEV/PORT_INDEX name PARAMETER]\n"); @@ -4527,6 +4539,10 @@ static void pr_out_port_function(struct dl *dl, struct nlattr **tb_port) print_string(PRINT_ANY, "roce", " roce %s", port_fn_caps->value & DEVLINK_PORT_FN_CAP_ROCE ? "enable" : "disable"); + if (port_fn_caps->selector & DEVLINK_PORT_FN_CAP_MIGRATABLE) + print_string(PRINT_ANY, "migratable", " migratable %s", + port_fn_caps->value & DEVLINK_PORT_FN_CAP_MIGRATABLE ? + "enable" : "disable"); } if (!dl->json_output) @@ -4722,7 +4738,7 @@ static int cmd_port_param_show(struct dl *dl) static void cmd_port_function_help(void) { pr_err("Usage: devlink port function set DEV/PORT_INDEX [ hw_addr ADDR ] [ state STATE ]\n"); - pr_err(" [ roce { enable | disable } ]\n"); + pr_err(" [ roce { enable | disable } ] [ migratable { enable | disable } ]\n"); pr_err(" devlink port function rate { help | show | add | del | set }\n"); } From patchwork Sun Dec 11 11:58:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shay Drori X-Patchwork-Id: 13070575 X-Patchwork-Delegate: dsahern@gmail.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 24DF6C4332F for ; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Dec 2022 11:59:08.3202 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9cd503e9-9808-4727-e0a1-08dadb6f1c09 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT086.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB6175 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: dsahern@gmail.com New port function attributes roce and migratable were added. Update the man page for devlink-port to account for new attributes. Signed-off-by: Shay Drory Reviewed-by: Moshe Shemesh --- man/man8/devlink-port.8 | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/man/man8/devlink-port.8 b/man/man8/devlink-port.8 index e668d0a2..56049f73 100644 --- a/man/man8/devlink-port.8 +++ b/man/man8/devlink-port.8 @@ -71,6 +71,12 @@ devlink-port \- devlink port configuration .RI "[ " .BR state " { " active " | " inactive " }" .RI "]" +.RI "[ " +.BR roce " { " enable " | " disable " }" +.RI "]" +.RI "[ " +.BR migratable " { " enable " | " disable " }" +.RI "]" .ti -8 .BR "devlink port function rate " @@ -208,6 +214,14 @@ New state of the function to change to. .I inactive - To inactivate the function and its device(s), set to inactive. +.TP +.BR roce " { " enable " | " disable " } " +Set the RoCE capability of the function. + +.TP +.BR migratable " { " enable " | " disable " } " +Set the migratable capability of the function. + .ti -8 .SS devlink port del - delete a devlink port .PP @@ -327,6 +341,16 @@ Deactivate the function. This will initiate the function teardown which results in driver unload and device removal. .RE .PP +devlink port function set pci/0000:01:00.0/1 roce enable +.RS 4 +This will enable the RoCE functionality of the function. +.RE +.PP +devlink port function set pci/0000:01:00.0/1 migratable enable +.RS 4 +This will enable the migratable functionality of the function. +.RE +.PP devlink port function set pci/0000:01:00.0/1 hw_addr 00:00:00:11:22:33 state active .RS 4 Configure hardware address and also active the function. When a function is