From patchwork Mon Dec 12 16:41:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13071235 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 31DB8C4332F for ; Mon, 12 Dec 2022 16:38:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=BvePvUKxxA+KfLpHpbCSztpuh88mKrsGTuLcDCOL/1s=; b=yO5wNlJRloxIXl zWv2F1pBKeodvgL39atRayhe6RwoAo6RwgoDoVXUYlicxIN9NfDVlSc8I6pQSIflnroH0ah3IHSJE g8rs5TzzXFVbMo6GDLLNAcSJj5Q/fpc/UukSM41C5ZdOUrKjz4TGj3tSM+9Eiu4LedHo5nC/DJR96 LSx9nIuRJxdCvm/BAGsx/BylUNjpD5Mw/zQX6y77vzida7xgDASybHeBoFfThlW01USxT4wwUgOcn 9kIB2NmZlNJFxJnL1HOQTJeNf8Uoz6iu7AjkvbAbr4Udp9AYUxdaLlWncENL9JbLM/bbMLaT/fppw 3EKcRI2Z0jRSPsat5oOA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1p4lnZ-002AWz-1z; Mon, 12 Dec 2022 16:37:01 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1p4lnI-0029zD-AC for linux-arm-kernel@lists.infradead.org; Mon, 12 Dec 2022 16:36:48 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1670863004; x=1702399004; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=pAKxK37YXhqrsUkc+3DMZ5ZEleN2hTTXdA9Gs5kqlbU=; b=bD5LLw35Or480Ga6ROtAWtUj2YAFUbiashuW3OMPKrF0slb90hK8FfgD NGLv/ZiEaWG+bAlXZd+xeWeJcPpGfiqrSVgiANP5LaR9xzxjnzxZnERQF JU9Dh/kwb8NVWeDgiXCT9il4Jn34N98lnFK0X5LDRLO1DnB8YcHYOCovc vBvUAGi4VPFY0pJLbEJBisamWBs7Y365mLBa27g9lTMKO9XhlKonXV/DU rcNR/rnDCokGUhsAv9kFIhIQCNFqADoBBvISNvWmqd72FtDpcB0NMA7d0 ASEm+AZoKNRvIDBcAyqKZ9Mk0rV6x3wXZlm3o2ZWz+j0ko38oHcXhQFeK Q==; X-IronPort-AV: E=Sophos;i="5.96,238,1665471600"; d="scan'208";a="127727121" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 12 Dec 2022 09:36:37 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.16; Mon, 12 Dec 2022 09:36:36 -0700 Received: from localhost.localdomain (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.16 via Frontend Transport; Mon, 12 Dec 2022 09:36:34 -0700 From: Claudiu Beznea To: , , , , , , , CC: , , , , Claudiu Beznea Subject: [PATCH v2 1/4] ASoC: dt-bindings: microchip: use proper naming syntax Date: Mon, 12 Dec 2022 18:41:50 +0200 Message-ID: <20221212164153.78677-2-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20221212164153.78677-1-claudiu.beznea@microchip.com> References: <20221212164153.78677-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221212_083644_943466_1088B101 X-CRM114-Status: UNSURE ( 9.07 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Use the following syntax for Microchip ASoC YAML files: vendor,device.yaml Signed-off-by: Claudiu Beznea --- .../bindings/sound/mchp,i2s-mcc.yaml | 108 ------------------ ...,pdmc.yaml => microchip,sama7g5-pdmc.yaml} | 0 ...rx.yaml => microchip,sama7g5-spdifrx.yaml} | 0 ...tx.yaml => microchip,sama7g5-spdiftx.yaml} | 0 4 files changed, 108 deletions(-) delete mode 100644 Documentation/devicetree/bindings/sound/mchp,i2s-mcc.yaml rename Documentation/devicetree/bindings/sound/{microchip,pdmc.yaml => microchip,sama7g5-pdmc.yaml} (100%) rename Documentation/devicetree/bindings/sound/{mchp,spdifrx.yaml => microchip,sama7g5-spdifrx.yaml} (100%) rename Documentation/devicetree/bindings/sound/{mchp,spdiftx.yaml => microchip,sama7g5-spdiftx.yaml} (100%) diff --git a/Documentation/devicetree/bindings/sound/mchp,i2s-mcc.yaml b/Documentation/devicetree/bindings/sound/mchp,i2s-mcc.yaml deleted file mode 100644 index 0481315cb5f2..000000000000 --- a/Documentation/devicetree/bindings/sound/mchp,i2s-mcc.yaml +++ /dev/null @@ -1,108 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/sound/mchp,i2s-mcc.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Microchip I2S Multi-Channel Controller - -maintainers: - - Codrin Ciubotariu - -description: - The I2SMCC complies with the Inter-IC Sound (I2S) bus specification and - supports a Time Division Multiplexed (TDM) interface with external - multi-channel audio codecs. It consists of a receiver, a transmitter and a - common clock generator that can be enabled separately to provide Adapter, - Client or Controller modes with receiver and/or transmitter active. - On later I2SMCC versions (starting with Microchip's SAMA7G5) I2S - multi-channel is supported by using multiple data pins, output and - input, without TDM. - -properties: - "#sound-dai-cells": - const: 0 - - compatible: - enum: - - microchip,sam9x60-i2smcc - - microchip,sama7g5-i2smcc - - reg: - maxItems: 1 - - interrupts: - maxItems: 1 - - clocks: - items: - - description: Peripheral Bus Clock - - description: Generic Clock (Optional). Should be set mostly when Master - Mode is required. - minItems: 1 - - clock-names: - items: - - const: pclk - - const: gclk - minItems: 1 - - dmas: - items: - - description: TX DMA Channel - - description: RX DMA Channel - - dma-names: - items: - - const: tx - - const: rx - - microchip,tdm-data-pair: - description: - Represents the DIN/DOUT pair pins that are used to receive/send - TDM data. It is optional and it is only needed if the controller - uses the TDM mode. - $ref: /schemas/types.yaml#/definitions/uint8 - enum: [0, 1, 2, 3] - default: 0 - -if: - properties: - compatible: - const: microchip,sam9x60-i2smcc -then: - properties: - microchip,tdm-data-pair: false - -required: - - "#sound-dai-cells" - - compatible - - reg - - interrupts - - clocks - - clock-names - - dmas - - dma-names - -additionalProperties: false - -examples: - - | - #include - #include - - i2s@f001c000 { - #sound-dai-cells = <0>; - compatible = "microchip,sam9x60-i2smcc"; - reg = <0xf001c000 0x100>; - interrupts = <34 IRQ_TYPE_LEVEL_HIGH 7>; - dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | - AT91_XDMAC_DT_PERID(36))>, - <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | - AT91_XDMAC_DT_PERID(37))>; - dma-names = "tx", "rx"; - clocks = <&i2s_clk>, <&i2s_gclk>; - clock-names = "pclk", "gclk"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2s_default>; - }; diff --git a/Documentation/devicetree/bindings/sound/microchip,pdmc.yaml b/Documentation/devicetree/bindings/sound/microchip,sama7g5-pdmc.yaml similarity index 100% rename from Documentation/devicetree/bindings/sound/microchip,pdmc.yaml rename to Documentation/devicetree/bindings/sound/microchip,sama7g5-pdmc.yaml diff --git a/Documentation/devicetree/bindings/sound/mchp,spdifrx.yaml b/Documentation/devicetree/bindings/sound/microchip,sama7g5-spdifrx.yaml similarity index 100% rename from Documentation/devicetree/bindings/sound/mchp,spdifrx.yaml rename to Documentation/devicetree/bindings/sound/microchip,sama7g5-spdifrx.yaml diff --git a/Documentation/devicetree/bindings/sound/mchp,spdiftx.yaml b/Documentation/devicetree/bindings/sound/microchip,sama7g5-spdiftx.yaml similarity index 100% rename from Documentation/devicetree/bindings/sound/mchp,spdiftx.yaml rename to Documentation/devicetree/bindings/sound/microchip,sama7g5-spdiftx.yaml From patchwork Mon Dec 12 16:41:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13071236 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 36FD1C4332F for ; Mon, 12 Dec 2022 16:38:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=N0BOWdm7FiX+oezhBi2xo8tccscSYDa0pjQuxF5sS04=; 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b=TnCjSjtM+LlSgj8k92KzsNvAI/7pNsmvu96sQsSH7RL1OKn7y/uTTx+U aFGQ/vHw8EJ4C6gngSe5G+QdOEW8U2iGFggYgwZXM9VCbaRWTMBPa+oH5 MX1lfOmfhDs09HnZg8RLz/Tx4+DaW84ykLT4qv5xevkPT8rVWJJUyGqeh j2reULgyMBJAOJQJvRyLgnDLj9tvkEPDvZYCHadpPr1FTxX4grE/AYTaX dETgP+5NcMsleb/LHT946RtW73mj765dA0q56ot+K6nut+b6Umd+63ZsC XYd/hfUtuOCsORjyKMROUvEFjkfTzXcEMpwdzzTvNwPGnKNk1ib62udG5 g==; X-IronPort-AV: E=Sophos;i="5.96,238,1665471600"; d="scan'208";a="192738381" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 12 Dec 2022 09:36:40 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.16; Mon, 12 Dec 2022 09:36:40 -0700 Received: from localhost.localdomain (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.16 via Frontend Transport; Mon, 12 Dec 2022 09:36:37 -0700 From: Claudiu Beznea To: , , , , , , , CC: , , , , Claudiu Beznea Subject: [PATCH v2 2/4] ASoC: mchp-pdmc: use runtime pm for clock power saving Date: Mon, 12 Dec 2022 18:41:51 +0200 Message-ID: <20221212164153.78677-3-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20221212164153.78677-1-claudiu.beznea@microchip.com> References: <20221212164153.78677-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221212_083646_907663_D2FEAFF3 X-CRM114-Status: GOOD ( 19.62 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Implement clock power saving taking advantage of runtime PM infrastructure. This simplifies the code and allow using the same infrastructure for suspend to RAM functionalities. Signed-off-by: Claudiu Beznea --- sound/soc/atmel/mchp-pdmc.c | 126 ++++++++++++++++++++++++------------ 1 file changed, 84 insertions(+), 42 deletions(-) diff --git a/sound/soc/atmel/mchp-pdmc.c b/sound/soc/atmel/mchp-pdmc.c index 44aefbd5b62c..f184404e74e5 100644 --- a/sound/soc/atmel/mchp-pdmc.c +++ b/sound/soc/atmel/mchp-pdmc.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include @@ -115,7 +116,6 @@ struct mchp_pdmc { int mic_no; int sinc_order; bool audio_filter_en; - u8 gclk_enabled:1; }; static const char *const mchp_pdmc_sinc_filter_order_text[] = { @@ -454,13 +454,6 @@ static int mchp_pdmc_startup(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) { struct mchp_pdmc *dd = snd_soc_dai_get_drvdata(dai); - int ret; - - ret = clk_prepare_enable(dd->pclk); - if (ret) { - dev_err(dd->dev, "failed to enable the peripheral clock: %d\n", ret); - return ret; - } regmap_write(dd->regmap, MCHP_PDMC_CR, MCHP_PDMC_CR_SWRST); @@ -470,14 +463,6 @@ static int mchp_pdmc_startup(struct snd_pcm_substream *substream, return 0; } -static void mchp_pdmc_shutdown(struct snd_pcm_substream *substream, - struct snd_soc_dai *dai) -{ - struct mchp_pdmc *dd = snd_soc_dai_get_drvdata(dai); - - clk_disable_unprepare(dd->pclk); -} - static int mchp_pdmc_dai_probe(struct snd_soc_dai *dai) { struct mchp_pdmc *dd = snd_soc_dai_get_drvdata(dai); @@ -594,11 +579,6 @@ static int mchp_pdmc_hw_params(struct snd_pcm_substream *substream, cfgr_val |= MCHP_PDMC_CFGR_BSSEL(i); } - if (dd->gclk_enabled) { - clk_disable_unprepare(dd->gclk); - dd->gclk_enabled = 0; - } - for (osr_start = dd->audio_filter_en ? 64 : 8; osr_start <= 256 && best_diff_rate; osr_start *= 2) { long round_rate; @@ -620,8 +600,12 @@ static int mchp_pdmc_hw_params(struct snd_pcm_substream *substream, return -EINVAL; } + /* CLK is enabled by runtime PM. */ + clk_disable_unprepare(dd->gclk); + /* set the rate */ ret = clk_set_rate(dd->gclk, gclk_rate); + clk_prepare_enable(dd->gclk); if (ret) { dev_err(comp->dev, "unable to set rate %lu to GCLK: %d\n", gclk_rate, ret); @@ -636,9 +620,6 @@ static int mchp_pdmc_hw_params(struct snd_pcm_substream *substream, mr_val |= MCHP_PDMC_MR_CHUNK(dd->addr.maxburst); dev_dbg(comp->dev, "maxburst set to %d\n", dd->addr.maxburst); - clk_prepare_enable(dd->gclk); - dd->gclk_enabled = 1; - snd_soc_component_update_bits(comp, MCHP_PDMC_MR, MCHP_PDMC_MR_OSR_MASK | MCHP_PDMC_MR_SINCORDER_MASK | @@ -650,19 +631,6 @@ static int mchp_pdmc_hw_params(struct snd_pcm_substream *substream, return 0; } -static int mchp_pdmc_hw_free(struct snd_pcm_substream *substream, - struct snd_soc_dai *dai) -{ - struct mchp_pdmc *dd = snd_soc_dai_get_drvdata(dai); - - if (dd->gclk_enabled) { - clk_disable_unprepare(dd->gclk); - dd->gclk_enabled = 0; - } - - return 0; -} - static int mchp_pdmc_trigger(struct snd_pcm_substream *substream, int cmd, struct snd_soc_dai *dai) { @@ -711,9 +679,7 @@ static int mchp_pdmc_trigger(struct snd_pcm_substream *substream, static const struct snd_soc_dai_ops mchp_pdmc_dai_ops = { .set_fmt = mchp_pdmc_set_fmt, .startup = mchp_pdmc_startup, - .shutdown = mchp_pdmc_shutdown, .hw_params = mchp_pdmc_hw_params, - .hw_free = mchp_pdmc_hw_free, .trigger = mchp_pdmc_trigger, }; @@ -864,6 +830,7 @@ static const struct regmap_config mchp_pdmc_regmap_config = { .readable_reg = mchp_pdmc_readable_reg, .writeable_reg = mchp_pdmc_writeable_reg, .precious_reg = mchp_pdmc_precious_reg, + .cache_type = REGCACHE_FLAT, }; static int mchp_pdmc_dt_init(struct mchp_pdmc *dd) @@ -970,6 +937,49 @@ static struct snd_dmaengine_pcm_config mchp_pdmc_config = { .prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config, }; +static int mchp_pdmc_runtime_suspend(struct device *dev) +{ + struct mchp_pdmc *dd = dev_get_drvdata(dev); + + regcache_cache_only(dd->regmap, true); + + clk_disable_unprepare(dd->gclk); + clk_disable_unprepare(dd->pclk); + + return 0; +} + +static int mchp_pdmc_runtime_resume(struct device *dev) +{ + struct mchp_pdmc *dd = dev_get_drvdata(dev); + int ret; + + ret = clk_prepare_enable(dd->pclk); + if (ret) { + dev_err(dd->dev, + "failed to enable the peripheral clock: %d\n", ret); + return ret; + } + ret = clk_prepare_enable(dd->gclk); + if (ret) { + dev_err(dd->dev, + "failed to enable generic clock: %d\n", ret); + goto disable_pclk; + } + + regcache_cache_only(dd->regmap, false); + regcache_mark_dirty(dd->regmap); + ret = regcache_sync(dd->regmap); + if (ret) { + regcache_cache_only(dd->regmap, true); + clk_disable_unprepare(dd->gclk); +disable_pclk: + clk_disable_unprepare(dd->pclk); + } + + return ret; +} + static int mchp_pdmc_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -1039,18 +1049,25 @@ static int mchp_pdmc_probe(struct platform_device *pdev) dd->addr.addr = (dma_addr_t)res->start + MCHP_PDMC_RHR; platform_set_drvdata(pdev, dd); + pm_runtime_enable(dd->dev); + if (!pm_runtime_enabled(dd->dev)) { + ret = mchp_pdmc_runtime_resume(dd->dev); + if (ret) + return ret; + } + /* register platform */ ret = devm_snd_dmaengine_pcm_register(dev, &mchp_pdmc_config, 0); if (ret) { dev_err(dev, "could not register platform: %d\n", ret); - return ret; + goto pm_runtime_suspend; } ret = devm_snd_soc_register_component(dev, &mchp_pdmc_dai_component, &mchp_pdmc_dai, 1); if (ret) { dev_err(dev, "could not register CPU DAI: %d\n", ret); - return ret; + goto pm_runtime_suspend; } /* print IP version */ @@ -1059,6 +1076,25 @@ static int mchp_pdmc_probe(struct platform_device *pdev) version & MCHP_PDMC_VER_VERSION); return 0; + +pm_runtime_suspend: + if (!pm_runtime_status_suspended(dd->dev)) + mchp_pdmc_runtime_suspend(dd->dev); + pm_runtime_disable(dd->dev); + + return ret; +} + +static int mchp_pdmc_remove(struct platform_device *pdev) +{ + struct mchp_pdmc *dd = platform_get_drvdata(pdev); + + if (!pm_runtime_status_suspended(dd->dev)) + mchp_pdmc_runtime_suspend(dd->dev); + + pm_runtime_disable(dd->dev); + + return 0; } static const struct of_device_id mchp_pdmc_of_match[] = { @@ -1070,13 +1106,19 @@ static const struct of_device_id mchp_pdmc_of_match[] = { }; MODULE_DEVICE_TABLE(of, mchp_pdmc_of_match); +static const struct dev_pm_ops mchp_pdmc_pm_ops = { + RUNTIME_PM_OPS(mchp_pdmc_runtime_suspend, mchp_pdmc_runtime_resume, + NULL) +}; + static struct platform_driver mchp_pdmc_driver = { .driver = { .name = "mchp-pdmc", .of_match_table = of_match_ptr(mchp_pdmc_of_match), - .pm = &snd_soc_pm_ops, + .pm = pm_ptr(&mchp_pdmc_pm_ops), }, .probe = mchp_pdmc_probe, + .remove = mchp_pdmc_remove, }; module_platform_driver(mchp_pdmc_driver); From patchwork Mon Dec 12 16:41:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13071237 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A4CC2C4332F for ; Mon, 12 Dec 2022 16:38:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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Mon, 12 Dec 2022 09:36:40 -0700 From: Claudiu Beznea To: , , , , , , , CC: , , , , Claudiu Beznea Subject: [PATCH v2 3/4] ASoC: mchp-pdmc: add support for suspend to RAM Date: Mon, 12 Dec 2022 18:41:52 +0200 Message-ID: <20221212164153.78677-4-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20221212164153.78677-1-claudiu.beznea@microchip.com> References: <20221212164153.78677-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221212_083648_761706_420AD41C X-CRM114-Status: GOOD ( 12.04 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add support for suspend to RAM by re-aranging the lines in switch..case from mchp_pdmc_trigger() and saving/restoring the enabled interrupts. These are necessary as AT91 devices has a special power saving mode (called backup and self-refresh) where most of the SoC parts are powered off and thus we need to reconfigure the PDMC on resume. Signed-off-by: Claudiu Beznea --- sound/soc/atmel/mchp-pdmc.c | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/sound/soc/atmel/mchp-pdmc.c b/sound/soc/atmel/mchp-pdmc.c index f184404e74e5..cf4084dcbd5e 100644 --- a/sound/soc/atmel/mchp-pdmc.c +++ b/sound/soc/atmel/mchp-pdmc.c @@ -113,6 +113,7 @@ struct mchp_pdmc { struct clk *pclk; struct clk *gclk; u32 pdmcen; + u32 suspend_irq; int mic_no; int sinc_order; bool audio_filter_en; @@ -641,22 +642,27 @@ static int mchp_pdmc_trigger(struct snd_pcm_substream *substream, #endif switch (cmd) { - case SNDRV_PCM_TRIGGER_START: case SNDRV_PCM_TRIGGER_RESUME: - case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + case SNDRV_PCM_TRIGGER_START: /* Enable overrun and underrun error interrupts */ - regmap_write(dd->regmap, MCHP_PDMC_IER, + regmap_write(dd->regmap, MCHP_PDMC_IER, dd->suspend_irq | MCHP_PDMC_IR_RXOVR | MCHP_PDMC_IR_RXUDR); + dd->suspend_irq = 0; + fallthrough; + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: snd_soc_component_update_bits(cpu, MCHP_PDMC_MR, MCHP_PDMC_MR_PDMCEN_MASK, dd->pdmcen); break; - case SNDRV_PCM_TRIGGER_STOP: case SNDRV_PCM_TRIGGER_SUSPEND: - case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + regmap_read(dd->regmap, MCHP_PDMC_IMR, &dd->suspend_irq); + fallthrough; + case SNDRV_PCM_TRIGGER_STOP: /* Disable overrun and underrun error interrupts */ - regmap_write(dd->regmap, MCHP_PDMC_IDR, + regmap_write(dd->regmap, MCHP_PDMC_IDR, dd->suspend_irq | MCHP_PDMC_IR_RXOVR | MCHP_PDMC_IR_RXUDR); + fallthrough; + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: snd_soc_component_update_bits(cpu, MCHP_PDMC_MR, MCHP_PDMC_MR_PDMCEN_MASK, 0); break; @@ -1107,6 +1113,7 @@ static const struct of_device_id mchp_pdmc_of_match[] = { MODULE_DEVICE_TABLE(of, mchp_pdmc_of_match); static const struct dev_pm_ops mchp_pdmc_pm_ops = { + SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, pm_runtime_force_resume) RUNTIME_PM_OPS(mchp_pdmc_runtime_suspend, mchp_pdmc_runtime_resume, NULL) }; From patchwork Mon Dec 12 16:41:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13071255 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 852EDC4332F for ; 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12 Dec 2022 09:36:47 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.16; Mon, 12 Dec 2022 09:36:46 -0700 Received: from localhost.localdomain (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.16 via Frontend Transport; Mon, 12 Dec 2022 09:36:43 -0700 From: Claudiu Beznea To: , , , , , , , CC: , , , , Claudiu Beznea Subject: [PATCH v2 4/4] ASoC: mchp-spdiftx: use FIELD_PREP() where possible Date: Mon, 12 Dec 2022 18:41:53 +0200 Message-ID: <20221212164153.78677-5-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20221212164153.78677-1-claudiu.beznea@microchip.com> References: <20221212164153.78677-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221212_083649_512845_1EC3802E X-CRM114-Status: UNSURE ( 8.30 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Use FIELD_PREP() in macro definitions. Signed-off-by: Claudiu Beznea --- sound/soc/atmel/mchp-spdiftx.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/sound/soc/atmel/mchp-spdiftx.c b/sound/soc/atmel/mchp-spdiftx.c index dc96a6fbf514..20d135c718b0 100644 --- a/sound/soc/atmel/mchp-spdiftx.c +++ b/sound/soc/atmel/mchp-spdiftx.c @@ -6,6 +6,7 @@ // // Author: Codrin Ciubotariu +#include #include #include #include @@ -71,11 +72,11 @@ /* Valid Bits per Sample */ #define SPDIFTX_MR_VBPS_MASK GENMASK(13, 8) -#define SPDIFTX_MR_VBPS(bps) (((bps) << 8) & SPDIFTX_MR_VBPS_MASK) +#define SPDIFTX_MR_VBPS(bps) FIELD_PREP(SPDIFTX_MR_VBPS_MASK, bps) /* Chunk Size */ #define SPDIFTX_MR_CHUNK_MASK GENMASK(19, 16) -#define SPDIFTX_MR_CHUNK(size) (((size) << 16) & SPDIFTX_MR_CHUNK_MASK) +#define SPDIFTX_MR_CHUNK(size) FIELD_PREP(SPDIFTX_MR_CHUNK_MASK, size) /* Validity Bits for Channels 1 and 2 */ #define SPDIFTX_MR_VALID1 BIT(24) @@ -88,8 +89,7 @@ /* Bytes per Sample */ #define SPDIFTX_MR_BPS_MASK GENMASK(29, 28) -#define SPDIFTX_MR_BPS(bytes) \ - ((((bytes) - 1) << 28) & SPDIFTX_MR_BPS_MASK) +#define SPDIFTX_MR_BPS(bytes) FIELD_PREP(SPDIFTX_MR_BPS_MASK, (bytes - 1)) /* * ---- Interrupt Enable/Disable/Mask/Status Register (Write/Read-only) ----