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[71.184.142.128]) by smtp.gmail.com with ESMTPSA id fa11-20020a05622a4ccb00b003a7e8ab2972sm2192823qtb.23.2022.12.16.15.28.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Dec 2022 15:28:47 -0800 (PST) From: Eric Chanudet To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Andrew Halaney , Brian Masney , Eric Chanudet Subject: [PATCH v3 1/4] arm64: dts: qcom: rename pm8450a dtsi to sa8540p-pmics Date: Fri, 16 Dec 2022 18:26:03 -0500 Message-Id: <20221216232606.2123341-2-echanude@redhat.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221216232606.2123341-1-echanude@redhat.com> References: <20221216232606.2123341-1-echanude@redhat.com> MIME-Version: 1.0 Content-type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org pm8450a.dtsi was introduced for the descriptions of sa8540p based boards. Rename the dtsi to make this relationship explicit. Signed-off-by: Eric Chanudet Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/{pm8450a.dtsi => sa8540p-pmics.dtsi} | 0 arch/arm64/boot/dts/qcom/sa8540p-ride.dts | 2 +- 2 files changed, 1 insertion(+), 1 deletion(-) rename arch/arm64/boot/dts/qcom/{pm8450a.dtsi => sa8540p-pmics.dtsi} (100%) diff --git a/arch/arm64/boot/dts/qcom/pm8450a.dtsi b/arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi similarity index 100% rename from arch/arm64/boot/dts/qcom/pm8450a.dtsi rename to arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi diff --git a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts index 6c547f1b13dc..77d499702ea8 100644 --- a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts +++ b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts @@ -10,7 +10,7 @@ #include #include "sa8540p.dtsi" -#include "pm8450a.dtsi" +#include "sa8540p-pmics.dtsi" / { model = "Qualcomm SA8540P Ride"; From patchwork Fri Dec 16 23:26:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eric Chanudet X-Patchwork-Id: 13075633 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 71D92C3DA6E for ; Fri, 16 Dec 2022 23:29:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230193AbiLPX3x (ORCPT ); Fri, 16 Dec 2022 18:29:53 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52076 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230143AbiLPX3r (ORCPT ); Fri, 16 Dec 2022 18:29:47 -0500 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8C81C67DAB for ; Fri, 16 Dec 2022 15:28:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1671233334; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=w4BtxFD6uNzaoOu9bZx/kJ3U6ajtggeXtCvgnndPkQ4=; b=gtC3kY+I3FSeEapjs5kupiAUhA8usHX6ESrKi90BbCz+ELqQQfuZmFtKKDJJnLVHkrmdRo yg7o18+VQItAqIoaeBfLzJAKorSK/Mkc8h5nwxOUooQNniEfXVdhEiqMRnb7Hzo+uu58lm iw8F8oP3C12uag/RML69b0dh7yO46tM= Received: from mail-qk1-f198.google.com (mail-qk1-f198.google.com [209.85.222.198]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_128_GCM_SHA256) id us-mta-623-ewZT1plONe2GYhuyDXtF4g-1; Fri, 16 Dec 2022 18:28:53 -0500 X-MC-Unique: ewZT1plONe2GYhuyDXtF4g-1 Received: by mail-qk1-f198.google.com with SMTP id x2-20020a05620a448200b006fa7dad5c1cso2945142qkp.10 for ; Fri, 16 Dec 2022 15:28:53 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=w4BtxFD6uNzaoOu9bZx/kJ3U6ajtggeXtCvgnndPkQ4=; b=QTijM84SWs9lpKfD++sioeD3KRm37Ok71uJwQ7gnON0Dqzug+Tn+r/07+pTsI8FBa8 04RAWuHsorMLfeQaN4G1GDKcET+y0GJKYz9HsKeLz9iKYpaPVJRPpIYB8S1fPEbhTrdO zAX6Bd4jkGdQKy+Zxpq9q1BkFp0OMvnVg3oawA36wrJIeM2yFvLMa8OkHbWZJGv3zMEN ISmuIl7Hjj26Bv31GMbyzpo1zISMynVOt2nnT0CR4xCSFaijDAovOBz14ClBNUlEqgL/ 92ftk4GC/+Qkx0CCeFMOmYjHLEE8U9UVLZRiC8LXGakjmww69Kj5BED8UAT/RO6ZMhbm aWLg== X-Gm-Message-State: ANoB5pnYF5iWvtI7rWyUdI4W+AR6v4qW3PPIuNeGKZl+lFDRj4QSOSHT +zEyrTeW2HOIEbS1uOpiIFGsGWuyQAnXqmmftKxutBus25MdEuA8MRMETC699TmqrsFt9hR0IMl +ieEbnxq8n29YHAkwiVAdaKslAg== X-Received: by 2002:a05:622a:148:b0:3a8:1ac5:47bd with SMTP id v8-20020a05622a014800b003a81ac547bdmr36216437qtw.32.1671233333129; Fri, 16 Dec 2022 15:28:53 -0800 (PST) X-Google-Smtp-Source: AA0mqf6FF85AlZ+J5JHnYn9fJoJI25V9d1BEBcI2Vkwmh/LiZ4jpUW+xSFo6Z7eZab53j/NxMYWslg== X-Received: by 2002:a05:622a:148:b0:3a8:1ac5:47bd with SMTP id v8-20020a05622a014800b003a81ac547bdmr36216413qtw.32.1671233332918; Fri, 16 Dec 2022 15:28:52 -0800 (PST) Received: from localhost (pool-71-184-142-128.bstnma.fios.verizon.net. [71.184.142.128]) by smtp.gmail.com with ESMTPSA id a16-20020ac81090000000b003a82ca4e81csm2043298qtj.80.2022.12.16.15.28.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Dec 2022 15:28:51 -0800 (PST) From: Eric Chanudet To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Andrew Halaney , Brian Masney , Eric Chanudet Subject: [PATCH v3 2/4] arm64: dts: qcom: sa8450p-pmics: add rtc node Date: Fri, 16 Dec 2022 18:26:04 -0500 Message-Id: <20221216232606.2123341-3-echanude@redhat.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221216232606.2123341-1-echanude@redhat.com> References: <20221216232606.2123341-1-echanude@redhat.com> MIME-Version: 1.0 Content-type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the rtc block on the first pmic to enable the rtc for sa8540p-ride. Signed-off-by: Eric Chanudet Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi b/arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi index 34fc72896761..c9b8da43b237 100644 --- a/arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi @@ -13,6 +13,14 @@ pm8450a: pmic@0 { #address-cells = <1>; #size-cells = <0>; + rtc@6000 { + compatible = "qcom,pm8941-rtc"; + reg = <0x6000>, <0x6100>; + reg-names = "rtc", "alarm"; + interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; + wakeup-source; + }; + pm8450a_gpios: gpio@c000 { compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio"; reg = <0xc000>; From patchwork Fri Dec 16 23:26:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eric Chanudet X-Patchwork-Id: 13075632 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C6E00C3DA6E for ; Fri, 16 Dec 2022 23:29:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230145AbiLPX3r (ORCPT ); Fri, 16 Dec 2022 18:29:47 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51874 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229789AbiLPX3q (ORCPT ); Fri, 16 Dec 2022 18:29:46 -0500 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A464729354 for ; Fri, 16 Dec 2022 15:28:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1671233337; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ZraKQ8zpXaq21f6Xh7MkKwT51QM1mBosAn+IIPTlXH0=; b=XSEBkj+OCitMlgS2gwB+CMUYyG56T8Z5WYnbyXNL+2b+or+l+IlmXmZTSirF1PbIDaMEUi FHHRkPATunt3wKC3+On55MJ3zNMfexLSk5vfUsaf/5nCgNCN1kjhUeZq2gpCC+NHHB6a0Q ymVT1pLFdg1tHLvkkHBGZRWvYtldHP8= Received: from mail-qt1-f199.google.com (mail-qt1-f199.google.com [209.85.160.199]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_128_GCM_SHA256) id us-mta-673-Pog60O2xMni1yMTRJhyYQQ-1; Fri, 16 Dec 2022 18:28:56 -0500 X-MC-Unique: Pog60O2xMni1yMTRJhyYQQ-1 Received: by mail-qt1-f199.google.com with SMTP id cm12-20020a05622a250c00b003a521f66e8eso2396473qtb.17 for ; Fri, 16 Dec 2022 15:28:56 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ZraKQ8zpXaq21f6Xh7MkKwT51QM1mBosAn+IIPTlXH0=; b=zS1BkOwMjqMUR9CFdSOzwGbGVT9M/MjcIm6AYsqo08Rt5l+4AxSAdpHyDpj5bt+NNs wVy0EBo2SDIlf2Aw/0/lO584pOnKM70AardzXbjlXWm3ClxxIQu74ptKdaj+wUbyPhw6 qmmzYlR/I/h56s344CYt7kFzrrLYOhtZk3mfh08YbNnpRTlcXeEb8V0M+yT1YfCd4wM2 0FVr4DHBfGfaiBOYBUzqiM72bgSv1kXfpLQHd8IGVdmGjCDj7zQZcVDY7x9hEToeWhdZ vBxAiCGxgXse40jxlFPgBGWZRc0nzbaRgY7uwni5cNKn2AvLSOdyKuKXUlxK5UhmCP8j Eh7g== X-Gm-Message-State: ANoB5pm716uZbZgJGA5NxBFrM1zltmp26zE/QYCmjK/LbIvGUgqY/RzG PKPwmH2+SYMPEkvF2O6hgabpe7HMaWTrb+HraSfjUT9k2IYxeomtui+b14a2kuzggLihSgjYCNe /nv7q/3syCJOkmrXYA014skucVw== X-Received: by 2002:a05:6214:5848:b0:4c7:1c71:e7da with SMTP id ml8-20020a056214584800b004c71c71e7damr43264478qvb.17.1671233335923; Fri, 16 Dec 2022 15:28:55 -0800 (PST) X-Google-Smtp-Source: AA0mqf4JAVWjbkYBvXicruCl97xmCX2tyHqRd2/+2yW1r+Sod2aNzAhammkHTIOpCR2Pn7/S3J8BSA== X-Received: by 2002:a05:6214:5848:b0:4c7:1c71:e7da with SMTP id ml8-20020a056214584800b004c71c71e7damr43264462qvb.17.1671233335708; Fri, 16 Dec 2022 15:28:55 -0800 (PST) Received: from localhost (pool-71-184-142-128.bstnma.fios.verizon.net. [71.184.142.128]) by smtp.gmail.com with ESMTPSA id z189-20020a3765c6000000b006f3e6933bacsm2349799qkb.113.2022.12.16.15.28.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Dec 2022 15:28:54 -0800 (PST) From: Eric Chanudet To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Andrew Halaney , Brian Masney , Eric Chanudet Subject: [PATCH v3 3/4] arm64: dts: qcom: sa8295p-adp: use sa8540p-pmics Date: Fri, 16 Dec 2022 18:26:05 -0500 Message-Id: <20221216232606.2123341-4-echanude@redhat.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221216232606.2123341-1-echanude@redhat.com> References: <20221216232606.2123341-1-echanude@redhat.com> MIME-Version: 1.0 Content-type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Include the dtsi to use a single pmic descriptions. Both sa8295p-adp and sa8540p-adp have the same spmi pmic apparently. Signed-off-by: Eric Chanudet Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sa8295p-adp.dts | 79 +----------------------- 1 file changed, 1 insertion(+), 78 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts index 84cb6f3eeb56..c8437efe8235 100644 --- a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts +++ b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts @@ -11,6 +11,7 @@ #include #include "sa8540p.dtsi" +#include "sa8540p-pmics.dtsi" / { model = "Qualcomm SA8295P ADP"; @@ -260,84 +261,6 @@ &remoteproc_nsp1 { status = "okay"; }; -&spmi_bus { - pm8450a: pmic@0 { - compatible = "qcom,pm8150", "qcom,spmi-pmic"; - reg = <0x0 SPMI_USID>; - #address-cells = <1>; - #size-cells = <0>; - - rtc@6000 { - compatible = "qcom,pm8941-rtc"; - reg = <0x6000>; - reg-names = "rtc", "alarm"; - interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; - wakeup-source; - }; - - pm8450a_gpios: gpio@c000 { - compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio"; - reg = <0xc000>; - gpio-controller; - gpio-ranges = <&pm8450a_gpios 0 0 10>; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - }; - - pm8450c: pmic@4 { - compatible = "qcom,pm8150", "qcom,spmi-pmic"; - reg = <0x4 SPMI_USID>; - #address-cells = <1>; - #size-cells = <0>; - - pm8450c_gpios: gpio@c000 { - compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio"; - reg = <0xc000>; - gpio-controller; - gpio-ranges = <&pm8450c_gpios 0 0 10>; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - }; - - pm8450e: pmic@8 { - compatible = "qcom,pm8150", "qcom,spmi-pmic"; - reg = <0x8 SPMI_USID>; - #address-cells = <1>; - #size-cells = <0>; - - pm8450e_gpios: gpio@c000 { - compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio"; - reg = <0xc000>; - gpio-controller; - gpio-ranges = <&pm8450e_gpios 0 0 10>; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - }; - - pm8450g: pmic@c { - compatible = "qcom,pm8150", "qcom,spmi-pmic"; - reg = <0xc SPMI_USID>; - #address-cells = <1>; - #size-cells = <0>; - - pm8450g_gpios: gpio@c000 { - compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio"; - reg = <0xc000>; - gpio-controller; - gpio-ranges = <&pm8450g_gpios 0 0 10>; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - }; -}; - &ufs_mem_hc { reset-gpios = <&tlmm 228 GPIO_ACTIVE_LOW>; From patchwork Fri Dec 16 23:26:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eric Chanudet X-Patchwork-Id: 13075634 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D9E04C4332F for ; Fri, 16 Dec 2022 23:29:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230160AbiLPX36 (ORCPT ); Fri, 16 Dec 2022 18:29:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51548 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230173AbiLPX3x (ORCPT ); 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[71.184.142.128]) by smtp.gmail.com with ESMTPSA id p12-20020ac8460c000000b003a7ef7a758dsm2099936qtn.59.2022.12.16.15.28.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Dec 2022 15:28:59 -0800 (PST) From: Eric Chanudet To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Andrew Halaney , Brian Masney , Eric Chanudet Subject: [PATCH v3 4/4] arm64: dts: qcom: pm8941-rtc add alarm register Date: Fri, 16 Dec 2022 18:26:06 -0500 Message-Id: <20221216232606.2123341-5-echanude@redhat.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221216232606.2123341-1-echanude@redhat.com> References: <20221216232606.2123341-1-echanude@redhat.com> MIME-Version: 1.0 Content-type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org A few descriptions including a qcom,pm8941-rtc describe two reg-names for the "rtc" and "alarm" register banks, but only one offset. For consistency with reg-names, add the "alarm" register offset. No functional change is expected from this. Signed-off-by: Eric Chanudet Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/pm8150.dtsi | 2 +- arch/arm64/boot/dts/qcom/pm8916.dtsi | 3 ++- arch/arm64/boot/dts/qcom/pm8950.dtsi | 2 +- arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi | 2 +- arch/arm64/boot/dts/qcom/pmp8074.dtsi | 2 +- arch/arm64/boot/dts/qcom/pms405.dtsi | 2 +- 6 files changed, 7 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/pm8150.dtsi b/arch/arm64/boot/dts/qcom/pm8150.dtsi index 574fa95a2871..db90c55fa2cf 100644 --- a/arch/arm64/boot/dts/qcom/pm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/pm8150.dtsi @@ -121,7 +121,7 @@ pm8150_adc_tm: adc-tm@3500 { rtc@6000 { compatible = "qcom,pm8941-rtc"; - reg = <0x6000>; + reg = <0x6000>, <0x6100>; reg-names = "rtc", "alarm"; interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; }; diff --git a/arch/arm64/boot/dts/qcom/pm8916.dtsi b/arch/arm64/boot/dts/qcom/pm8916.dtsi index 08f9ca006e72..e2a6b66d8847 100644 --- a/arch/arm64/boot/dts/qcom/pm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/pm8916.dtsi @@ -93,7 +93,8 @@ adc-chan@f { rtc@6000 { compatible = "qcom,pm8941-rtc"; - reg = <0x6000>; + reg = <0x6000>, <0x6100>; + reg-names = "rtc", "alarm"; interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>; }; diff --git a/arch/arm64/boot/dts/qcom/pm8950.dtsi b/arch/arm64/boot/dts/qcom/pm8950.dtsi index 07c3896bd36f..d7df4ad60509 100644 --- a/arch/arm64/boot/dts/qcom/pm8950.dtsi +++ b/arch/arm64/boot/dts/qcom/pm8950.dtsi @@ -126,7 +126,7 @@ xo-therm-buf@3c { rtc@6000 { compatible = "qcom,pm8941-rtc"; - reg = <0x6000>; + reg = <0x6000>, <0x6100>; reg-names = "rtc", "alarm"; interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; }; diff --git a/arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi b/arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi index 20c5d60c8c2c..ee1e428d3a6e 100644 --- a/arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi +++ b/arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi @@ -108,7 +108,7 @@ pmm8155au_1_adc_tm: adc-tm@3500 { pmm8155au_1_rtc: rtc@6000 { compatible = "qcom,pm8941-rtc"; - reg = <0x6000>; + reg = <0x6000>, <0x6100>; reg-names = "rtc", "alarm"; interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; diff --git a/arch/arm64/boot/dts/qcom/pmp8074.dtsi b/arch/arm64/boot/dts/qcom/pmp8074.dtsi index ceb2e6358b3d..580684411d74 100644 --- a/arch/arm64/boot/dts/qcom/pmp8074.dtsi +++ b/arch/arm64/boot/dts/qcom/pmp8074.dtsi @@ -74,7 +74,7 @@ vph-pwr@131 { pmp8074_rtc: rtc@6000 { compatible = "qcom,pm8941-rtc"; - reg = <0x6000>; + reg = <0x6000>, <0x6100>; reg-names = "rtc", "alarm"; interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; allow-set-time; diff --git a/arch/arm64/boot/dts/qcom/pms405.dtsi b/arch/arm64/boot/dts/qcom/pms405.dtsi index ffe9e33808d0..22edb47c6a84 100644 --- a/arch/arm64/boot/dts/qcom/pms405.dtsi +++ b/arch/arm64/boot/dts/qcom/pms405.dtsi @@ -125,7 +125,7 @@ xo_therm: xo_temp@76 { rtc@6000 { compatible = "qcom,pm8941-rtc"; - reg = <0x6000>; + reg = <0x6000>, <0x6100>; reg-names = "rtc", "alarm"; interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; };