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[71.184.142.128]) by smtp.gmail.com with ESMTPSA id c25-20020a05620a269900b006fc447eebe5sm7614948qkp.27.2022.12.19.11.12.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Dec 2022 11:12:01 -0800 (PST) From: Eric Chanudet To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Andrew Halaney , Brian Masney , Eric Chanudet Subject: [PATCH v4 1/4] arm64: dts: qcom: rename pm8450a dtsi to sa8540p-pmics Date: Mon, 19 Dec 2022 14:09:58 -0500 Message-Id: <20221219191000.2570545-2-echanude@redhat.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221219191000.2570545-1-echanude@redhat.com> References: <20221219191000.2570545-1-echanude@redhat.com> MIME-Version: 1.0 Content-type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org pm8450a.dtsi was introduced for the descriptions of pmics used on sa8540p based boards. Rename the dtsi to make this relationship explicit. Signed-off-by: Eric Chanudet Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/{pm8450a.dtsi => sa8540p-pmics.dtsi} | 0 arch/arm64/boot/dts/qcom/sa8540p-ride.dts | 2 +- 2 files changed, 1 insertion(+), 1 deletion(-) rename arch/arm64/boot/dts/qcom/{pm8450a.dtsi => sa8540p-pmics.dtsi} (100%) diff --git a/arch/arm64/boot/dts/qcom/pm8450a.dtsi b/arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi similarity index 100% rename from arch/arm64/boot/dts/qcom/pm8450a.dtsi rename to arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi diff --git a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts index 6c547f1b13dc..77d499702ea8 100644 --- a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts +++ b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts @@ -10,7 +10,7 @@ #include #include "sa8540p.dtsi" -#include "pm8450a.dtsi" +#include "sa8540p-pmics.dtsi" / { model = "Qualcomm SA8540P Ride"; From patchwork Mon Dec 19 19:09:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eric Chanudet X-Patchwork-Id: 13077068 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E3BD1C4167B for ; Mon, 19 Dec 2022 19:13:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232207AbiLSTNW (ORCPT ); Mon, 19 Dec 2022 14:13:22 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38060 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232355AbiLSTM5 (ORCPT ); Mon, 19 Dec 2022 14:12:57 -0500 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D43A011456 for ; Mon, 19 Dec 2022 11:12:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1671477127; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=OIdwR+qvjuKwdLoe3e5YFQ/t6daZrSiNt47lDk8vL4k=; b=eeEKz0NEinFSOp2wZuS4kzNX+KukUztBn1oJ9NYnod6uw4COdMnHNEnzYZ99kBkOxvX+9y cRUxoSKuHsT/42iy7W+rYFMFofvYLY9qFqt6QWt242gUc2bkvlHltv2sKpdqyTwN6S8isE Br0xiMooDIYDhdSOqmSgUyxTDgSX9Q8= Received: from mail-qv1-f72.google.com (mail-qv1-f72.google.com [209.85.219.72]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_128_GCM_SHA256) id us-mta-604-pINTy4RqN-yLkJcqstOmpQ-1; Mon, 19 Dec 2022 14:12:05 -0500 X-MC-Unique: pINTy4RqN-yLkJcqstOmpQ-1 Received: by mail-qv1-f72.google.com with SMTP id o13-20020a056214108d00b004c6fb4f16dcso5965814qvr.6 for ; Mon, 19 Dec 2022 11:12:05 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=OIdwR+qvjuKwdLoe3e5YFQ/t6daZrSiNt47lDk8vL4k=; b=vQ5rqO+5x1CGmF6xE6uS8+MrsKO8DNupBEypA+qhwF4PxCHVgWmWDwBLmD5H+GUD0H x7YMaVqchepc1t/SR9c6hG9F15+9yYr5WBJLNuwKw+UZGfbwdcG1gAfiBPCjvdeJD3+k KXwQWJy2KVcx8mZo2bWxImJ52tNHSa6fyqtFOvlsnCf1A8R2WnAkpy0OkgUdGmO885ui xaUhEqA6aHX6cZlhmh3hVMB7SJX/4u/I9De07vpF10866PwCeSsSIQT3fkAyj73EnkHR HHQMaF4PTpMo37DGGGxKsCL4fFoH1VLvakP0X/ZMvbSbJXRjvBJktIEmoAJWGCqgl408 qXXg== X-Gm-Message-State: ANoB5pnNcynATfJRZjSLIi3GdHlbHJglDFz5wCJDf/To8Z9+3+TQkW1Q XtF+Ks6gNIOAikhDMGAmzaJPcA9haE5b8V+YBMWzj2pM7JnAvg0p82ijYK7xrBOJvXQiSai3p8D MDtuR7Uddp+tFv+lpbqDe0sociw== X-Received: by 2002:a05:622a:242:b0:3a5:467b:c1d0 with SMTP id c2-20020a05622a024200b003a5467bc1d0mr82719773qtx.18.1671477124902; Mon, 19 Dec 2022 11:12:04 -0800 (PST) X-Google-Smtp-Source: AA0mqf7O2YefxePKoJwTUXuIPiBA7nNAECGHZpF9m3+9R83hpsnY8mCSL2vmHY5jCgQlVc414BYjwA== X-Received: by 2002:a05:622a:242:b0:3a5:467b:c1d0 with SMTP id c2-20020a05622a024200b003a5467bc1d0mr82719753qtx.18.1671477124696; Mon, 19 Dec 2022 11:12:04 -0800 (PST) Received: from localhost (pool-71-184-142-128.bstnma.fios.verizon.net. [71.184.142.128]) by smtp.gmail.com with ESMTPSA id w7-20020ac843c7000000b003a8163c1c96sm6344207qtn.14.2022.12.19.11.12.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Dec 2022 11:12:04 -0800 (PST) From: Eric Chanudet To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Andrew Halaney , Brian Masney , Eric Chanudet Subject: [PATCH v4 2/4] arm64: dts: qcom: sa8450p-pmics: add rtc node Date: Mon, 19 Dec 2022 14:09:59 -0500 Message-Id: <20221219191000.2570545-3-echanude@redhat.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221219191000.2570545-1-echanude@redhat.com> References: <20221219191000.2570545-1-echanude@redhat.com> MIME-Version: 1.0 Content-type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the rtc block on the first pmic to enable the rtc for sa8540p-ride. Signed-off-by: Eric Chanudet Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi b/arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi index 34fc72896761..c9b8da43b237 100644 --- a/arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi @@ -13,6 +13,14 @@ pm8450a: pmic@0 { #address-cells = <1>; #size-cells = <0>; + rtc@6000 { + compatible = "qcom,pm8941-rtc"; + reg = <0x6000>, <0x6100>; + reg-names = "rtc", "alarm"; + interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; + wakeup-source; + }; + pm8450a_gpios: gpio@c000 { compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio"; reg = <0xc000>; From patchwork Mon Dec 19 19:10:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eric Chanudet X-Patchwork-Id: 13077070 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 70A12C3DA7C for ; Mon, 19 Dec 2022 19:13:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232302AbiLSTNZ (ORCPT ); Mon, 19 Dec 2022 14:13:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38090 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232409AbiLSTNC (ORCPT ); Mon, 19 Dec 2022 14:13:02 -0500 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6005E1261A for ; Mon, 19 Dec 2022 11:12:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1671477129; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=DYlcVMZxZ7sfT1YBoo0lGgFw3p0ugJ1rt2fQWCu4fB0=; b=ah8UnNL11wxcc1BtzKX8aixnh2xWUzObgSFiR5RLCHR4uNcUI74u332mxwepoSv2KvTYFU 4xjwu9imoAXcV5AJZ3gobPeLgL5RzIzUIv4nNJrtASfsEfFwnVt+z8K2IEBFwTNMY0O5xH IcKrI3/ZIRLFZBvffP7nqOWUiZkD02g= Received: from mail-qk1-f197.google.com (mail-qk1-f197.google.com [209.85.222.197]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_128_GCM_SHA256) id us-mta-226-5IGLlKNOP2uGcs_9OYkmGQ-1; Mon, 19 Dec 2022 14:12:08 -0500 X-MC-Unique: 5IGLlKNOP2uGcs_9OYkmGQ-1 Received: by mail-qk1-f197.google.com with SMTP id bl3-20020a05620a1a8300b0070240ff36a0so3936024qkb.19 for ; Mon, 19 Dec 2022 11:12:08 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=DYlcVMZxZ7sfT1YBoo0lGgFw3p0ugJ1rt2fQWCu4fB0=; b=R8Uk1iGQsNLQA3jcKtgQujcBGFnQBodcVyJYNdTnikGT7CZdPt3PImpWv0aMnvv8hO NnjE9f6jg8yc9fKa9DOOyMs2ntYL+RE5/hdxJdYGpebzuJyL4iT8ZkcY+GE/eltOgXi1 frkMeUzrNfb5IYA0x696QRAWCTR4YmySHC2yTJr/hzwLb00rXjReQDEuqproO1ihMhSD nsdCA+JOtzh/KVHcAQco21C3X5P0WuBdhyxNmAnmf0at4FmW3tNrbmK7C2nZxbRTW9iR pQD1LYmp7MQy+75MSeu+wPjgkpmKIk8kGkO+qZvLvKmnExscCj3wGGXh9aXZgPmtBCzD FRLw== X-Gm-Message-State: ANoB5pmjs1/Jc1MtS/Lkit8xF5DXh8dUw/f2uEAbLt+E0MS5Gzx8K/rG qOhMTQhtlGHR6HxrF7f0krwCRJG13BeDeVV/P6ybD1RlpwNFh9dfkyndp6u2nCM3djo28WQ8eZT vQdo2/LA5qoci5UNROh75bgLWDg== X-Received: by 2002:ac8:5f93:0:b0:3a7:ff9c:3f92 with SMTP id j19-20020ac85f93000000b003a7ff9c3f92mr66970861qta.22.1671477127502; Mon, 19 Dec 2022 11:12:07 -0800 (PST) X-Google-Smtp-Source: AA0mqf4WZ4e0TT78I6BTj+B5J6OCvTNSxvCbTJ0iT7YPslr/wN/iwITTWRX2ZLzl85CPVVxNqytY+w== X-Received: by 2002:ac8:5f93:0:b0:3a7:ff9c:3f92 with SMTP id j19-20020ac85f93000000b003a7ff9c3f92mr66970838qta.22.1671477127286; Mon, 19 Dec 2022 11:12:07 -0800 (PST) Received: from localhost (pool-71-184-142-128.bstnma.fios.verizon.net. [71.184.142.128]) by smtp.gmail.com with ESMTPSA id y6-20020a05620a44c600b006fcb4e01345sm7694158qkp.24.2022.12.19.11.12.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Dec 2022 11:12:06 -0800 (PST) From: Eric Chanudet To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Andrew Halaney , Brian Masney , Eric Chanudet Subject: [PATCH v4 3/4] arm64: dts: qcom: sa8295p-adp: use sa8540p-pmics Date: Mon, 19 Dec 2022 14:10:00 -0500 Message-Id: <20221219191000.2570545-4-echanude@redhat.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221219191000.2570545-1-echanude@redhat.com> References: <20221219191000.2570545-1-echanude@redhat.com> MIME-Version: 1.0 Content-type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Include the dtsi to use a single pmic descriptions. Both sa8295p-adp and sa8540p-adp have the same spmi pmic apparently. Signed-off-by: Eric Chanudet Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sa8295p-adp.dts | 79 +----------------------- 1 file changed, 1 insertion(+), 78 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts index 84cb6f3eeb56..c8437efe8235 100644 --- a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts +++ b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts @@ -11,6 +11,7 @@ #include #include "sa8540p.dtsi" +#include "sa8540p-pmics.dtsi" / { model = "Qualcomm SA8295P ADP"; @@ -260,84 +261,6 @@ &remoteproc_nsp1 { status = "okay"; }; -&spmi_bus { - pm8450a: pmic@0 { - compatible = "qcom,pm8150", "qcom,spmi-pmic"; - reg = <0x0 SPMI_USID>; - #address-cells = <1>; - #size-cells = <0>; - - rtc@6000 { - compatible = "qcom,pm8941-rtc"; - reg = <0x6000>; - reg-names = "rtc", "alarm"; - interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; - wakeup-source; - }; - - pm8450a_gpios: gpio@c000 { - compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio"; - reg = <0xc000>; - gpio-controller; - gpio-ranges = <&pm8450a_gpios 0 0 10>; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - }; - - pm8450c: pmic@4 { - compatible = "qcom,pm8150", "qcom,spmi-pmic"; - reg = <0x4 SPMI_USID>; - #address-cells = <1>; - #size-cells = <0>; - - pm8450c_gpios: gpio@c000 { - compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio"; - reg = <0xc000>; - gpio-controller; - gpio-ranges = <&pm8450c_gpios 0 0 10>; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - }; - - pm8450e: pmic@8 { - compatible = "qcom,pm8150", "qcom,spmi-pmic"; - reg = <0x8 SPMI_USID>; - #address-cells = <1>; - #size-cells = <0>; - - pm8450e_gpios: gpio@c000 { - compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio"; - reg = <0xc000>; - gpio-controller; - gpio-ranges = <&pm8450e_gpios 0 0 10>; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - }; - - pm8450g: pmic@c { - compatible = "qcom,pm8150", "qcom,spmi-pmic"; - reg = <0xc SPMI_USID>; - #address-cells = <1>; - #size-cells = <0>; - - pm8450g_gpios: gpio@c000 { - compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio"; - reg = <0xc000>; - gpio-controller; - gpio-ranges = <&pm8450g_gpios 0 0 10>; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - }; -}; - &ufs_mem_hc { reset-gpios = <&tlmm 228 GPIO_ACTIVE_LOW>; From patchwork Mon Dec 19 19:10:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eric Chanudet X-Patchwork-Id: 13077071 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9934CC3DA7D for ; Mon, 19 Dec 2022 19:13:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232328AbiLSTN0 (ORCPT ); Mon, 19 Dec 2022 14:13:26 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38216 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232443AbiLSTNH (ORCPT ); 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[71.184.142.128]) by smtp.gmail.com with ESMTPSA id h21-20020a05620a401500b006fc6529abaesm7634145qko.101.2022.12.19.11.12.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Dec 2022 11:12:08 -0800 (PST) From: Eric Chanudet To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Andrew Halaney , Brian Masney , Eric Chanudet Subject: [PATCH v4 4/4] arm64: dts: qcom: pm8941-rtc add alarm register Date: Mon, 19 Dec 2022 14:10:01 -0500 Message-Id: <20221219191000.2570545-5-echanude@redhat.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221219191000.2570545-1-echanude@redhat.com> References: <20221219191000.2570545-1-echanude@redhat.com> MIME-Version: 1.0 Content-type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org A few descriptions including a qcom,pm8941-rtc describe two reg-names for the "rtc" and "alarm" register banks, but only one offset. For consistency with reg-names, add the "alarm" register offset. No functional change is expected from this. Signed-off-by: Eric Chanudet Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/pm8150.dtsi | 2 +- arch/arm64/boot/dts/qcom/pm8916.dtsi | 3 ++- arch/arm64/boot/dts/qcom/pm8950.dtsi | 2 +- arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi | 2 +- arch/arm64/boot/dts/qcom/pmp8074.dtsi | 2 +- arch/arm64/boot/dts/qcom/pms405.dtsi | 2 +- 6 files changed, 7 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/pm8150.dtsi b/arch/arm64/boot/dts/qcom/pm8150.dtsi index 574fa95a2871..db90c55fa2cf 100644 --- a/arch/arm64/boot/dts/qcom/pm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/pm8150.dtsi @@ -121,7 +121,7 @@ pm8150_adc_tm: adc-tm@3500 { rtc@6000 { compatible = "qcom,pm8941-rtc"; - reg = <0x6000>; + reg = <0x6000>, <0x6100>; reg-names = "rtc", "alarm"; interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; }; diff --git a/arch/arm64/boot/dts/qcom/pm8916.dtsi b/arch/arm64/boot/dts/qcom/pm8916.dtsi index 08f9ca006e72..e2a6b66d8847 100644 --- a/arch/arm64/boot/dts/qcom/pm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/pm8916.dtsi @@ -93,7 +93,8 @@ adc-chan@f { rtc@6000 { compatible = "qcom,pm8941-rtc"; - reg = <0x6000>; + reg = <0x6000>, <0x6100>; + reg-names = "rtc", "alarm"; interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>; }; diff --git a/arch/arm64/boot/dts/qcom/pm8950.dtsi b/arch/arm64/boot/dts/qcom/pm8950.dtsi index 07c3896bd36f..d7df4ad60509 100644 --- a/arch/arm64/boot/dts/qcom/pm8950.dtsi +++ b/arch/arm64/boot/dts/qcom/pm8950.dtsi @@ -126,7 +126,7 @@ xo-therm-buf@3c { rtc@6000 { compatible = "qcom,pm8941-rtc"; - reg = <0x6000>; + reg = <0x6000>, <0x6100>; reg-names = "rtc", "alarm"; interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; }; diff --git a/arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi b/arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi index 20c5d60c8c2c..ee1e428d3a6e 100644 --- a/arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi +++ b/arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi @@ -108,7 +108,7 @@ pmm8155au_1_adc_tm: adc-tm@3500 { pmm8155au_1_rtc: rtc@6000 { compatible = "qcom,pm8941-rtc"; - reg = <0x6000>; + reg = <0x6000>, <0x6100>; reg-names = "rtc", "alarm"; interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; diff --git a/arch/arm64/boot/dts/qcom/pmp8074.dtsi b/arch/arm64/boot/dts/qcom/pmp8074.dtsi index ceb2e6358b3d..580684411d74 100644 --- a/arch/arm64/boot/dts/qcom/pmp8074.dtsi +++ b/arch/arm64/boot/dts/qcom/pmp8074.dtsi @@ -74,7 +74,7 @@ vph-pwr@131 { pmp8074_rtc: rtc@6000 { compatible = "qcom,pm8941-rtc"; - reg = <0x6000>; + reg = <0x6000>, <0x6100>; reg-names = "rtc", "alarm"; interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; allow-set-time; diff --git a/arch/arm64/boot/dts/qcom/pms405.dtsi b/arch/arm64/boot/dts/qcom/pms405.dtsi index ffe9e33808d0..22edb47c6a84 100644 --- a/arch/arm64/boot/dts/qcom/pms405.dtsi +++ b/arch/arm64/boot/dts/qcom/pms405.dtsi @@ -125,7 +125,7 @@ xo_therm: xo_temp@76 { rtc@6000 { compatible = "qcom,pm8941-rtc"; - reg = <0x6000>; + reg = <0x6000>, <0x6100>; reg-names = "rtc", "alarm"; interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; };