From patchwork Tue Dec 27 03:08:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kirill A. Shutemov" X-Patchwork-Id: 13082043 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id ED3AAC46467 for ; Tue, 27 Dec 2022 03:08:54 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id BE2D88E0001; Mon, 26 Dec 2022 22:08:53 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id AF7FB8E0007; Mon, 26 Dec 2022 22:08:53 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 7E6928E0005; Mon, 26 Dec 2022 22:08:53 -0500 (EST) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0012.hostedemail.com [216.40.44.12]) by kanga.kvack.org (Postfix) with ESMTP id 5119C8E0001 for ; Mon, 26 Dec 2022 22:08:53 -0500 (EST) Received: from smtpin16.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay07.hostedemail.com (Postfix) with ESMTP id 10671160587 for ; Tue, 27 Dec 2022 03:08:53 +0000 (UTC) X-FDA: 80286604146.16.7EDFEC1 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by imf17.hostedemail.com (Postfix) with ESMTP id CCE1E4000E for ; Tue, 27 Dec 2022 03:08:50 +0000 (UTC) Authentication-Results: imf17.hostedemail.com; dkim=pass header.d=intel.com header.s=Intel header.b=XbK9Gv5Z; dmarc=pass (policy=none) header.from=intel.com; spf=none (imf17.hostedemail.com: domain of kirill.shutemov@linux.intel.com has no SPF policy when checking 134.134.136.24) smtp.mailfrom=kirill.shutemov@linux.intel.com ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1672110531; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=3oEAak2Bk2D6xV/o1T1HeLHo/xDtSBqAhlKUcWH+Zxo=; b=SKQ0g7/rSJ9zPgTOJ0Lm5mMVRhkXNpqaRkFi0WLDmidG/DCpjoZcO7BBDAy2ciU7LmSq2I qVlMpJKtwx7dZ8xwOU7T3RgAY3gk5i67mQDvTm8jiXVH8fz4e1JH+3l70k11tEjqAZfQOG GVHB95sveHOpLQcQTjBN4yIvcgmg89s= ARC-Authentication-Results: i=1; imf17.hostedemail.com; dkim=pass header.d=intel.com header.s=Intel header.b=XbK9Gv5Z; dmarc=pass (policy=none) header.from=intel.com; spf=none (imf17.hostedemail.com: domain of kirill.shutemov@linux.intel.com has no SPF policy when checking 134.134.136.24) smtp.mailfrom=kirill.shutemov@linux.intel.com ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1672110531; a=rsa-sha256; cv=none; b=3m4nfCjvkVAkw766b1l95FEkYzp39AJK1JB9Tor9eyyAJfZAlzXGSUOwCQgBd5z9w3vYXK Tg8KzSvHy6ekJkcp2U1+Gp4ayMXKRuXV4+4IipIK3neMC0H9RPSnyQtlDHV0B2H8WhI884 DJsMY+p+OVXLb0fxL6vtctdQea8l7hA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1672110531; x=1703646531; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=RtCIdg8lGqV2ZfTQEm450k++h2Jppj7vK0WjZsYLBB4=; b=XbK9Gv5ZEQbxkya/gVPOE9SGQvFynLAr2qzqZGnpKtccZgQqm8bG6Uzl va1uYhYZr4BweQESAu0lRhPHzlDTSTnOu22lr2mbQ84Z5PN4bhWP+Kbhn pWhyCLuLmR7WpsJiRtDc6qtMMSXQZWmNgc60qmpB+hSlUiTRGsisczvSn p7/Zw4aRZmCR9xPBr1xdSGL5f0XD7FP0bkS0T73/9Hdyd62Srg/UYYUZl 9aE5gr0HONk4JukQi1GrkuMdSom4gNq5t/dlHgOPcAVkYxFkN/O3jMp9U AbHK8GDRtKSLs/Var9G8Jjek7lynz+U+t0L1ObUYK+xetGpZWUOMU8J3I w==; X-IronPort-AV: E=McAfee;i="6500,9779,10572"; a="321869748" X-IronPort-AV: E=Sophos;i="5.96,277,1665471600"; d="scan'208";a="321869748" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Dec 2022 19:08:47 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10572"; a="652917515" X-IronPort-AV: E=Sophos;i="5.96,277,1665471600"; d="scan'208";a="652917515" Received: from ppogotov-mobl.ger.corp.intel.com (HELO box.shutemov.name) ([10.252.62.152]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Dec 2022 19:08:39 -0800 Received: by box.shutemov.name (Postfix, from userid 1000) id 84BC110BBAD; Tue, 27 Dec 2022 06:08:36 +0300 (+03) From: "Kirill A. Shutemov" To: Dave Hansen , Andy Lutomirski , Peter Zijlstra Cc: x86@kernel.org, Kostya Serebryany , Andrey Ryabinin , Andrey Konovalov , Alexander Potapenko , Taras Madan , Dmitry Vyukov , "H . J . Lu" , Andi Kleen , Rick Edgecombe , Bharata B Rao , Jacob Pan , Ashok Raj , Linus Torvalds , linux-mm@kvack.org, linux-kernel@vger.kernel.org, "Kirill A. Shutemov" Subject: [PATCHv13 01/16] x86: Allow atomic MM_CONTEXT flags setting Date: Tue, 27 Dec 2022 06:08:14 +0300 Message-Id: <20221227030829.12508-2-kirill.shutemov@linux.intel.com> X-Mailer: git-send-email 2.38.2 In-Reply-To: <20221227030829.12508-1-kirill.shutemov@linux.intel.com> References: <20221227030829.12508-1-kirill.shutemov@linux.intel.com> MIME-Version: 1.0 X-Rspam-User: X-Rspamd-Server: rspam02 X-Rspamd-Queue-Id: CCE1E4000E X-Stat-Signature: zazhjx4ecio3ohbc15m88bs9xrij49th X-HE-Tag: 1672110530-625381 X-HE-Meta: U2FsdGVkX19oJCWHhgTVOCgUhUlkAqIxQsQNc64H06jB+BsqYQZUwCl66q0gEsECYWimTjVPsk1Q5MNogyKXdWMqJ+I2lBFSROj0mtYfxEVP4HI+S4LzBmbL2KkUYwlFZdacKwtWXF8fZPYJAHapnnID285kx97fLfxP2ldrwHi1B+X0qxNAHZlWO8H/fZqL9IQE3e/r4vyca6X1SrZsdGgnWw7IcPnkiG8R2s2i2H88PmLJjI1B20PF3wXFGt8QBnXTWKJ0qmbeBeqH5id52IN3oJ1niYWwDn1+ZYjiEFjWUCVT1/FCPmjW1zCAvx5idjFo/NDX9gVEBNmoDwMTXJoxn0efRF1C24DXbVkw9VLIQ0o7dEqWIvoR2503Y067/6YN0eG1K3cE+aiGbp7b4fAqtCdNOxOMy2d6jRbrJysVrh7WfIURpdqIVIKAi7FtbSW01R655ukJVPorizQf04D6wSWhx1ET81f8qieiTUY0+jJPYMqiBTimd66EzYUijqsIwkk3Qn1AlBFHkgy+fgJEjZ/uzf363+mY0ejolgxQKGQpWEYwF8XC/C2RnU+OipdVBDL3KStKZGr/N3sL9/Z7sz3I+d3sBaQqQ5RBrMw9He9F0+9D7AMgzdpLvvXBqVaihiLAn4FmM2ht4/ptfJGKdpLsHWaVlCG0zqihLKSRiXqLy+ggHArOZqegjlC7AfYSQ6XY/lYkKapLyWfVq6cNZgbo+XoJXA+90os3Eom++8tJZp8PdV4uk0Bjskg3zqzSoAuWAhpK3qRyOoRPC34tWxWwPdT78iNOQwbVOD6rnDx9NCN7eAyAW0NSXUDWJNpFEhC7XFL/1GW1QTU8Jasowhgc7seDLGg+R33AzUP5ejSsWl8eThI1OKGOAl8j2j1TNF45UIDQ0uYIOKkTzJ2aaElw3xXJ2dTzH5tUf29FYpVfHhNhcwNVVk7Mue0JNhOnPkpXJA/Z/wXIrLr z8I8skQw qXMil7KvpyVSCQ+lGbuy47w6qzDrItyjuHHZq X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: So far there's no need in atomic setting of MM context flags in mm_context_t::flags. The flags set early in exec and never change after that. LAM enabling requires atomic flag setting. Convert the field to unsigned long and MM_CONTEXT_* accesses with __set_bit() and test_bit(). No functional changes. Signed-off-by: Kirill A. Shutemov --- arch/x86/entry/vsyscall/vsyscall_64.c | 2 +- arch/x86/include/asm/mmu.h | 6 +++--- arch/x86/include/asm/mmu_context.h | 2 +- arch/x86/kernel/process_64.c | 4 ++-- 4 files changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/x86/entry/vsyscall/vsyscall_64.c b/arch/x86/entry/vsyscall/vsyscall_64.c index 4af81df133ee..ed320e145cf9 100644 --- a/arch/x86/entry/vsyscall/vsyscall_64.c +++ b/arch/x86/entry/vsyscall/vsyscall_64.c @@ -317,7 +317,7 @@ static struct vm_area_struct gate_vma __ro_after_init = { struct vm_area_struct *get_gate_vma(struct mm_struct *mm) { #ifdef CONFIG_COMPAT - if (!mm || !(mm->context.flags & MM_CONTEXT_HAS_VSYSCALL)) + if (!mm || test_bit(MM_CONTEXT_HAS_VSYSCALL, &mm->context.flags)) return NULL; #endif if (vsyscall_mode == NONE) diff --git a/arch/x86/include/asm/mmu.h b/arch/x86/include/asm/mmu.h index 5d7494631ea9..efa3eaee522c 100644 --- a/arch/x86/include/asm/mmu.h +++ b/arch/x86/include/asm/mmu.h @@ -9,9 +9,9 @@ #include /* Uprobes on this MM assume 32-bit code */ -#define MM_CONTEXT_UPROBE_IA32 BIT(0) +#define MM_CONTEXT_UPROBE_IA32 0 /* vsyscall page is accessible on this MM */ -#define MM_CONTEXT_HAS_VSYSCALL BIT(1) +#define MM_CONTEXT_HAS_VSYSCALL 1 /* * x86 has arch-specific MMU state beyond what lives in mm_struct. @@ -39,7 +39,7 @@ typedef struct { #endif #ifdef CONFIG_X86_64 - unsigned short flags; + unsigned long flags; #endif struct mutex lock; diff --git a/arch/x86/include/asm/mmu_context.h b/arch/x86/include/asm/mmu_context.h index b8d40ddeab00..53ef591a6166 100644 --- a/arch/x86/include/asm/mmu_context.h +++ b/arch/x86/include/asm/mmu_context.h @@ -181,7 +181,7 @@ static inline void arch_exit_mmap(struct mm_struct *mm) static inline bool is_64bit_mm(struct mm_struct *mm) { return !IS_ENABLED(CONFIG_IA32_EMULATION) || - !(mm->context.flags & MM_CONTEXT_UPROBE_IA32); + !test_bit(MM_CONTEXT_UPROBE_IA32, &mm->context.flags); } #else static inline bool is_64bit_mm(struct mm_struct *mm) diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c index 4e34b3b68ebd..8b06034e8c70 100644 --- a/arch/x86/kernel/process_64.c +++ b/arch/x86/kernel/process_64.c @@ -671,7 +671,7 @@ void set_personality_64bit(void) task_pt_regs(current)->orig_ax = __NR_execve; current_thread_info()->status &= ~TS_COMPAT; if (current->mm) - current->mm->context.flags = MM_CONTEXT_HAS_VSYSCALL; + __set_bit(MM_CONTEXT_HAS_VSYSCALL, ¤t->mm->context.flags); /* TBD: overwrites user setup. Should have two bits. But 64bit processes have always behaved this way, @@ -708,7 +708,7 @@ static void __set_personality_ia32(void) * uprobes applied to this MM need to know this and * cannot use user_64bit_mode() at that time. */ - current->mm->context.flags = MM_CONTEXT_UPROBE_IA32; + __set_bit(MM_CONTEXT_UPROBE_IA32, ¤t->mm->context.flags); } current->personality |= force_personality32; From patchwork Tue Dec 27 03:08:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kirill A. Shutemov" X-Patchwork-Id: 13082040 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id DF604C4332F for ; Tue, 27 Dec 2022 03:08:48 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 306038E0002; Mon, 26 Dec 2022 22:08:48 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id 28F378E0001; Mon, 26 Dec 2022 22:08:48 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 109518E0002; Mon, 26 Dec 2022 22:08:48 -0500 (EST) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0013.hostedemail.com [216.40.44.13]) by kanga.kvack.org (Postfix) with ESMTP id EF92B8E0001 for ; Mon, 26 Dec 2022 22:08:47 -0500 (EST) Received: from smtpin28.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay03.hostedemail.com (Postfix) with ESMTP id CB699A045A for ; Tue, 27 Dec 2022 03:08:47 +0000 (UTC) X-FDA: 80286603894.28.491CB1A Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by imf19.hostedemail.com (Postfix) with ESMTP id 3D12A1A0004 for ; Tue, 27 Dec 2022 03:08:44 +0000 (UTC) Authentication-Results: imf19.hostedemail.com; dkim=pass header.d=intel.com header.s=Intel header.b=JKUxdbSv; spf=none (imf19.hostedemail.com: domain of kirill.shutemov@linux.intel.com has no SPF policy when checking 192.55.52.151) smtp.mailfrom=kirill.shutemov@linux.intel.com; dmarc=pass (policy=none) header.from=intel.com ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1672110526; a=rsa-sha256; cv=none; b=JZ5y4eO6aOYxjD8N1ursch/5hBkQAf8lYmss+PaOyz6Sene1zM8IaIt4f1kyFEI0sOXpHC ueFgirDoEio/ecxS69cJymqOOgp1Nh8mhgawDyhNfg54USVxg3a8037zWbiRi5sC0Tc4cs EseWh8g9WuyA/PJMow5POvhRt/M+7gI= ARC-Authentication-Results: i=1; imf19.hostedemail.com; dkim=pass header.d=intel.com header.s=Intel header.b=JKUxdbSv; spf=none (imf19.hostedemail.com: domain of kirill.shutemov@linux.intel.com has no SPF policy when checking 192.55.52.151) smtp.mailfrom=kirill.shutemov@linux.intel.com; dmarc=pass (policy=none) header.from=intel.com ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1672110526; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=HiQmt79j+yP5ckm1kw0E99dGcnfCgkwWTWtqPyabNRA=; b=mwN8dE8DewE4OXOw1x2qM1JG3z4KpKExu5DlSf7rFBHE7dUmQZf/igNJC9vqsft+b816Sf /YJ8QVLgI4y637fgDrNVjPbTsl8xfBFOEzQj1GQS8JQjCxTQHlcust0nU0cD2LVoF4QFbP nR7Q525TpRdNRralsruJ+LPTXdK0gus= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1672110525; x=1703646525; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=gEzeHerPaWTs/tIk/qtNJxiWNCV7jnSRQjRqxLLucY8=; b=JKUxdbSv3s4ckcaSg5bpY8V/PfQeJXyImLoh2/3Kbsna05Bbonl+K/qP SpdpbLUXBV4241gwQTJG+1I7J2KrIQIluaHpvtly963wV5HqNX/gvZxGY JhJVIEl8tP6ewcmoBNf0jBHfiwi5zb5ljC17BfXjTxXnVqKyU/c5nmyXd YC99PxeEM98+E/gXKOL3MGvA7uIuK1IayitLmGDgC0GrIrzoNC60F0lXL F39JiboS62E+QFS9lIpLc9Uon40bBQ6ruXvOAfyzLDkNCFnrrd/ikLP8f lYJpELMMFRCiO4lF/8DKsV5DCBhnpaSBqN2LDRVU6c9ngTbekvUFEhn1l g==; X-IronPort-AV: E=McAfee;i="6500,9779,10572"; a="300994652" X-IronPort-AV: E=Sophos;i="5.96,277,1665471600"; d="scan'208";a="300994652" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Dec 2022 19:08:43 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10572"; a="741605192" X-IronPort-AV: E=Sophos;i="5.96,277,1665471600"; d="scan'208";a="741605192" Received: from ppogotov-mobl.ger.corp.intel.com (HELO box.shutemov.name) ([10.252.62.152]) by fmsmga003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Dec 2022 19:08:39 -0800 Received: by box.shutemov.name (Postfix, from userid 1000) id 8FB6410BBAF; Tue, 27 Dec 2022 06:08:36 +0300 (+03) From: "Kirill A. Shutemov" To: Dave Hansen , Andy Lutomirski , Peter Zijlstra Cc: x86@kernel.org, Kostya Serebryany , Andrey Ryabinin , Andrey Konovalov , Alexander Potapenko , Taras Madan , Dmitry Vyukov , "H . J . Lu" , Andi Kleen , Rick Edgecombe , Bharata B Rao , Jacob Pan , Ashok Raj , Linus Torvalds , linux-mm@kvack.org, linux-kernel@vger.kernel.org, "Kirill A. Shutemov" Subject: [PATCHv13 02/16] x86: CPUID and CR3/CR4 flags for Linear Address Masking Date: Tue, 27 Dec 2022 06:08:15 +0300 Message-Id: <20221227030829.12508-3-kirill.shutemov@linux.intel.com> X-Mailer: git-send-email 2.38.2 In-Reply-To: <20221227030829.12508-1-kirill.shutemov@linux.intel.com> References: <20221227030829.12508-1-kirill.shutemov@linux.intel.com> MIME-Version: 1.0 X-Rspam-User: X-Rspamd-Queue-Id: 3D12A1A0004 X-Rspamd-Server: rspam01 X-Stat-Signature: nqwmxa36b3ughb6cx3hys4cr457wj3x7 X-HE-Tag: 1672110524-376515 X-HE-Meta: U2FsdGVkX1+icBrrOw1bbepVbeFZVRueP4yU/PbYWljo/F3F/H5e8uKl7ycqfpidF0uoZ07xUCZW0R4bU+BP/2zJND0toWad04O2bgLnyerYDNX36OwGy4gutgs3hr9uqT6di/cAK4zTW8yBN2I/K0YmnbDQXy6h5osyA4D8lj5NylVc20Tr5Xt20Ou7aj+Kka77ZP84PRi2FBQtwxy+0GqZAx7Yhk/Cj2qkkRTfUENyIIzNBcsdcFgrAvl9v0Ef5zFuTsW1/9deATcfadDx4dZjYO3FEj9tNJqmYNfjEirOAwEhEISYFGOEvm8inBntK71CWNQLdpZCVpkORcfWttjHqk4ixN56f3AQWAQ3DSOCUD9NM1aUha0REKfDfKjQOPSHL6FwJpY111JC9kAC+B0CePCNWSOkwKh2gjAR389Gjp6TeWuq1ukOI1SZcSbvkc8EESLTefIwtHmTdqPBlPcRAC4rRoHr2jieCvgvb2IKG4eRA/PjQpPZmQt0BAs4y1bf5bdjJY3lrtr8UuiFcwHKrUr7AOHLDxd5Iz9FFGNuXxD/CZgfbsSmMku0+DY6av0/a2PbefcGG2BDMP1roDOS9qDSGYyJOSvV74UlgOBEZOgHZ2ILQqdvvHYmFW2mRHvltz2VJgt0W6ZqUvFcvlQQ5J0mOdk6PjqzmjmlAXefFRh85vZ+decVxozh1b5RTPFA/XeNDW01BCW7Qc69PQPoQo0kY00lx//fV0fDvzflxDCizYAByoNhJfe6w1Ebmyj5qIPzj4BWcKBBBD8Mo6gB0bhjzVX61Hbf440QbngLu92sbCWxrjpLo23/ISoHly3t3Fb0oveYlQ66n50+DNkYeZR5LvgS4exVZ8rCYWKRfbGJwm0tpvgEJNYn4njKUSDA3RK7U87asP7KqMXrVlHtb7a0k2PDwRmhWRadYqS504L1cj8cVDWRl9oMdzpM6bZOqciS53s= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: Enumerate Linear Address Masking and provide defines for CR3 and CR4 flags. Signed-off-by: Kirill A. Shutemov Reviewed-by: Alexander Potapenko Acked-by: Peter Zijlstra (Intel) Tested-by: Alexander Potapenko --- arch/x86/include/asm/cpufeatures.h | 1 + arch/x86/include/asm/processor-flags.h | 2 ++ arch/x86/include/uapi/asm/processor-flags.h | 6 ++++++ 3 files changed, 9 insertions(+) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index 61012476d66e..bc662c80b99d 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -314,6 +314,7 @@ #define X86_FEATURE_CMPCCXADD (12*32+ 7) /* "" CMPccXADD instructions */ #define X86_FEATURE_AMX_FP16 (12*32+21) /* "" AMX fp16 Support */ #define X86_FEATURE_AVX_IFMA (12*32+23) /* "" Support for VPMADD52[H,L]UQ */ +#define X86_FEATURE_LAM (12*32+26) /* Linear Address Masking */ /* AMD-defined CPU features, CPUID level 0x80000008 (EBX), word 13 */ #define X86_FEATURE_CLZERO (13*32+ 0) /* CLZERO instruction */ diff --git a/arch/x86/include/asm/processor-flags.h b/arch/x86/include/asm/processor-flags.h index a7f3d9100adb..d8cccadc83a6 100644 --- a/arch/x86/include/asm/processor-flags.h +++ b/arch/x86/include/asm/processor-flags.h @@ -28,6 +28,8 @@ * On systems with SME, one bit (in a variable position!) is stolen to indicate * that the top-level paging structure is encrypted. * + * On systemms with LAM, bits 61 and 62 are used to indicate LAM mode. + * * All of the remaining bits indicate the physical address of the top-level * paging structure. * diff --git a/arch/x86/include/uapi/asm/processor-flags.h b/arch/x86/include/uapi/asm/processor-flags.h index c47cc7f2feeb..d898432947ff 100644 --- a/arch/x86/include/uapi/asm/processor-flags.h +++ b/arch/x86/include/uapi/asm/processor-flags.h @@ -82,6 +82,10 @@ #define X86_CR3_PCID_BITS 12 #define X86_CR3_PCID_MASK (_AC((1UL << X86_CR3_PCID_BITS) - 1, UL)) +#define X86_CR3_LAM_U57_BIT 61 /* Activate LAM for userspace, 62:57 bits masked */ +#define X86_CR3_LAM_U57 _BITULL(X86_CR3_LAM_U57_BIT) +#define X86_CR3_LAM_U48_BIT 62 /* Activate LAM for userspace, 62:48 bits masked */ +#define X86_CR3_LAM_U48 _BITULL(X86_CR3_LAM_U48_BIT) #define X86_CR3_PCID_NOFLUSH_BIT 63 /* Preserve old PCID */ #define X86_CR3_PCID_NOFLUSH _BITULL(X86_CR3_PCID_NOFLUSH_BIT) @@ -132,6 +136,8 @@ #define X86_CR4_PKE _BITUL(X86_CR4_PKE_BIT) #define X86_CR4_CET_BIT 23 /* enable Control-flow Enforcement Technology */ #define X86_CR4_CET _BITUL(X86_CR4_CET_BIT) +#define X86_CR4_LAM_SUP_BIT 28 /* LAM for supervisor pointers */ +#define X86_CR4_LAM_SUP _BITUL(X86_CR4_LAM_SUP_BIT) /* * x86-64 Task Priority Register, CR8 From patchwork Tue Dec 27 03:08:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kirill A. Shutemov" X-Patchwork-Id: 13082045 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9F9C3C4332F for ; Tue, 27 Dec 2022 03:08:57 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id B93738E0009; Mon, 26 Dec 2022 22:08:55 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id AF5D18E0008; Mon, 26 Dec 2022 22:08:55 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 8ABAC8E0009; Mon, 26 Dec 2022 22:08:55 -0500 (EST) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0012.hostedemail.com [216.40.44.12]) by kanga.kvack.org (Postfix) with ESMTP id 686AF8E0005 for ; Mon, 26 Dec 2022 22:08:55 -0500 (EST) Received: from smtpin05.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay03.hostedemail.com (Postfix) with ESMTP id EF525A0501 for ; Tue, 27 Dec 2022 03:08:54 +0000 (UTC) X-FDA: 80286604188.05.DA945BD Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by imf17.hostedemail.com (Postfix) with ESMTP id 1B9054000A for ; Tue, 27 Dec 2022 03:08:52 +0000 (UTC) Authentication-Results: imf17.hostedemail.com; dkim=pass header.d=intel.com header.s=Intel header.b=lRzGD90f; dmarc=pass (policy=none) header.from=intel.com; spf=none (imf17.hostedemail.com: domain of kirill.shutemov@linux.intel.com has no SPF policy when checking 134.134.136.24) smtp.mailfrom=kirill.shutemov@linux.intel.com ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1672110533; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=TLSpYEgnDH9ROQMR7p9dYcZRjMvuIn2UqTC9mkeJoYE=; b=RLxdcq/6NAY7A9G98m/WnsdibDBP2fipavhPJcJhsAFSVGC9F5WaJYTSIB8LFJ1ugt2EWF +CTR5VPCQpM/V6s9b4NPZtZVNzRigu8pPP+G+XTcuG80zjN/q+ds+5g51ChVKOONmbXjgd Cg4C8CXDNP8mNuQ0q3trbg6qMjOVI6I= ARC-Authentication-Results: i=1; imf17.hostedemail.com; dkim=pass header.d=intel.com header.s=Intel header.b=lRzGD90f; dmarc=pass (policy=none) header.from=intel.com; spf=none (imf17.hostedemail.com: domain of kirill.shutemov@linux.intel.com has no SPF policy when checking 134.134.136.24) smtp.mailfrom=kirill.shutemov@linux.intel.com ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1672110533; a=rsa-sha256; cv=none; b=CeAElJ1XsNILsXGL4Ok6zjUGONjs8py8px0sGe4IKrBxouMLPkoPOHX9fMrIAUUzW4RvxF A5aGvFUGzHXekjvGxLu6IlDmyF+H4X7m2yG3AGdtospKuwz0ZimAyKBLQf3DSvCTOPA9lv CsJlS6AFyJC4vAx2jfVUBPQJ19MEwSM= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1672110533; x=1703646533; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=GYyU7jiAE/wXQ+l2FTpkdDQvnKTCwJ1AjTQPGEdwZVw=; b=lRzGD90fptge0ssAaunuXdjjF84vF/EbEhDVFklxMzGZVj5qrB52d4FQ KpDXCpUMnJ5ENAR/JIC1YOQsDfUH1hhk69gL/53uL0GDtiHJxUBp4d2n0 v33vq6gAEQU/zq/A/f0/nJ+yQH2lCn27VyGkF6uT/smxEBm8x7QUN54rh SWRjlJUrAyI2VPTp9HxcgQw8efjFYnhYqMciJ/G0DvcCzRodmDP57zACq C8BLHhaE/86dLUbdW1uOkCYMWSSIH9PZtQG0UiOJPNQzhFzEPvIDQM1/5 MFuNzMRjp1GAcFDVhsXUFOsOnXt3ehRJcs2dO2mbPyVrNx2KWM41XNjnD w==; X-IronPort-AV: E=McAfee;i="6500,9779,10572"; a="321869757" X-IronPort-AV: E=Sophos;i="5.96,277,1665471600"; d="scan'208";a="321869757" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Dec 2022 19:08:47 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10572"; a="652917518" X-IronPort-AV: E=Sophos;i="5.96,277,1665471600"; d="scan'208";a="652917518" Received: from ppogotov-mobl.ger.corp.intel.com (HELO box.shutemov.name) ([10.252.62.152]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Dec 2022 19:08:39 -0800 Received: by box.shutemov.name (Postfix, from userid 1000) id 9ABCD10BBB0; Tue, 27 Dec 2022 06:08:36 +0300 (+03) From: "Kirill A. Shutemov" To: Dave Hansen , Andy Lutomirski , Peter Zijlstra Cc: x86@kernel.org, Kostya Serebryany , Andrey Ryabinin , Andrey Konovalov , Alexander Potapenko , Taras Madan , Dmitry Vyukov , "H . J . Lu" , Andi Kleen , Rick Edgecombe , Bharata B Rao , Jacob Pan , Ashok Raj , Linus Torvalds , linux-mm@kvack.org, linux-kernel@vger.kernel.org, "Kirill A. Shutemov" Subject: [PATCHv13 03/16] x86/mm: Handle LAM on context switch Date: Tue, 27 Dec 2022 06:08:16 +0300 Message-Id: <20221227030829.12508-4-kirill.shutemov@linux.intel.com> X-Mailer: git-send-email 2.38.2 In-Reply-To: <20221227030829.12508-1-kirill.shutemov@linux.intel.com> References: <20221227030829.12508-1-kirill.shutemov@linux.intel.com> MIME-Version: 1.0 X-Rspam-User: X-Rspamd-Server: rspam02 X-Rspamd-Queue-Id: 1B9054000A X-Stat-Signature: w7g7yuqex3bgka3bchqmm7yo3pmp4hpr X-HE-Tag: 1672110532-96819 X-HE-Meta: U2FsdGVkX1+RNRwLKdHVAo3s5lswya/MPeAtu5n9OwWMW9/Rb07hby54TKHfvHZVdEuXLI3+XdsqENKV/zj3TKrzpMGauMjaxT01B2sN4pUu38wcxOaClvp0267jV5VarNyBX371/aCg1xfbQk5cP8krM+bYsctK8Z29ky0K39owvSIT11k031Hm5qZyvtHNFKs0r19yz9ooCpDE7cs1PFwTmw7vBSahy37IK78iuPIomX5jj2dpA/d5Gim9DBRk9LUW6GG+rK85sQn24C/eW4Ss+8k36NmJClHPTaFeyztUrQarF8f4/cmCsd3pZ+jH6wlCR20JwO6UOtA3qQg+Q+ao2OWM6B4WznLDYc73r2mWkx4S4LQLYGt1g8i5LJNmZ6fpEiwVck8C9bP0uIuJTIghTy4g4GSGc1sTd6YMcwpEIO8uaeJEFGqV0w1FeryCFeo/nTjQ8jISVib8LPpK6+82tofqjOrsMyLhe/e2L8AMHbKWsWZa55wrwZ0PHh9mHrylbql5NFf9ayxI+GqTBxJGZCmCRksXaLK58Wj+CIoGQrk1WarU3r2iyId+9zjULkWpEYKyhnhDZ4FbxCilyyzJOpxg3z/5swwOewlklhjNdOx33ezVh4+rUB15ha9yCJ8Wnq89ETSC6OCXr2rRjkj5u6/qH5H0CS/FuejWv0+0utgk5JdwkLtQBOazU5WEVqXhKv+uPlDhJJ/qR7O87s3IxP6aw+CdrbOBjrn7Szg9ex85AoUA6YixZgGXvCTLF/nLsxPh3N3eQpIToT9qpMi/RkaKSjIlt3Qswbc7rztB+ynZlM0JhVa4YNXkI/2Sy2JmYugqppLQR0yrZUS9CLYqE+WTgxmRJP2MpwAidNPtLpnaM9iNjMchHwNWblf62ggt5ctvjsH+DYm9ja4e/SV7OlBau3C0BSsodvIXxUInebuTWqnzjVc0NiHKbwoH6jVl2zr9DMs= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: Linear Address Masking mode for userspace pointers encoded in CR3 bits. The mode is selected per-process and stored in mm_context_t. switch_mm_irqs_off() now respects selected LAM mode and constructs CR3 accordingly. The active LAM mode gets recorded in the tlb_state. Signed-off-by: Kirill A. Shutemov Acked-by: Peter Zijlstra (Intel) Tested-by: Alexander Potapenko --- arch/x86/include/asm/mmu.h | 3 ++ arch/x86/include/asm/mmu_context.h | 24 ++++++++++++++ arch/x86/include/asm/tlbflush.h | 34 +++++++++++++++++++ arch/x86/mm/tlb.c | 53 +++++++++++++++++++++--------- 4 files changed, 98 insertions(+), 16 deletions(-) diff --git a/arch/x86/include/asm/mmu.h b/arch/x86/include/asm/mmu.h index efa3eaee522c..9a046aacad8d 100644 --- a/arch/x86/include/asm/mmu.h +++ b/arch/x86/include/asm/mmu.h @@ -40,6 +40,9 @@ typedef struct { #ifdef CONFIG_X86_64 unsigned long flags; + + /* Active LAM mode: X86_CR3_LAM_U48 or X86_CR3_LAM_U57 or 0 (disabled) */ + unsigned long lam_cr3_mask; #endif struct mutex lock; diff --git a/arch/x86/include/asm/mmu_context.h b/arch/x86/include/asm/mmu_context.h index 53ef591a6166..464cca41d20a 100644 --- a/arch/x86/include/asm/mmu_context.h +++ b/arch/x86/include/asm/mmu_context.h @@ -91,6 +91,29 @@ static inline void switch_ldt(struct mm_struct *prev, struct mm_struct *next) } #endif +#ifdef CONFIG_X86_64 +static inline unsigned long mm_lam_cr3_mask(struct mm_struct *mm) +{ + return READ_ONCE(mm->context.lam_cr3_mask); +} + +static inline void dup_lam(struct mm_struct *oldmm, struct mm_struct *mm) +{ + mm->context.lam_cr3_mask = oldmm->context.lam_cr3_mask; +} + +#else + +static inline unsigned long mm_lam_cr3_mask(struct mm_struct *mm) +{ + return 0; +} + +static inline void dup_lam(struct mm_struct *oldmm, struct mm_struct *mm) +{ +} +#endif + #define enter_lazy_tlb enter_lazy_tlb extern void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk); @@ -168,6 +191,7 @@ static inline int arch_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm) { arch_dup_pkeys(oldmm, mm); paravirt_arch_dup_mmap(oldmm, mm); + dup_lam(oldmm, mm); return ldt_dup_context(oldmm, mm); } diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h index cda3118f3b27..662598dea937 100644 --- a/arch/x86/include/asm/tlbflush.h +++ b/arch/x86/include/asm/tlbflush.h @@ -101,6 +101,16 @@ struct tlb_state { */ bool invalidate_other; +#ifdef CONFIG_X86_64 + /* + * Active LAM mode. + * + * X86_CR3_LAM_U57/U48 shifted right by X86_CR3_LAM_U57_BIT or 0 if LAM + * disabled. + */ + u8 lam; +#endif + /* * Mask that contains TLB_NR_DYN_ASIDS+1 bits to indicate * the corresponding user PCID needs a flush next time we @@ -357,6 +367,30 @@ static inline bool huge_pmd_needs_flush(pmd_t oldpmd, pmd_t newpmd) } #define huge_pmd_needs_flush huge_pmd_needs_flush +#ifdef CONFIG_X86_64 +static inline unsigned long tlbstate_lam_cr3_mask(void) +{ + unsigned long lam = this_cpu_read(cpu_tlbstate.lam); + + return lam << X86_CR3_LAM_U57_BIT; +} + +static inline void set_tlbstate_cr3_lam_mask(unsigned long mask) +{ + this_cpu_write(cpu_tlbstate.lam, mask >> X86_CR3_LAM_U57_BIT); +} + +#else + +static inline unsigned long tlbstate_lam_cr3_mask(void) +{ + return 0; +} + +static inline void set_tlbstate_cr3_lam_mask(u64 mask) +{ +} +#endif #endif /* !MODULE */ static inline void __native_tlb_flush_global(unsigned long cr4) diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c index c1e31e9a85d7..9d1e7a5f141c 100644 --- a/arch/x86/mm/tlb.c +++ b/arch/x86/mm/tlb.c @@ -154,26 +154,30 @@ static inline u16 user_pcid(u16 asid) return ret; } -static inline unsigned long build_cr3(pgd_t *pgd, u16 asid) +static inline unsigned long build_cr3(pgd_t *pgd, u16 asid, unsigned long lam) { + unsigned long cr3 = __sme_pa(pgd) | lam; + if (static_cpu_has(X86_FEATURE_PCID)) { - return __sme_pa(pgd) | kern_pcid(asid); + VM_WARN_ON_ONCE(asid > MAX_ASID_AVAILABLE); + cr3 |= kern_pcid(asid); } else { VM_WARN_ON_ONCE(asid != 0); - return __sme_pa(pgd); } + + return cr3; } -static inline unsigned long build_cr3_noflush(pgd_t *pgd, u16 asid) +static inline unsigned long build_cr3_noflush(pgd_t *pgd, u16 asid, + unsigned long lam) { - VM_WARN_ON_ONCE(asid > MAX_ASID_AVAILABLE); /* * Use boot_cpu_has() instead of this_cpu_has() as this function * might be called during early boot. This should work even after * boot because all CPU's the have same capabilities: */ VM_WARN_ON_ONCE(!boot_cpu_has(X86_FEATURE_PCID)); - return __sme_pa(pgd) | kern_pcid(asid) | CR3_NOFLUSH; + return build_cr3(pgd, asid, lam) | CR3_NOFLUSH; } /* @@ -274,15 +278,16 @@ static inline void invalidate_user_asid(u16 asid) (unsigned long *)this_cpu_ptr(&cpu_tlbstate.user_pcid_flush_mask)); } -static void load_new_mm_cr3(pgd_t *pgdir, u16 new_asid, bool need_flush) +static void load_new_mm_cr3(pgd_t *pgdir, u16 new_asid, unsigned long lam, + bool need_flush) { unsigned long new_mm_cr3; if (need_flush) { invalidate_user_asid(new_asid); - new_mm_cr3 = build_cr3(pgdir, new_asid); + new_mm_cr3 = build_cr3(pgdir, new_asid, lam); } else { - new_mm_cr3 = build_cr3_noflush(pgdir, new_asid); + new_mm_cr3 = build_cr3_noflush(pgdir, new_asid, lam); } /* @@ -491,6 +496,7 @@ void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next, { struct mm_struct *real_prev = this_cpu_read(cpu_tlbstate.loaded_mm); u16 prev_asid = this_cpu_read(cpu_tlbstate.loaded_mm_asid); + unsigned long new_lam = mm_lam_cr3_mask(next); bool was_lazy = this_cpu_read(cpu_tlbstate_shared.is_lazy); unsigned cpu = smp_processor_id(); u64 next_tlb_gen; @@ -520,7 +526,8 @@ void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next, * isn't free. */ #ifdef CONFIG_DEBUG_VM - if (WARN_ON_ONCE(__read_cr3() != build_cr3(real_prev->pgd, prev_asid))) { + if (WARN_ON_ONCE(__read_cr3() != build_cr3(real_prev->pgd, prev_asid, + tlbstate_lam_cr3_mask()))) { /* * If we were to BUG here, we'd be very likely to kill * the system so hard that we don't see the call trace. @@ -552,9 +559,15 @@ void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next, * instruction. */ if (real_prev == next) { + /* Not actually switching mm's */ VM_WARN_ON(this_cpu_read(cpu_tlbstate.ctxs[prev_asid].ctx_id) != next->context.ctx_id); + /* + * If this races with another thread that enables lam, 'new_lam' + * might not match tlbstate_lam_cr3_mask(). + */ + /* * Even in lazy TLB mode, the CPU should stay set in the * mm_cpumask. The TLB shootdown code can figure out from @@ -622,15 +635,16 @@ void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next, barrier(); } + set_tlbstate_cr3_lam_mask(new_lam); if (need_flush) { this_cpu_write(cpu_tlbstate.ctxs[new_asid].ctx_id, next->context.ctx_id); this_cpu_write(cpu_tlbstate.ctxs[new_asid].tlb_gen, next_tlb_gen); - load_new_mm_cr3(next->pgd, new_asid, true); + load_new_mm_cr3(next->pgd, new_asid, new_lam, true); trace_tlb_flush(TLB_FLUSH_ON_TASK_SWITCH, TLB_FLUSH_ALL); } else { /* The new ASID is already up to date. */ - load_new_mm_cr3(next->pgd, new_asid, false); + load_new_mm_cr3(next->pgd, new_asid, new_lam, false); trace_tlb_flush(TLB_FLUSH_ON_TASK_SWITCH, 0); } @@ -691,6 +705,10 @@ void initialize_tlbstate_and_flush(void) /* Assert that CR3 already references the right mm. */ WARN_ON((cr3 & CR3_ADDR_MASK) != __pa(mm->pgd)); + /* LAM expected to be disabled */ + WARN_ON(cr3 & (X86_CR3_LAM_U48 | X86_CR3_LAM_U57)); + WARN_ON(mm_lam_cr3_mask(mm)); + /* * Assert that CR4.PCIDE is set if needed. (CR4.PCIDE initialization * doesn't work like other CR4 bits because it can only be set from @@ -699,8 +717,8 @@ void initialize_tlbstate_and_flush(void) WARN_ON(boot_cpu_has(X86_FEATURE_PCID) && !(cr4_read_shadow() & X86_CR4_PCIDE)); - /* Force ASID 0 and force a TLB flush. */ - write_cr3(build_cr3(mm->pgd, 0)); + /* Disable LAM, force ASID 0 and force a TLB flush. */ + write_cr3(build_cr3(mm->pgd, 0, 0)); /* Reinitialize tlbstate. */ this_cpu_write(cpu_tlbstate.last_user_mm_spec, LAST_USER_MM_INIT); @@ -708,6 +726,7 @@ void initialize_tlbstate_and_flush(void) this_cpu_write(cpu_tlbstate.next_asid, 1); this_cpu_write(cpu_tlbstate.ctxs[0].ctx_id, mm->context.ctx_id); this_cpu_write(cpu_tlbstate.ctxs[0].tlb_gen, tlb_gen); + set_tlbstate_cr3_lam_mask(0); for (i = 1; i < TLB_NR_DYN_ASIDS; i++) this_cpu_write(cpu_tlbstate.ctxs[i].ctx_id, 0); @@ -1071,8 +1090,10 @@ void flush_tlb_kernel_range(unsigned long start, unsigned long end) */ unsigned long __get_current_cr3_fast(void) { - unsigned long cr3 = build_cr3(this_cpu_read(cpu_tlbstate.loaded_mm)->pgd, - this_cpu_read(cpu_tlbstate.loaded_mm_asid)); + unsigned long cr3 = + build_cr3(this_cpu_read(cpu_tlbstate.loaded_mm)->pgd, + this_cpu_read(cpu_tlbstate.loaded_mm_asid), + tlbstate_lam_cr3_mask()); /* For now, be very restrictive about when this can be called. */ VM_WARN_ON(in_nmi() || preemptible()); From patchwork Tue Dec 27 03:08:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kirill A. Shutemov" X-Patchwork-Id: 13082041 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id DC045C46467 for ; Tue, 27 Dec 2022 03:08:50 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 3063C8E0003; Mon, 26 Dec 2022 22:08:50 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id 2901F8E0001; Mon, 26 Dec 2022 22:08:50 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 0E1698E0003; Mon, 26 Dec 2022 22:08:50 -0500 (EST) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0015.hostedemail.com [216.40.44.15]) by kanga.kvack.org (Postfix) with ESMTP id EE0E38E0001 for ; Mon, 26 Dec 2022 22:08:49 -0500 (EST) Received: from smtpin09.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay07.hostedemail.com (Postfix) with ESMTP id C7BEC160388 for ; Tue, 27 Dec 2022 03:08:49 +0000 (UTC) X-FDA: 80286603978.09.C51EE2F Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by imf19.hostedemail.com (Postfix) with ESMTP id EE79A1A0004 for ; Tue, 27 Dec 2022 03:08:47 +0000 (UTC) Authentication-Results: imf19.hostedemail.com; dkim=pass header.d=intel.com header.s=Intel header.b="IonMKDx/"; spf=none (imf19.hostedemail.com: domain of kirill.shutemov@linux.intel.com has no SPF policy when checking 192.55.52.151) smtp.mailfrom=kirill.shutemov@linux.intel.com; dmarc=pass (policy=none) header.from=intel.com ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1672110528; a=rsa-sha256; cv=none; b=mY8Z7gw+cGxYViNc7sR7H6fA9h160zXDcSbmgSxDtHzg66k24DEHTQu44nwGGlmXSVN+et 89/R7pRwj+PcItCaLtjnCfeR1DmJjgVW/YmzgC27Rb5BJw1vyZvFbfkJ09MEqCtyUdmM8w fDMD2gxlhQRT1sp08xO1VVlAQd3HT6w= ARC-Authentication-Results: i=1; imf19.hostedemail.com; dkim=pass header.d=intel.com header.s=Intel header.b="IonMKDx/"; spf=none (imf19.hostedemail.com: domain of kirill.shutemov@linux.intel.com has no SPF policy when checking 192.55.52.151) smtp.mailfrom=kirill.shutemov@linux.intel.com; dmarc=pass (policy=none) header.from=intel.com ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1672110528; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=C7HJvEkFakmMiC+4clhqvBp0TSytYpgLWXa6owkCvnA=; b=jGR6jXx+gfs7+VLCQEPQU9/mk+pNWtLu1CKerq9ueQK4QMHR9BO8qgmM5pY5lztcPSOBeI wXM8F+Zkobl/2LWk9VEjYSLAUN/qBcy2OgBT4WjAoEfUrXhjqF9BCuNl4UBxLiiNNTHwF2 p9D5LxNsXo7Z02FvGwwaap6A4Eg1mHE= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1672110528; x=1703646528; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=73Lfy6YiNOngUHGIq+SvJHDmwJJPCjL8Zm/vzQL6EVI=; b=IonMKDx/Mc36bNlhQQBWDlTElDRWxT3HvGJamGMphC+iEWEM+jqt/L6y 9jn5rXDwkTiOwU/agvlvbqWDgIpjIokYYEZ0S4pQACEhsahf8wSVhOvx8 ymJ0iKSN64YjiVMrtZULRiqEJ37oTV6ohCiVJ4ArOnSZI+MfBrPABsl73 B/OIjnvziGCsnJEhvO/9sg1hrVLqRJYft41JBH5wy+s6pnBLr4y1exu9X 1gtzr7PPBFk4XL8ALUZP6RjrRDdQ4CWm0BC4pVX+PWGOTGnNz+3n5HF18 XdYgzXQMe1TxTTmoMDZuLaFASHFzDKEgxrHGxR8DLZA6RUPL491+Pw9vF g==; X-IronPort-AV: E=McAfee;i="6500,9779,10572"; a="300994660" X-IronPort-AV: E=Sophos;i="5.96,277,1665471600"; d="scan'208";a="300994660" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Dec 2022 19:08:43 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10572"; a="741605194" X-IronPort-AV: E=Sophos;i="5.96,277,1665471600"; d="scan'208";a="741605194" Received: from ppogotov-mobl.ger.corp.intel.com (HELO box.shutemov.name) ([10.252.62.152]) by fmsmga003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Dec 2022 19:08:39 -0800 Received: by box.shutemov.name (Postfix, from userid 1000) id A1E7910BBB1; Tue, 27 Dec 2022 06:08:36 +0300 (+03) From: "Kirill A. Shutemov" To: Dave Hansen , Andy Lutomirski , Peter Zijlstra Cc: x86@kernel.org, Kostya Serebryany , Andrey Ryabinin , Andrey Konovalov , Alexander Potapenko , Taras Madan , Dmitry Vyukov , "H . J . Lu" , Andi Kleen , Rick Edgecombe , Bharata B Rao , Jacob Pan , Ashok Raj , Linus Torvalds , linux-mm@kvack.org, linux-kernel@vger.kernel.org, "Kirill A. Shutemov" Subject: [PATCHv13 04/16] mm: Introduce untagged_addr_remote() Date: Tue, 27 Dec 2022 06:08:17 +0300 Message-Id: <20221227030829.12508-5-kirill.shutemov@linux.intel.com> X-Mailer: git-send-email 2.38.2 In-Reply-To: <20221227030829.12508-1-kirill.shutemov@linux.intel.com> References: <20221227030829.12508-1-kirill.shutemov@linux.intel.com> MIME-Version: 1.0 X-Rspam-User: X-Rspamd-Queue-Id: EE79A1A0004 X-Rspamd-Server: rspam01 X-Stat-Signature: fbfhr4gk4yha7fm11qm4nwbfrn4azuj8 X-HE-Tag: 1672110527-827226 X-HE-Meta: U2FsdGVkX1/+odKZu59MS1u0+4lqL3OxweB+RtqqDzbg+rDl4XcvaqfIvH+f5B0ulEI6UmQtKLC0j46bIB/04DpUGc8CAJLZACUnmLS/khEnzKOdxPW2zLQ11ypk5BZ+crQ4WOGmSbdK9rZ8bfjsG7IWdIxsMj+ZDIeV9zSu0SJVxCY3LqG6xmkWTWGabsoXR9jNgXspk7e5QuCf2hzYOcN8kmonk3Z+9xkb2qzIV+uAAFzYxkg1hVjIm5FEdQQfHS59nEp36xAm7EZi8HZ6KdgamBJ7FJ8RyTUyaSAefuIovKbv50j8NRv78rqYZYsqM6Vhn+bOa/ITOELZiEq1NbeePvgpi8/rAxyrzQ0YEj+Yoxmb7cF7iC9l3t8szF9yoSg7A5SOk+75RB8t9uYob+9qNKFYPxgL30TsVkAhJYmLaPxxZh07r3nMNvZyI+Hv63KgJ2FtS7/F5IoUKHgGBvcSLJoJXrUQMvyYZH5CWbzKvnCqz95JXM4uEgsPLFoZ3G/KQdahtrRj2fQuSxu3amZwk3nbx6sPSzmbvh9/bTUL6/uf7bbBGbrrQ/BaOhEhZadZUWrUxb/2RP1urvHJrTRmL6pvxGzZL/XcvuJN6tSeS1doWQ+n4940EaWvPA992qAF6B9RRUk4me3vNWMsf7pG5cXhXakUBznNy7pFy5q1xPI0Io7K8p9CyNSFyzkR5OLOkjJXJ2ZEXCSFWZ3f40m2Z414ywyeXhRAr0SnAuNbf06NSPtgP4EDoGuI/86VkeZ0LfWdkMMSlhizyj97YTzOcoo31B69b7Rn7F/xDfzDdhiCnROLGF2MPehAlQsAomhQCKCps8DoNOLXqVVokIdiQnqCkPG8pQYYhFPlxjHNnQOyXm4bIHSVpAzLhQJT9Y4e34uyoYSMj6JWrcBXivH+/rem+OGyemTfNtzCuxMXW2Kaeu/aIKEnoR0Oy+eT2smTW0x88bYgkFN/mUb uTHKkITd FuMG2tfRRGAQV7ThfSr0Tymblr1UGCwc7Q4OE X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: untagged_addr() removes tags/metadata from the address and brings it to the canonical form. The helper is implemented on arm64 and sparc. Both of them do untagging based on global rules. However, Linear Address Masking (LAM) on x86 introduces per-process settings for untagging. As a result, untagged_addr() is now only suitable for untagging addresses for the current proccess. The new helper untagged_addr_remote() has to be used when the address targets remote process. It requires the mmap lock for target mm to be taken. Export dump_mm() as there's now the first user for it: VFIO can be compiled as module and untagged_addr_remote() triggers dump_mm() via mmap_assert_locked(). Signed-off-by: Kirill A. Shutemov --- arch/sparc/include/asm/uaccess_64.h | 2 ++ drivers/vfio/vfio_iommu_type1.c | 2 +- fs/proc/task_mmu.c | 2 +- include/linux/mm.h | 11 ----------- include/linux/uaccess.h | 22 ++++++++++++++++++++++ mm/debug.c | 1 + mm/gup.c | 4 ++-- mm/madvise.c | 5 +++-- mm/migrate.c | 2 +- 9 files changed, 33 insertions(+), 18 deletions(-) diff --git a/arch/sparc/include/asm/uaccess_64.h b/arch/sparc/include/asm/uaccess_64.h index 94266a5c5b04..b825a5dd0210 100644 --- a/arch/sparc/include/asm/uaccess_64.h +++ b/arch/sparc/include/asm/uaccess_64.h @@ -8,8 +8,10 @@ #include #include +#include #include #include +#include #include #include diff --git a/drivers/vfio/vfio_iommu_type1.c b/drivers/vfio/vfio_iommu_type1.c index 23c24fe98c00..daf34f957b7b 100644 --- a/drivers/vfio/vfio_iommu_type1.c +++ b/drivers/vfio/vfio_iommu_type1.c @@ -573,7 +573,7 @@ static int vaddr_get_pfns(struct mm_struct *mm, unsigned long vaddr, goto done; } - vaddr = untagged_addr(vaddr); + vaddr = untagged_addr_remote(mm, vaddr); retry: vma = vma_lookup(mm, vaddr); diff --git a/fs/proc/task_mmu.c b/fs/proc/task_mmu.c index e35a0398db63..25786a808901 100644 --- a/fs/proc/task_mmu.c +++ b/fs/proc/task_mmu.c @@ -1693,7 +1693,7 @@ static ssize_t pagemap_read(struct file *file, char __user *buf, /* watch out for wraparound */ start_vaddr = end_vaddr; if (svpfn <= (ULONG_MAX >> PAGE_SHIFT)) - start_vaddr = untagged_addr(svpfn << PAGE_SHIFT); + start_vaddr = untagged_addr_remote(mm, svpfn << PAGE_SHIFT); /* Ensure the address is inside the task */ if (start_vaddr > mm->task_size) diff --git a/include/linux/mm.h b/include/linux/mm.h index f3f196e4d66d..6b28eb9c6ea2 100644 --- a/include/linux/mm.h +++ b/include/linux/mm.h @@ -96,17 +96,6 @@ extern int mmap_rnd_compat_bits __read_mostly; #include #include -/* - * Architectures that support memory tagging (assigning tags to memory regions, - * embedding these tags into addresses that point to these memory regions, and - * checking that the memory and the pointer tags match on memory accesses) - * redefine this macro to strip tags from pointers. - * It's defined as noop for architectures that don't support memory tagging. - */ -#ifndef untagged_addr -#define untagged_addr(addr) (addr) -#endif - #ifndef __pa_symbol #define __pa_symbol(x) __pa(RELOC_HIDE((unsigned long)(x), 0)) #endif diff --git a/include/linux/uaccess.h b/include/linux/uaccess.h index afb18f198843..bfdadf5f8bbb 100644 --- a/include/linux/uaccess.h +++ b/include/linux/uaccess.h @@ -10,6 +10,28 @@ #include +/* + * Architectures that support memory tagging (assigning tags to memory regions, + * embedding these tags into addresses that point to these memory regions, and + * checking that the memory and the pointer tags match on memory accesses) + * redefine this macro to strip tags from pointers. + * + * Passing down mm_struct allows to define untagging rules on per-process + * basis. + * + * It's defined as noop for architectures that don't support memory tagging. + */ +#ifndef untagged_addr +#define untagged_addr(addr) (addr) +#endif + +#ifndef untagged_addr_remote +#define untagged_addr_remote(mm, addr) ({ \ + mmap_assert_locked(mm); \ + untagged_addr(addr); \ +}) +#endif + /* * Architectures should provide two primitives (raw_copy_{to,from}_user()) * and get rid of their private instances of copy_{to,from}_user() and diff --git a/mm/debug.c b/mm/debug.c index 7f8e5f744e42..3c1b490c7e2b 100644 --- a/mm/debug.c +++ b/mm/debug.c @@ -215,6 +215,7 @@ void dump_mm(const struct mm_struct *mm) mm->def_flags, &mm->def_flags ); } +EXPORT_SYMBOL_GPL(dump_mm); static bool page_init_poisoning __read_mostly = true; diff --git a/mm/gup.c b/mm/gup.c index f45a3a5be53a..e28d787ba8f8 100644 --- a/mm/gup.c +++ b/mm/gup.c @@ -1091,7 +1091,7 @@ static long __get_user_pages(struct mm_struct *mm, if (!nr_pages) return 0; - start = untagged_addr(start); + start = untagged_addr_remote(mm, start); VM_BUG_ON(!!pages != !!(gup_flags & (FOLL_GET | FOLL_PIN))); @@ -1265,7 +1265,7 @@ int fixup_user_fault(struct mm_struct *mm, struct vm_area_struct *vma; vm_fault_t ret; - address = untagged_addr(address); + address = untagged_addr_remote(mm, address); if (unlocked) fault_flags |= FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE; diff --git a/mm/madvise.c b/mm/madvise.c index a56a6d17e201..90cd4a442fd2 100644 --- a/mm/madvise.c +++ b/mm/madvise.c @@ -1407,8 +1407,6 @@ int do_madvise(struct mm_struct *mm, unsigned long start, size_t len_in, int beh size_t len; struct blk_plug plug; - start = untagged_addr(start); - if (!madvise_behavior_valid(behavior)) return -EINVAL; @@ -1440,6 +1438,9 @@ int do_madvise(struct mm_struct *mm, unsigned long start, size_t len_in, int beh mmap_read_lock(mm); } + start = untagged_addr_remote(mm, start); + end = start + len; + blk_start_plug(&plug); error = madvise_walk_vmas(mm, start, end, behavior, madvise_vma_behavior); diff --git a/mm/migrate.c b/mm/migrate.c index a4d3fc65085f..2cdffeff9ffe 100644 --- a/mm/migrate.c +++ b/mm/migrate.c @@ -1839,7 +1839,7 @@ static int do_pages_move(struct mm_struct *mm, nodemask_t task_nodes, goto out_flush; if (get_user(node, nodes + i)) goto out_flush; - addr = (unsigned long)untagged_addr(p); + addr = (unsigned long)untagged_addr_remote(mm, p); err = -ENODEV; if (node < 0 || node >= MAX_NUMNODES) From patchwork Tue Dec 27 03:08:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kirill A. 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Shutemov" To: Dave Hansen , Andy Lutomirski , Peter Zijlstra Cc: x86@kernel.org, Kostya Serebryany , Andrey Ryabinin , Andrey Konovalov , Alexander Potapenko , Taras Madan , Dmitry Vyukov , "H . J . Lu" , Andi Kleen , Rick Edgecombe , Bharata B Rao , Jacob Pan , Ashok Raj , Linus Torvalds , linux-mm@kvack.org, linux-kernel@vger.kernel.org, "Kirill A. Shutemov" Subject: [PATCHv13 05/16] x86/uaccess: Provide untagged_addr() and remove tags before address check Date: Tue, 27 Dec 2022 06:08:18 +0300 Message-Id: <20221227030829.12508-6-kirill.shutemov@linux.intel.com> X-Mailer: git-send-email 2.38.2 In-Reply-To: <20221227030829.12508-1-kirill.shutemov@linux.intel.com> References: <20221227030829.12508-1-kirill.shutemov@linux.intel.com> MIME-Version: 1.0 X-Rspam-User: X-Rspamd-Queue-Id: 2C65A1A000D X-Rspamd-Server: rspam01 X-Stat-Signature: jh7nf4m571kpcgm7grjg6wmeofq6i9jo X-HE-Tag: 1672110530-273273 X-HE-Meta: U2FsdGVkX18tYsqea0W9LcUphqHOANcRokbnLzSsY6DkiH9tN/bznIcKougoy2JxLY4CX/ZEMOkd+/058/xN1bgYQu23W1J+aDVgRGz9e6lv4b+up/VyUscxBXefK5OT+eR9ZehdkDbWmzE3SSlbrrmXmRBesCsUE24nTjeLkPBs3VMsU3MXlTeyCCjAsYIWqM5XLttzRPKW99FjFAMm6pcOyXa8BdzGaaIt2QzbD6/vXkEhntM6VfDTZNjtQoWE+jcozcoTHUuZnWbOCVpIhlAppj1K094QC/kV4eWWUuLAQSVhEUzlh1Moxwpf9pgKHwaVcLNFaOWeUyj9aG7aZVEOKq5GwD/XlIDfy3x7PnSEZmEFlC5t3vkaLuqdCf00dT2Gi5W9kQQKUnClbwdObDUqxN/bZUrI7tHvgv5XXG5WlakCROSo63FsCAWy/C/ZnWBkZuJMXQxDy4U0pJhaVVxsjM6o4U9IqWpZ0jvtXFVAF/zlySsv4LpdmDchEyzlS4sOziiKaRw7RuEnFRn40xVZv7bBGt5qhEzeCD+skbpTf6mQ2VCOtRJxPyKYVc58VvQ+QoxMraj0pucTgTOLkt6YpSHYMzGtFdguw4weGNz13DcMQKJcYBF+/Wb71lD8fSIH2vRIvhdzl0DBI5+YZG0HdajYFVgAk1Jc/dhWlU6R3CKM3pkzYLqdxpsz2AJcZUKCKgHrZmGxbk9+5SHGDMbBSeTsnIYSGkhB9RnrJ2V73Qw4Ky7/ZGd+EmL49bE6KeVeLLHkIo+7+XNPK8uNNBXXd2+qn24qpSs2eq7nIeAeY0ooeqwKkHKLloB61ikBQPK8wg5nbqtarF5jnt+/oss52Jy5EqbaVMP+syDhq9o3KpETb60httZqgmRhqu8E2RIIYa0cD8TBs0yCjSTPCh0lS2aQhF36ZJn1J2kCoXqipwlXVKKf774H86AMwGhFDjwoVCyod7lYqz65gaf 06ST1oiT 7LVgZLOztP28iS0OIQ8QPHXrG9k3t24Y+SJ+H X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: untagged_addr() is a helper used by the core-mm to strip tag bits and get the address to the canonical shape. In only handles userspace addresses. The untagging mask is stored in mmu_context and will be set on enabling LAM for the process. The tags must not be included into check whether it's okay to access the userspace address. Strip tags in access_ok(). get_user() and put_user() don't use access_ok(), but check access against TASK_SIZE directly in assembly. Strip tags, before calling into the assembly helper. Signed-off-by: Kirill A. Shutemov Acked-by: Peter Zijlstra (Intel) Acked-by: Andy Lutomirski Tested-by: Alexander Potapenko --- arch/x86/include/asm/mmu.h | 3 ++ arch/x86/include/asm/mmu_context.h | 11 +++++++ arch/x86/include/asm/uaccess.h | 47 +++++++++++++++++++++++++++--- arch/x86/kernel/process.c | 3 ++ 4 files changed, 60 insertions(+), 4 deletions(-) diff --git a/arch/x86/include/asm/mmu.h b/arch/x86/include/asm/mmu.h index 9a046aacad8d..ed72fcd2292d 100644 --- a/arch/x86/include/asm/mmu.h +++ b/arch/x86/include/asm/mmu.h @@ -43,6 +43,9 @@ typedef struct { /* Active LAM mode: X86_CR3_LAM_U48 or X86_CR3_LAM_U57 or 0 (disabled) */ unsigned long lam_cr3_mask; + + /* Significant bits of the virtual address. Excludes tag bits. */ + u64 untag_mask; #endif struct mutex lock; diff --git a/arch/x86/include/asm/mmu_context.h b/arch/x86/include/asm/mmu_context.h index 464cca41d20a..71581cb4811b 100644 --- a/arch/x86/include/asm/mmu_context.h +++ b/arch/x86/include/asm/mmu_context.h @@ -100,6 +100,12 @@ static inline unsigned long mm_lam_cr3_mask(struct mm_struct *mm) static inline void dup_lam(struct mm_struct *oldmm, struct mm_struct *mm) { mm->context.lam_cr3_mask = oldmm->context.lam_cr3_mask; + mm->context.untag_mask = oldmm->context.untag_mask; +} + +static inline void mm_reset_untag_mask(struct mm_struct *mm) +{ + mm->context.untag_mask = -1UL; } #else @@ -112,6 +118,10 @@ static inline unsigned long mm_lam_cr3_mask(struct mm_struct *mm) static inline void dup_lam(struct mm_struct *oldmm, struct mm_struct *mm) { } + +static inline void mm_reset_untag_mask(struct mm_struct *mm) +{ +} #endif #define enter_lazy_tlb enter_lazy_tlb @@ -138,6 +148,7 @@ static inline int init_new_context(struct task_struct *tsk, mm->context.execute_only_pkey = -1; } #endif + mm_reset_untag_mask(mm); init_new_context_ldt(mm); return 0; } diff --git a/arch/x86/include/asm/uaccess.h b/arch/x86/include/asm/uaccess.h index 1cc756eafa44..cbb463e9344f 100644 --- a/arch/x86/include/asm/uaccess.h +++ b/arch/x86/include/asm/uaccess.h @@ -7,6 +7,7 @@ #include #include #include +#include #include #include #include @@ -21,6 +22,37 @@ static inline bool pagefault_disabled(void); # define WARN_ON_IN_IRQ() #endif +#ifdef CONFIG_X86_64 +/* + * Mask out tag bits from the address. + * + * Magic with the 'sign' allows to untag userspace pointer without any branches + * while leaving kernel addresses intact. + */ +#define __untagged_addr(mm, addr) ({ \ + u64 __addr = (__force u64)(addr); \ + s64 sign = (s64)__addr >> 63; \ + __addr &= READ_ONCE((mm)->context.untag_mask) | sign; \ + (__force __typeof__(addr))__addr; \ +}) + +#define untagged_addr(addr) __untagged_addr(current->mm, addr) + +#define untagged_addr_remote(mm, addr) ({ \ + mmap_assert_locked(mm); \ + __untagged_addr(mm, addr); \ +}) + +#define untagged_ptr(ptr) ({ \ + u64 __ptrval = (__force u64)(ptr); \ + __ptrval = untagged_addr(__ptrval); \ + (__force __typeof__(ptr))__ptrval; \ +}) +#else +#define untagged_addr(addr) (addr) +#define untagged_ptr(ptr) (ptr) +#endif + /** * access_ok - Checks if a user space pointer is valid * @addr: User space pointer to start of block to check @@ -38,10 +70,10 @@ static inline bool pagefault_disabled(void); * Return: true (nonzero) if the memory block may be valid, false (zero) * if it is definitely invalid. */ -#define access_ok(addr, size) \ +#define access_ok(addr, size) \ ({ \ WARN_ON_IN_IRQ(); \ - likely(__access_ok(addr, size)); \ + likely(__access_ok(untagged_addr(addr), size)); \ }) #include @@ -127,7 +159,11 @@ extern int __get_user_bad(void); * Return: zero on success, or -EFAULT on error. * On error, the variable @x is set to zero. */ -#define get_user(x,ptr) ({ might_fault(); do_get_user_call(get_user,x,ptr); }) +#define get_user(x,ptr) \ +({ \ + might_fault(); \ + do_get_user_call(get_user,x,untagged_ptr(ptr)); \ +}) /** * __get_user - Get a simple variable from user space, with less checking. @@ -227,7 +263,10 @@ extern void __put_user_nocheck_8(void); * * Return: zero on success, or -EFAULT on error. */ -#define put_user(x, ptr) ({ might_fault(); do_put_user_call(put_user,x,ptr); }) +#define put_user(x, ptr) ({ \ + might_fault(); \ + do_put_user_call(put_user,x,untagged_ptr(ptr)); \ +}) /** * __put_user - Write a simple value into user space, with less checking. diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c index 40d156a31676..ef6bde1d40d8 100644 --- a/arch/x86/kernel/process.c +++ b/arch/x86/kernel/process.c @@ -47,6 +47,7 @@ #include #include #include +#include #include "process.h" @@ -367,6 +368,8 @@ void arch_setup_new_exec(void) task_clear_spec_ssb_noexec(current); speculation_ctrl_update(read_thread_flags()); } + + mm_reset_untag_mask(current->mm); } #ifdef CONFIG_X86_IOPL_IOPERM From patchwork Tue Dec 27 03:08:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kirill A. Shutemov" X-Patchwork-Id: 13082051 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5DAEAC46467 for ; Tue, 27 Dec 2022 03:09:05 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id BBAA28E0005; Mon, 26 Dec 2022 22:08:57 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id AA6C58E000E; Mon, 26 Dec 2022 22:08:57 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 65F4F8E0005; Mon, 26 Dec 2022 22:08:57 -0500 (EST) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0011.hostedemail.com [216.40.44.11]) by kanga.kvack.org (Postfix) with ESMTP id 3E2A98E000D for ; Mon, 26 Dec 2022 22:08:57 -0500 (EST) Received: from smtpin18.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay06.hostedemail.com (Postfix) with ESMTP id 1D01CA973B for ; Tue, 27 Dec 2022 03:08:57 +0000 (UTC) X-FDA: 80286604314.18.6FC7830 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by imf17.hostedemail.com (Postfix) with ESMTP id 1995440015 for ; Tue, 27 Dec 2022 03:08:54 +0000 (UTC) Authentication-Results: imf17.hostedemail.com; dkim=pass header.d=intel.com header.s=Intel header.b=Qk7mfQoM; dmarc=pass (policy=none) header.from=intel.com; spf=none (imf17.hostedemail.com: domain of kirill.shutemov@linux.intel.com has no SPF policy when checking 134.134.136.24) smtp.mailfrom=kirill.shutemov@linux.intel.com ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1672110535; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=SxTKEkp8/tdII07qIAtITmj87G/OWchkwbQPUIEqdi0=; b=eVvGFDhzRSSQMuMScO/w9v1H1+rFnXlIB3GBWiBOImJOVC8zi/k0CCRvz52FFjFnJ7jmQ0 FnAOQAoD/+5fO9LWDYiAhNwFpIqhVI8aMnvf3HjQV4MfR2XSPjV80ceRx5Fo4ieptS6YCB VTOAjbZvoS9X1QdDRcYR7ZGDh3O1eAY= ARC-Authentication-Results: i=1; imf17.hostedemail.com; dkim=pass header.d=intel.com header.s=Intel header.b=Qk7mfQoM; dmarc=pass (policy=none) header.from=intel.com; spf=none (imf17.hostedemail.com: domain of kirill.shutemov@linux.intel.com has no SPF policy when checking 134.134.136.24) smtp.mailfrom=kirill.shutemov@linux.intel.com ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1672110535; a=rsa-sha256; cv=none; b=ndFLqxf7oiItmAYLLKbOCNsjbuEDgaNbcDpAJJT2G4tcmawN/zAVqCEeEbXEny56n5IOTi /YxNrVWi+lY89vk2xGKNfpfc2Ra/AbO+5kNx41Gswb2d+41alP6upleVKTtm4QM2s6sTjC 254V9B3AHIzv+PPv6Nfmqvw/fAxpnn4= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1672110535; x=1703646535; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=PApE0uZLyXFEodnTh3dZSNMMuSzjiKqxGiIkJUnjdqE=; b=Qk7mfQoMMbPh30d7IY4eMDLF5nPNEyHDrtW3hi2/vTBkDuC3HXTnfbCD hHP9oxDXSA1z/ss1OKGEyijHxkZ6BuszS37TarqjldEtuY7PXD4efGR+A I4mxaktOZFCnue5w1oRXhDKbw7IOZdjXsLkPzM9QVB0gM1aPONFZVQeOb KJyUjX96rsY/aAtBX0hMF0Z/RcllSR2wb4AmEXPmWz1boefFWXWsNmXAv uWWbHwrZabcO5N39B9t9y1OCjz/HAu7TcyvSVvCBoLZ/+XMt+n/oA5aUr ywsB7rwlg4+odBQcYBQC12PdwfIQvmkFaRjnaMGr8l2+y0OCTXb7CClC4 g==; X-IronPort-AV: E=McAfee;i="6500,9779,10572"; a="321869791" X-IronPort-AV: E=Sophos;i="5.96,277,1665471600"; d="scan'208";a="321869791" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Dec 2022 19:08:52 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10572"; a="652917547" X-IronPort-AV: E=Sophos;i="5.96,277,1665471600"; d="scan'208";a="652917547" Received: from ppogotov-mobl.ger.corp.intel.com (HELO box.shutemov.name) ([10.252.62.152]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Dec 2022 19:08:47 -0800 Received: by box.shutemov.name (Postfix, from userid 1000) id B478C10BBB3; Tue, 27 Dec 2022 06:08:36 +0300 (+03) From: "Kirill A. Shutemov" To: Dave Hansen , Andy Lutomirski , Peter Zijlstra Cc: x86@kernel.org, Kostya Serebryany , Andrey Ryabinin , Andrey Konovalov , Alexander Potapenko , Taras Madan , Dmitry Vyukov , "H . J . Lu" , Andi Kleen , Rick Edgecombe , Bharata B Rao , Jacob Pan , Ashok Raj , Linus Torvalds , linux-mm@kvack.org, linux-kernel@vger.kernel.org, "Kirill A. Shutemov" Subject: [PATCHv13 06/16] x86/mm: Provide arch_prctl() interface for LAM Date: Tue, 27 Dec 2022 06:08:19 +0300 Message-Id: <20221227030829.12508-7-kirill.shutemov@linux.intel.com> X-Mailer: git-send-email 2.38.2 In-Reply-To: <20221227030829.12508-1-kirill.shutemov@linux.intel.com> References: <20221227030829.12508-1-kirill.shutemov@linux.intel.com> MIME-Version: 1.0 X-Rspam-User: X-Rspamd-Server: rspam02 X-Rspamd-Queue-Id: 1995440015 X-Stat-Signature: 43kske6khfjkothr8zzz7zp91wke5fpd X-HE-Tag: 1672110534-611237 X-HE-Meta: U2FsdGVkX191IAq1JuSpbffQDay21IK9Fra9GPIH0s9yr08pkDq6cbYk3dCARhcIDQuKaffUyFdmJbiZhuHlLWCBh4ZCdcdLH7e6sljASjB8hADUqSF6lJMnuGcXtmiEa/Nv7QuuRuSVsNiJC1Pmlvi9c9h88btQNDI6p3GKh0kkvQUA3BVpPi50Vry4o3IweMDVMVwa/IQMfcoOzAAhqB/BgSbnUOEnNwqGa0e4RWvBayDxQhx2Z0Lzd2KE5C02acZjNqIesGECmrQg5LXSUQrZt05EGc/bvZGjwBJnTejPWXikURUCKyK819wPo1DO/edXJRnnqsYgGJo3oC5DkOTuJHIo6fjEAoxX7LL4Vt3p/vPAyoI7sLZEfqyZaKtjRv6E+9JKwVHwJrUn5hSbVLnD112bDNHVz2eCMMICAQYacn9xsobAFh4yMYiIERvS4Q5dJRX8HM/8umdVN2KGUwThoRpfM3l78g6RpLcHxhuELyUU5TA/P9vUKqaIgjMsOso+M/jLnglvWuTkbantLATdqZP6/QZ94K0PWt+MGXvnXWcLHgeL2OOaQzNs98/PY5Q4xPpBOeU1fvXCVZPLpZa5arAleVYp5ber8h9AxtzP9nFQugFjlvdMyJZhSj+m0bEs5T2pcHXUDvfc9MjDOyxjaxLS/kaZtHGX476siFAe53ScEpjD3NUQ+2mh19eynVpVbOswcC4hCobkGbYEptGpUN8GxpvUHZn+q35zwz06+2Jcr0jsEPVFet7iAYMWtEVXyZMnEHu6mkG20nqEnj2IoiDQKXWjWfqp+PbcckwkMrCqZ4kTQdNWh4kRyMp3NPqCOjo9dl3RJ+y6Mzohj6GIoiLfW+Sf/tBNjy+hTzKU7VcHyEkzylpdeHt969BpLf/CBfVs+HMZ0w5Pe3JqihCnCVQmdhQ4qBCE2OjHiFLodmcI4Fg5/HuiBeWf7xXkpRYwOI3Ly/JxHh59rd4 hsdvS9QS zxccqO+6U2V/2fjV44hBt54XXZIgeLifoSMIb X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: Add a couple of arch_prctl() handles: - ARCH_ENABLE_TAGGED_ADDR enabled LAM. The argument is required number of tag bits. It is rounded up to the nearest LAM mode that can provide it. For now only LAM_U57 is supported, with 6 tag bits. - ARCH_GET_UNTAG_MASK returns untag mask. It can indicates where tag bits located in the address. - ARCH_GET_MAX_TAG_BITS returns the maximum tag bits user can request. Zero if LAM is not supported. Signed-off-by: Kirill A. Shutemov --- arch/x86/include/asm/mmu.h | 2 ++ arch/x86/include/uapi/asm/prctl.h | 4 +++ arch/x86/kernel/process.c | 3 +++ arch/x86/kernel/process_64.c | 44 ++++++++++++++++++++++++++++++- 4 files changed, 52 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/mmu.h b/arch/x86/include/asm/mmu.h index ed72fcd2292d..54e4a3e9b5c5 100644 --- a/arch/x86/include/asm/mmu.h +++ b/arch/x86/include/asm/mmu.h @@ -12,6 +12,8 @@ #define MM_CONTEXT_UPROBE_IA32 0 /* vsyscall page is accessible on this MM */ #define MM_CONTEXT_HAS_VSYSCALL 1 +/* Do not allow changing LAM mode */ +#define MM_CONTEXT_LOCK_LAM 2 /* * x86 has arch-specific MMU state beyond what lives in mm_struct. diff --git a/arch/x86/include/uapi/asm/prctl.h b/arch/x86/include/uapi/asm/prctl.h index 500b96e71f18..a31e27b95b19 100644 --- a/arch/x86/include/uapi/asm/prctl.h +++ b/arch/x86/include/uapi/asm/prctl.h @@ -20,4 +20,8 @@ #define ARCH_MAP_VDSO_32 0x2002 #define ARCH_MAP_VDSO_64 0x2003 +#define ARCH_GET_UNTAG_MASK 0x4001 +#define ARCH_ENABLE_TAGGED_ADDR 0x4002 +#define ARCH_GET_MAX_TAG_BITS 0x4003 + #endif /* _ASM_X86_PRCTL_H */ diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c index ef6bde1d40d8..cc0677f58f42 100644 --- a/arch/x86/kernel/process.c +++ b/arch/x86/kernel/process.c @@ -162,6 +162,9 @@ int copy_thread(struct task_struct *p, const struct kernel_clone_args *args) savesegment(es, p->thread.es); savesegment(ds, p->thread.ds); + + if (p->mm && (clone_flags & (CLONE_VM | CLONE_VFORK)) == CLONE_VM) + set_bit(MM_CONTEXT_LOCK_LAM, &p->mm->context.flags); #else p->thread.sp0 = (unsigned long) (childregs + 1); savesegment(gs, p->thread.gs); diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c index 8b06034e8c70..fef127ed79b6 100644 --- a/arch/x86/kernel/process_64.c +++ b/arch/x86/kernel/process_64.c @@ -743,6 +743,39 @@ static long prctl_map_vdso(const struct vdso_image *image, unsigned long addr) } #endif +#define LAM_U57_BITS 6 + +static int prctl_enable_tagged_addr(struct mm_struct *mm, unsigned long nr_bits) +{ + if (!cpu_feature_enabled(X86_FEATURE_LAM)) + return -ENODEV; + + if (test_bit(MM_CONTEXT_LOCK_LAM, &mm->context.flags)) + return -EBUSY; + + if (mmap_write_lock_killable(mm)) + return -EINTR; + + if (!nr_bits) { + mmap_write_unlock(mm); + return -EINVAL; + } else if (nr_bits <= LAM_U57_BITS) { + mm->context.lam_cr3_mask = X86_CR3_LAM_U57; + mm->context.untag_mask = ~GENMASK(62, 57); + } else { + mmap_write_unlock(mm); + return -EINVAL; + } + + write_cr3(__read_cr3() | mm->context.lam_cr3_mask); + set_tlbstate_cr3_lam_mask(mm->context.lam_cr3_mask); + set_bit(MM_CONTEXT_LOCK_LAM, &mm->context.flags); + + mmap_write_unlock(mm); + + return 0; +} + long do_arch_prctl_64(struct task_struct *task, int option, unsigned long arg2) { int ret = 0; @@ -830,7 +863,16 @@ long do_arch_prctl_64(struct task_struct *task, int option, unsigned long arg2) case ARCH_MAP_VDSO_64: return prctl_map_vdso(&vdso_image_64, arg2); #endif - + case ARCH_GET_UNTAG_MASK: + return put_user(task->mm->context.untag_mask, + (unsigned long __user *)arg2); + case ARCH_ENABLE_TAGGED_ADDR: + return prctl_enable_tagged_addr(task->mm, arg2); + case ARCH_GET_MAX_TAG_BITS: + if (!cpu_feature_enabled(X86_FEATURE_LAM)) + return put_user(0, (unsigned long __user *)arg2); + else + return put_user(LAM_U57_BITS, (unsigned long __user *)arg2); default: ret = -EINVAL; break; From patchwork Tue Dec 27 03:08:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kirill A. Shutemov" X-Patchwork-Id: 13082044 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4DE60C53210 for ; Tue, 27 Dec 2022 03:08:56 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 59F678E0007; Mon, 26 Dec 2022 22:08:54 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id 4B49E8E0005; Mon, 26 Dec 2022 22:08:54 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 2685F8E0007; Mon, 26 Dec 2022 22:08:54 -0500 (EST) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0014.hostedemail.com [216.40.44.14]) by kanga.kvack.org (Postfix) with ESMTP id 11ED58E0005 for ; Mon, 26 Dec 2022 22:08:54 -0500 (EST) Received: from smtpin11.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay05.hostedemail.com (Postfix) with ESMTP id D9D4C406CB for ; Tue, 27 Dec 2022 03:08:53 +0000 (UTC) X-FDA: 80286604146.11.D9915DD Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by imf13.hostedemail.com (Postfix) with ESMTP id EA82F20006 for ; Tue, 27 Dec 2022 03:08:51 +0000 (UTC) Authentication-Results: imf13.hostedemail.com; dkim=pass header.d=intel.com header.s=Intel header.b=cFiXzpj7; dmarc=pass (policy=none) header.from=intel.com; spf=none (imf13.hostedemail.com: domain of kirill.shutemov@linux.intel.com has no SPF policy when checking 192.55.52.151) smtp.mailfrom=kirill.shutemov@linux.intel.com ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1672110532; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=JaHQeXh+L8VDr3v14jKHr2jtqcMM5uGvvy+DcgWw4zw=; b=E3S2cC2Wc8XKwPFL/W3OqwdSwKsnduWUAJ+yC3cGXL8xqR+IQJ4ocKP4Qs2F12EJwT4NdU 071BC4l3KUXOlJt8UuNeu32B7/md+0qcNcq4xXdXDPIbUHaPuBA+Il9uxzLALwZwPKOYd1 hJCG6m6hMY9LyV9Q9voueczOb53EsXQ= ARC-Authentication-Results: i=1; imf13.hostedemail.com; dkim=pass header.d=intel.com header.s=Intel header.b=cFiXzpj7; dmarc=pass (policy=none) header.from=intel.com; spf=none (imf13.hostedemail.com: domain of kirill.shutemov@linux.intel.com has no SPF policy when checking 192.55.52.151) smtp.mailfrom=kirill.shutemov@linux.intel.com ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1672110532; a=rsa-sha256; cv=none; b=ZYpAiMIB+1GvMNIQb+cpnaCaELlCClSS3Nr95HxplwUWdX37He2UYLhTCBIg0KtVGBYY2l 9YOxR/OY4L2Qpj1jh/RXSma7xUpu/jo/kq5JlreJTFZRIzJeWIlbFml3GyVjgJLToYjMHc 2Fy57eznZhtxZ+N3cX2iTeVK2slIJZQ= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1672110532; x=1703646532; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=cWbMXq+BulH9gIMaAKVyjGjPeJ6XOcZ2RXQodh7xORI=; b=cFiXzpj7nKQO3QhZiHiv3juqbPE4qhL29p1AajyAloVQtPBxFSNjfsTg UpOkPjacLoJ3Uq9nQ5jRtRB80bS+uZBIExqCe9u6uiBYePwWJPG7Ta8MP MnF+GJEXpxPPFRagrE2/ioNSO+OW06P3ZYUfzGY40inD8Qe1dIGaBychC pl+XSFSC1IqIQ31uTHCkBouREyxJO3+nBxp+AXMkuqv3xDMAUqmAtdzfs /pdhpFpGRAFJtU6TdJyJUlHVWcXToSFy6jVq5XpDF0Y9A0Okrdf4mMzey MtgrRbm+Rwa6i7pblo/GfwVC06CUr3KH+S4HySRSy8hWv9X7QTljr78Su Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10572"; a="300994698" X-IronPort-AV: E=Sophos;i="5.96,277,1665471600"; d="scan'208";a="300994698" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Dec 2022 19:08:50 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10572"; a="741605217" X-IronPort-AV: E=Sophos;i="5.96,277,1665471600"; d="scan'208";a="741605217" Received: from ppogotov-mobl.ger.corp.intel.com (HELO box.shutemov.name) ([10.252.62.152]) by fmsmga003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Dec 2022 19:08:46 -0800 Received: by box.shutemov.name (Postfix, from userid 1000) id BEEAE10BBB4; Tue, 27 Dec 2022 06:08:36 +0300 (+03) From: "Kirill A. Shutemov" To: Dave Hansen , Andy Lutomirski , Peter Zijlstra Cc: x86@kernel.org, Kostya Serebryany , Andrey Ryabinin , Andrey Konovalov , Alexander Potapenko , Taras Madan , Dmitry Vyukov , "H . J . Lu" , Andi Kleen , Rick Edgecombe , Bharata B Rao , Jacob Pan , Ashok Raj , Linus Torvalds , linux-mm@kvack.org, linux-kernel@vger.kernel.org, "Kirill A. Shutemov" Subject: [PATCHv13 07/16] x86/mm: Reduce untagged_addr() overhead until the first LAM user Date: Tue, 27 Dec 2022 06:08:20 +0300 Message-Id: <20221227030829.12508-8-kirill.shutemov@linux.intel.com> X-Mailer: git-send-email 2.38.2 In-Reply-To: <20221227030829.12508-1-kirill.shutemov@linux.intel.com> References: <20221227030829.12508-1-kirill.shutemov@linux.intel.com> MIME-Version: 1.0 X-Rspamd-Queue-Id: EA82F20006 X-Rspamd-Server: rspam09 X-Rspam-User: X-Stat-Signature: ibhqorworzsysj98dhc4wq9q41w9skcc X-HE-Tag: 1672110531-19131 X-HE-Meta: U2FsdGVkX19Yda4dGtHR1HA0jfwT8QeV4Aq/pV0/vxP0cYjlLEZauuSYCnDrUewpL2+p0RdRM5GPOg90GxQayruNCq1kyhysOaSqbL8WoiCeogjIF4YJVBRqFL+U68tiX/p54H66o2Etru0hYg0+gChlSd9/elJg1qo0pE0EkcSQiePBnuc8jwgXHDuAmBlKN4BOOVpiba4+2Pse3ZKGcMvoOMECSe5KaPuyNyriCPfehGzbatEgCuFG/Ozz6teGrctrcZzp240oAkg2OG2ZYuMwKQUdPLz0emiPseP0fOpbD+NUJPzFNW50neVM1cnM0yV1tRf5n2UU9uJ5DJNlZNaRy+p9xjHobhYfpotHvCwp18/j3jABij1zJxTveuN4axbBYJcBgxO4OR/IM6jTMSLKGdP3jA4AFhX7KgdDCk+DEruJcuPfzC1LXH7zC1MFW/uwA5Fuptmtda9+IxltlbyZkZ8MS3qIW+v08w90Pfp1cUVu/A3BJPSgjG48MPL69Yww/dae2qD6jt1mahIK34k3lfUEx5E+A4kPe6yloitgkQ9Fp0/BQF52ktWregWY2TXJFN9gqi++M6LozC/7d8yjV1XE61FvS+/+1MGpNabN+VrXFPcWlObtwlQw0p4ItZAiyd/dwHzJKGBPy0cyWJRwg8KpT1DUQ+Th2bf7qeMdrAUl1FE8P9PCr/bOd4nsGETiho18DzL5vI8T7OmtOuq0M2rQn5/cnM88YujeTDHChlwiAC7ekDguFCKY6tRnU5MUI5tdqMaKBYAbDC8myK56YHJ7hXhnFDyePGrKRkoKYXeRNfu3L6xE/4YYXDZXCWcKdsidp3sZF2iHPltVc2fLl5HZ247sVTS/rpHELFMJy3MO/5g8kKLkEin42MZBdVWw6iHf0CVS5BUUFfUlTct2khEVvSQOgFihdsPH4hNs4OjTrqXsbXTjo/1n+Fzlz541kfCXQEz/6Ueobtv GLPxwYjm rVdxcAPD0dr3fUvG4Qk6XsnYX67sMCE4EJS6u X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: Use static key to reduce untagged_addr() overhead. The key only gets enabled when the first process enables LAM. Signed-off-by: Kirill A. Shutemov --- arch/x86/include/asm/uaccess.h | 9 +++++++-- arch/x86/kernel/process_64.c | 4 ++++ 2 files changed, 11 insertions(+), 2 deletions(-) diff --git a/arch/x86/include/asm/uaccess.h b/arch/x86/include/asm/uaccess.h index cbb463e9344f..1d931c7f6741 100644 --- a/arch/x86/include/asm/uaccess.h +++ b/arch/x86/include/asm/uaccess.h @@ -23,6 +23,8 @@ static inline bool pagefault_disabled(void); #endif #ifdef CONFIG_X86_64 +DECLARE_STATIC_KEY_FALSE(tagged_addr_key); + /* * Mask out tag bits from the address. * @@ -31,8 +33,11 @@ static inline bool pagefault_disabled(void); */ #define __untagged_addr(mm, addr) ({ \ u64 __addr = (__force u64)(addr); \ - s64 sign = (s64)__addr >> 63; \ - __addr &= READ_ONCE((mm)->context.untag_mask) | sign; \ + if (static_branch_likely(&tagged_addr_key)) { \ + s64 sign = (s64)__addr >> 63; \ + u64 mask = READ_ONCE((mm)->context.untag_mask); \ + __addr &= mask | sign; \ + } \ (__force __typeof__(addr))__addr; \ }) diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c index fef127ed79b6..09e7f3d3fb5c 100644 --- a/arch/x86/kernel/process_64.c +++ b/arch/x86/kernel/process_64.c @@ -743,6 +743,9 @@ static long prctl_map_vdso(const struct vdso_image *image, unsigned long addr) } #endif +DEFINE_STATIC_KEY_FALSE(tagged_addr_key); +EXPORT_SYMBOL_GPL(tagged_addr_key); + #define LAM_U57_BITS 6 static int prctl_enable_tagged_addr(struct mm_struct *mm, unsigned long nr_bits) @@ -773,6 +776,7 @@ static int prctl_enable_tagged_addr(struct mm_struct *mm, unsigned long nr_bits) mmap_write_unlock(mm); + static_branch_enable(&tagged_addr_key); return 0; } From patchwork Tue Dec 27 03:08:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kirill A. Shutemov" X-Patchwork-Id: 13082046 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 18C83C4708D for ; Tue, 27 Dec 2022 03:08:59 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id F167A8E0008; Mon, 26 Dec 2022 22:08:55 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id D89368E000A; Mon, 26 Dec 2022 22:08:55 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 9956D8E0005; Mon, 26 Dec 2022 22:08:55 -0500 (EST) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0010.hostedemail.com [216.40.44.10]) by kanga.kvack.org (Postfix) with ESMTP id 7E8C98E0008 for ; Mon, 26 Dec 2022 22:08:55 -0500 (EST) Received: from smtpin03.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay04.hostedemail.com (Postfix) with ESMTP id 4F2101A048A for ; Tue, 27 Dec 2022 03:08:55 +0000 (UTC) X-FDA: 80286604230.03.71AC4B0 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by imf19.hostedemail.com (Postfix) with ESMTP id 5CD7E1A000D for ; Tue, 27 Dec 2022 03:08:53 +0000 (UTC) Authentication-Results: imf19.hostedemail.com; dkim=pass header.d=intel.com header.s=Intel header.b=LHO+dDcX; spf=none (imf19.hostedemail.com: domain of kirill.shutemov@linux.intel.com has no SPF policy when checking 192.55.52.151) smtp.mailfrom=kirill.shutemov@linux.intel.com; dmarc=pass (policy=none) header.from=intel.com ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1672110533; a=rsa-sha256; cv=none; b=LjjcBfM2D64PQS5P6XXZkKhTBgwvE7yMSq1tRKDhZxqs/4GzoixIozjc8HGEesHhy1hIeR csepMGFtcZswuK6m6r4s8Tb2MenH9D7oiGuCSM4G1YOR8TseM/cALCp2i0pBG0NhBQTNWB GXcq9p5Iuvp7z19Nk/QgWIfuhZ/Bx1E= ARC-Authentication-Results: i=1; imf19.hostedemail.com; dkim=pass header.d=intel.com header.s=Intel header.b=LHO+dDcX; spf=none (imf19.hostedemail.com: domain of kirill.shutemov@linux.intel.com has no SPF policy when checking 192.55.52.151) smtp.mailfrom=kirill.shutemov@linux.intel.com; dmarc=pass (policy=none) header.from=intel.com ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1672110533; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=IZoWeD42yWh9XTUsLlcRaLNhHxRpiWGm/Bt6fqyV4JE=; b=sJxzE9GJHVJvMSn1t8y8B0WejoiHUuo8U0UVo8UhEq0PaGgkiICWKB2byxvd1pbddyhL3T QCjNj3F+5wp05oA6CSBMfOFQ/GOOJJXBvTmBSwr7kc+zuVLJkt85IL/SqAJK5o08hiji+/ 2aPnAe5Cb2gOlC7x0SDvPKAYlAD5veY= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1672110533; x=1703646533; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=2hNvtI+I64q9AU5Zc+yHHwHftID1PyaOfc87+zaI4fg=; b=LHO+dDcXatztMn1YGE7pnDsrkClBvGfi/59YqBy3Ys0nqhF6EEM6QWY4 w5frZNIumIqecwqq6Fxl+4q717sO55k1qAona/RMKXQyi0RT+/eZDrj8q 0zXSANZqmHbnRGTGyniZc4vkJxS7chaAu1rl4IVGhumCN3PUbMXY9KxVy xN1hVadrK7P1NSbG4VV6a3OoW5bUriQVFP0vYJWpHf66/+os+orqGh9/g 12YIjyvAWQAAYqg1VAO0LA7lZW6VxIEOiGFG2VJm5njhRPBAZwl8kE64Q ZSnM+rkm313AQwdIO8n+rnkrSzz2bTAiwcEy95Mcp+1tSwYbP13KmgJCz g==; X-IronPort-AV: E=McAfee;i="6500,9779,10572"; a="300994707" X-IronPort-AV: E=Sophos;i="5.96,277,1665471600"; d="scan'208";a="300994707" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Dec 2022 19:08:50 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10572"; a="741605219" X-IronPort-AV: E=Sophos;i="5.96,277,1665471600"; d="scan'208";a="741605219" Received: from ppogotov-mobl.ger.corp.intel.com (HELO box.shutemov.name) ([10.252.62.152]) by fmsmga003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Dec 2022 19:08:46 -0800 Received: by box.shutemov.name (Postfix, from userid 1000) id C95CE10BBB5; Tue, 27 Dec 2022 06:08:36 +0300 (+03) From: "Kirill A. Shutemov" To: Dave Hansen , Andy Lutomirski , Peter Zijlstra Cc: x86@kernel.org, Kostya Serebryany , Andrey Ryabinin , Andrey Konovalov , Alexander Potapenko , Taras Madan , Dmitry Vyukov , "H . J . Lu" , Andi Kleen , Rick Edgecombe , Bharata B Rao , Jacob Pan , Ashok Raj , Linus Torvalds , linux-mm@kvack.org, linux-kernel@vger.kernel.org, "Kirill A. Shutemov" , Catalin Marinas Subject: [PATCHv13 08/16] mm: Expose untagging mask in /proc/$PID/status Date: Tue, 27 Dec 2022 06:08:21 +0300 Message-Id: <20221227030829.12508-9-kirill.shutemov@linux.intel.com> X-Mailer: git-send-email 2.38.2 In-Reply-To: <20221227030829.12508-1-kirill.shutemov@linux.intel.com> References: <20221227030829.12508-1-kirill.shutemov@linux.intel.com> MIME-Version: 1.0 X-Rspam-User: X-Rspamd-Queue-Id: 5CD7E1A000D X-Rspamd-Server: rspam01 X-Stat-Signature: 8m6br75cywjsrcj9csxo3yntctgrzhe9 X-HE-Tag: 1672110533-575663 X-HE-Meta: U2FsdGVkX191cSjRqgwuLXhoWRixoEWIH8EIJbHeYeWV0y0TBXzCyPhg3W9ipZQhpZbbTk7B/mIhrSPECEn2Rltl/uVgdsI71F4Z21qxykiDPamyw8vRUAsl3sND/ZsDNMCWB5Qf4Qzqwv8hjrnM+7VyW9afeZEyI2cGW+W0diEALGhE8nfuHZ1C0Isk28uK2PJdVoXwaSjoPC33fcix8Ypzq7tHESUQhgm6zw3W06EF0bQZ22ydmvCYl1CZ6+KnJLsHYlzIaAw4F7GTF7K7PovW3a5OGec6br+F9S/lEnSm83iK5oWEBrT48UjrEyBfP5U9S+n6iTGD96MvvcO1tSIdbKAj4Rz1Q1DPp9HmZOF7qkutjtHg8yHDAgAb58tLVTvpDQoG76TUUu0iN22DRWgtqDRl/7ChAb4zgvIhiCVHuVvTT3DLnWGxdnn6XsaYlAduruknP/F5ziSaFIBdTKx5yTgIAnDPbTgVGQDPs9n7Q2XeU7bsBk7exc+nuV9bzXH8yaohctvhaX5NStlVgvqPEf83pdznNxKF976Debfc0GtfP2+cVMeI64qQOJaDYFhnESlmOO+hnWWqdJRG/6eZWPGkBEEGEhJmQ5BIBHaoTySjTxyhVghQ7z1MwaxIBZhHgYuYCzvYRcKuB27BQ/HD9VoUA0WfiTtGBFleSalOtHlZqXNhLNTDpR2YQucxyYTy/nLTjuVbe/+SLLG4Nbj9Z7VbScUu3TDfgor8nHRz5iX4mp9QYsG+ZEbKulX1KYbgpk4pHXO0zjVxy1ct1cTxk2wgn+VvVQJ4ekcj9Yuxo15pHuhmgWXrGhJhTccE2tH4dBJSaC8o5dcQ+Dlg1LADqfQc0mM/skI+iDut6KQo9E/9oMhzLjmZCrhCNDlboRwvmkf4qsfUTogT5FiMvFrISZurkL1UHnpklEXRg/XMinL6Po4dBeFAjnEtofbdoZ0pOcNSAfLsM/30rZ3 ayjhRG5+ GSjjl9+73gjjgzALWZjZGYC68tQ== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: Add a line in /proc/$PID/status to report untag_mask. It can be used to find out LAM status of the process from the outside. It is useful for debuggers. Signed-off-by: Kirill A. Shutemov Acked-by: Catalin Marinas --- arch/arm64/include/asm/mmu_context.h | 6 ++++++ arch/sparc/include/asm/mmu_context_64.h | 6 ++++++ arch/x86/include/asm/mmu_context.h | 6 ++++++ fs/proc/array.c | 6 ++++++ include/linux/mmu_context.h | 7 +++++++ 5 files changed, 31 insertions(+) diff --git a/arch/arm64/include/asm/mmu_context.h b/arch/arm64/include/asm/mmu_context.h index 72dbd6400549..56911691bef0 100644 --- a/arch/arm64/include/asm/mmu_context.h +++ b/arch/arm64/include/asm/mmu_context.h @@ -288,6 +288,12 @@ void post_ttbr_update_workaround(void); unsigned long arm64_mm_context_get(struct mm_struct *mm); void arm64_mm_context_put(struct mm_struct *mm); +#define mm_untag_mask mm_untag_mask +static inline unsigned long mm_untag_mask(struct mm_struct *mm) +{ + return -1UL >> 8; +} + #include #endif /* !__ASSEMBLY__ */ diff --git a/arch/sparc/include/asm/mmu_context_64.h b/arch/sparc/include/asm/mmu_context_64.h index 7a8380c63aab..799e797c5cdd 100644 --- a/arch/sparc/include/asm/mmu_context_64.h +++ b/arch/sparc/include/asm/mmu_context_64.h @@ -185,6 +185,12 @@ static inline void finish_arch_post_lock_switch(void) } } +#define mm_untag_mask mm_untag_mask +static inline unsigned long mm_untag_mask(struct mm_struct *mm) +{ + return -1UL >> adi_nbits(); +} + #include #endif /* !(__ASSEMBLY__) */ diff --git a/arch/x86/include/asm/mmu_context.h b/arch/x86/include/asm/mmu_context.h index 71581cb4811b..7f9f9978c811 100644 --- a/arch/x86/include/asm/mmu_context.h +++ b/arch/x86/include/asm/mmu_context.h @@ -103,6 +103,12 @@ static inline void dup_lam(struct mm_struct *oldmm, struct mm_struct *mm) mm->context.untag_mask = oldmm->context.untag_mask; } +#define mm_untag_mask mm_untag_mask +static inline unsigned long mm_untag_mask(struct mm_struct *mm) +{ + return mm->context.untag_mask; +} + static inline void mm_reset_untag_mask(struct mm_struct *mm) { mm->context.untag_mask = -1UL; diff --git a/fs/proc/array.c b/fs/proc/array.c index 49283b8103c7..d2a94eafe9a3 100644 --- a/fs/proc/array.c +++ b/fs/proc/array.c @@ -428,6 +428,11 @@ static inline void task_thp_status(struct seq_file *m, struct mm_struct *mm) seq_printf(m, "THP_enabled:\t%d\n", thp_enabled); } +static inline void task_untag_mask(struct seq_file *m, struct mm_struct *mm) +{ + seq_printf(m, "untag_mask:\t%#lx\n", mm_untag_mask(mm)); +} + int proc_pid_status(struct seq_file *m, struct pid_namespace *ns, struct pid *pid, struct task_struct *task) { @@ -443,6 +448,7 @@ int proc_pid_status(struct seq_file *m, struct pid_namespace *ns, task_mem(m, mm); task_core_dumping(m, task); task_thp_status(m, mm); + task_untag_mask(m, mm); mmput(mm); } task_sig(m, task); diff --git a/include/linux/mmu_context.h b/include/linux/mmu_context.h index b9b970f7ab45..14b9c1fa05c4 100644 --- a/include/linux/mmu_context.h +++ b/include/linux/mmu_context.h @@ -28,4 +28,11 @@ static inline void leave_mm(int cpu) { } # define task_cpu_possible(cpu, p) cpumask_test_cpu((cpu), task_cpu_possible_mask(p)) #endif +#ifndef mm_untag_mask +static inline unsigned long mm_untag_mask(struct mm_struct *mm) +{ + return -1UL; +} +#endif + #endif From patchwork Tue Dec 27 03:08:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kirill A. Shutemov" X-Patchwork-Id: 13082050 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 24EF0C4332F for ; Tue, 27 Dec 2022 03:09:04 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 664068E000D; Mon, 26 Dec 2022 22:08:57 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id 5EBDF8E000E; Mon, 26 Dec 2022 22:08:57 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 32FCC8E0005; Mon, 26 Dec 2022 22:08:57 -0500 (EST) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0013.hostedemail.com [216.40.44.13]) by kanga.kvack.org (Postfix) with ESMTP id 0CBE28E000D for ; Mon, 26 Dec 2022 22:08:57 -0500 (EST) Received: from smtpin27.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay07.hostedemail.com (Postfix) with ESMTP id E3541160587 for ; Tue, 27 Dec 2022 03:08:56 +0000 (UTC) X-FDA: 80286604272.27.7BB908E Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by imf03.hostedemail.com (Postfix) with ESMTP id 0887820003 for ; Tue, 27 Dec 2022 03:08:54 +0000 (UTC) Authentication-Results: imf03.hostedemail.com; dkim=pass header.d=intel.com header.s=Intel header.b=WFqhykeA; spf=none (imf03.hostedemail.com: domain of kirill.shutemov@linux.intel.com has no SPF policy when checking 134.134.136.24) smtp.mailfrom=kirill.shutemov@linux.intel.com; dmarc=pass (policy=none) header.from=intel.com ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1672110535; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=RH27/yMEaIKNSxbdZlEBBsW8S4Z6jdHWiIv/A1SgiNc=; b=LzA62jh3A/O1LVJyWBPaQ4Js3Aaw/B69aNe0Ct6eq54W+H6QLdfIW5BqLqll3H75ZMRSDL yzKTpsrKLTgOSWUcEPuqu0AKK5mLoa3tkRIO8QuUlV2deHqliDE+9eUVr2pprhi1flmRST bSs0IGQGzVpjWaV0K8IPkeQatrTkxOw= ARC-Authentication-Results: i=1; imf03.hostedemail.com; dkim=pass header.d=intel.com header.s=Intel header.b=WFqhykeA; spf=none (imf03.hostedemail.com: domain of kirill.shutemov@linux.intel.com has no SPF policy when checking 134.134.136.24) smtp.mailfrom=kirill.shutemov@linux.intel.com; dmarc=pass (policy=none) header.from=intel.com ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1672110535; a=rsa-sha256; cv=none; b=L24AoHrTfgqTmDoejEu4ITlVKvmmjAauXHDDvtK6ppHmuLO8Bf4ZlJthGr8W6d7Byhc1Is 2lRYayCmOn8gNEzAoYE8V4LjBeMoYaKQeO64tzt9K+MlK/xwc7RKQi8QOL0LTVGsRuZDyL WY+hWfd90Pau4HZ+fCBU1sCZPE3rbSA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1672110535; x=1703646535; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Qz3TmQ0EtndSBYuEcqzm7EswKf58sIKEztNONQoPvAY=; b=WFqhykeAwUPkCSNunBethLiU4I92aS8AMo1Fpf/83RaPKt84K4/YZvsP W8sCVJFlY5kTGHcIFEn8nXgvspo+Yvx1EnVmfE+oIYWDMLwQNLFn+cH0R iOfzoMLGnPsQbJMWcE0tI0czgU1XhyGlxz7/IiNczVS86v36nt2eytRb0 SYXeyx3f5tqaicCp47NjAmDcZGj9HwNFY526U4JMZuaNm1K8IJfTmrttj TFZ60IDfMhTsLbrXs91GJO2P9xKEZI33hAgRHlsDg7htPGXivcUvKZ6+N VPkzrdCM23sLJN9S/jjOjgqLHaZFJvd4bTaw6G5HVTdTE42yJ4yBhYNdA w==; X-IronPort-AV: E=McAfee;i="6500,9779,10572"; a="321869783" X-IronPort-AV: E=Sophos;i="5.96,277,1665471600"; d="scan'208";a="321869783" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Dec 2022 19:08:52 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10572"; a="652917545" X-IronPort-AV: E=Sophos;i="5.96,277,1665471600"; d="scan'208";a="652917545" Received: from ppogotov-mobl.ger.corp.intel.com (HELO box.shutemov.name) ([10.252.62.152]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Dec 2022 19:08:47 -0800 Received: by box.shutemov.name (Postfix, from userid 1000) id D474E10BBB6; Tue, 27 Dec 2022 06:08:36 +0300 (+03) From: "Kirill A. Shutemov" To: Dave Hansen , Andy Lutomirski , Peter Zijlstra Cc: x86@kernel.org, Kostya Serebryany , Andrey Ryabinin , Andrey Konovalov , Alexander Potapenko , Taras Madan , Dmitry Vyukov , "H . J . Lu" , Andi Kleen , Rick Edgecombe , Bharata B Rao , Jacob Pan , Ashok Raj , Linus Torvalds , linux-mm@kvack.org, linux-kernel@vger.kernel.org, "Kirill A. Shutemov" Subject: [PATCHv13 09/16] iommu/sva: Replace pasid_valid() helper with mm_valid_pasid() Date: Tue, 27 Dec 2022 06:08:22 +0300 Message-Id: <20221227030829.12508-10-kirill.shutemov@linux.intel.com> X-Mailer: git-send-email 2.38.2 In-Reply-To: <20221227030829.12508-1-kirill.shutemov@linux.intel.com> References: <20221227030829.12508-1-kirill.shutemov@linux.intel.com> MIME-Version: 1.0 X-Rspam-User: X-Rspamd-Server: rspam04 X-Rspamd-Queue-Id: 0887820003 X-Stat-Signature: kbcowej9hsthsime3x1ii9jj5a43utrx X-HE-Tag: 1672110534-167670 X-HE-Meta: U2FsdGVkX18KwqMV3N5U+BWSKWVH8g4VvQ+GUaX4+Val/qgqKjjZFwuY9M1Y9cIT49glvKpCFjKtR7r3SluIzGYwMVnktFMiHEisN3KLoRk5DNTCjF7YF7rgzreUTDMCcJaWbXJZ1XCCOWdmh0OP7y0cgfI1vfyS+NIDDM+gbjmoZJGP8nbkNYUYle7PQAJi3jrgVoEoLrCqE1fdgJGeFoB6im5nrxvZKVo8dMQPbrYhuHCxqP/zYT15Lu5C13wK0Oy/ltFaUVShRqlst1LElqlp1hX4I9fotoq/G+dp9oggxSh8m8ezzMpB3wTmTJClMvSGIATqJsAQtJfeOpfPo9mkmJ5VAV3TomHrwUz2VFS9fHFMOJqxBQSOwgzJDrvBXKYb9BbnYgA9nDPY/UKaC2F+/nagv+Oms++IULqHpajpshCw/2Y8snkHFTT4SY5u1YXL2JVeQNfhFJhagiukmj8Fe21Bhfa0A80/QRgHhHcMryqZevFV1jMnp/aOC+KWU/HhUabsIKPeMNEu4df7ZHmOcnJp3dJ1TVQ8NRD+a5s8qQPIgnQSdmd7LGOC9rRNXWRO6M9HQO9Y5zprqaq1JYMXG7QHtDFTuQYbZ5FORJo/51IyygKl5UPal3LG0nlRC831nqm3ypvk5RXsRTnao4U+f0DvtuUzVCAa0w3ZgYj333s6CgTc+OIHQc+aMVHhJK/rtSzUONqor70ZYhPb0o3464Otv24naNTBl0VlltfuVWX6So4pzW5LKgo68azAyNaHKguhUOxtAq456QxgwY9TgY8wXslm6KtX9J+/4ExZn3WkrhqfTRdYO7W+cviXnE9u2X1IhtGMce1ywK2oTl4zrEjmpJUwEw0Z/Cc5IurxjjgkGBETQJxKO6wUs0CTZHAZh3YJD5DRGpX63teAu3t4fLLvZ8us0Dgfc55PahwAPwE6u58Ms35vsd9ys/uXC6OKqaNsHPrno2ksmc9 tySzLYmb BnhqEK74q4MlFs+Ste6ZEE/N/5g7rab6mJwiO X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: Kernel has few users of pasid_valid() and all but one checks if the process has PASID allocated. The helper takes ioasid_t as the input. Replace the helper with mm_valid_pasid() that takes mm_struct as the argument. The only call that checks PASID that is not tied to mm_struct is open-codded now. This is preparatory patch. It helps avoid ifdeffery: no need to dereference mm->pasid in generic code to check if the process has PASID. Signed-off-by: Kirill A. Shutemov --- arch/x86/kernel/traps.c | 6 +++--- drivers/iommu/iommu-sva.c | 4 ++-- include/linux/ioasid.h | 9 --------- include/linux/sched/mm.h | 8 +++++++- 4 files changed, 12 insertions(+), 15 deletions(-) diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c index d317dc3d06a3..8b83d8fbce71 100644 --- a/arch/x86/kernel/traps.c +++ b/arch/x86/kernel/traps.c @@ -671,15 +671,15 @@ static bool try_fixup_enqcmd_gp(void) if (!cpu_feature_enabled(X86_FEATURE_ENQCMD)) return false; - pasid = current->mm->pasid; - /* * If the mm has not been allocated a * PASID, the #GP can not be fixed up. */ - if (!pasid_valid(pasid)) + if (!mm_valid_pasid(current->mm)) return false; + pasid = current->mm->pasid; + /* * Did this thread already have its PASID activated? * If so, the #GP must be from something else. diff --git a/drivers/iommu/iommu-sva.c b/drivers/iommu/iommu-sva.c index 24bf9b2b58aa..4ee2929f0d7a 100644 --- a/drivers/iommu/iommu-sva.c +++ b/drivers/iommu/iommu-sva.c @@ -34,14 +34,14 @@ int iommu_sva_alloc_pasid(struct mm_struct *mm, ioasid_t min, ioasid_t max) mutex_lock(&iommu_sva_lock); /* Is a PASID already associated with this mm? */ - if (pasid_valid(mm->pasid)) { + if (mm_valid_pasid(mm)) { if (mm->pasid < min || mm->pasid >= max) ret = -EOVERFLOW; goto out; } pasid = ioasid_alloc(&iommu_sva_pasid, min, max, mm); - if (!pasid_valid(pasid)) + if (pasid == INVALID_IOASID) ret = -ENOMEM; else mm_pasid_set(mm, pasid); diff --git a/include/linux/ioasid.h b/include/linux/ioasid.h index af1c9d62e642..836ae09e92c2 100644 --- a/include/linux/ioasid.h +++ b/include/linux/ioasid.h @@ -40,10 +40,6 @@ void *ioasid_find(struct ioasid_set *set, ioasid_t ioasid, int ioasid_register_allocator(struct ioasid_allocator_ops *allocator); void ioasid_unregister_allocator(struct ioasid_allocator_ops *allocator); int ioasid_set_data(ioasid_t ioasid, void *data); -static inline bool pasid_valid(ioasid_t ioasid) -{ - return ioasid != INVALID_IOASID; -} #else /* !CONFIG_IOASID */ static inline ioasid_t ioasid_alloc(struct ioasid_set *set, ioasid_t min, @@ -74,10 +70,5 @@ static inline int ioasid_set_data(ioasid_t ioasid, void *data) return -ENOTSUPP; } -static inline bool pasid_valid(ioasid_t ioasid) -{ - return false; -} - #endif /* CONFIG_IOASID */ #endif /* __LINUX_IOASID_H */ diff --git a/include/linux/sched/mm.h b/include/linux/sched/mm.h index 2a243616f222..b69fe7e8c0ac 100644 --- a/include/linux/sched/mm.h +++ b/include/linux/sched/mm.h @@ -457,6 +457,11 @@ static inline void mm_pasid_init(struct mm_struct *mm) mm->pasid = INVALID_IOASID; } +static inline bool mm_valid_pasid(struct mm_struct *mm) +{ + return mm->pasid != INVALID_IOASID; +} + /* Associate a PASID with an mm_struct: */ static inline void mm_pasid_set(struct mm_struct *mm, u32 pasid) { @@ -465,13 +470,14 @@ static inline void mm_pasid_set(struct mm_struct *mm, u32 pasid) static inline void mm_pasid_drop(struct mm_struct *mm) { - if (pasid_valid(mm->pasid)) { + if (mm_valid_pasid(mm)) { ioasid_free(mm->pasid); mm->pasid = INVALID_IOASID; } } #else static inline void mm_pasid_init(struct mm_struct *mm) {} +static inline bool mm_valid_pasid(struct mm_struct *mm) { return false; } static inline void mm_pasid_set(struct mm_struct *mm, u32 pasid) {} static inline void mm_pasid_drop(struct mm_struct *mm) {} #endif From patchwork Tue Dec 27 03:08:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kirill A. Shutemov" X-Patchwork-Id: 13082052 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id A30F6C3DA79 for ; Tue, 27 Dec 2022 03:09:06 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id BB9B68E000F; Mon, 26 Dec 2022 22:08:58 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id B4D3C8E000E; Mon, 26 Dec 2022 22:08:58 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 91FCE8E000F; Mon, 26 Dec 2022 22:08:58 -0500 (EST) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0016.hostedemail.com [216.40.44.16]) by kanga.kvack.org (Postfix) with ESMTP id 729748E000E for ; Mon, 26 Dec 2022 22:08:58 -0500 (EST) Received: from smtpin16.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay02.hostedemail.com (Postfix) with ESMTP id F0AA4120612 for ; Tue, 27 Dec 2022 03:08:57 +0000 (UTC) X-FDA: 80286604314.16.DBE63DB Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by imf23.hostedemail.com (Postfix) with ESMTP id 1BB1314000D for ; Tue, 27 Dec 2022 03:08:55 +0000 (UTC) Authentication-Results: imf23.hostedemail.com; dkim=pass header.d=intel.com header.s=Intel header.b=kZD0SWF3; spf=none (imf23.hostedemail.com: domain of kirill.shutemov@linux.intel.com has no SPF policy when checking 134.134.136.24) smtp.mailfrom=kirill.shutemov@linux.intel.com; dmarc=pass (policy=none) header.from=intel.com ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1672110536; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=+IRLHyVHXI80YSVYaqVuD5iuaMqaAmx3HLnreDtNbNE=; b=L0nf4kgVC41Y68aAa+60FykUH/PyJBv3OGYyaUAbBfZLigWliPwpnRIn9m78P2ymQt9hJw 9+n/lCI9jm1fGK3Iv7SeQT7DPXxm7WaCErsCcPC9LVM9F7D/laPlULklvQXUZE3NJAypFl cE+OblHR/dAW2aiAfN1uuE/u5nuictA= ARC-Authentication-Results: i=1; imf23.hostedemail.com; dkim=pass header.d=intel.com header.s=Intel header.b=kZD0SWF3; spf=none (imf23.hostedemail.com: domain of kirill.shutemov@linux.intel.com has no SPF policy when checking 134.134.136.24) smtp.mailfrom=kirill.shutemov@linux.intel.com; dmarc=pass (policy=none) header.from=intel.com ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1672110536; a=rsa-sha256; cv=none; b=6HnwCAyH3+584hVy2fJJbnluYsbGtJiMNybwYxPLPppQX9sqtb+Y1xHNch4wWUJE11O0ja /iMH9HgAXWlYjM4dZFHw9nzfwO6uyig71feu3KJnaNSLgcCqG23V6GSjUA9XIYLX812q1r vrgRPswmCi/a7gwsV7rV+0mM3dMmo+0= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1672110536; x=1703646536; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=NXgfwVMopqIsMq8iO8GLDE0ia9jK476IcYsVpRyLMg4=; b=kZD0SWF3v8mn1m8Jbc9w8OcHqZ4plspSPPFawpHX97/7DJPjEeYLEHca TPtY2VMFv1qh6ycPPG6jRXiQ7QvCTrkK49U1Um+lxNCg1TTvQian7uhgs kU679JrobMokRdgN0vWOlg+ok/qs/aktnesa953C9ADzZRYnLdMqyLC1H 7M3eeCtFsJo1vkXsakBw6e8zAE2i4sFeJfYc1g1RWN89ZvJViZtKgGdqA yjFPKXMD7kf7UHFV31aJVEw3tALJn9q4sUmHzDxUvAYsQH9y/6xc7sDQE Iy1RejypHeoUyXlqQcR8H++jn6H5Z+D0H0Wndz0t9xsRKcOiKdEYk5Vri g==; X-IronPort-AV: E=McAfee;i="6500,9779,10572"; a="321869799" X-IronPort-AV: E=Sophos;i="5.96,277,1665471600"; d="scan'208";a="321869799" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Dec 2022 19:08:53 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10572"; a="652917550" X-IronPort-AV: E=Sophos;i="5.96,277,1665471600"; d="scan'208";a="652917550" Received: from ppogotov-mobl.ger.corp.intel.com (HELO box.shutemov.name) ([10.252.62.152]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Dec 2022 19:08:47 -0800 Received: by box.shutemov.name (Postfix, from userid 1000) id DEAA810BBB7; Tue, 27 Dec 2022 06:08:36 +0300 (+03) From: "Kirill A. Shutemov" To: Dave Hansen , Andy Lutomirski , Peter Zijlstra Cc: x86@kernel.org, Kostya Serebryany , Andrey Ryabinin , Andrey Konovalov , Alexander Potapenko , Taras Madan , Dmitry Vyukov , "H . J . Lu" , Andi Kleen , Rick Edgecombe , Bharata B Rao , Jacob Pan , Ashok Raj , Linus Torvalds , linux-mm@kvack.org, linux-kernel@vger.kernel.org, "Kirill A. Shutemov" Subject: [PATCHv13 10/16] x86/mm/iommu/sva: Make LAM and SVA mutually exclusive Date: Tue, 27 Dec 2022 06:08:23 +0300 Message-Id: <20221227030829.12508-11-kirill.shutemov@linux.intel.com> X-Mailer: git-send-email 2.38.2 In-Reply-To: <20221227030829.12508-1-kirill.shutemov@linux.intel.com> References: <20221227030829.12508-1-kirill.shutemov@linux.intel.com> MIME-Version: 1.0 X-Rspamd-Queue-Id: 1BB1314000D X-Stat-Signature: ukjcre86e8op4jj8q4pru9wxwfhhciae X-Rspam-User: X-Rspamd-Server: rspam08 X-HE-Tag: 1672110535-624770 X-HE-Meta: U2FsdGVkX19FXcdkvixAZjYLID94qkAKzvM7FwcL7v2PYqPjnK7o6vO0JHDc6yd3MTyjHq34XQIvww4ZFWEoEXnRomVx97ZFaRX6qIlI7Pk4pAjddfc/Ue7hvfZ578DjvQnTUBl3no1xVS8bb6jeSqCBH1y2U43Milgfo1vfFzHmXo8f5+odR1MbEw4z44hglaaZ/lZH7Jx0GfsbthFszLJmATm7xGcLiQEi/UdquzT6piAsb3CF4hClwUPQ052n9BPufZSzeUnUuPqpyUFC1hU2tzzIOO4KAtc3ohJQ565A/BR721inJLU4ltJfgSD0+Wa+a/d8J+nDiV/q2/nV9qY7J55aWw1qUvxTf4ybCV1DlpgrMtRgpz7Pokfghup1iHkgw1j7n76DtxLPX00BvRK6f2mBWl4npNl8JixKJKXBfo2Oh+oYuaLucWXCwfUvEsl1dsSnODHJ+j9pXJPnw7Or5iTWduuiYOY0BXzRFeNFuaR+4JSqePJx8rP/784t2NfP4O0jWmkGwIB73Ga0QvFGCdOMa9ZcT3ALfaot1MT635WsBJkv2WioHqXgQyTTWy9y3o48GkeQkEPkMzv2YJtpFNkDeUdsnviMJlAVgtpoQs2zjQmrGYSwAJgZuGUkn1FxPK2NSSQqPiHVhZ3p/SDwkW9nJkF3jEr36muviCa+th+bzMZG/07nod2nf1WORHHnG6WpnYpFxmWfb9NIwDuy7Q0SB28DQooiVBDaFwfNDzNq8ejCcY9Mjzkh5W8hTWJcKr8B34LeGjGB4N5NuqFtqOmmMenZONROKn2KqFXwqUaYxR75Se+I6kQsjZKYXnblYP4kRIp7gDrGEjJ8eAWbuFC4aSPTWBUM1fb2WDHcEPvZTejbWYRxTBs4UQFclZwbG3ntoB4+ZkATDBzm6A19caXnw5ndHawPBd1vOi03BT/0Yiebh+gjQGfo16F6UywroNEWXJ8= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: IOMMU and SVA-capable devices know nothing about LAM and only expect canonical addresses. An attempt to pass down tagged pointer will lead to address translation failure. By default do not allow to enable both LAM and use SVA in the same process. The new ARCH_FORCE_TAGGED_SVA arch_prctl() overrides the limitation. By using the arch_prctl() userspace takes responsibility to never pass tagged address to the device. Signed-off-by: Kirill A. Shutemov Reviewed-by: Ashok Raj Reviewed-by: Jacob Pan --- arch/x86/include/asm/mmu.h | 2 ++ arch/x86/include/asm/mmu_context.h | 6 ++++++ arch/x86/include/uapi/asm/prctl.h | 1 + arch/x86/kernel/process_64.c | 7 +++++++ drivers/iommu/iommu-sva.c | 4 ++++ include/linux/mmu_context.h | 7 +++++++ 6 files changed, 27 insertions(+) diff --git a/arch/x86/include/asm/mmu.h b/arch/x86/include/asm/mmu.h index 54e4a3e9b5c5..90d20679e4d7 100644 --- a/arch/x86/include/asm/mmu.h +++ b/arch/x86/include/asm/mmu.h @@ -14,6 +14,8 @@ #define MM_CONTEXT_HAS_VSYSCALL 1 /* Do not allow changing LAM mode */ #define MM_CONTEXT_LOCK_LAM 2 +/* Allow LAM and SVA coexisting */ +#define MM_CONTEXT_FORCE_TAGGED_SVA 3 /* * x86 has arch-specific MMU state beyond what lives in mm_struct. diff --git a/arch/x86/include/asm/mmu_context.h b/arch/x86/include/asm/mmu_context.h index 7f9f9978c811..4bc95c35cbd3 100644 --- a/arch/x86/include/asm/mmu_context.h +++ b/arch/x86/include/asm/mmu_context.h @@ -114,6 +114,12 @@ static inline void mm_reset_untag_mask(struct mm_struct *mm) mm->context.untag_mask = -1UL; } +#define arch_pgtable_dma_compat arch_pgtable_dma_compat +static inline bool arch_pgtable_dma_compat(struct mm_struct *mm) +{ + return !mm_lam_cr3_mask(mm) || + test_bit(MM_CONTEXT_FORCE_TAGGED_SVA, &mm->context.flags); +} #else static inline unsigned long mm_lam_cr3_mask(struct mm_struct *mm) diff --git a/arch/x86/include/uapi/asm/prctl.h b/arch/x86/include/uapi/asm/prctl.h index a31e27b95b19..eb290d89cb32 100644 --- a/arch/x86/include/uapi/asm/prctl.h +++ b/arch/x86/include/uapi/asm/prctl.h @@ -23,5 +23,6 @@ #define ARCH_GET_UNTAG_MASK 0x4001 #define ARCH_ENABLE_TAGGED_ADDR 0x4002 #define ARCH_GET_MAX_TAG_BITS 0x4003 +#define ARCH_FORCE_TAGGED_SVA 0x4004 #endif /* _ASM_X86_PRCTL_H */ diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c index 09e7f3d3fb5c..add85615d5ae 100644 --- a/arch/x86/kernel/process_64.c +++ b/arch/x86/kernel/process_64.c @@ -756,6 +756,10 @@ static int prctl_enable_tagged_addr(struct mm_struct *mm, unsigned long nr_bits) if (test_bit(MM_CONTEXT_LOCK_LAM, &mm->context.flags)) return -EBUSY; + if (mm_valid_pasid(mm) && + !test_bit(MM_CONTEXT_FORCE_TAGGED_SVA, &mm->context.flags)) + return -EINTR; + if (mmap_write_lock_killable(mm)) return -EINTR; @@ -872,6 +876,9 @@ long do_arch_prctl_64(struct task_struct *task, int option, unsigned long arg2) (unsigned long __user *)arg2); case ARCH_ENABLE_TAGGED_ADDR: return prctl_enable_tagged_addr(task->mm, arg2); + case ARCH_FORCE_TAGGED_SVA: + set_bit(MM_CONTEXT_FORCE_TAGGED_SVA, &task->mm->context.flags); + return 0; case ARCH_GET_MAX_TAG_BITS: if (!cpu_feature_enabled(X86_FEATURE_LAM)) return put_user(0, (unsigned long __user *)arg2); diff --git a/drivers/iommu/iommu-sva.c b/drivers/iommu/iommu-sva.c index 4ee2929f0d7a..dd76a1a09cf7 100644 --- a/drivers/iommu/iommu-sva.c +++ b/drivers/iommu/iommu-sva.c @@ -2,6 +2,7 @@ /* * Helpers for IOMMU drivers implementing SVA */ +#include #include #include #include @@ -32,6 +33,9 @@ int iommu_sva_alloc_pasid(struct mm_struct *mm, ioasid_t min, ioasid_t max) min == 0 || max < min) return -EINVAL; + if (!arch_pgtable_dma_compat(mm)) + return -EBUSY; + mutex_lock(&iommu_sva_lock); /* Is a PASID already associated with this mm? */ if (mm_valid_pasid(mm)) { diff --git a/include/linux/mmu_context.h b/include/linux/mmu_context.h index 14b9c1fa05c4..f2b7a3f04099 100644 --- a/include/linux/mmu_context.h +++ b/include/linux/mmu_context.h @@ -35,4 +35,11 @@ static inline unsigned long mm_untag_mask(struct mm_struct *mm) } #endif +#ifndef arch_pgtable_dma_compat +static inline bool arch_pgtable_dma_compat(struct mm_struct *mm) +{ + return true; +} +#endif + #endif From patchwork Tue Dec 27 03:08:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kirill A. 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Shutemov" To: Dave Hansen , Andy Lutomirski , Peter Zijlstra Cc: x86@kernel.org, Kostya Serebryany , Andrey Ryabinin , Andrey Konovalov , Alexander Potapenko , Taras Madan , Dmitry Vyukov , "H . J . Lu" , Andi Kleen , Rick Edgecombe , Bharata B Rao , Jacob Pan , Ashok Raj , Linus Torvalds , linux-mm@kvack.org, linux-kernel@vger.kernel.org, Weihong Zhang , "Kirill A . Shutemov" Subject: [PATCHv13 11/16] selftests/x86/lam: Add malloc and tag-bits test cases for linear-address masking Date: Tue, 27 Dec 2022 06:08:24 +0300 Message-Id: <20221227030829.12508-12-kirill.shutemov@linux.intel.com> X-Mailer: git-send-email 2.38.2 In-Reply-To: <20221227030829.12508-1-kirill.shutemov@linux.intel.com> References: <20221227030829.12508-1-kirill.shutemov@linux.intel.com> MIME-Version: 1.0 X-Stat-Signature: iwuyhw3exf3ypiz9wg5ed9mgikwkp33y X-Rspam-User: X-Rspamd-Queue-Id: CA8F2160006 X-Rspamd-Server: rspam06 X-HE-Tag: 1672110533-14558 X-HE-Meta: U2FsdGVkX18/eRc5mv4uwiiIrsEsVWfUm9YJ47xGdPsNtDTuL9dvjXD5wgcdE+6yA6t0QtTd+i7ub7rLnwV6TVmnOzhyhaINACVRMTRTVqdAUp4TqZdQyBt40J3QdMgnYdEGL5zxFyOHJ2Ylhp8wzQv66b9P0/JUrEbTTJ/5BVmMgLjtDpetl6OeshTbiN094sJxzPu7/obO4YY7yLB4vSIJCT+NEVA5/xBxXjDVnqg2/7hAVUcrHX/gg7QHyF0wEujV/bevkoVG1fEJdQH8D4JwSu6nKnxOJ8DxtBGdYVRz0e7iS18J+rWNIiVcz9btiaxrjIVARNVyBUtDTvR/vZh32aRol35GBuH6uiB/R+Dx5X90E+fKzq+J3taEftL/zgv864yC5DkLyUoKbdMKKwDAxyJvTf/weOD2OQgMY/vr3XwOEqTocVwZTbAzvIUjYN1yxsOXO3YKZwoh+DBxhdXTRn6gV6LS1UzKpKe+nVZlwjt2ZekRAPV/jZ7gSFeytW5k4t+f1tFI80BeJ5PUg88PoNMNURFlkpseiX4QOJpX9+Z6zN3815vTDIkOhlHd6ZYqLvrUohadRSar0hd/8kjgzJ4zGtzJgJIbZPoRfNMCFiXCZ4GIweXIeN0dRg8O2YqSYji4WMxLq+q7JWFd+9JLGgl3WbozIqbpGPutATr0n0JNzt6Th+1zi68JBQHhlXFFf0tHnYKBMQadbf/z+6ZlwgwsOfGsYoAeaGBXonzLHUZC6vZOGL9D2SV8bLgPiLOyv2iUkI8X+L6RtvtCYLNIq0S2PG+fkH/YNxpNHUB88ddwaPIGMGJxKeGNYpu3eC6z3Q85bDgezrILrJE/6HcPFYtx0ac/EyeYOQTU8pNmzMRN++07ioE0/TrHoySESYyw9RmuRaBhVK+H53H/a/Oc+x/cBV1ClbHX2OnDadHt6G0AhJhllbWJ24iw7R8+m6EK4b7irNo= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: From: Weihong Zhang LAM is supported only in 64-bit mode and applies only addresses used for data accesses. In 64-bit mode, linear address have 64 bits. LAM is applied to 64-bit linear address and allow software to use high bits for metadata. LAM supports configurations that differ regarding which pointer bits are masked and can be used for metadata. LAM includes following mode: - LAM_U57, pointer bits in positions 62:57 are masked (LAM width 6), allows bits 62:57 of a user pointer to be used as metadata. There are some arch_prctls: ARCH_ENABLE_TAGGED_ADDR: enable LAM mode, mask high bits of a user pointer. ARCH_GET_UNTAG_MASK: get current untagged mask. ARCH_GET_MAX_TAG_BITS: the maximum tag bits user can request. zero if LAM is not supported. The LAM mode is for pre-process, a process has only one chance to set LAM mode. But there is no API to disable LAM mode. So all of test cases are run under child process. Functions of this test: MALLOC - LAM_U57 masks bits 57:62 of a user pointer. Process on user space can dereference such pointers. - Disable LAM, dereference a pointer with metadata above 48 bit or 57 bit lead to trigger SIGSEGV. TAG_BITS - Max tag bits of LAM_U57 is 6. Signed-off-by: Weihong Zhang Signed-off-by: Kirill A. Shutemov --- tools/testing/selftests/x86/Makefile | 2 +- tools/testing/selftests/x86/lam.c | 326 +++++++++++++++++++++++++++ 2 files changed, 327 insertions(+), 1 deletion(-) create mode 100644 tools/testing/selftests/x86/lam.c diff --git a/tools/testing/selftests/x86/Makefile b/tools/testing/selftests/x86/Makefile index 0388c4d60af0..c1a16a9d4f2f 100644 --- a/tools/testing/selftests/x86/Makefile +++ b/tools/testing/selftests/x86/Makefile @@ -18,7 +18,7 @@ TARGETS_C_32BIT_ONLY := entry_from_vm86 test_syscall_vdso unwind_vdso \ test_FCMOV test_FCOMI test_FISTTP \ vdso_restorer TARGETS_C_64BIT_ONLY := fsgsbase sysret_rip syscall_numbering \ - corrupt_xstate_header amx + corrupt_xstate_header amx lam # Some selftests require 32bit support enabled also on 64bit systems TARGETS_C_32BIT_NEEDED := ldt_gdt ptrace_syscall diff --git a/tools/testing/selftests/x86/lam.c b/tools/testing/selftests/x86/lam.c new file mode 100644 index 000000000000..900a3a0fb709 --- /dev/null +++ b/tools/testing/selftests/x86/lam.c @@ -0,0 +1,326 @@ +// SPDX-License-Identifier: GPL-2.0 +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "../kselftest.h" + +#ifndef __x86_64__ +# error This test is 64-bit only +#endif + +/* LAM modes, these definitions were copied from kernel code */ +#define LAM_NONE 0 +#define LAM_U57_BITS 6 + +#define LAM_U57_MASK (0x3fULL << 57) +/* arch prctl for LAM */ +#define ARCH_GET_UNTAG_MASK 0x4001 +#define ARCH_ENABLE_TAGGED_ADDR 0x4002 +#define ARCH_GET_MAX_TAG_BITS 0x4003 + +/* Specified test function bits */ +#define FUNC_MALLOC 0x1 +#define FUNC_BITS 0x2 + +#define TEST_MASK 0x3 + +#define MALLOC_LEN 32 + +struct testcases { + unsigned int later; + int expected; /* 2: SIGSEGV Error; 1: other errors */ + unsigned long lam; + uint64_t addr; + int (*test_func)(struct testcases *test); + const char *msg; +}; + +int tests_cnt; +jmp_buf segv_env; + +static void segv_handler(int sig) +{ + ksft_print_msg("Get segmentation fault(%d).", sig); + siglongjmp(segv_env, 1); +} + +static inline int cpu_has_lam(void) +{ + unsigned int cpuinfo[4]; + + __cpuid_count(0x7, 1, cpuinfo[0], cpuinfo[1], cpuinfo[2], cpuinfo[3]); + + return (cpuinfo[0] & (1 << 26)); +} + +/* + * Set tagged address and read back untag mask. + * check if the untagged mask is expected. + * + * @return: + * 0: Set LAM mode successfully + * others: failed to set LAM + */ +static int set_lam(unsigned long lam) +{ + int ret = 0; + uint64_t ptr = 0; + + if (lam != LAM_U57_BITS && lam != LAM_NONE) + return -1; + + /* Skip check return */ + syscall(SYS_arch_prctl, ARCH_ENABLE_TAGGED_ADDR, lam); + + /* Get untagged mask */ + syscall(SYS_arch_prctl, ARCH_GET_UNTAG_MASK, &ptr); + + /* Check mask returned is expected */ + if (lam == LAM_U57_BITS) + ret = (ptr != ~(LAM_U57_MASK)); + else if (lam == LAM_NONE) + ret = (ptr != -1ULL); + + return ret; +} + +static unsigned long get_default_tag_bits(void) +{ + pid_t pid; + int lam = LAM_NONE; + int ret = 0; + + pid = fork(); + if (pid < 0) { + perror("Fork failed."); + } else if (pid == 0) { + /* Set LAM mode in child process */ + if (set_lam(LAM_U57_BITS) == 0) + lam = LAM_U57_BITS; + else + lam = LAM_NONE; + exit(lam); + } else { + wait(&ret); + lam = WEXITSTATUS(ret); + } + + return lam; +} + +/* According to LAM mode, set metadata in high bits */ +static uint64_t set_metadata(uint64_t src, unsigned long lam) +{ + uint64_t metadata; + + srand(time(NULL)); + /* Get a random value as metadata */ + metadata = rand(); + + switch (lam) { + case LAM_U57_BITS: /* Set metadata in bits 62:57 */ + metadata = (src & ~(LAM_U57_MASK)) | ((metadata & 0x3f) << 57); + break; + default: + metadata = src; + break; + } + + return metadata; +} + +/* + * Set metadata in user pointer, compare new pointer with original pointer. + * both pointers should point to the same address. + * + * @return: + * 0: value on the pointer with metadate and value on original are same + * 1: not same. + */ +static int handle_lam_test(void *src, unsigned int lam) +{ + char *ptr; + + strcpy((char *)src, "USER POINTER"); + + ptr = (char *)set_metadata((uint64_t)src, lam); + if (src == ptr) + return 0; + + /* Copy a string into the pointer with metadata */ + strcpy((char *)ptr, "METADATA POINTER"); + + return (!!strcmp((char *)src, (char *)ptr)); +} + + +int handle_max_bits(struct testcases *test) +{ + unsigned long exp_bits = get_default_tag_bits(); + unsigned long bits = 0; + + if (exp_bits != LAM_NONE) + exp_bits = LAM_U57_BITS; + + /* Get LAM max tag bits */ + if (syscall(SYS_arch_prctl, ARCH_GET_MAX_TAG_BITS, &bits) == -1) + return 1; + + return (exp_bits != bits); +} + +/* + * Test lam feature through dereference pointer get from malloc. + * @return 0: Pass test. 1: Get failure during test 2: Get SIGSEGV + */ +static int handle_malloc(struct testcases *test) +{ + char *ptr = NULL; + int ret = 0; + + if (test->later == 0 && test->lam != 0) + if (set_lam(test->lam) == -1) + return 1; + + ptr = (char *)malloc(MALLOC_LEN); + if (ptr == NULL) { + perror("malloc() failure\n"); + return 1; + } + + /* Set signal handler */ + if (sigsetjmp(segv_env, 1) == 0) { + signal(SIGSEGV, segv_handler); + ret = handle_lam_test(ptr, test->lam); + } else { + ret = 2; + } + + if (test->later != 0 && test->lam != 0) + if (set_lam(test->lam) == -1 && ret == 0) + ret = 1; + + free(ptr); + + return ret; +} + +static int fork_test(struct testcases *test) +{ + int ret, child_ret; + pid_t pid; + + pid = fork(); + if (pid < 0) { + perror("Fork failed."); + ret = 1; + } else if (pid == 0) { + ret = test->test_func(test); + exit(ret); + } else { + wait(&child_ret); + ret = WEXITSTATUS(child_ret); + } + + return ret; +} + +static void run_test(struct testcases *test, int count) +{ + int i, ret = 0; + + for (i = 0; i < count; i++) { + struct testcases *t = test + i; + + /* fork a process to run test case */ + ret = fork_test(t); + if (ret != 0) + ret = (t->expected == ret); + else + ret = !(t->expected); + + tests_cnt++; + ksft_test_result(ret, t->msg); + } +} + +static struct testcases malloc_cases[] = { + { + .later = 0, + .lam = LAM_U57_BITS, + .test_func = handle_malloc, + .msg = "MALLOC: LAM_U57. Dereferencing pointer with metadata\n", + }, + { + .later = 1, + .expected = 2, + .lam = LAM_U57_BITS, + .test_func = handle_malloc, + .msg = "MALLOC:[Negative] Disable LAM. Dereferencing pointer with metadata.\n", + }, +}; + + +static struct testcases bits_cases[] = { + { + .test_func = handle_max_bits, + .msg = "BITS: Check default tag bits\n", + }, +}; + +static void cmd_help(void) +{ + printf("usage: lam [-h] [-t test list]\n"); + printf("\t-t test list: run tests specified in the test list, default:0x%x\n", TEST_MASK); + printf("\t\t0x1:malloc; 0x2:max_bits;\n"); + printf("\t-h: help\n"); +} + +int main(int argc, char **argv) +{ + int c = 0; + unsigned int tests = TEST_MASK; + + tests_cnt = 0; + + if (!cpu_has_lam()) { + ksft_print_msg("Unsupported LAM feature!\n"); + return -1; + } + + while ((c = getopt(argc, argv, "ht:")) != -1) { + switch (c) { + case 't': + tests = strtoul(optarg, NULL, 16); + if (!(tests & TEST_MASK)) { + ksft_print_msg("Invalid argument!\n"); + return -1; + } + break; + case 'h': + cmd_help(); + return 0; + default: + ksft_print_msg("Invalid argument\n"); + return -1; + } + } + + if (tests & FUNC_MALLOC) + run_test(malloc_cases, ARRAY_SIZE(malloc_cases)); + + if (tests & FUNC_BITS) + run_test(bits_cases, ARRAY_SIZE(bits_cases)); + + ksft_set_plan(tests_cnt); + + return ksft_exit_pass(); +} From patchwork Tue Dec 27 03:08:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kirill A. Shutemov" X-Patchwork-Id: 13082053 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0C07CC4332F for ; Tue, 27 Dec 2022 03:09:08 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 5C8628E0010; Mon, 26 Dec 2022 22:08:59 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id 52AF48E0011; Mon, 26 Dec 2022 22:08:59 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 21DFB8E0010; Mon, 26 Dec 2022 22:08:59 -0500 (EST) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0015.hostedemail.com [216.40.44.15]) by kanga.kvack.org (Postfix) with ESMTP id 094F68E000E for ; Mon, 26 Dec 2022 22:08:59 -0500 (EST) Received: from smtpin10.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay03.hostedemail.com (Postfix) with ESMTP id E1E3EA044A for ; Tue, 27 Dec 2022 03:08:58 +0000 (UTC) X-FDA: 80286604356.10.0AC0F78 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by imf03.hostedemail.com (Postfix) with ESMTP id 0CF9B20003 for ; Tue, 27 Dec 2022 03:08:56 +0000 (UTC) Authentication-Results: imf03.hostedemail.com; dkim=pass header.d=intel.com header.s=Intel header.b=A8EnqZIG; spf=none (imf03.hostedemail.com: domain of kirill.shutemov@linux.intel.com has no SPF policy when checking 134.134.136.24) smtp.mailfrom=kirill.shutemov@linux.intel.com; dmarc=pass (policy=none) header.from=intel.com ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1672110537; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=Qg4vaTMb+9PkFsCOYp+C/L7w4P1xSjElnkamq7/2Ef8=; b=dfK40sftK/8IXnPDb2KSFFmeHz6Lv7QKFfAUq/6yPLv50VBMMORKzBzsxFYia8fimBjlqz jjZ8DLGnLdPuIEZSKq7CQO36FYAD+F4vvSiNE3PglsfP8LIjTl8U5tv4D5n7sMzzRP+Yne tsUEH0UGZEl2t5wJSJ5bc3nl7S/emRs= ARC-Authentication-Results: i=1; imf03.hostedemail.com; dkim=pass header.d=intel.com header.s=Intel header.b=A8EnqZIG; spf=none (imf03.hostedemail.com: domain of kirill.shutemov@linux.intel.com has no SPF policy when checking 134.134.136.24) smtp.mailfrom=kirill.shutemov@linux.intel.com; dmarc=pass (policy=none) header.from=intel.com ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1672110537; a=rsa-sha256; cv=none; b=HqaNjtXCM4CiFUbQ6T34cW7oLr7nXljam+boayHXR1RL5fFxO+sSzL0MJTSoZdFGI3IDf7 rcOz8lv5J+b3h54fd1X3fi4Zyk0hFQ4KzHs21l6eWRWwCSF6psyBE/+zynojnd2yzRNsHG FKHXuVMUaTfUmumxhkpZv5z83XJc06w= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1672110537; x=1703646537; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=1pBfAOkQ7J1AFfoVfQmMQolBNFBcBfukgLGZulMuiy0=; b=A8EnqZIGMRWSS2YTuMdIJN3f8Pi8TSfrgUfW40slSgiY2hzIt7XdvIA0 83kAnuf0yuW5s7voWEDNmN1y4ZTF4ZgsLZXYMh6sNpwFyQ1F88AQ+L7CI jyc+D3zI96qOrb/sorDJZivQ1FfTgUgvE5ToT4Z3VEkniNXSJewCdiQ4G zD7z5v8MAuTPMfryw/1JDVuf6rDPGMC+qEptEHDFcJmyfg5TY9j+AoQv4 v1nHnvH+ux6OJBfl7RklLW9UAaCqM4ZZztdDRwP4jS+5UxPiNEaof+LPg FUDSc2JPRq1dG2YTqX7P9IkrKxcUNjOjaiyDAwE+WeKcwL1N2lv9PNl4+ Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10572"; a="321869807" X-IronPort-AV: E=Sophos;i="5.96,277,1665471600"; d="scan'208";a="321869807" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Dec 2022 19:08:53 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10572"; a="652917554" X-IronPort-AV: E=Sophos;i="5.96,277,1665471600"; d="scan'208";a="652917554" Received: from ppogotov-mobl.ger.corp.intel.com (HELO box.shutemov.name) ([10.252.62.152]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Dec 2022 19:08:48 -0800 Received: by box.shutemov.name (Postfix, from userid 1000) id 013ED10BBB9; Tue, 27 Dec 2022 06:08:37 +0300 (+03) From: "Kirill A. Shutemov" To: Dave Hansen , Andy Lutomirski , Peter Zijlstra Cc: x86@kernel.org, Kostya Serebryany , Andrey Ryabinin , Andrey Konovalov , Alexander Potapenko , Taras Madan , Dmitry Vyukov , "H . J . Lu" , Andi Kleen , Rick Edgecombe , Bharata B Rao , Jacob Pan , Ashok Raj , Linus Torvalds , linux-mm@kvack.org, linux-kernel@vger.kernel.org, Weihong Zhang , "Kirill A . Shutemov" Subject: [PATCHv13 12/16] selftests/x86/lam: Add mmap and SYSCALL test cases for linear-address masking Date: Tue, 27 Dec 2022 06:08:25 +0300 Message-Id: <20221227030829.12508-13-kirill.shutemov@linux.intel.com> X-Mailer: git-send-email 2.38.2 In-Reply-To: <20221227030829.12508-1-kirill.shutemov@linux.intel.com> References: <20221227030829.12508-1-kirill.shutemov@linux.intel.com> MIME-Version: 1.0 X-Rspam-User: X-Rspamd-Server: rspam04 X-Rspamd-Queue-Id: 0CF9B20003 X-Stat-Signature: 3ad8z5dh34jcfbcrd5a9ex87kfqaomhw X-HE-Tag: 1672110536-203451 X-HE-Meta: U2FsdGVkX18TKvIgHhubozOPsbtg47cGLnUNuXxXDQElcRHdEO04NDgFlYuW+NNnIltTr2BXgoAPCGkZBzzBM42eCDsRJwP2i8ySUITEJ5Ng90eSvvsHBksSg0whPBK3WF/wTNr8vcgzoub8XTXfuM3veKot7ddugwOnzyLgsHZDF4//jHGRKq21UrYHuFwzTlma3FoP2VG39kICGfyxFVzcZPbh9ovMPz90IgBBfqQBqTlHFTEYNl6XIlxXfaxjDqVBkrg6aBtkn1PJOkL+9Z8eZ/dr7VaqFJQOFLzAtRzyXxK+5myovWF8Nr3Z5KLj5bcbym2oAIAmv82Qn9HgfHKLKhlrTSkHUl92ymSQGvlcHTIkKvbWyP2nzn2zL1x7dyf6bM7pjm8geAwtR3BCaq7wrHAJjtCxPHhj9dsjV+u/yMaL7t6W8MfCZP43D1yurj+wm+HswmWYgXsLCsqwp+7WIHh5djFNeocIK98Aui24/UALJJ+rlewZ/X7SwEkRdZ41OxwO8N0YHv8wOrxgS/pvPRDrg4yrSb0xNIF0xLLax3Ircn/uNKGYe+lmKobmGTI54zq7KXpkhp5fKe8kHT34YUUUB1zEKfV8ZDThQwPcZO/AA9ffaW55RhAUeRiBPl421u1JwOK7QejDZvb0kEPwTfaonNaTSRLPhIDkfNUy3PCDkDUiusGQeVNpXZlbkdXgTSrNaPj9bDtlQb1ghM+/MEaHE4cjpAZvULeImYe0Buecpax+p9izGSfY4FL4LeE7doPmmHO+BgSLdKztv95BTwJWysZW5UFkgwD9EDKHzNd+HQk4neFCv61JK1hfey8zpshlGgtcQjXJuo3Isnp7sx7QT2NlrEXe132dgl5hPqCR4Mvp7H9srbaFnd/PaOIS+M8wcRfNTFcX0fD3kyWFTAyDHEoyYGpI1XjF689Jn53E7MNwhmFJoA/Yjh1pFwIVC3VkdmM= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: From: Weihong Zhang Add mmap and SYSCALL test cases. SYSCALL test cases: - LAM supports set metadata in high bits 62:57 (LAM_U57) of a user pointer, pass the pointer to SYSCALL, SYSCALL can dereference the pointer and return correct result. - Disable LAM, pass a pointer with metadata in high bits to SYSCALL, SYSCALL returns -1 (EFAULT). MMAP test cases: - Enable LAM_U57, MMAP with low address (below bits 47), set metadata in high bits of the address, dereference the address should be allowed. - Enable LAM_U57, MMAP with high address (above bits 47), set metadata in high bits of the address, dereference the address should be allowed. Signed-off-by: Weihong Zhang Signed-off-by: Kirill A. Shutemov --- tools/testing/selftests/x86/lam.c | 144 +++++++++++++++++++++++++++++- 1 file changed, 140 insertions(+), 4 deletions(-) diff --git a/tools/testing/selftests/x86/lam.c b/tools/testing/selftests/x86/lam.c index 900a3a0fb709..cdc6e40e00e0 100644 --- a/tools/testing/selftests/x86/lam.c +++ b/tools/testing/selftests/x86/lam.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #include @@ -29,11 +30,18 @@ /* Specified test function bits */ #define FUNC_MALLOC 0x1 #define FUNC_BITS 0x2 +#define FUNC_MMAP 0x4 +#define FUNC_SYSCALL 0x8 -#define TEST_MASK 0x3 +#define TEST_MASK 0xf + +#define LOW_ADDR (0x1UL << 30) +#define HIGH_ADDR (0x3UL << 48) #define MALLOC_LEN 32 +#define PAGE_SIZE (4 << 10) + struct testcases { unsigned int later; int expected; /* 2: SIGSEGV Error; 1: other errors */ @@ -49,6 +57,7 @@ jmp_buf segv_env; static void segv_handler(int sig) { ksft_print_msg("Get segmentation fault(%d).", sig); + siglongjmp(segv_env, 1); } @@ -61,6 +70,16 @@ static inline int cpu_has_lam(void) return (cpuinfo[0] & (1 << 26)); } +/* Check 5-level page table feature in CPUID.(EAX=07H, ECX=00H):ECX.[bit 16] */ +static inline int cpu_has_la57(void) +{ + unsigned int cpuinfo[4]; + + __cpuid_count(0x7, 0, cpuinfo[0], cpuinfo[1], cpuinfo[2], cpuinfo[3]); + + return (cpuinfo[2] & (1 << 16)); +} + /* * Set tagged address and read back untag mask. * check if the untagged mask is expected. @@ -213,6 +232,68 @@ static int handle_malloc(struct testcases *test) return ret; } +static int handle_mmap(struct testcases *test) +{ + void *ptr; + unsigned int flags = MAP_PRIVATE | MAP_ANONYMOUS | MAP_FIXED; + int ret = 0; + + if (test->later == 0 && test->lam != 0) + if (set_lam(test->lam) != 0) + return 1; + + ptr = mmap((void *)test->addr, PAGE_SIZE, PROT_READ | PROT_WRITE, + flags, -1, 0); + if (ptr == MAP_FAILED) { + if (test->addr == HIGH_ADDR) + if (!cpu_has_la57()) + return 3; /* unsupport LA57 */ + return 1; + } + + if (test->later != 0 && test->lam != 0) + if (set_lam(test->lam) != 0) + ret = 1; + + if (ret == 0) { + if (sigsetjmp(segv_env, 1) == 0) { + signal(SIGSEGV, segv_handler); + ret = handle_lam_test(ptr, test->lam); + } else { + ret = 2; + } + } + + munmap(ptr, PAGE_SIZE); + return ret; +} + +static int handle_syscall(struct testcases *test) +{ + struct utsname unme, *pu; + int ret = 0; + + if (test->later == 0 && test->lam != 0) + if (set_lam(test->lam) != 0) + return 1; + + if (sigsetjmp(segv_env, 1) == 0) { + signal(SIGSEGV, segv_handler); + pu = (struct utsname *)set_metadata((uint64_t)&unme, test->lam); + ret = uname(pu); + if (ret < 0) + ret = 1; + } else { + ret = 2; + } + + if (test->later != 0 && test->lam != 0) + if (set_lam(test->lam) != -1 && ret == 0) + ret = 1; + + return ret; +} + static int fork_test(struct testcases *test) { int ret, child_ret; @@ -241,13 +322,20 @@ static void run_test(struct testcases *test, int count) struct testcases *t = test + i; /* fork a process to run test case */ + tests_cnt++; ret = fork_test(t); + + /* return 3 is not support LA57, the case should be skipped */ + if (ret == 3) { + ksft_test_result_skip(t->msg); + continue; + } + if (ret != 0) ret = (t->expected == ret); else ret = !(t->expected); - tests_cnt++; ksft_test_result(ret, t->msg); } } @@ -268,7 +356,6 @@ static struct testcases malloc_cases[] = { }, }; - static struct testcases bits_cases[] = { { .test_func = handle_max_bits, @@ -276,11 +363,54 @@ static struct testcases bits_cases[] = { }, }; +static struct testcases syscall_cases[] = { + { + .later = 0, + .lam = LAM_U57_BITS, + .test_func = handle_syscall, + .msg = "SYSCALL: LAM_U57. syscall with metadata\n", + }, + { + .later = 1, + .expected = 1, + .lam = LAM_U57_BITS, + .test_func = handle_syscall, + .msg = "SYSCALL:[Negative] Disable LAM. Dereferencing pointer with metadata.\n", + }, +}; + +static struct testcases mmap_cases[] = { + { + .later = 1, + .expected = 0, + .lam = LAM_U57_BITS, + .addr = HIGH_ADDR, + .test_func = handle_mmap, + .msg = "MMAP: First mmap high address, then set LAM_U57.\n", + }, + { + .later = 0, + .expected = 0, + .lam = LAM_U57_BITS, + .addr = HIGH_ADDR, + .test_func = handle_mmap, + .msg = "MMAP: First LAM_U57, then High address.\n", + }, + { + .later = 0, + .expected = 0, + .lam = LAM_U57_BITS, + .addr = LOW_ADDR, + .test_func = handle_mmap, + .msg = "MMAP: First LAM_U57, then Low address.\n", + }, +}; + static void cmd_help(void) { printf("usage: lam [-h] [-t test list]\n"); printf("\t-t test list: run tests specified in the test list, default:0x%x\n", TEST_MASK); - printf("\t\t0x1:malloc; 0x2:max_bits;\n"); + printf("\t\t0x1:malloc; 0x2:max_bits; 0x4:mmap; 0x8:syscall.\n"); printf("\t-h: help\n"); } @@ -320,6 +450,12 @@ int main(int argc, char **argv) if (tests & FUNC_BITS) run_test(bits_cases, ARRAY_SIZE(bits_cases)); + if (tests & FUNC_MMAP) + run_test(mmap_cases, ARRAY_SIZE(mmap_cases)); + + if (tests & FUNC_SYSCALL) + run_test(syscall_cases, ARRAY_SIZE(syscall_cases)); + ksft_set_plan(tests_cnt); return ksft_exit_pass(); From patchwork Tue Dec 27 03:08:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kirill A. 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Shutemov" To: Dave Hansen , Andy Lutomirski , Peter Zijlstra Cc: x86@kernel.org, Kostya Serebryany , Andrey Ryabinin , Andrey Konovalov , Alexander Potapenko , Taras Madan , Dmitry Vyukov , "H . J . Lu" , Andi Kleen , Rick Edgecombe , Bharata B Rao , Jacob Pan , Ashok Raj , Linus Torvalds , linux-mm@kvack.org, linux-kernel@vger.kernel.org, Weihong Zhang , "Kirill A . Shutemov" Subject: [PATCHv13 13/16] selftests/x86/lam: Add io_uring test cases for linear-address masking Date: Tue, 27 Dec 2022 06:08:26 +0300 Message-Id: <20221227030829.12508-14-kirill.shutemov@linux.intel.com> X-Mailer: git-send-email 2.38.2 In-Reply-To: <20221227030829.12508-1-kirill.shutemov@linux.intel.com> References: <20221227030829.12508-1-kirill.shutemov@linux.intel.com> MIME-Version: 1.0 X-Rspam-User: X-Rspamd-Server: rspam02 X-Rspamd-Queue-Id: 20C0C4000A X-Stat-Signature: 1nr9ks8pwyommw9thgk4z83oy8btazbt X-HE-Tag: 1672110536-420108 X-HE-Meta: U2FsdGVkX19GR11cT5kBqMpaXWle9+p6eCCyDCloRp0jg1ufioRfb0GWUC1QIzt9U7dZgNAJsnh4HeUQZiEnN4iyarP55LlWq485HZ70/Di8ow7J48WFjBjXz614YaxJZBo86skno3aLRd7dwCPopEEE9zDcq/mVMRl1y+TUgj4utdrScpVKmgw9RUNLCxPGcJndLikQoXpxqBihMRwfVoKQKoZfDXsndPrqXHGsg90ZXvkjWtlejmu5+SdtdWuYh9SI39UWswNPC9GYR60SPeM149so41pYj0ue1ZyYVb62HJnRca1dwBMS4j/jaZXAQCDFPSfnAjDB8AcXFCTptx0KypZp1o+8VIkfigMBbe+jIVpmlLbHuDnYcvbpU32+7kz3dp57EjVU+M8E2WbSinvb+C916s5EB6nDRRRRopXGoCCqdNoCD5VTnGKobE6IG3PUuidKFBp86T9UOumyi1prnL5QGglHEe4IFYQ3vjpnQrrdEVz/H3LhPrHqtLH1uSIOKTz/QXC7uLVlmCyJLma1VzYGk6xyhF6TGXTG3OA8eSpCLuIhlCaQUIWIrtpkWnjTJ+QtztCVgGFtJd6hDhQVzpP60r8ugKl2N9oA74qjequQA620e1hpoj9U1l2dsK+weF/JNQ4k7Ur7CEnJVT4MXBrNevlHWG1JoqK149T+P5dLKO968LW3SV7rGEOT++QIqKy7wUIEv01y9/iP/qtEXIeKZlj6WAHdecFM1QxSNt7Gns9pq3Ehq4fDKgm7mGY5DUvRY4JXPINerhyHeaQZuYLFJyhLvuOW2gtEzy3hYte4wOgDAyt/wws3YQDELHXL17JzSy3FmvjHWcUIv68tmnkJBBKk+5/40OO/56Ru/DMOkE2W7zxNeOKLJ89p87dnM7GPrC2bN6OMA3Bb6I11CiO30VfcwlsrOVZa1EdwrYZutnLjYr84IgG1IQCLVZtFhhjtCk8Q5qr2Be0 VtYoerJT CXtvlknnypTAIyLVz78wE+lGfrfFDFujvFZFf X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: From: Weihong Zhang LAM should be supported in kernel thread, using io_uring to verify LAM feature. The test cases implement read a file through io_uring, the test cases choose an iovec array as receiving buffer, which used to receive data, according to LAM mode, set metadata in high bits of these buffer. io_uring can deal with these buffers that pointed to pointers with the metadata in high bits. Signed-off-by: Weihong Zhang Signed-off-by: Kirill A. Shutemov --- tools/testing/selftests/x86/lam.c | 341 +++++++++++++++++++++++++++++- 1 file changed, 339 insertions(+), 2 deletions(-) diff --git a/tools/testing/selftests/x86/lam.c b/tools/testing/selftests/x86/lam.c index cdc6e40e00e0..8ea1fcef4c9f 100644 --- a/tools/testing/selftests/x86/lam.c +++ b/tools/testing/selftests/x86/lam.c @@ -9,8 +9,12 @@ #include #include #include +#include +#include #include +#include +#include #include "../kselftest.h" #ifndef __x86_64__ @@ -32,8 +36,9 @@ #define FUNC_BITS 0x2 #define FUNC_MMAP 0x4 #define FUNC_SYSCALL 0x8 +#define FUNC_URING 0x10 -#define TEST_MASK 0xf +#define TEST_MASK 0x1f #define LOW_ADDR (0x1UL << 30) #define HIGH_ADDR (0x3UL << 48) @@ -42,6 +47,13 @@ #define PAGE_SIZE (4 << 10) +#define barrier() ({ \ + __asm__ __volatile__("" : : : "memory"); \ +}) + +#define URING_QUEUE_SZ 1 +#define URING_BLOCK_SZ 2048 + struct testcases { unsigned int later; int expected; /* 2: SIGSEGV Error; 1: other errors */ @@ -51,6 +63,33 @@ struct testcases { const char *msg; }; +/* Used by CQ of uring, source file handler and file's size */ +struct file_io { + int file_fd; + off_t file_sz; + struct iovec iovecs[]; +}; + +struct io_uring_queue { + unsigned int *head; + unsigned int *tail; + unsigned int *ring_mask; + unsigned int *ring_entries; + unsigned int *flags; + unsigned int *array; + union { + struct io_uring_cqe *cqes; + struct io_uring_sqe *sqes; + } queue; + size_t ring_sz; +}; + +struct io_ring { + int ring_fd; + struct io_uring_queue sq_ring; + struct io_uring_queue cq_ring; +}; + int tests_cnt; jmp_buf segv_env; @@ -294,6 +333,285 @@ static int handle_syscall(struct testcases *test) return ret; } +int sys_uring_setup(unsigned int entries, struct io_uring_params *p) +{ + return (int)syscall(__NR_io_uring_setup, entries, p); +} + +int sys_uring_enter(int fd, unsigned int to, unsigned int min, unsigned int flags) +{ + return (int)syscall(__NR_io_uring_enter, fd, to, min, flags, NULL, 0); +} + +/* Init submission queue and completion queue */ +int mmap_io_uring(struct io_uring_params p, struct io_ring *s) +{ + struct io_uring_queue *sring = &s->sq_ring; + struct io_uring_queue *cring = &s->cq_ring; + + sring->ring_sz = p.sq_off.array + p.sq_entries * sizeof(unsigned int); + cring->ring_sz = p.cq_off.cqes + p.cq_entries * sizeof(struct io_uring_cqe); + + if (p.features & IORING_FEAT_SINGLE_MMAP) { + if (cring->ring_sz > sring->ring_sz) + sring->ring_sz = cring->ring_sz; + + cring->ring_sz = sring->ring_sz; + } + + void *sq_ptr = mmap(0, sring->ring_sz, PROT_READ | PROT_WRITE, + MAP_SHARED | MAP_POPULATE, s->ring_fd, + IORING_OFF_SQ_RING); + + if (sq_ptr == MAP_FAILED) { + perror("sub-queue!"); + return 1; + } + + void *cq_ptr = sq_ptr; + + if (!(p.features & IORING_FEAT_SINGLE_MMAP)) { + cq_ptr = mmap(0, cring->ring_sz, PROT_READ | PROT_WRITE, + MAP_SHARED | MAP_POPULATE, s->ring_fd, + IORING_OFF_CQ_RING); + if (cq_ptr == MAP_FAILED) { + perror("cpl-queue!"); + munmap(sq_ptr, sring->ring_sz); + return 1; + } + } + + sring->head = sq_ptr + p.sq_off.head; + sring->tail = sq_ptr + p.sq_off.tail; + sring->ring_mask = sq_ptr + p.sq_off.ring_mask; + sring->ring_entries = sq_ptr + p.sq_off.ring_entries; + sring->flags = sq_ptr + p.sq_off.flags; + sring->array = sq_ptr + p.sq_off.array; + + /* Map a queue as mem map */ + s->sq_ring.queue.sqes = mmap(0, p.sq_entries * sizeof(struct io_uring_sqe), + PROT_READ | PROT_WRITE, MAP_SHARED | MAP_POPULATE, + s->ring_fd, IORING_OFF_SQES); + if (s->sq_ring.queue.sqes == MAP_FAILED) { + munmap(sq_ptr, sring->ring_sz); + if (sq_ptr != cq_ptr) { + ksft_print_msg("failed to mmap uring queue!"); + munmap(cq_ptr, cring->ring_sz); + return 1; + } + } + + cring->head = cq_ptr + p.cq_off.head; + cring->tail = cq_ptr + p.cq_off.tail; + cring->ring_mask = cq_ptr + p.cq_off.ring_mask; + cring->ring_entries = cq_ptr + p.cq_off.ring_entries; + cring->queue.cqes = cq_ptr + p.cq_off.cqes; + + return 0; +} + +/* Init io_uring queues */ +int setup_io_uring(struct io_ring *s) +{ + struct io_uring_params para; + + memset(¶, 0, sizeof(para)); + s->ring_fd = sys_uring_setup(URING_QUEUE_SZ, ¶); + if (s->ring_fd < 0) + return 1; + + return mmap_io_uring(para, s); +} + +/* + * Get data from completion queue. the data buffer saved the file data + * return 0: success; others: error; + */ +int handle_uring_cq(struct io_ring *s) +{ + struct file_io *fi = NULL; + struct io_uring_queue *cring = &s->cq_ring; + struct io_uring_cqe *cqe; + unsigned int head; + off_t len = 0; + + head = *cring->head; + + do { + barrier(); + if (head == *cring->tail) + break; + /* Get the entry */ + cqe = &cring->queue.cqes[head & *s->cq_ring.ring_mask]; + fi = (struct file_io *)cqe->user_data; + if (cqe->res < 0) + break; + + int blocks = (int)(fi->file_sz + URING_BLOCK_SZ - 1) / URING_BLOCK_SZ; + + for (int i = 0; i < blocks; i++) + len += fi->iovecs[i].iov_len; + + head++; + } while (1); + + *cring->head = head; + barrier(); + + return (len != fi->file_sz); +} + +/* + * Submit squeue. specify via IORING_OP_READV. + * the buffer need to be set metadata according to LAM mode + */ +int handle_uring_sq(struct io_ring *ring, struct file_io *fi, unsigned long lam) +{ + int file_fd = fi->file_fd; + struct io_uring_queue *sring = &ring->sq_ring; + unsigned int index = 0, cur_block = 0, tail = 0, next_tail = 0; + struct io_uring_sqe *sqe; + + off_t remain = fi->file_sz; + int blocks = (int)(remain + URING_BLOCK_SZ - 1) / URING_BLOCK_SZ; + + while (remain) { + off_t bytes = remain; + void *buf; + + if (bytes > URING_BLOCK_SZ) + bytes = URING_BLOCK_SZ; + + fi->iovecs[cur_block].iov_len = bytes; + + if (posix_memalign(&buf, URING_BLOCK_SZ, URING_BLOCK_SZ)) + return 1; + + fi->iovecs[cur_block].iov_base = (void *)set_metadata((uint64_t)buf, lam); + remain -= bytes; + cur_block++; + } + + next_tail = *sring->tail; + tail = next_tail; + next_tail++; + + barrier(); + + index = tail & *ring->sq_ring.ring_mask; + + sqe = &ring->sq_ring.queue.sqes[index]; + sqe->fd = file_fd; + sqe->flags = 0; + sqe->opcode = IORING_OP_READV; + sqe->addr = (unsigned long)fi->iovecs; + sqe->len = blocks; + sqe->off = 0; + sqe->user_data = (uint64_t)fi; + + sring->array[index] = index; + tail = next_tail; + + if (*sring->tail != tail) { + *sring->tail = tail; + barrier(); + } + + if (sys_uring_enter(ring->ring_fd, 1, 1, IORING_ENTER_GETEVENTS) < 0) + return 1; + + return 0; +} + +/* + * Test LAM in async I/O and io_uring, read current binery through io_uring + * Set metadata in pointers to iovecs buffer. + */ +int do_uring(unsigned long lam) +{ + struct io_ring *ring; + struct file_io *fi; + struct stat st; + int ret = 1; + char path[PATH_MAX]; + + /* get current process path */ + if (readlink("/proc/self/exe", path, PATH_MAX) <= 0) + return 1; + + int file_fd = open(path, O_RDONLY); + + if (file_fd < 0) + return 1; + + if (fstat(file_fd, &st) < 0) + return 1; + + off_t file_sz = st.st_size; + + int blocks = (int)(file_sz + URING_BLOCK_SZ - 1) / URING_BLOCK_SZ; + + fi = malloc(sizeof(*fi) + sizeof(struct iovec) * blocks); + if (!fi) + return 1; + + fi->file_sz = file_sz; + fi->file_fd = file_fd; + + ring = malloc(sizeof(*ring)); + if (!ring) + return 1; + + memset(ring, 0, sizeof(struct io_ring)); + + if (setup_io_uring(ring)) + goto out; + + if (handle_uring_sq(ring, fi, lam)) + goto out; + + ret = handle_uring_cq(ring); + +out: + free(ring); + + for (int i = 0; i < blocks; i++) { + if (fi->iovecs[i].iov_base) { + uint64_t addr = ((uint64_t)fi->iovecs[i].iov_base); + + switch (lam) { + case LAM_U57_BITS: /* Clear bits 62:57 */ + addr = (addr & ~(0x3fULL << 57)); + break; + } + free((void *)addr); + fi->iovecs[i].iov_base = NULL; + } + } + + free(fi); + + return ret; +} + +int handle_uring(struct testcases *test) +{ + int ret = 0; + + if (test->later == 0 && test->lam != 0) + if (set_lam(test->lam) != 0) + return 1; + + if (sigsetjmp(segv_env, 1) == 0) { + signal(SIGSEGV, segv_handler); + ret = do_uring(test->lam); + } else { + ret = 2; + } + + return ret; +} + static int fork_test(struct testcases *test) { int ret, child_ret; @@ -340,6 +658,22 @@ static void run_test(struct testcases *test, int count) } } +static struct testcases uring_cases[] = { + { + .later = 0, + .lam = LAM_U57_BITS, + .test_func = handle_uring, + .msg = "URING: LAM_U57. Dereferencing pointer with metadata\n", + }, + { + .later = 1, + .expected = 1, + .lam = LAM_U57_BITS, + .test_func = handle_uring, + .msg = "URING:[Negative] Disable LAM. Dereferencing pointer with metadata.\n", + }, +}; + static struct testcases malloc_cases[] = { { .later = 0, @@ -410,7 +744,7 @@ static void cmd_help(void) { printf("usage: lam [-h] [-t test list]\n"); printf("\t-t test list: run tests specified in the test list, default:0x%x\n", TEST_MASK); - printf("\t\t0x1:malloc; 0x2:max_bits; 0x4:mmap; 0x8:syscall.\n"); + printf("\t\t0x1:malloc; 0x2:max_bits; 0x4:mmap; 0x8:syscall; 0x10:io_uring.\n"); printf("\t-h: help\n"); } @@ -456,6 +790,9 @@ int main(int argc, char **argv) if (tests & FUNC_SYSCALL) run_test(syscall_cases, ARRAY_SIZE(syscall_cases)); + if (tests & FUNC_URING) + run_test(uring_cases, ARRAY_SIZE(uring_cases)); + ksft_set_plan(tests_cnt); return ksft_exit_pass(); From patchwork Tue Dec 27 03:08:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kirill A. 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Shutemov" To: Dave Hansen , Andy Lutomirski , Peter Zijlstra Cc: x86@kernel.org, Kostya Serebryany , Andrey Ryabinin , Andrey Konovalov , Alexander Potapenko , Taras Madan , Dmitry Vyukov , "H . J . Lu" , Andi Kleen , Rick Edgecombe , Bharata B Rao , Jacob Pan , Ashok Raj , Linus Torvalds , linux-mm@kvack.org, linux-kernel@vger.kernel.org, Weihong Zhang , "Kirill A . Shutemov" Subject: [PATCHv13 14/16] selftests/x86/lam: Add inherit test cases for linear-address masking Date: Tue, 27 Dec 2022 06:08:27 +0300 Message-Id: <20221227030829.12508-15-kirill.shutemov@linux.intel.com> X-Mailer: git-send-email 2.38.2 In-Reply-To: <20221227030829.12508-1-kirill.shutemov@linux.intel.com> References: <20221227030829.12508-1-kirill.shutemov@linux.intel.com> MIME-Version: 1.0 X-Rspamd-Queue-Id: F3EC820006 X-Rspamd-Server: rspam09 X-Rspam-User: X-Stat-Signature: 5x4885d73g716dyj6htcuh1gwyi37dgo X-HE-Tag: 1672110533-501902 X-HE-Meta: U2FsdGVkX1855coNgVsjD7BNHxhxxUDMkB1TwZOwj7x1vQpkxHMHNcgIZrnEDonAiNZ2iqLkxZEpoqeP3XqpBVOWIin+HOt35VLy7iYcjnLRr1SAzfBmY7Ayv0L25cGFL+XIGfRO7o56KLEH7EqLnJ+9eZFobXq7Mk62mycjqL87dG8RZK1Jfns4cafrb/V66UM7f3UrrZBOkskKyIZJDQjID864AZQZB/29v3mTt3AmEqqKrbP6IqK9spV/c/1Eua29M1Q4o8jDhckbWy2sxEZNjR588kpID1j5FxxWNmY90DCqoAgffSIZ6G2OUKBBIJbw/f+mvdww9nRxJFr3tUkhpyOYJryGurfL5aldtN/d633/f4uocT0aV+lWw9rX59OmXDMJrfI5Ct+qeXO3Ht/M5EjERGGn+F7QuqkKpvZfGKsTdYvsU7oNPDl1k2pkGqT/sZadb9TRWIL9VGKIxbZHE1KkzkBZRpJxrQJ47SvbBKNbGC14I9PXCukG4wc72h6rpJCcfV0pwbBEpYxy9ptGILfCGroqRXeesDTvmoVPcaUBwi+wcl0pXytEHPQ5aAY0VOuMpewW59P53yRKNMtNkUOmtq1dbHFvW/BAsQWjM+zAFdaJ5Hy4FW5VqdqOSVds5KE9V3G4oKA2J9m0vAr6RbAbZRxI5XAOnAxzZ2Z/VmYxIkXTls6WQAqZ5bYKuyjP83OFJzQqT1MgL2nGbLvA+KjJOQ/uhEuxuF6yGtD1pupQRfoRn4ib80JCtY9eL+H9LB5VJqW3p3nsjrz0ClZl9qBDYemM3SlSdmfl7AfMQAE3swmbalamS2olUhZ93cMdBCwxyiaikDzg8459Jvdy3KxbUEJF4fjpGz00Pabh8V5NrnC1q/lMEMtrTg267KGfgtyClHRpC5SuIT2ndK3TOqN1GO0IuYwY4XdfUB89Y/Hk161ldldAZxTKKOCpHyZuRameIJg= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: From: Weihong Zhang LAM is enabled per-thread and gets inherited on fork(2)/clone(2). exec() reverts LAM status to the default disabled state. There are two test scenarios: - Fork test cases: These cases were used to test the inheritance of LAM for per-thread, Child process generated by fork() should inherit LAM feature from parent process, Child process can get the LAM mode same as parent process. - Execve test cases: Processes generated by execve() are different from processes generated by fork(), these processes revert LAM status to disabled status. Signed-off-by: Weihong Zhang Signed-off-by: Kirill A. Shutemov --- tools/testing/selftests/x86/lam.c | 125 +++++++++++++++++++++++++++++- 1 file changed, 121 insertions(+), 4 deletions(-) diff --git a/tools/testing/selftests/x86/lam.c b/tools/testing/selftests/x86/lam.c index 8ea1fcef4c9f..cfc9073c0262 100644 --- a/tools/testing/selftests/x86/lam.c +++ b/tools/testing/selftests/x86/lam.c @@ -37,8 +37,9 @@ #define FUNC_MMAP 0x4 #define FUNC_SYSCALL 0x8 #define FUNC_URING 0x10 +#define FUNC_INHERITE 0x20 -#define TEST_MASK 0x1f +#define TEST_MASK 0x3f #define LOW_ADDR (0x1UL << 30) #define HIGH_ADDR (0x3UL << 48) @@ -174,6 +175,28 @@ static unsigned long get_default_tag_bits(void) return lam; } +/* + * Set tagged address and read back untag mask. + * check if the untag mask is expected. + */ +static int get_lam(void) +{ + uint64_t ptr = 0; + int ret = -1; + /* Get untagged mask */ + if (syscall(SYS_arch_prctl, ARCH_GET_UNTAG_MASK, &ptr) == -1) + return -1; + + /* Check mask returned is expected */ + if (ptr == ~(LAM_U57_MASK)) + ret = LAM_U57_BITS; + else if (ptr == -1ULL) + ret = LAM_NONE; + + + return ret; +} + /* According to LAM mode, set metadata in high bits */ static uint64_t set_metadata(uint64_t src, unsigned long lam) { @@ -581,7 +604,7 @@ int do_uring(unsigned long lam) switch (lam) { case LAM_U57_BITS: /* Clear bits 62:57 */ - addr = (addr & ~(0x3fULL << 57)); + addr = (addr & ~(LAM_U57_MASK)); break; } free((void *)addr); @@ -632,6 +655,72 @@ static int fork_test(struct testcases *test) return ret; } +static int handle_execve(struct testcases *test) +{ + int ret, child_ret; + int lam = test->lam; + pid_t pid; + + pid = fork(); + if (pid < 0) { + perror("Fork failed."); + ret = 1; + } else if (pid == 0) { + char path[PATH_MAX]; + + /* Set LAM mode in parent process */ + if (set_lam(lam) != 0) + return 1; + + /* Get current binary's path and the binary was run by execve */ + if (readlink("/proc/self/exe", path, PATH_MAX) <= 0) + exit(-1); + + /* run binary to get LAM mode and return to parent process */ + if (execlp(path, path, "-t 0x0", NULL) < 0) { + perror("error on exec"); + exit(-1); + } + } else { + wait(&child_ret); + ret = WEXITSTATUS(child_ret); + if (ret != LAM_NONE) + return 1; + } + + return 0; +} + +static int handle_inheritance(struct testcases *test) +{ + int ret, child_ret; + int lam = test->lam; + pid_t pid; + + /* Set LAM mode in parent process */ + if (set_lam(lam) != 0) + return 1; + + pid = fork(); + if (pid < 0) { + perror("Fork failed."); + return 1; + } else if (pid == 0) { + /* Set LAM mode in parent process */ + int child_lam = get_lam(); + + exit(child_lam); + } else { + wait(&child_ret); + ret = WEXITSTATUS(child_ret); + + if (lam != ret) + return 1; + } + + return 0; +} + static void run_test(struct testcases *test, int count) { int i, ret = 0; @@ -740,11 +829,26 @@ static struct testcases mmap_cases[] = { }, }; +static struct testcases inheritance_cases[] = { + { + .expected = 0, + .lam = LAM_U57_BITS, + .test_func = handle_inheritance, + .msg = "FORK: LAM_U57, child process should get LAM mode same as parent\n", + }, + { + .expected = 0, + .lam = LAM_U57_BITS, + .test_func = handle_execve, + .msg = "EXECVE: LAM_U57, child process should get disabled LAM mode\n", + }, +}; + static void cmd_help(void) { printf("usage: lam [-h] [-t test list]\n"); printf("\t-t test list: run tests specified in the test list, default:0x%x\n", TEST_MASK); - printf("\t\t0x1:malloc; 0x2:max_bits; 0x4:mmap; 0x8:syscall; 0x10:io_uring.\n"); + printf("\t\t0x1:malloc; 0x2:max_bits; 0x4:mmap; 0x8:syscall; 0x10:io_uring; 0x20:inherit;\n"); printf("\t-h: help\n"); } @@ -764,7 +868,7 @@ int main(int argc, char **argv) switch (c) { case 't': tests = strtoul(optarg, NULL, 16); - if (!(tests & TEST_MASK)) { + if (tests && !(tests & TEST_MASK)) { ksft_print_msg("Invalid argument!\n"); return -1; } @@ -778,6 +882,16 @@ int main(int argc, char **argv) } } + /* + * When tests is 0, it is not a real test case; + * the option used by test case(execve) to check the lam mode in + * process generated by execve, the process read back lam mode and + * check with lam mode in parent process. + */ + if (!tests) + return (get_lam()); + + /* Run test cases */ if (tests & FUNC_MALLOC) run_test(malloc_cases, ARRAY_SIZE(malloc_cases)); @@ -793,6 +907,9 @@ int main(int argc, char **argv) if (tests & FUNC_URING) run_test(uring_cases, ARRAY_SIZE(uring_cases)); + if (tests & FUNC_INHERITE) + run_test(inheritance_cases, ARRAY_SIZE(inheritance_cases)); + ksft_set_plan(tests_cnt); return ksft_exit_pass(); From patchwork Tue Dec 27 03:08:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kirill A. 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Shutemov" To: Dave Hansen , Andy Lutomirski , Peter Zijlstra Cc: x86@kernel.org, Kostya Serebryany , Andrey Ryabinin , Andrey Konovalov , Alexander Potapenko , Taras Madan , Dmitry Vyukov , "H . J . Lu" , Andi Kleen , Rick Edgecombe , Bharata B Rao , Jacob Pan , Ashok Raj , Linus Torvalds , linux-mm@kvack.org, linux-kernel@vger.kernel.org, Weihong Zhang , "Kirill A . Shutemov" Subject: [PATCHv13 15/16] selftests/x86/lam: Add ARCH_FORCE_TAGGED_SVA test cases for linear-address masking Date: Tue, 27 Dec 2022 06:08:28 +0300 Message-Id: <20221227030829.12508-16-kirill.shutemov@linux.intel.com> X-Mailer: git-send-email 2.38.2 In-Reply-To: <20221227030829.12508-1-kirill.shutemov@linux.intel.com> References: <20221227030829.12508-1-kirill.shutemov@linux.intel.com> MIME-Version: 1.0 X-Rspamd-Queue-Id: 047C114000E X-Stat-Signature: 9opea6p4wmaotqzo7bsgjjxc5frg8syw X-Rspam-User: X-Rspamd-Server: rspam08 X-HE-Tag: 1672110538-557229 X-HE-Meta: U2FsdGVkX1+ADyshqVCrv5OHmV07/nvlkUApCVI3W9Rmh7BeoDnuX4X6dti4w6gufJEmV/4agyYgGQhQG+OkQgDhF7mVt/GsXhqpO8alxrW5cUVP6YS+L19LqT/YQmDDCCo287bDg5mnoYfJGBcG3QrQ3Lup46LTSib+0EE0XhdXgWmwrzocKHiPMvbuMKx4FMZjKJ/ZqSdpSdmEV4atb8sHalkGAbvyGqHLn2IBm4r1JbulrlI6du7jajqD8EXoDXQtZpPussqSJp7isOGAsxgQ/5inK96mkDXU/E8L37dGLCqJ/eY9UYlD69DwF2lbM0e/zr0gX7sCT1Ppc5bl+c3r+a/HJOg7GI1966MkLwgsassjUHWvNOW3S/uyA7IeQOy9H5IPHRevHhX9l3IhJbTYupzBKlsFmT14imaEEzF6M7cXZl7yqljHK1d/lcrNMHFdw2/jV79mE/KJBcKD1pmJOR54phYk6QckRjj1QQXXycsSN79uLZKFCQ34drTOkTE3le1vFIlEwNAeWkNTal19Ic+pTLKOLzaDRcHFGacskd7WOGiNMiys0RzLBSDt8iqEczDH0FDmwZQpPgBYsZIJ21z9TM42aNIGpEp67u4jFGb3kyB4mq7Cma2W/j7LJKgtvxAQuYoCY9pEPfrF5BeouQKA7MrixJ4KqBtUcFthXuZRzbaX39EskoBPjpH71OPYVYLJeXq1Yuud8eUf/iZ3vFYuTcq3dc5iuPlBFP910X/r7FUdxT1NLs+LZdmJC+KEOshF8IPVnZD6V9tHKFUxCp/4udFsQniJL0qy6xcXDSI39ys83XLSOW6ksGstaqwiv9XOtazRDWjGWQD6XzH2MCAVX3f/SLREZco3mhFaNPzybvjnEf7wryRN+lr0LrQHQvx0q44ifqtAB6Gto6HfrG+IrFlzlfTeKhXxUp+aNj8EENmNK/pjlJnBQ+Qb99Xgqo4JbUJtxFG2pJv DkRQHhI4 jXDVg7l2QPm7CVAFJIP/DIi9LRNTEarEvdiU9 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: From: Weihong Zhang By default do not allow to enable both LAM and use SVA in the same process. The new ARCH_FORCE_TAGGED_SVA arch_prctl() overrides the limitation. Add new test cases for the new arch_prctl: Before using ARCH_FORCE_TAGGED_SVA, should not allow to enable LAM/SVA coexisting. the test cases should be negative. The test depands on idxd driver and iommu. before test, need add "intel_iommu=on,sm_on" in kernel command line and insmod idxd driver. Signed-off-by: Weihong Zhang Signed-off-by: Kirill A. Shutemov --- tools/testing/selftests/x86/lam.c | 237 +++++++++++++++++++++++++++++- 1 file changed, 235 insertions(+), 2 deletions(-) diff --git a/tools/testing/selftests/x86/lam.c b/tools/testing/selftests/x86/lam.c index cfc9073c0262..52a876a7ccb8 100644 --- a/tools/testing/selftests/x86/lam.c +++ b/tools/testing/selftests/x86/lam.c @@ -30,6 +30,7 @@ #define ARCH_GET_UNTAG_MASK 0x4001 #define ARCH_ENABLE_TAGGED_ADDR 0x4002 #define ARCH_GET_MAX_TAG_BITS 0x4003 +#define ARCH_FORCE_TAGGED_SVA 0x4004 /* Specified test function bits */ #define FUNC_MALLOC 0x1 @@ -38,8 +39,9 @@ #define FUNC_SYSCALL 0x8 #define FUNC_URING 0x10 #define FUNC_INHERITE 0x20 +#define FUNC_PASID 0x40 -#define TEST_MASK 0x3f +#define TEST_MASK 0x7f #define LOW_ADDR (0x1UL << 30) #define HIGH_ADDR (0x3UL << 48) @@ -55,11 +57,19 @@ #define URING_QUEUE_SZ 1 #define URING_BLOCK_SZ 2048 +/* Pasid test define */ +#define LAM_CMD_BIT 0x1 +#define PAS_CMD_BIT 0x2 +#define SVA_CMD_BIT 0x4 + +#define PAS_CMD(cmd1, cmd2, cmd3) (((cmd3) << 8) | ((cmd2) << 4) | ((cmd1) << 0)) + struct testcases { unsigned int later; int expected; /* 2: SIGSEGV Error; 1: other errors */ unsigned long lam; uint64_t addr; + uint64_t cmd; int (*test_func)(struct testcases *test); const char *msg; }; @@ -556,7 +566,7 @@ int do_uring(unsigned long lam) struct file_io *fi; struct stat st; int ret = 1; - char path[PATH_MAX]; + char path[PATH_MAX] = {0}; /* get current process path */ if (readlink("/proc/self/exe", path, PATH_MAX) <= 0) @@ -852,6 +862,226 @@ static void cmd_help(void) printf("\t-h: help\n"); } +/* Check for file existence */ +uint8_t file_Exists(const char *fileName) +{ + struct stat buffer; + + uint8_t ret = (stat(fileName, &buffer) == 0); + + return ret; +} + +/* Sysfs idxd files */ +const char *dsa_configs[] = { + "echo 1 > /sys/bus/dsa/devices/dsa0/wq0.1/group_id", + "echo shared > /sys/bus/dsa/devices/dsa0/wq0.1/mode", + "echo 10 > /sys/bus/dsa/devices/dsa0/wq0.1/priority", + "echo 16 > /sys/bus/dsa/devices/dsa0/wq0.1/size", + "echo 15 > /sys/bus/dsa/devices/dsa0/wq0.1/threshold", + "echo user > /sys/bus/dsa/devices/dsa0/wq0.1/type", + "echo MyApp1 > /sys/bus/dsa/devices/dsa0/wq0.1/name", + "echo 1 > /sys/bus/dsa/devices/dsa0/engine0.1/group_id", + "echo dsa0 > /sys/bus/dsa/drivers/idxd/bind", + /* bind files and devices, generated a device file in /dev */ + "echo wq0.1 > /sys/bus/dsa/drivers/user/bind", +}; + +/* DSA device file */ +const char *dsaDeviceFile = "/dev/dsa/wq0.1"; +/* file for io*/ +const char *dsaPasidEnable = "/sys/bus/dsa/devices/dsa0/pasid_enabled"; + +/* + * DSA depends on kernel cmdline "intel_iommu=on,sm_on" + * return pasid_enabled (0: disable 1:enable) + */ +int Check_DSA_Kernel_Setting(void) +{ + char command[256] = ""; + char buf[256] = ""; + char *ptr; + int rv = -1; + + snprintf(command, sizeof(command) - 1, "cat %s", dsaPasidEnable); + + FILE *cmd = popen(command, "r"); + + if (cmd) { + while (fgets(buf, sizeof(buf) - 1, cmd) != NULL); + + pclose(cmd); + rv = strtol(buf, &ptr, 16); + } + + return rv; +} + +/* + * Config DSA's sysfs files as shared DSA's WQ. + * Generated a device file /dev/dsa/wq0.1 + * Return: 0 OK; 1 Failed; 3 Skip(SVA disabled). + */ +int Dsa_Init_Sysfs(void) +{ + uint len = ARRAY_SIZE(dsa_configs); + const char **p = dsa_configs; + + if (file_Exists(dsaDeviceFile) == 1) + return 0; + + /* check the idxd driver */ + if (file_Exists(dsaPasidEnable) != 1) { + printf("Please make sure idxd driver was loaded\n"); + return 3; + } + + /* Check SVA feature */ + if (Check_DSA_Kernel_Setting() != 1) { + printf("Please enable SVA.(Add intel_iommu=on,sm_on in kernel cmdline)\n"); + return 3; + } + + /* Check the idxd device file on /dev/dsa/ */ + for (int i = 0; i < len; i++) { + if (system(p[i])) + return 1; + } + + /* After config, /dev/dsa/wq0.1 should be generated */ + return (file_Exists(dsaDeviceFile) != 1); +} + +/* + * Open DSA device file, triger API: iommu_sva_alloc_pasid + */ +void *allocate_dsa_pasid(void) +{ + int fd; + void *wq; + + fd = open(dsaDeviceFile, O_RDWR); + if (fd < 0) { + perror("open"); + return MAP_FAILED; + } + + wq = mmap(NULL, 0x1000, PROT_WRITE, + MAP_SHARED | MAP_POPULATE, fd, 0); + if (wq == MAP_FAILED) + perror("mmap"); + + return wq; +} + +int set_force_svm(void) +{ + int ret = 0; + + ret = syscall(SYS_arch_prctl, ARCH_FORCE_TAGGED_SVA); + + return ret; +} + +int handle_pasid(struct testcases *test) +{ + uint tmp = test->cmd; + uint runed = 0x0; + int ret = 0; + void *wq = NULL; + + ret = Dsa_Init_Sysfs(); + if (ret != 0) + return ret; + + for (int i = 0; i < 3; i++) { + int err = 0; + + if (tmp & 0x1) { + /* run set lam mode*/ + if ((runed & 0x1) == 0) { + err = set_lam(LAM_U57_BITS); + runed = runed | 0x1; + } else + err = 1; + } else if (tmp & 0x4) { + /* run force svm */ + if ((runed & 0x4) == 0) { + err = set_force_svm(); + runed = runed | 0x4; + } else + err = 1; + } else if (tmp & 0x2) { + /* run allocate pasid */ + if ((runed & 0x2) == 0) { + runed = runed | 0x2; + wq = allocate_dsa_pasid(); + if (wq == MAP_FAILED) + err = 1; + } else + err = 1; + } + + ret = ret + err; + if (ret > 0) + break; + + tmp = tmp >> 4; + } + + if (wq != MAP_FAILED && wq != NULL) + if (munmap(wq, 0x1000)) + printf("munmap failed %d\n", errno); + + if (runed != 0x7) + ret = 1; + + return (ret != 0); +} + +/* + * Pasid test depends on idxd and SVA, kernel should enable iommu and sm. + * command line(intel_iommu=on,sm_on) + */ +static struct testcases pasid_cases[] = { + { + .expected = 1, + .cmd = PAS_CMD(LAM_CMD_BIT, PAS_CMD_BIT, SVA_CMD_BIT), + .test_func = handle_pasid, + .msg = "PASID: [Negative] Execute LAM, PASID, SVA in sequence\n", + }, + { + .expected = 0, + .cmd = PAS_CMD(LAM_CMD_BIT, SVA_CMD_BIT, PAS_CMD_BIT), + .test_func = handle_pasid, + .msg = "PASID: Execute LAM, SVA, PASID in sequence\n", + }, + { + .expected = 1, + .cmd = PAS_CMD(PAS_CMD_BIT, LAM_CMD_BIT, SVA_CMD_BIT), + .test_func = handle_pasid, + .msg = "PASID: [Negative] Execute PASID, LAM, SVA in sequence\n", + }, + { + .expected = 0, + .cmd = PAS_CMD(PAS_CMD_BIT, SVA_CMD_BIT, LAM_CMD_BIT), + .test_func = handle_pasid, + .msg = "PASID: Execute PASID, SVA, LAM in sequence\n", + }, + { + .expected = 0, + .cmd = PAS_CMD(SVA_CMD_BIT, LAM_CMD_BIT, PAS_CMD_BIT), + .test_func = handle_pasid, + .msg = "PASID: Execute SVA, LAM, PASID in sequence\n", + }, + { + .expected = 0, + .cmd = PAS_CMD(SVA_CMD_BIT, PAS_CMD_BIT, LAM_CMD_BIT), + .test_func = handle_pasid, + .msg = "PASID: Execute SVA, PASID, LAM in sequence\n", + }, +}; + int main(int argc, char **argv) { int c = 0; @@ -910,6 +1140,9 @@ int main(int argc, char **argv) if (tests & FUNC_INHERITE) run_test(inheritance_cases, ARRAY_SIZE(inheritance_cases)); + if (tests & FUNC_PASID) + run_test(pasid_cases, ARRAY_SIZE(pasid_cases)); + ksft_set_plan(tests_cnt); return ksft_exit_pass(); From patchwork Tue Dec 27 03:08:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kirill A. 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Shutemov" To: Dave Hansen , Andy Lutomirski , Peter Zijlstra Cc: x86@kernel.org, Kostya Serebryany , Andrey Ryabinin , Andrey Konovalov , Alexander Potapenko , Taras Madan , Dmitry Vyukov , "H . J . Lu" , Andi Kleen , Rick Edgecombe , Bharata B Rao , Jacob Pan , Ashok Raj , Linus Torvalds , linux-mm@kvack.org, linux-kernel@vger.kernel.org, "Kirill A. Shutemov" Subject: [PATCHv13 16/16] selftests/x86/lam: Add test cases for LAM vs thread creation Date: Tue, 27 Dec 2022 06:08:29 +0300 Message-Id: <20221227030829.12508-17-kirill.shutemov@linux.intel.com> X-Mailer: git-send-email 2.38.2 In-Reply-To: <20221227030829.12508-1-kirill.shutemov@linux.intel.com> References: <20221227030829.12508-1-kirill.shutemov@linux.intel.com> MIME-Version: 1.0 X-Rspamd-Queue-Id: 732F520005 X-Rspamd-Server: rspam09 X-Rspam-User: X-Stat-Signature: ec4iejk35t1pyp5fpskxdaozdrz1bsd9 X-HE-Tag: 1672110537-896614 X-HE-Meta: U2FsdGVkX1/DZS8/s6EtzfsSxxL7RyziExXYWv3yxae4q7dzJDWGJPnzON3anJ29vDiX66PEE9vhbMXnEU6MUOrHjW6tgeGjhUPf1E28TdnvBjQ+CjIuHK5xkzObPXKbG2dhSfxHNiuqfXi4B4NpvUoTw3YlfnIaGF2hczmvFxR9jUDymr+oLgD4+WxNNNXR5/wMbew6quI41OWs8kr1U8ZLoCtFOxleDXFqca3Hgg8b5+Dp/QN0gTfYw7Vp+yapnVafkdK9boJlWcl5HlFZ/pwCsnMFqGOgd5F2+HrzF4D1sIHHmNiUQ7V17ekHKZ3e6BL1MXd5Gb/68IeT5WDYOf3gRrxBhtEIkPWG/1Lds7CsgeDCJkkyaaeYB4CiIji7Qpa1d+Uq4y8c7R3e5g4CEYOFw1mM7lf1kXolTQ2YB7atQqQqGgNeRX2OOOPNMWc5OUXKD63F2z62/xxjcpOUuclI8ogxmU/2rtcMWKnmXIyAM8O5lWsbH6iw3XKGD5WizaHxQaW0gJiYVwyuhrc4E1BCqIx1r9wrrpubAEh+UoRNSW4J6TT24ABMVv59FMeAT9aD6cnKLZJRz/NTk4COrbqZmWuC0cYERcuZ0bmj7KAkLzgJxhwmrDc2HFe+xYF33FeY721TLA+x45qtUhOZ6n2XnBhRArEhXRtH+AIaxo+BDLC137B3SdVmqn+YdF6gQMa6uhJ9Wn8uKzBw4iwZUpHZQqGVWxerUkglySrX3Aoz5pJsz+5DJaxongAqkRqNPUIJrpbAslBz1Y4M7HxHJWXpMZSKpprGqY2dx6aGU1Ng0irBhEp6Fyi/FBEYMxlOeLue4eUJ/wj51glk2De4WSkQMcCm5G0uAggZCfryaIsKCjedIEphNa1uqPM3MhgZ+qg8w8nDJJp08/pq+mOxEMh8Q2Ql9sVjmbfMC9TGcP7ayM1kwRvFmQSArMPpPNujiP2nF4L9XaI= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: LAM enabling is only allowed when the process has single thread. LAM mode is inherited into child thread. Trying to enable LAM after spawning a thread has to fail. Signed-off-by: Kirill A. Shutemov --- tools/testing/selftests/x86/lam.c | 92 +++++++++++++++++++++++++++++++ 1 file changed, 92 insertions(+) diff --git a/tools/testing/selftests/x86/lam.c b/tools/testing/selftests/x86/lam.c index 52a876a7ccb8..93e6089164b6 100644 --- a/tools/testing/selftests/x86/lam.c +++ b/tools/testing/selftests/x86/lam.c @@ -1,4 +1,5 @@ // SPDX-License-Identifier: GPL-2.0 +#define _GNU_SOURCE #include #include #include @@ -12,6 +13,7 @@ #include #include #include +#include #include #include @@ -50,6 +52,8 @@ #define PAGE_SIZE (4 << 10) +#define STACK_SIZE 65536 + #define barrier() ({ \ __asm__ __volatile__("" : : : "memory"); \ }) @@ -731,6 +735,75 @@ static int handle_inheritance(struct testcases *test) return 0; } +static int thread_fn_get_lam(void *arg) +{ + return get_lam(); +} + +static int thread_fn_set_lam(void *arg) +{ + struct testcases *test = arg; + + return set_lam(test->lam); +} + +static int handle_thread(struct testcases *test) +{ + char stack[STACK_SIZE]; + int ret, child_ret; + int lam = 0; + pid_t pid; + + /* Set LAM mode in parent process */ + if (!test->later) { + lam = test->lam; + if (set_lam(lam) != 0) + return 1; + } + + pid = clone(thread_fn_get_lam, stack + STACK_SIZE, + SIGCHLD | CLONE_FILES | CLONE_FS | CLONE_VM, NULL); + if (pid < 0) { + perror("Clone failed."); + return 1; + } + + waitpid(pid, &child_ret, 0); + ret = WEXITSTATUS(child_ret); + + if (lam != ret) + return 1; + + if (test->later) { + if (set_lam(test->lam) != 0) + return 1; + } + + return 0; +} + +static int handle_thread_enable(struct testcases *test) +{ + char stack[STACK_SIZE]; + int ret, child_ret; + int lam = test->lam; + pid_t pid; + + pid = clone(thread_fn_set_lam, stack + STACK_SIZE, + SIGCHLD | CLONE_FILES | CLONE_FS | CLONE_VM, test); + if (pid < 0) { + perror("Clone failed."); + return 1; + } + + waitpid(pid, &child_ret, 0); + ret = WEXITSTATUS(child_ret); + + if (lam != ret) + return 1; + + return 0; +} static void run_test(struct testcases *test, int count) { int i, ret = 0; @@ -846,6 +919,25 @@ static struct testcases inheritance_cases[] = { .test_func = handle_inheritance, .msg = "FORK: LAM_U57, child process should get LAM mode same as parent\n", }, + { + .expected = 0, + .lam = LAM_U57_BITS, + .test_func = handle_thread, + .msg = "THREAD: LAM_U57, child thread should get LAM mode same as parent\n", + }, + { + .expected = 1, + .lam = LAM_U57_BITS, + .test_func = handle_thread_enable, + .msg = "THREAD: [NEGATIVE] Enable LAM in child.\n", + }, + { + .expected = 1, + .later = 1, + .lam = LAM_U57_BITS, + .test_func = handle_thread, + .msg = "THREAD: [NEGATIVE] Enable LAM in parent after thread created.\n", + }, { .expected = 0, .lam = LAM_U57_BITS,