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[92.176.231.205]) by smtp.gmail.com with ESMTPSA id p18-20020a056000019200b00279d23574c4sm7374557wrx.13.2022.12.27.03.03.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Dec 2022 03:03:45 -0800 (PST) From: Javier Martinez Canillas To: linux-kernel@vger.kernel.org Cc: Peter Robinson , Martijn Braam , Maya Matuszczyk , Sam Ravnborg , Neal Gompa , =?utf-8?q?Kamil_Trzci=C5=84ski?= , Tom Fitzhenry , Krzysztof Kozlowski , Robert Mader , Onuralp Sezer , Ondrej Jirman , dri-devel@lists.freedesktop.org, Javier Martinez Canillas , Heiko Stuebner , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Subject: [PATCH v3 4/4] arm64: dts: rk3399-pinephone-pro: Add internal display support Date: Tue, 27 Dec 2022 12:03:35 +0100 Message-Id: <20221227110335.2923359-5-javierm@redhat.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221227110335.2923359-1-javierm@redhat.com> References: <20221227110335.2923359-1-javierm@redhat.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221227_030353_906312_1D457E87 X-CRM114-Status: GOOD ( 12.24 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org From: Ondrej Jirman The phone's display is using Hannstar LCD panel, and Goodix based touchscreen. Support it. Signed-off-by: Ondrej Jirman Co-developed-by: Martijn Braam Signed-off-by: Martijn Braam Co-developed-by: Kamil Trzciński Signed-off-by: Kamil Trzciński Signed-off-by: Javier Martinez Canillas Tested-by: Tom Fitzhenry --- (no changes since v2) Changes in v2: - Fix regulator node names (Maya Matuszczyk). - Drop non-existent "poweroff-in-suspend" property (Maya Matuszczyk). - Remove unnecessary comments in panel node (Maya Matuszczyk). .../dts/rockchip/rk3399-pinephone-pro.dts | 123 ++++++++++++++++++ 1 file changed, 123 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts index 0e4442b59a55..55048236eef7 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts @@ -29,6 +29,12 @@ chosen { stdout-path = "serial2:1500000n8"; }; + backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&pwm0 0 1000000 0>; + pwm-delay-us = <10000>; + }; + gpio-keys { compatible = "gpio-keys"; pinctrl-names = "default"; @@ -81,6 +87,32 @@ vcc1v8_codec: vcc1v8-codec-regulator { regulator-max-microvolt = <1800000>; vin-supply = <&vcc3v3_sys>; }; + + /* MIPI DSI panel 1.8v supply */ + vcc1v8_lcd: vcc1v8-lcd-regulator { + compatible = "regulator-fixed"; + enable-active-high; + regulator-name = "vcc1v8_lcd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc3v3_sys>; + gpio = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&display_pwren1>; + }; + + /* MIPI DSI panel 2.8v supply */ + vcc2v8_lcd: vcc2v8-lcd-regulator { + compatible = "regulator-fixed"; + enable-active-high; + regulator-name = "vcc2v8_lcd"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + vin-supply = <&vcc3v3_sys>; + gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&display_pwren>; + }; }; &cpu_l0 { @@ -111,6 +143,11 @@ &emmc_phy { status = "okay"; }; +&gpu { + mali-supply = <&vdd_gpu>; + status = "okay"; +}; + &i2c0 { clock-frequency = <400000>; i2c-scl-rising-time-ns = <168>; @@ -193,6 +230,9 @@ vcc3v0_touch: LDO_REG2 { regulator-name = "vcc3v0_touch"; regulator-min-microvolt = <3000000>; regulator-max-microvolt = <3000000>; + regulator-state-mem { + regulator-off-in-suspend; + }; }; vcca1v8_codec: LDO_REG3 { @@ -326,6 +366,25 @@ opp07 { }; }; +&i2c3 { + i2c-scl-rising-time-ns = <450>; + i2c-scl-falling-time-ns = <15>; + status = "okay"; + + touchscreen@14 { + compatible = "goodix,gt917s"; + reg = <0x14>; + interrupt-parent = <&gpio3>; + interrupts = ; + irq-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_HIGH>; + AVDD28-supply = <&vcc3v0_touch>; + VDDIO-supply = <&vcc3v0_touch>; + touchscreen-size-x = <720>; + touchscreen-size-y = <1440>; + }; +}; + &io_domains { bt656-supply = <&vcc1v8_dvp>; audio-supply = <&vcca1v8_codec>; @@ -334,6 +393,40 @@ &io_domains { status = "okay"; }; +&mipi_dsi { + status = "okay"; + clock-master; + + ports { + mipi_out: port@1 { + #address-cells = <0>; + #size-cells = <0>; + reg = <1>; + + mipi_out_panel: endpoint { + remote-endpoint = <&mipi_in_panel>; + }; + }; + }; + + panel@0 { + compatible = "hannstar,hsd060bhw4"; + reg = <0>; + backlight = <&backlight>; + reset-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_LOW>; + vcc-supply = <&vcc2v8_lcd>; + iovcc-supply = <&vcc1v8_lcd>; + pinctrl-names = "default"; + pinctrl-0 = <&display_rst_l>; + + port { + mipi_in_panel: endpoint { + remote-endpoint = <&mipi_out_panel>; + }; + }; + }; +}; + &pmu_io_domains { pmu1830-supply = <&vcc_1v8>; status = "okay"; @@ -360,6 +453,20 @@ vsel2_pin: vsel2-pin { }; }; + dsi { + display_rst_l: display-rst-l { + rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_down>; + }; + + display_pwren: display-pwren { + rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_down>; + }; + + display_pwren1: display-pwren1 { + rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; + sound { vcc1v8_codec_en: vcc1v8-codec-en { rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_down>; @@ -367,6 +474,10 @@ vcc1v8_codec_en: vcc1v8-codec-en { }; }; +&pwm0 { + status = "okay"; +}; + &sdmmc { bus-width = <4>; cap-sd-highspeed; @@ -396,3 +507,15 @@ &tsadc { &uart2 { status = "okay"; }; + +&vopb { + status = "okay"; + assigned-clocks = <&cru DCLK_VOP0_DIV>, <&cru DCLK_VOP0>, + <&cru ACLK_VOP0>, <&cru HCLK_VOP0>; + assigned-clock-rates = <0>, <0>, <400000000>, <100000000>; + assigned-clock-parents = <&cru PLL_CPLL>, <&cru DCLK_VOP0_FRAC>; +}; + +&vopb_mmu { + status = "okay"; +};