From patchwork Wed Dec 28 18:52:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13083117 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E9DA5C3DA7A for ; Wed, 28 Dec 2022 18:52:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231266AbiL1Swn (ORCPT ); Wed, 28 Dec 2022 13:52:43 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36588 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231523AbiL1Swm (ORCPT ); Wed, 28 Dec 2022 13:52:42 -0500 Received: from mail-lj1-x235.google.com (mail-lj1-x235.google.com [IPv6:2a00:1450:4864:20::235]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 50CB515F07 for ; Wed, 28 Dec 2022 10:52:41 -0800 (PST) Received: by mail-lj1-x235.google.com with SMTP id g14so17269836ljh.10 for ; Wed, 28 Dec 2022 10:52:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=U7w7cv/rycyo9tLFe/RTS7bl/f0qnn9z8JqftMfFPoY=; b=ssJAGw3OGc/uwlSkDVVP4yWViHQTldQNeYfRekBqa/1vZMnJv3z+RlYqThGQ+UVt4V EEh5uQVUas2tD6OWXyUraEV6wWwHM0dd692wcmnZp/L0RA7kvhyegxMXH37PM9ZzD5PN hdzGHov/Atbis8wGVbBWiqTziqZK6rwSHgvh8yPyne8UM3Iq08TssxjWRgOEDO+coiw6 AJbkLnEzRvYabNZa/ZoSPkNEhVmEDfKqH8beATj9aF5/yqiJUipqFacUvl+dFFBw9yW6 /fEYjz70P/WkLQrZuvJ8WvftckIGUWNr2stBth0DDku3N2QGHLTtieBOI/hAlChknPKL /1Og== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=U7w7cv/rycyo9tLFe/RTS7bl/f0qnn9z8JqftMfFPoY=; b=mw5VeDU6XaNgp75EKxBnGt8VVxGPc+eCetPLxiXt8vvyhiHi59RJWkhcup0OoBOd5x 4XDE9cms51w2xN0vpMyZNj9gtyoseH1pK9IHWysgc7ZA+i3UiaElX+kwPqGPw/hj6rsJ VuVimLaxkuMS6f0vtqka96oZVikS8oO06Ova1+vdEOV5IDlKJlZv+OxpVNOlMzxlUNp9 fJ91oxOifCf08O9nuiWosGB0uBviUKJTrtmnupUqIyuuZYE9mZeEooWKnqehIVjM8pT7 yZeqFXD8UoSFwQ3Co48lloa6MJfGigWIpzNq2XYFlihhnf1PPrVbziDzt+p5XdK3sIZx Ae3Q== X-Gm-Message-State: AFqh2kp1MhQhTyRyk2RWYtDvYD4CEfptK+ru0iyyPSJG8GB/QobIgrdC HvXNOdMuZfrhcxLGUifqEpvBcw== X-Google-Smtp-Source: AMrXdXsvzpwi/FuIhQ/1rnNN/ZuJ3dor/p/CpUsrlcpRii6ruHP0KtMLETkIXyjttXQuskBYoSTycw== X-Received: by 2002:a2e:b553:0:b0:279:ee82:e0f4 with SMTP id a19-20020a2eb553000000b00279ee82e0f4mr5748918ljn.32.1672253559704; Wed, 28 Dec 2022 10:52:39 -0800 (PST) Received: from eriador.lan (dzccz6yyyyyyyyyyybcwt-3.rev.dnainternet.fi. [2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id s7-20020a2e83c7000000b00279d206a43bsm2031893ljh.34.2022.12.28.10.52.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Dec 2022 10:52:39 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Stephen Boyd , Michael Turquette , Rob Herring , Krzysztof Kozlowski , Taniya Das Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 01/16] dt-bindings: clock: qcom,gcc-msm8998: drop core_bi_pll_test_se Date: Wed, 28 Dec 2022 20:52:22 +0200 Message-Id: <20221228185237.3111988-2-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221228185237.3111988-1-dmitry.baryshkov@linaro.org> References: <20221228185237.3111988-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The test clock apparently it's not used by anyone upstream. Remove it. Signed-off-by: Dmitry Baryshkov Reviewed-by: Rob Herring --- .../devicetree/bindings/clock/qcom,gcc-msm8998.yaml | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml index 2d5355cf9def..3c9729050d6f 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml @@ -25,7 +25,6 @@ properties: - description: Board XO source - description: Sleep clock source - description: Audio reference clock (Optional clock) - - description: PLL test clock source (Optional clock) minItems: 2 clock-names: @@ -33,7 +32,6 @@ properties: - const: xo - const: sleep_clk - const: aud_ref_clk # Optional clock - - const: core_bi_pll_test_se # Optional clock minItems: 2 required: @@ -57,11 +55,9 @@ examples: reg = <0x00100000 0xb0000>; clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, <&sleep>, - <0>, <0>; clock-names = "xo", "sleep_clk", - "aud_ref_clk", - "core_bi_pll_test_se"; + "aud_ref_clk"; }; ... From patchwork Wed Dec 28 18:52:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13083120 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B5B07C54E76 for ; Wed, 28 Dec 2022 18:52:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232696AbiL1Swr (ORCPT ); Wed, 28 Dec 2022 13:52:47 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36586 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232777AbiL1Swn (ORCPT ); Wed, 28 Dec 2022 13:52:43 -0500 Received: from mail-lj1-x234.google.com (mail-lj1-x234.google.com [IPv6:2a00:1450:4864:20::234]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 325B515F29 for ; Wed, 28 Dec 2022 10:52:42 -0800 (PST) Received: by mail-lj1-x234.google.com with SMTP id x37so10406807ljq.1 for ; Wed, 28 Dec 2022 10:52:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=MuuDeykd0fWyvmdgCKovFBE0sMM/OGwl3dw5AGj6x9c=; b=E5EEtHRxumfT6nN4kpWSTts5iN9mXfF93TS57v/567KycZ+2SmwkNTE5z6DsPcXMRB kCXzoM/1FiclLZ1n+WYMRwkiNZ3FSm6lcm0lFckRROJaQTe6GNuhGXIKTvfz2EINHgh8 aNc9gtrncKt5am2uPkG5/UkzOl6IlIXweW0AD4Q70yi0In/pqeQJbAoUf4PYrLJRg1Zg gagNEtXepv6KOCtxX/MBeCOHjiJ7IGs1zTpf+Wyq9FKErnAoRkGkFo7f7O7HgdoWMyeJ 97YH+cP8DeQQ4Oph024maq5iJNU2tnxl+jUWirk25pNwePsIDSikf94PiZuTQ4OcuMtv tKqQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=MuuDeykd0fWyvmdgCKovFBE0sMM/OGwl3dw5AGj6x9c=; b=xzd1ysJdd0jtKFRd/xQG7gRdWsx7Ac1goVJnOOt6s+MAvftoOMqSeenTiO0a43ueCV VVmAfZbjma5DHBBE+NbwZgI/T14NWiv6i6R1yY779pLbmBUw9eepeTP7GATpHIY9QqZ7 KxS7/G9hV0Icmcf+trYnXaSE67wwfusJREvSLwGpcNyXgAKVYX5le2PgeMQEd8Ja/FV+ OLPd3O0M4xxaVXm0ZLnnq/0O8ZXKgTPKcTqHu5+Zpj+dVcexS2UO/QOhv7wtkCNj1R9/ n0jC5CZJ9k7Ue5DFV1nGjiABnz1AqbZlhskggaMBydZLLA3prk64Rq1zkx49b3DzvdEP 1C0g== X-Gm-Message-State: AFqh2kr1Q95Qy86l2htsA+XFztfxsgG4+w7xA/TAU1d8m/iiVAm+7mLJ W0E6/j8spsPd863bgVQDlJm2DGqQ6kNqGTWQJ+U= X-Google-Smtp-Source: AMrXdXu+r3iM1uQ90G2yWnhNeYCGeEvXDj/kYPysaeAPHIhBgdV6QLA9CH5kKItOc5qmaJKTU8qeRA== X-Received: by 2002:a05:651c:1cb:b0:278:f690:b736 with SMTP id d11-20020a05651c01cb00b00278f690b736mr7965293ljn.34.1672253560448; Wed, 28 Dec 2022 10:52:40 -0800 (PST) Received: from eriador.lan (dzccz6yyyyyyyyyyybcwt-3.rev.dnainternet.fi. [2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id s7-20020a2e83c7000000b00279d206a43bsm2031893ljh.34.2022.12.28.10.52.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Dec 2022 10:52:40 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Stephen Boyd , Michael Turquette , Rob Herring , Krzysztof Kozlowski , Taniya Das Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 02/16] dt-bindings: clock: qcom,gcc-sdx55: drop core_bi_pll_test_se Date: Wed, 28 Dec 2022 20:52:23 +0200 Message-Id: <20221228185237.3111988-3-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221228185237.3111988-1-dmitry.baryshkov@linaro.org> References: <20221228185237.3111988-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The test clock apparently it's not used by anyone upstream. Remove it. Signed-off-by: Dmitry Baryshkov Reviewed-by: Rob Herring --- .../devicetree/bindings/clock/qcom,gcc-sdx55.yaml | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sdx55.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sdx55.yaml index 68d3099c96ae..428e954d7638 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-sdx55.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sdx55.yaml @@ -24,15 +24,11 @@ properties: items: - description: Board XO source - description: Sleep clock source - - description: PLL test clock source (Optional clock) - minItems: 2 clock-names: items: - const: bi_tcxo - const: sleep_clk - - const: core_bi_pll_test_se # Optional clock - minItems: 2 required: - compatible @@ -51,8 +47,9 @@ examples: compatible = "qcom,gcc-sdx55"; reg = <0x00100000 0x1f0000>; clocks = <&rpmhcc RPMH_CXO_CLK>, - <&sleep_clk>, <&pll_test_clk>; - clock-names = "bi_tcxo", "sleep_clk", "core_bi_pll_test_se"; + <&sleep_clk>; + clock-names = "bi_tcxo", + "sleep_clk"; #clock-cells = <1>; #reset-cells = <1>; #power-domain-cells = <1>; From patchwork Wed Dec 28 18:52:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13083119 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 34341C4332F for ; Wed, 28 Dec 2022 18:52:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231932AbiL1Swq (ORCPT ); Wed, 28 Dec 2022 13:52:46 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36590 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231316AbiL1Swo (ORCPT ); Wed, 28 Dec 2022 13:52:44 -0500 Received: from mail-lj1-x229.google.com (mail-lj1-x229.google.com [IPv6:2a00:1450:4864:20::229]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 31C7A15801 for ; Wed, 28 Dec 2022 10:52:43 -0800 (PST) Received: by mail-lj1-x229.google.com with SMTP id u12so13591281ljj.11 for ; Wed, 28 Dec 2022 10:52:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=dRV0cBSMOk6ezUoovi34JcMJADM3mKVE6I4nfLkmye0=; b=DoAzLdgLNokGuQx7nwDRWrbaKG387ksnTCGckuAkN0SV+Z1VD9+W08ayH4Da9S9bq/ c5b8Sijx+VK5DQLSLM9gRh+ObCUWfsOB3KCYpOFqdq4mW8xwQCaQ9Q/qe7OaNaKEOTdJ y8eKeYZQvvg0QPqnLCILH42U/Z21HsKuxSgGPYuAEMs2GgctO4NgvLtOoUZHFGwg9A68 hMIBAiKncFYMN6yx89iT/EKUL+MLXbOtMR1lFQE3S+fAiZ5iShhNQNaeaVQtTH0+7Vui W4TFyYGRqQNonJJykPzY2IslD+zQ+k1/sYOswI/VBAOqRjZZirX8So3aA6/7v0jJCrSX 92Og== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=dRV0cBSMOk6ezUoovi34JcMJADM3mKVE6I4nfLkmye0=; b=wPMO2SDdoDH9/jDhckfCTFU8PMUBkx5ZxVehPP8riqsYLYXuyOUyyeclDa2LohHxx9 XhQYulq4iBbPxr5/zfNPksbseTw6AB4DQsEZe1kU4vx6g2UDCgDMrhjS35as13XQM61K M2t3swksrTuCubFLFgdFFWNzl5JbeacnXg/nG/sf4XOwvxfJdhg2qHAY3FBtk6qXH9Bj WzOxTdv6WJy4YBRND5X22F9kG5f2WspFslyb37YfURni6xvL+mZjsltNA+xj3eiUdpJm c/GeJm0KlN+pzynNiFhECw8vQJUI0PnZwTXqaQmk5mw4h47S/yvu81GMxgGvV6nnyYof yQWg== X-Gm-Message-State: AFqh2kpRsTS8bJsDuH0RjWmxn5k6ZAD2SK3va3SNU/7lLX3CNmoR1DYy mAr8cmgP08uWE1AykTArpAfs5U4q6k1qOKT49sw= X-Google-Smtp-Source: AMrXdXuVj5Q132g/sdP+a+iwNrSRTPv1A/0QhI9POTWd6iin7ELnIxxRwYfdFwEBupMmF+L8Q0AmTw== X-Received: by 2002:a2e:bcc7:0:b0:27e:34cf:17b1 with SMTP id z7-20020a2ebcc7000000b0027e34cf17b1mr7342606ljp.29.1672253561488; Wed, 28 Dec 2022 10:52:41 -0800 (PST) Received: from eriador.lan (dzccz6yyyyyyyyyyybcwt-3.rev.dnainternet.fi. [2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id s7-20020a2e83c7000000b00279d206a43bsm2031893ljh.34.2022.12.28.10.52.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Dec 2022 10:52:40 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Stephen Boyd , Michael Turquette , Rob Herring , Krzysztof Kozlowski , Taniya Das Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 03/16] dt-bindings: clock: qcom,gcc-sdx65: drop core_bi_pll_test_se Date: Wed, 28 Dec 2022 20:52:24 +0200 Message-Id: <20221228185237.3111988-4-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221228185237.3111988-1-dmitry.baryshkov@linaro.org> References: <20221228185237.3111988-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The test clock apparently it's not used by anyone upstream. Remove it. Signed-off-by: Dmitry Baryshkov Reviewed-by: Rob Herring --- .../devicetree/bindings/clock/qcom,gcc-sdx65.yaml | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sdx65.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sdx65.yaml index ba62baab916c..523e18d7f150 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-sdx65.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sdx65.yaml @@ -26,8 +26,6 @@ properties: - description: Sleep clock source - description: PCIE Pipe clock source - description: USB3 phy wrapper pipe clock source - - description: PLL test clock source (Optional clock) - minItems: 5 clock-names: items: @@ -36,8 +34,6 @@ properties: - const: sleep_clk - const: pcie_pipe_clk - const: usb3_phy_wrapper_gcc_usb30_pipe_clk - - const: core_bi_pll_test_se # Optional clock - minItems: 5 required: - compatible @@ -56,9 +52,9 @@ examples: compatible = "qcom,gcc-sdx65"; reg = <0x100000 0x1f7400>; clocks = <&rpmhcc RPMH_CXO_CLK>, <&rpmhcc RPMH_CXO_CLK_A>, <&sleep_clk>, - <&pcie_pipe_clk>, <&usb3_phy_wrapper_gcc_usb30_pipe_clk>, <&pll_test_clk>; + <&pcie_pipe_clk>, <&usb3_phy_wrapper_gcc_usb30_pipe_clk>; clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk", - "pcie_pipe_clk", "usb3_phy_wrapper_gcc_usb30_pipe_clk", "core_bi_pll_test_se"; + "pcie_pipe_clk", "usb3_phy_wrapper_gcc_usb30_pipe_clk"; #clock-cells = <1>; #reset-cells = <1>; #power-domain-cells = <1>; From patchwork Wed Dec 28 18:52:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13083122 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 67A93C53210 for ; Wed, 28 Dec 2022 18:52:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233180AbiL1Swt (ORCPT ); Wed, 28 Dec 2022 13:52:49 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36642 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233144AbiL1Swp (ORCPT ); Wed, 28 Dec 2022 13:52:45 -0500 Received: from mail-lj1-x22a.google.com (mail-lj1-x22a.google.com [IPv6:2a00:1450:4864:20::22a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 31F1E15FD1 for ; Wed, 28 Dec 2022 10:52:44 -0800 (PST) Received: by mail-lj1-x22a.google.com with SMTP id x37so10406879ljq.1 for ; Wed, 28 Dec 2022 10:52:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=p38bywVFtTrj3kqH2Lz2Ph0NglRYNc7cYdrBsK3q/3U=; b=AmcNx/D90sbymus73k585cXbjg5zInvXk9Wc8fLQwnHCIlmfW5ZVS3WhPBA1awSyZT n3dYN3oD6H1IMTj18yip7RRUjsDXMkfT7d0obLPMjI/aFEQ2DVJqWpxcuNXhxGtHxotK k2bQbpk4WTAJrZL6rHdt/JahkP+8/LRZg9cpavXafkcAyNV3fGG8q1NSmm23C45AjaDU j0XfOtwDpEb8+IWK/c9Bz9IVq7BW0NZxKa4APYEciVUlAUoyGk/PDygvRNndhTDUuiC2 UOaldFqqxXNdndl44Z+bg6W1Q7mAcaEiOQMc/FtNy2KvK2a72IaNN1cG5uejNgM7FqqP MSmw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=p38bywVFtTrj3kqH2Lz2Ph0NglRYNc7cYdrBsK3q/3U=; b=wZAkxoN4ILcdV13EPQCq+aalQYoguA1qvpWup2tJQRdVya70xnxnje6hnF38p+tuJJ CJouka1wWOQmoNhgLDAtniFgDt+v+BrFrjwGHOJFQxHwPdXDdbodipYmGCt9NCwEk+Tb XSEJk9Tup030mpL0MVDI7sTtUCj8X5PPckAduV0Wg/U4vMIkIP9DcgA3BATcvU0pvpOT CDKBEoXVozOiEeUk7GtoeUUh04DwhzZgBW/WVHLR83lGWGVs4Y5WQYQByA7HFS2e+EOQ BE4Y/4vTK8CgC4y3gW9Wh7PMcHDbkCYiwFClnGUGVU2tGP0hQC7PScyN+sPxxY0qp/+Q pPCQ== X-Gm-Message-State: AFqh2kreYzuFhMrmAeOYFMEUljyBfgRIz4JdNuFEShYCw0vFiLBfkf+i ynYW88zr1vpInsJbO/9+XUK+Fw== X-Google-Smtp-Source: AMrXdXtDF2TSK0lgQn6QSehRiJI0j28OxjVQDQkXR26yi2t9NjxQGDr2os+Z5QuD/0aupXENa1lnuQ== X-Received: by 2002:a2e:908b:0:b0:27f:b8ba:176f with SMTP id l11-20020a2e908b000000b0027fb8ba176fmr4099442ljg.46.1672253562454; Wed, 28 Dec 2022 10:52:42 -0800 (PST) Received: from eriador.lan (dzccz6yyyyyyyyyyybcwt-3.rev.dnainternet.fi. [2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id s7-20020a2e83c7000000b00279d206a43bsm2031893ljh.34.2022.12.28.10.52.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Dec 2022 10:52:41 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Stephen Boyd , Michael Turquette , Rob Herring , Krzysztof Kozlowski , Taniya Das Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 04/16] dt-bindings: clock: qcom,gcc-sm8350: drop core_bi_pll_test_se Date: Wed, 28 Dec 2022 20:52:25 +0200 Message-Id: <20221228185237.3111988-5-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221228185237.3111988-1-dmitry.baryshkov@linaro.org> References: <20221228185237.3111988-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The test clock apparently it's not used by anyone upstream. Remove it. Signed-off-by: Dmitry Baryshkov Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml | 2 -- 1 file changed, 2 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml index 703d9e075247..b4fdde71ef18 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml @@ -23,7 +23,6 @@ properties: items: - description: Board XO source - description: Sleep clock source - - description: PLL test clock source (Optional clock) - description: PCIE 0 Pipe clock source (Optional clock) - description: PCIE 1 Pipe clock source (Optional clock) - description: UFS card Rx symbol 0 clock source (Optional clock) @@ -40,7 +39,6 @@ properties: items: - const: bi_tcxo - const: sleep_clk - - const: core_bi_pll_test_se # Optional clock - const: pcie_0_pipe_clk # Optional clock - const: pcie_1_pipe_clk # Optional clock - const: ufs_card_rx_symbol_0_clk # Optional clock From patchwork Wed Dec 28 18:52:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13083121 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E84E8C4708D for ; Wed, 28 Dec 2022 18:52:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232989AbiL1Sws (ORCPT ); Wed, 28 Dec 2022 13:52:48 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36606 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233127AbiL1Swo (ORCPT ); Wed, 28 Dec 2022 13:52:44 -0500 Received: from mail-lj1-x234.google.com (mail-lj1-x234.google.com [IPv6:2a00:1450:4864:20::234]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D228215F07 for ; Wed, 28 Dec 2022 10:52:43 -0800 (PST) Received: by mail-lj1-x234.google.com with SMTP id x37so10406909ljq.1 for ; Wed, 28 Dec 2022 10:52:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=i4OtaAmGJY7xxd4PSBjC+YPPX7IIqZeRJZLCtFq4Lnw=; b=u01nM3/M8jJxPl+mr3IfJwLIMqgfgRkIc7w6xP4R3YYk54xNiardAR6Z9wPu9UoKEY LUwSxpXpdpmAo9PdU5aRwtE2WvRWq5GyDXNmj86oXozOA5M98SHOVi9K4DnyGcI7LCI7 8Of3y6Ot3xff/fraFZ6h8KBR6J40sRNXQpduLLa5mileAL3XTz7Ph4gLXyyTknRRdJ5x ACEAAVug2c0D4Tc+pcgumucDt6yGdaIJW+sAhQ0+Rzz0bKlmbSmcq6bmo2H2iOwu1e2n I6vKjeV4a8liWReXXy5sGCSEwX6yq9TA34q44N+pyWpAJjZqnKbes2xi8nNuBzDax44B MuvA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=i4OtaAmGJY7xxd4PSBjC+YPPX7IIqZeRJZLCtFq4Lnw=; b=GqHeCndT/E77rOYu30xwvegC1KlKYWCNp9hWfVp0qyBiGeG+GT3zjURGVt6z8ADm6H sLUJy6hobjsJSuyqQsdevrXQ4Xhm+E7XC9xo3iZto2+uY2xrTx9vPiSk/BBp4o7vAtto gmmBzth2ZcX6J5rLdc0nsQKi7bakQu4GmGjU+1N/3G4/+zuYYGzMcZ+BvjHgKj26sa+s O3/KMoDJmo1wigAsmW5KH9h0yhT2eP7gnrniVX33vDbOtdVieJ5iPo4InKcaf9Qm2v2t LRLTog0b1UMCwUIU7z/cVD43zOEJ83oKqNquj8wAXokgI2UHR0VGaa6FjPVSXWjxJSgk Y1gQ== X-Gm-Message-State: AFqh2kqx+2atz5SJOshcz3KU3nf32+2QNghXvrJk62Tz23gKy9UKFyzU kTyg0VJpXSDmGsgHc1oQVKZSYA== X-Google-Smtp-Source: AMrXdXs5A0KKKYhlVKfhYdRGa5MYw8svD9+CStJ1H0ghSEZaZbLaiB6BsOctc9Nb/nY8Mm87LaErDg== X-Received: by 2002:a2e:9002:0:b0:277:9fc:5927 with SMTP id h2-20020a2e9002000000b0027709fc5927mr6745784ljg.0.1672253563428; Wed, 28 Dec 2022 10:52:43 -0800 (PST) Received: from eriador.lan (dzccz6yyyyyyyyyyybcwt-3.rev.dnainternet.fi. [2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id s7-20020a2e83c7000000b00279d206a43bsm2031893ljh.34.2022.12.28.10.52.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Dec 2022 10:52:42 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Stephen Boyd , Michael Turquette , Rob Herring , Krzysztof Kozlowski , Taniya Das Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 05/16] dt-bindings: clock: qcom,mmcc-msm8998: drop core_bi_pll_test_se Date: Wed, 28 Dec 2022 20:52:26 +0200 Message-Id: <20221228185237.3111988-6-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221228185237.3111988-1-dmitry.baryshkov@linaro.org> References: <20221228185237.3111988-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The test clock apparently it's not used by anyone upstream. Remove it. Signed-off-by: Dmitry Baryshkov Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/clock/qcom,mmcc.yaml | 2 -- 1 file changed, 2 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml b/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml index e6d17426e903..cf04d791093f 100644 --- a/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml @@ -229,7 +229,6 @@ allOf: - description: HDMI phy PLL clock - description: DisplayPort phy PLL link clock - description: DisplayPort phy PLL vco clock - - description: Test clock clock-names: items: @@ -242,7 +241,6 @@ allOf: - const: hdmipll - const: dplink - const: dpvco - - const: core_bi_pll_test_se - if: properties: From patchwork Wed Dec 28 18:52:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13083123 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 121C7C5479D for ; Wed, 28 Dec 2022 18:52:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233266AbiL1Swv (ORCPT ); Wed, 28 Dec 2022 13:52:51 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36638 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233285AbiL1Swr (ORCPT ); Wed, 28 Dec 2022 13:52:47 -0500 Received: from mail-lj1-x235.google.com (mail-lj1-x235.google.com [IPv6:2a00:1450:4864:20::235]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1154415F1C for ; Wed, 28 Dec 2022 10:52:46 -0800 (PST) Received: by mail-lj1-x235.google.com with SMTP id g14so17270088ljh.10 for ; Wed, 28 Dec 2022 10:52:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=xhFDc1hg+Eb9tEQftxzX0BdtZxOOhzNp27cW9co6hFs=; b=nSJDr/NpSXdbqjRrnAl3kAaM39YIdBbqoty8jnR10wztBSHfiIgTPrl0KtW6jOGGFc l7cnggSn94PT5+Z86poBh8W7P+c/7R4TMR7anjO44SvZXfkxKjNPGsrcXDr/ULfa6ss1 ieGyeTSguQ/C0TZxB875nRrUOcGUpTuU08DGST2xfcbaGhWhAhoaG/JPAmoZ5Bzz1UTc 3DHpUzzY8Ghs2i7NfIhZlQvnYj9OK8Sm7php/FRbXjdjZ2ZSUGcO8/7eLfFayERDDu5f uI3SY91N/YNSTHxy4MTcLVqqvwHIUVrM5JP3T1wTMbEu8mo+syo5uNai6PmnFJPRA3MT qx+w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=xhFDc1hg+Eb9tEQftxzX0BdtZxOOhzNp27cW9co6hFs=; b=sdho5JjnSt8TTbPaY33MDRyK7bl+yO3V3Ogz74yn8kANfMkwCsGsi4NlrFmvFskE3B ZTwJnOFYljTxN/+8J2YOkplGRq1Zc2MNjFc+N7HincGiNjFnNkQ9XjjtSKk+uiEnLsDq v7bTXfeyWftXB1qpanHc31+HunXjkIc2hLZ8DbXO2Hh444u4eyuL0vXLWyIXSHsxyOom qoVAacsEqz9ccYNaRN13xz3wkdAme3I5tBac2swH/rB8GuKCy+i9bOgti4NEtW4tne+l GSPP+jh2I46YvjXwNjTLO3SLBaP39aCDeZ/fJwnX0bfjjPrKyOLxqNpjKMS88Whd6X3/ q9iQ== X-Gm-Message-State: AFqh2kp8Yliya9x4lEmzMT/mJhXvK7h3KcijGtxYZzurBCQldwPiHRh7 kuHZG9+yLsrqAEMN4gBb8igOQg== X-Google-Smtp-Source: AMrXdXviI+DWKchELH2hrpNTVuKm/QYC+AEQVMeD0/y87/nJHKWZ8P4FBiCrpCFjDyVGq0Vbf3Ah1w== X-Received: by 2002:a2e:9052:0:b0:27f:9493:76ab with SMTP id n18-20020a2e9052000000b0027f949376abmr7134543ljg.7.1672253565638; Wed, 28 Dec 2022 10:52:45 -0800 (PST) Received: from eriador.lan (dzccz6yyyyyyyyyyybcwt-3.rev.dnainternet.fi. [2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id s7-20020a2e83c7000000b00279d206a43bsm2031893ljh.34.2022.12.28.10.52.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Dec 2022 10:52:43 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Stephen Boyd , Michael Turquette , Rob Herring , Krzysztof Kozlowski , Taniya Das Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 06/16] dt-bindings: clock: qcom: gcc-sm8350: drop test clock Date: Wed, 28 Dec 2022 20:52:27 +0200 Message-Id: <20221228185237.3111988-7-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221228185237.3111988-1-dmitry.baryshkov@linaro.org> References: <20221228185237.3111988-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The test clock apparently it's not used by anyone upstream. Remove it. Signed-off-by: Dmitry Baryshkov Reviewed-by: Rob Herring --- include/dt-bindings/clock/qcom,gcc-sm8350.h | 1 - 1 file changed, 1 deletion(-) diff --git a/include/dt-bindings/clock/qcom,gcc-sm8350.h b/include/dt-bindings/clock/qcom,gcc-sm8350.h index f6be3da5f781..529c1b8b0417 100644 --- a/include/dt-bindings/clock/qcom,gcc-sm8350.h +++ b/include/dt-bindings/clock/qcom,gcc-sm8350.h @@ -8,7 +8,6 @@ #define _DT_BINDINGS_CLK_QCOM_GCC_SM8350_H /* GCC HW clocks */ -#define CORE_BI_PLL_TEST_SE 0 #define PCIE_0_PIPE_CLK 1 #define PCIE_1_PIPE_CLK 2 #define UFS_CARD_RX_SYMBOL_0_CLK 3 From patchwork Wed Dec 28 18:52:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13083124 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B912EC3DA7A for ; Wed, 28 Dec 2022 18:52:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233350AbiL1Swv (ORCPT ); Wed, 28 Dec 2022 13:52:51 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36640 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233337AbiL1Swr (ORCPT ); Wed, 28 Dec 2022 13:52:47 -0500 Received: from mail-lj1-x22a.google.com (mail-lj1-x22a.google.com [IPv6:2a00:1450:4864:20::22a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CCA5215FF2 for ; Wed, 28 Dec 2022 10:52:46 -0800 (PST) Received: by mail-lj1-x22a.google.com with SMTP id e13so14728209ljn.0 for ; Wed, 28 Dec 2022 10:52:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=dPiUl4EdKWMJANife8srJ0scEoyX5E4VGNwbBAPuzVA=; b=TZV+uTSHiy7YF5VzIDQcLXz6R1cYwZ4v95WqQtTAizYgOWDgsY8dhMb9a+S44UTYVB lEvrS04EokPBh3R67FWk66XiDYBVjigF4QbQyTKLM9Qa7KMEzwjP5qO0KGqrjmasLv0F ESrbzUeTjnWtpnmM673WZGNoG/kIe/hzBADr6fno8j5iutTtfZ3aR/XJsXeXYAqmdezR qnsDhfkUuwz9gTIAJ+0+z63edP2QV1rOt5XrgnMTtNvJySJT6pYybItO00FTAXQ0cemn Ocad+7uOIrc7hbDOTXCTPmaEF+9ZQuyo2c0Cp06qxvaJjw79v3Z26EWTK2uvF1m44fhh GjOQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=dPiUl4EdKWMJANife8srJ0scEoyX5E4VGNwbBAPuzVA=; b=bXsN5KfLAURy04jSfuxr9rbiscdd/zgFIyc3+Z+YfapPFtOJlsraC+61MwVuPoaN7W ZVDWZt99J+mDg+RYQGmG3PAaLaX6frWCve3fh6+lTcivtGimcU8Ww/JFwzAwRCNfQ/+a rJLXi3DFRNcZtl6V+N6EMFVLdBbP7iFuW50SEAC1w/s0NCQ3LzgfFpJFQp5ZlsLln/i9 SymEZbdq6/nHk88DWrpIDs1YdHS5lDeGXYT6GGcrxbIHa1ppBysyroWinItvOGXsyNaJ KP150TgYuMrzCs2AquScoEYdBOVWl4qnlAEOVhy+MMb3daPl3QHSMiEf9dtU4YS6Oy9/ 9srw== X-Gm-Message-State: AFqh2kq4lMOYZPe357MdAalLwIOSvqrU3kGmM7VObBiVBA0jm539WYj8 kjCASD/GuQcaO2b4pgOFsuIYDw== X-Google-Smtp-Source: AMrXdXtk6ND371WXwR5KhjifLVDAGPElPRICguomcgAPNkaK34kPPrgRovcAfOB3F4vpyQIl30iaSA== X-Received: by 2002:a2e:3c08:0:b0:279:da98:df8a with SMTP id j8-20020a2e3c08000000b00279da98df8amr6972126lja.43.1672253566412; Wed, 28 Dec 2022 10:52:46 -0800 (PST) Received: from eriador.lan (dzccz6yyyyyyyyyyybcwt-3.rev.dnainternet.fi. [2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id s7-20020a2e83c7000000b00279d206a43bsm2031893ljh.34.2022.12.28.10.52.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Dec 2022 10:52:45 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Stephen Boyd , Michael Turquette , Rob Herring , Krzysztof Kozlowski , Taniya Das Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 07/16] dt-bindings: clock: qcom: gcc-sm8450: drop test clock Date: Wed, 28 Dec 2022 20:52:28 +0200 Message-Id: <20221228185237.3111988-8-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221228185237.3111988-1-dmitry.baryshkov@linaro.org> References: <20221228185237.3111988-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The test clock apparently it's not used by anyone upstream. Remove it. Signed-off-by: Dmitry Baryshkov Reviewed-by: Rob Herring --- include/dt-bindings/clock/qcom,gcc-sm8450.h | 1 - 1 file changed, 1 deletion(-) diff --git a/include/dt-bindings/clock/qcom,gcc-sm8450.h b/include/dt-bindings/clock/qcom,gcc-sm8450.h index cf1469312c4c..9679410843a0 100644 --- a/include/dt-bindings/clock/qcom,gcc-sm8450.h +++ b/include/dt-bindings/clock/qcom,gcc-sm8450.h @@ -8,7 +8,6 @@ #define _DT_BINDINGS_CLK_QCOM_GCC_SM8450_H /* GCC HW clocks */ -#define CORE_BI_PLL_TEST_SE 0 #define PCIE_0_PIPE_CLK 1 #define PCIE_1_PHY_AUX_CLK 2 #define PCIE_1_PIPE_CLK 3 From patchwork Wed Dec 28 18:52:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13083126 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 02EC8C3DA7A for ; Wed, 28 Dec 2022 18:52:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233471AbiL1Swy (ORCPT ); Wed, 28 Dec 2022 13:52:54 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36734 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231523AbiL1Swt (ORCPT ); Wed, 28 Dec 2022 13:52:49 -0500 Received: from mail-lj1-x22f.google.com (mail-lj1-x22f.google.com [IPv6:2a00:1450:4864:20::22f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F3FC515F29 for ; Wed, 28 Dec 2022 10:52:48 -0800 (PST) Received: by mail-lj1-x22f.google.com with SMTP id p2so1700719ljn.7 for ; Wed, 28 Dec 2022 10:52:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=RpTfcDalQHAd8GUSxa+F3qrhqRaoihb1U5Bo1ExZrYo=; b=msMXScYbn8h5sR4/JLiNcjIrtKoWeyTCLe4SegtfVUa/OKsRw2lahpVU1/x44quVD6 YvYa3/JhI6upJZpPYttii9+O2Y9SGlPQxPlhXD3Os2hCFXfwTqwlWeVPhllZkEMYJbmR PolRChUQr3Vq9szMoMHVCg+uGTlpiqQXSsQLYcXORQBdVFfNDWfLyL/4q7e/Ssue5UFr zeqPVG+InMcGVStz/oD9epx6LfofIN7bX3pBPyz4T5Nu/wYhbv0c+A44S7IGqoIzcruC x3BOQu0D9UGu94/e186X5qyAsDOcesOxvUTM8G1vvt5o8qyI6fnu7kxg+tv7b0qgNu6M uRLw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=RpTfcDalQHAd8GUSxa+F3qrhqRaoihb1U5Bo1ExZrYo=; b=tamR0XJBn0vnWRJsOZeSLBFI8sadLxvVNQ/Ira60jA5wssAduysEHAfdbktBDmlGoo EXaK21zz/FepP7tmSgsl0H7/ILJlafvwb8BkmP0wBdAR+5BZ9Qhv3iUISEx7BYVcUThU q6Fy2Ybe0AaLjuRuQs46VNkUh6i8QrEwPAr0bPYte+AMHW77LJNVutuHltKOR0pGcPfF PGI1RR3TubSMuEunj0vbi6uKuaQFPUjl4BgZ2e7ohMjzEbJU5+rz+tfikoA1+kproj83 Wd286YPX1nF7YyKP/VB6FwO6IA0SuJ0kKYsBJub5xf8OM1M+4tqhRwM7S949zo70WRcJ GWHw== X-Gm-Message-State: AFqh2kpga5HlaxIN6F6/Q15Nt+In3AS7aNmicqv3W55E4FCWLni4dgCh 7cRvT25K8wED3AM2lQ9TMLO6JA== X-Google-Smtp-Source: AMrXdXtDXsT6dEs1NCN9uzeC0rch7vWgIpFP5th4Zey44ttCL4mo4X18Uwukjz+DRafBpfNfv1FGPA== X-Received: by 2002:a05:651c:301:b0:27f:d652:f397 with SMTP id a1-20020a05651c030100b0027fd652f397mr149643ljp.34.1672253567259; Wed, 28 Dec 2022 10:52:47 -0800 (PST) Received: from eriador.lan (dzccz6yyyyyyyyyyybcwt-3.rev.dnainternet.fi. [2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id s7-20020a2e83c7000000b00279d206a43bsm2031893ljh.34.2022.12.28.10.52.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Dec 2022 10:52:46 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Stephen Boyd , Michael Turquette , Rob Herring , Krzysztof Kozlowski , Taniya Das Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 08/16] clk: qcom: dispcc-qcm2290: get rid of test clock Date: Wed, 28 Dec 2022 20:52:29 +0200 Message-Id: <20221228185237.3111988-9-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221228185237.3111988-1-dmitry.baryshkov@linaro.org> References: <20221228185237.3111988-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The test clock apparently it's not used by anyone upstream. Remove it. Reviewed-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov Reviewed-by: Stephen Boyd --- drivers/clk/qcom/dispcc-qcm2290.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/drivers/clk/qcom/dispcc-qcm2290.c b/drivers/clk/qcom/dispcc-qcm2290.c index 96b149365912..2ebd9a02b895 100644 --- a/drivers/clk/qcom/dispcc-qcm2290.c +++ b/drivers/clk/qcom/dispcc-qcm2290.c @@ -71,7 +71,6 @@ static const struct parent_map disp_cc_parent_map_0[] = { static const struct clk_parent_data disp_cc_parent_data_0[] = { { .fw_name = "bi_tcxo" }, { .fw_name = "dsi0_phy_pll_out_byteclk" }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map disp_cc_parent_map_1[] = { @@ -80,7 +79,6 @@ static const struct parent_map disp_cc_parent_map_1[] = { static const struct clk_parent_data disp_cc_parent_data_1[] = { { .fw_name = "bi_tcxo" }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map disp_cc_parent_map_2[] = { @@ -91,7 +89,6 @@ static const struct parent_map disp_cc_parent_map_2[] = { static const struct clk_parent_data disp_cc_parent_data_2[] = { { .fw_name = "bi_tcxo_ao" }, { .fw_name = "gcc_disp_gpll0_div_clk_src" }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map disp_cc_parent_map_3[] = { @@ -104,7 +101,6 @@ static const struct clk_parent_data disp_cc_parent_data_3[] = { { .fw_name = "bi_tcxo" }, { .hw = &disp_cc_pll0.clkr.hw }, { .fw_name = "gcc_disp_gpll0_clk_src" }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map disp_cc_parent_map_4[] = { @@ -117,7 +113,6 @@ static const struct clk_parent_data disp_cc_parent_data_4[] = { { .fw_name = "bi_tcxo" }, { .fw_name = "dsi0_phy_pll_out_dsiclk" }, { .fw_name = "dsi1_phy_pll_out_dsiclk" }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map disp_cc_parent_map_5[] = { @@ -126,7 +121,6 @@ static const struct parent_map disp_cc_parent_map_5[] = { static const struct clk_parent_data disp_cc_parent_data_5[] = { { .fw_name = "sleep_clk" }, - { .fw_name = "core_bi_pll_test_se" }, }; static struct clk_rcg2 disp_cc_mdss_byte0_clk_src = { From patchwork Wed Dec 28 18:52:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13083125 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4D4FEC4708D for ; Wed, 28 Dec 2022 18:52:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233363AbiL1Swx (ORCPT ); Wed, 28 Dec 2022 13:52:53 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36638 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233374AbiL1Swt (ORCPT ); Wed, 28 Dec 2022 13:52:49 -0500 Received: from mail-lj1-x230.google.com (mail-lj1-x230.google.com [IPv6:2a00:1450:4864:20::230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9008F16583 for ; Wed, 28 Dec 2022 10:52:48 -0800 (PST) Received: by mail-lj1-x230.google.com with SMTP id bn6so7403210ljb.13 for ; Wed, 28 Dec 2022 10:52:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=EVX8yY/UWuCJj4kUbeEr6PivKhM30gbBjbhgDlyDL0c=; b=gcBSPutzpcGb7hDE8reraZLgvYi3gCZndZ0nrqIIRsGWziYWZzop9uW+twO29dOPs3 GPSU1eX5tMD/BFflemsfuJ9aWn4QUP8kSzigZR1TbKiLnuJE2LUav4koDnAt7iLan4O2 aMZfvGY2QLAkQ7pzqm4hCfunBwAPFadsJMjCYj+DqKyQlBiMao5vI73Ne+R7RyTBjHAV bGPV9z5lIXjs5Cc0zIysIJsakbldRKKZxS0jdoHRm3VbjpTka0avH3ZqljW0KAbL0Jpa LCWxlNwBHyhn/mjWVqnX3zyKR8zI4APmWpj4j99tWgJbgac/Yvj8/kYW/btbhk/d00qW zg1Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=EVX8yY/UWuCJj4kUbeEr6PivKhM30gbBjbhgDlyDL0c=; b=QZmOqnUaRUFD191KPHUR8uiXJwgIiHEhxwXE9nFwalATMvmy5OXcQYXbcBaWbCGrUT yflEG6xqb1Af7uPRABP90q9LI+DpVBICaXAAPSONloD+w4v3PMOZCja6/6hJvmQa2IZs xwuPZTDLN0bPkXhk1qGadcim/zb9tjbgqE+m/DduS+gtKTPROjg5UEQolmoE0hfH1BXC yWrMMr+C8tOUGiUxQ4Il8IA/HIV+NB/rDmxXdjrL51ZISNm+m72LCyR2gqNMYO1LoL3a QwPsgsmFtO5ktxrpSWfTpuA04skTQ10sm5IQUFmbmgX6gpxRU3DypDsE/qKMKOoFbqhr Z8xg== X-Gm-Message-State: AFqh2kqgxcltwll4d1lcTj0T/5YIdEJKqjLsEpWxVtlZlC+/gbIV4Xsm /cF90bmLaPUkKxsPxLR9BRIWLw== X-Google-Smtp-Source: AMrXdXsKYDqPdmxbWTYbDjwxu6W+OMEbv9IqHM3e9j9XgJfjHky7pun9sdeT+r0El2jlIMBt/Hez3w== X-Received: by 2002:a2e:8602:0:b0:27f:c669:6b06 with SMTP id a2-20020a2e8602000000b0027fc6696b06mr2238624lji.3.1672253568169; Wed, 28 Dec 2022 10:52:48 -0800 (PST) Received: from eriador.lan (dzccz6yyyyyyyyyyybcwt-3.rev.dnainternet.fi. [2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id s7-20020a2e83c7000000b00279d206a43bsm2031893ljh.34.2022.12.28.10.52.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Dec 2022 10:52:47 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Stephen Boyd , Michael Turquette , Rob Herring , Krzysztof Kozlowski , Taniya Das Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 09/16] clk: qcom: gcc-msm8998: get rid of test clock Date: Wed, 28 Dec 2022 20:52:30 +0200 Message-Id: <20221228185237.3111988-10-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221228185237.3111988-1-dmitry.baryshkov@linaro.org> References: <20221228185237.3111988-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The test clock apparently it's not used by anyone upstream. Remove it. Reviewed-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov Reviewed-by: Stephen Boyd --- drivers/clk/qcom/gcc-msm8998.c | 13 ------------- 1 file changed, 13 deletions(-) diff --git a/drivers/clk/qcom/gcc-msm8998.c b/drivers/clk/qcom/gcc-msm8998.c index 33473c52eb90..908e996841c2 100644 --- a/drivers/clk/qcom/gcc-msm8998.c +++ b/drivers/clk/qcom/gcc-msm8998.c @@ -387,7 +387,6 @@ static struct clk_alpha_pll_postdiv gpll4_out_test = { enum { P_AUD_REF_CLK, - P_CORE_BI_PLL_TEST_SE, P_GPLL0_OUT_MAIN, P_GPLL4_OUT_MAIN, P_PLL0_EARLY_DIV_CLK_SRC, @@ -399,26 +398,22 @@ static const struct parent_map gcc_parent_map_0[] = { { P_XO, 0 }, { P_GPLL0_OUT_MAIN, 1 }, { P_PLL0_EARLY_DIV_CLK_SRC, 6 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parent_data_0[] = { { .fw_name = "xo" }, { .hw = &gpll0_out_main.clkr.hw }, { .hw = &gpll0_out_main.clkr.hw }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map gcc_parent_map_1[] = { { P_XO, 0 }, { P_GPLL0_OUT_MAIN, 1 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parent_data_1[] = { { .fw_name = "xo" }, { .hw = &gpll0_out_main.clkr.hw }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map gcc_parent_map_2[] = { @@ -426,7 +421,6 @@ static const struct parent_map gcc_parent_map_2[] = { { P_GPLL0_OUT_MAIN, 1 }, { P_SLEEP_CLK, 5 }, { P_PLL0_EARLY_DIV_CLK_SRC, 6 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parent_data_2[] = { @@ -434,47 +428,40 @@ static const struct clk_parent_data gcc_parent_data_2[] = { { .hw = &gpll0_out_main.clkr.hw }, { .fw_name = "sleep_clk" }, { .hw = &gpll0_out_main.clkr.hw }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map gcc_parent_map_3[] = { { P_XO, 0 }, { P_SLEEP_CLK, 5 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parent_data_3[] = { { .fw_name = "xo" }, { .fw_name = "sleep_clk" }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map gcc_parent_map_4[] = { { P_XO, 0 }, { P_GPLL0_OUT_MAIN, 1 }, { P_GPLL4_OUT_MAIN, 5 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parent_data_4[] = { { .fw_name = "xo" }, { .hw = &gpll0_out_main.clkr.hw }, { .hw = &gpll4_out_main.clkr.hw }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map gcc_parent_map_5[] = { { P_XO, 0 }, { P_GPLL0_OUT_MAIN, 1 }, { P_AUD_REF_CLK, 2 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parent_data_5[] = { { .fw_name = "xo" }, { .hw = &gpll0_out_main.clkr.hw }, { .fw_name = "aud_ref_clk" }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct freq_tbl ftbl_blsp1_qup1_i2c_apps_clk_src[] = { From patchwork Wed Dec 28 18:52:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13083128 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B23D4C4708E for ; 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[2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id s7-20020a2e83c7000000b00279d206a43bsm2031893ljh.34.2022.12.28.10.52.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Dec 2022 10:52:48 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Stephen Boyd , Michael Turquette , Rob Herring , Krzysztof Kozlowski , Taniya Das Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 10/16] clk: qcom: gcc-sc7180: get rid of test clock Date: Wed, 28 Dec 2022 20:52:31 +0200 Message-Id: <20221228185237.3111988-11-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221228185237.3111988-1-dmitry.baryshkov@linaro.org> References: <20221228185237.3111988-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The test clock apparently it's not used by anyone upstream. Remove it. Reviewed-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov Reviewed-by: Stephen Boyd --- drivers/clk/qcom/gcc-sc7180.c | 16 ---------------- 1 file changed, 16 deletions(-) diff --git a/drivers/clk/qcom/gcc-sc7180.c b/drivers/clk/qcom/gcc-sc7180.c index 2d3980251e78..105c4762ca84 100644 --- a/drivers/clk/qcom/gcc-sc7180.c +++ b/drivers/clk/qcom/gcc-sc7180.c @@ -23,7 +23,6 @@ enum { P_BI_TCXO, - P_CORE_BI_PLL_TEST_SE, P_GPLL0_OUT_EVEN, P_GPLL0_OUT_MAIN, P_GPLL1_OUT_MAIN, @@ -162,21 +161,18 @@ static const struct parent_map gcc_parent_map_0[] = { { P_BI_TCXO, 0 }, { P_GPLL0_OUT_MAIN, 1 }, { P_GPLL0_OUT_EVEN, 6 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parent_data_0[] = { { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, { .hw = &gpll0.clkr.hw }, { .hw = &gpll0_out_even.clkr.hw }, - { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct clk_parent_data gcc_parent_data_0_ao[] = { { .fw_name = "bi_tcxo_ao", .name = "bi_tcxo_ao" }, { .hw = &gpll0.clkr.hw }, { .hw = &gpll0_out_even.clkr.hw }, - { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct parent_map gcc_parent_map_1[] = { @@ -184,7 +180,6 @@ static const struct parent_map gcc_parent_map_1[] = { { P_GPLL0_OUT_MAIN, 1 }, { P_GPLL6_OUT_MAIN, 2 }, { P_GPLL0_OUT_EVEN, 6 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parent_data_1[] = { @@ -192,7 +187,6 @@ static const struct clk_parent_data gcc_parent_data_1[] = { { .hw = &gpll0.clkr.hw }, { .hw = &gpll6.clkr.hw }, { .hw = &gpll0_out_even.clkr.hw }, - { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct parent_map gcc_parent_map_2[] = { @@ -201,7 +195,6 @@ static const struct parent_map gcc_parent_map_2[] = { { P_GPLL1_OUT_MAIN, 4 }, { P_GPLL4_OUT_MAIN, 5 }, { P_GPLL0_OUT_EVEN, 6 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parent_data_2[] = { @@ -210,19 +203,16 @@ static const struct clk_parent_data gcc_parent_data_2[] = { { .hw = &gpll1.clkr.hw }, { .hw = &gpll4.clkr.hw }, { .hw = &gpll0_out_even.clkr.hw }, - { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct parent_map gcc_parent_map_3[] = { { P_BI_TCXO, 0 }, { P_GPLL0_OUT_MAIN, 1 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parent_data_3[] = { { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, { .hw = &gpll0.clkr.hw }, - { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct parent_map gcc_parent_map_4[] = { @@ -230,7 +220,6 @@ static const struct parent_map gcc_parent_map_4[] = { { P_GPLL0_OUT_MAIN, 1 }, { P_SLEEP_CLK, 5 }, { P_GPLL0_OUT_EVEN, 6 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parent_data_4[] = { @@ -238,7 +227,6 @@ static const struct clk_parent_data gcc_parent_data_4[] = { { .hw = &gpll0.clkr.hw }, { .fw_name = "sleep_clk", .name = "sleep_clk" }, { .hw = &gpll0_out_even.clkr.hw }, - { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct parent_map gcc_parent_map_5[] = { @@ -246,7 +234,6 @@ static const struct parent_map gcc_parent_map_5[] = { { P_GPLL0_OUT_MAIN, 1 }, { P_GPLL7_OUT_MAIN, 3 }, { P_GPLL0_OUT_EVEN, 6 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parent_data_5[] = { @@ -254,21 +241,18 @@ static const struct clk_parent_data gcc_parent_data_5[] = { { .hw = &gpll0.clkr.hw }, { .hw = &gpll7.clkr.hw }, { .hw = &gpll0_out_even.clkr.hw }, - { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct parent_map gcc_parent_map_6[] = { { P_BI_TCXO, 0 }, { P_GPLL0_OUT_MAIN, 1 }, { P_SLEEP_CLK, 5 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parent_data_6[] = { { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, { .hw = &gpll0.clkr.hw }, { .fw_name = "sleep_clk", .name = "sleep_clk" }, - { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; static const struct freq_tbl ftbl_gcc_cpuss_ahb_clk_src[] = { From patchwork Wed Dec 28 18:52:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13083127 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 924D2C3DA7A for ; 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[2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id s7-20020a2e83c7000000b00279d206a43bsm2031893ljh.34.2022.12.28.10.52.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Dec 2022 10:52:49 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Stephen Boyd , Michael Turquette , Rob Herring , Krzysztof Kozlowski , Taniya Das Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 11/16] clk: qcom: gcc-sdx55: use ARRAY_SIZE instead of specifying num_parents Date: Wed, 28 Dec 2022 20:52:32 +0200 Message-Id: <20221228185237.3111988-12-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221228185237.3111988-1-dmitry.baryshkov@linaro.org> References: <20221228185237.3111988-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Use ARRAY_SIZE() instead of manually specifying num_parents. This makes adding/removing entries to/from parent_data/names/hws easy and errorproof. Reviewed-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov Reviewed-by: Stephen Boyd --- drivers/clk/qcom/gcc-sdx55.c | 52 ++++++++++++++++++------------------ 1 file changed, 26 insertions(+), 26 deletions(-) diff --git a/drivers/clk/qcom/gcc-sdx55.c b/drivers/clk/qcom/gcc-sdx55.c index 4fca19006a77..758b295e1bfa 100644 --- a/drivers/clk/qcom/gcc-sdx55.c +++ b/drivers/clk/qcom/gcc-sdx55.c @@ -232,7 +232,7 @@ static struct clk_rcg2 gcc_blsp1_qup1_i2c_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup1_i2c_apps_clk_src", .parent_data = gcc_parents_0, - .num_parents = 4, + .num_parents = ARRAY_SIZE(gcc_parents_0), .ops = &clk_rcg2_ops, }, }; @@ -258,7 +258,7 @@ static struct clk_rcg2 gcc_blsp1_qup1_spi_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup1_spi_apps_clk_src", .parent_data = gcc_parents_0, - .num_parents = 4, + .num_parents = ARRAY_SIZE(gcc_parents_0), .ops = &clk_rcg2_ops, }, }; @@ -272,7 +272,7 @@ static struct clk_rcg2 gcc_blsp1_qup2_i2c_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup2_i2c_apps_clk_src", .parent_data = gcc_parents_0, - .num_parents = 4, + .num_parents = ARRAY_SIZE(gcc_parents_0), .ops = &clk_rcg2_ops, }, }; @@ -286,7 +286,7 @@ static struct clk_rcg2 gcc_blsp1_qup2_spi_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup2_spi_apps_clk_src", .parent_data = gcc_parents_0, - .num_parents = 4, + .num_parents = ARRAY_SIZE(gcc_parents_0), .ops = &clk_rcg2_ops, }, }; @@ -300,7 +300,7 @@ static struct clk_rcg2 gcc_blsp1_qup3_i2c_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup3_i2c_apps_clk_src", .parent_data = gcc_parents_0, - .num_parents = 4, + .num_parents = ARRAY_SIZE(gcc_parents_0), .ops = &clk_rcg2_ops, }, }; @@ -314,7 +314,7 @@ static struct clk_rcg2 gcc_blsp1_qup3_spi_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup3_spi_apps_clk_src", .parent_data = gcc_parents_0, - .num_parents = 4, + .num_parents = ARRAY_SIZE(gcc_parents_0), .ops = &clk_rcg2_ops, }, }; @@ -328,7 +328,7 @@ static struct clk_rcg2 gcc_blsp1_qup4_i2c_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup4_i2c_apps_clk_src", .parent_data = gcc_parents_0, - .num_parents = 4, + .num_parents = ARRAY_SIZE(gcc_parents_0), .ops = &clk_rcg2_ops, }, }; @@ -342,7 +342,7 @@ static struct clk_rcg2 gcc_blsp1_qup4_spi_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup4_spi_apps_clk_src", .parent_data = gcc_parents_0, - .num_parents = 4, + .num_parents = ARRAY_SIZE(gcc_parents_0), .ops = &clk_rcg2_ops, }, }; @@ -386,7 +386,7 @@ static struct clk_rcg2 gcc_blsp1_uart1_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_uart1_apps_clk_src", .parent_data = gcc_parents_0, - .num_parents = 4, + .num_parents = ARRAY_SIZE(gcc_parents_0), .ops = &clk_rcg2_ops, }, }; @@ -400,7 +400,7 @@ static struct clk_rcg2 gcc_blsp1_uart2_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_uart2_apps_clk_src", .parent_data = gcc_parents_0, - .num_parents = 4, + .num_parents = ARRAY_SIZE(gcc_parents_0), .ops = &clk_rcg2_ops, }, }; @@ -414,7 +414,7 @@ static struct clk_rcg2 gcc_blsp1_uart3_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_uart3_apps_clk_src", .parent_data = gcc_parents_0, - .num_parents = 4, + .num_parents = ARRAY_SIZE(gcc_parents_0), .ops = &clk_rcg2_ops, }, }; @@ -428,7 +428,7 @@ static struct clk_rcg2 gcc_blsp1_uart4_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_uart4_apps_clk_src", .parent_data = gcc_parents_0, - .num_parents = 4, + .num_parents = ARRAY_SIZE(gcc_parents_0), .ops = &clk_rcg2_ops, }, }; @@ -450,7 +450,7 @@ static struct clk_rcg2 gcc_cpuss_ahb_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_cpuss_ahb_clk_src", .parent_data = gcc_parents_0_ao, - .num_parents = 4, + .num_parents = ARRAY_SIZE(gcc_parents_0_ao), .ops = &clk_rcg2_ops, }, }; @@ -469,7 +469,7 @@ static struct clk_rcg2 gcc_cpuss_rbcpr_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_cpuss_rbcpr_clk_src", .parent_data = gcc_parents_0_ao, - .num_parents = 4, + .num_parents = ARRAY_SIZE(gcc_parents_0_ao), .ops = &clk_rcg2_ops, }, }; @@ -493,7 +493,7 @@ static struct clk_rcg2 gcc_emac_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_emac_clk_src", .parent_data = gcc_parents_5, - .num_parents = 5, + .num_parents = ARRAY_SIZE(gcc_parents_5), .ops = &clk_rcg2_ops, }, }; @@ -514,7 +514,7 @@ static struct clk_rcg2 gcc_emac_ptp_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_emac_ptp_clk_src", .parent_data = gcc_parents_2, - .num_parents = 6, + .num_parents = ARRAY_SIZE(gcc_parents_2), .ops = &clk_rcg2_ops, }, }; @@ -537,7 +537,7 @@ static struct clk_rcg2 gcc_gp1_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_gp1_clk_src", .parent_data = gcc_parents_3, - .num_parents = 5, + .num_parents = ARRAY_SIZE(gcc_parents_3), .ops = &clk_rcg2_ops, }, }; @@ -551,7 +551,7 @@ static struct clk_rcg2 gcc_gp2_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_gp2_clk_src", .parent_data = gcc_parents_3, - .num_parents = 5, + .num_parents = ARRAY_SIZE(gcc_parents_3), .ops = &clk_rcg2_ops, }, }; @@ -565,7 +565,7 @@ static struct clk_rcg2 gcc_gp3_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_gp3_clk_src", .parent_data = gcc_parents_3, - .num_parents = 5, + .num_parents = ARRAY_SIZE(gcc_parents_3), .ops = &clk_rcg2_ops, }, }; @@ -579,7 +579,7 @@ static struct clk_rcg2 gcc_pcie_aux_phy_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_pcie_aux_phy_clk_src", .parent_data = gcc_parents_4, - .num_parents = 3, + .num_parents = ARRAY_SIZE(gcc_parents_4), .ops = &clk_rcg2_ops, }, }; @@ -598,7 +598,7 @@ static struct clk_rcg2 gcc_pcie_rchng_phy_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_pcie_rchng_phy_clk_src", .parent_data = gcc_parents_3, - .num_parents = 5, + .num_parents = ARRAY_SIZE(gcc_parents_3), .ops = &clk_rcg2_ops, }, }; @@ -619,7 +619,7 @@ static struct clk_rcg2 gcc_pdm2_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_pdm2_clk_src", .parent_data = gcc_parents_0, - .num_parents = 4, + .num_parents = ARRAY_SIZE(gcc_parents_0), .ops = &clk_rcg2_ops, }, }; @@ -633,7 +633,7 @@ static struct clk_rcg2 gcc_sdcc1_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_sdcc1_apps_clk_src", .parent_data = gcc_parents_0, - .num_parents = 4, + .num_parents = ARRAY_SIZE(gcc_parents_0), .ops = &clk_rcg2_ops, }, }; @@ -652,7 +652,7 @@ static struct clk_rcg2 gcc_usb30_master_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_usb30_master_clk_src", .parent_data = gcc_parents_0, - .num_parents = 4, + .num_parents = ARRAY_SIZE(gcc_parents_0), .ops = &clk_rcg2_ops, }, }; @@ -671,7 +671,7 @@ static struct clk_rcg2 gcc_usb30_mock_utmi_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_usb30_mock_utmi_clk_src", .parent_data = gcc_parents_0, - .num_parents = 4, + .num_parents = ARRAY_SIZE(gcc_parents_0), .ops = &clk_rcg2_ops, }, }; @@ -691,7 +691,7 @@ static struct clk_rcg2 gcc_usb3_phy_aux_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_usb3_phy_aux_clk_src", .parent_data = gcc_parents_4, - .num_parents = 3, + .num_parents = ARRAY_SIZE(gcc_parents_4), .ops = &clk_rcg2_ops, }, }; From patchwork Wed Dec 28 18:52:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13083129 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5384AC4708D for ; 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[2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id s7-20020a2e83c7000000b00279d206a43bsm2031893ljh.34.2022.12.28.10.52.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Dec 2022 10:52:50 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Stephen Boyd , Michael Turquette , Rob Herring , Krzysztof Kozlowski , Taniya Das Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 12/16] clk: qcom: gcc-sdx55: get rid of test clock Date: Wed, 28 Dec 2022 20:52:33 +0200 Message-Id: <20221228185237.3111988-13-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221228185237.3111988-1-dmitry.baryshkov@linaro.org> References: <20221228185237.3111988-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The test clock apparently it's not used by anyone upstream. Remove it. Reviewed-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov Reviewed-by: Stephen Boyd --- drivers/clk/qcom/gcc-sdx55.c | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/drivers/clk/qcom/gcc-sdx55.c b/drivers/clk/qcom/gcc-sdx55.c index 758b295e1bfa..d5e17122698c 100644 --- a/drivers/clk/qcom/gcc-sdx55.c +++ b/drivers/clk/qcom/gcc-sdx55.c @@ -22,7 +22,6 @@ enum { P_BI_TCXO, - P_CORE_BI_PLL_TEST_SE, P_GPLL0_OUT_EVEN, P_GPLL0_OUT_MAIN, P_GPLL4_OUT_EVEN, @@ -137,21 +136,18 @@ static const struct parent_map gcc_parent_map_0[] = { { P_BI_TCXO, 0 }, { P_GPLL0_OUT_MAIN, 1 }, { P_GPLL0_OUT_EVEN, 6 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parents_0[] = { { .fw_name = "bi_tcxo" }, { .hw = &gpll0.clkr.hw }, { .hw = &gpll0_out_even.clkr.hw }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct clk_parent_data gcc_parents_0_ao[] = { { .fw_name = "bi_tcxo_ao" }, { .hw = &gpll0.clkr.hw }, { .hw = &gpll0_out_even.clkr.hw }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map gcc_parent_map_2[] = { @@ -160,7 +156,6 @@ static const struct parent_map gcc_parent_map_2[] = { { P_GPLL4_OUT_EVEN, 2 }, { P_GPLL5_OUT_MAIN, 5 }, { P_GPLL0_OUT_EVEN, 6 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parents_2[] = { @@ -169,7 +164,6 @@ static const struct clk_parent_data gcc_parents_2[] = { { .hw = &gpll4_out_even.clkr.hw }, { .hw = &gpll5.clkr.hw }, { .hw = &gpll0_out_even.clkr.hw }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map gcc_parent_map_3[] = { @@ -177,7 +171,6 @@ static const struct parent_map gcc_parent_map_3[] = { { P_GPLL0_OUT_MAIN, 1 }, { P_SLEEP_CLK, 5 }, { P_GPLL0_OUT_EVEN, 6 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parents_3[] = { @@ -185,19 +178,16 @@ static const struct clk_parent_data gcc_parents_3[] = { { .hw = &gpll0.clkr.hw }, { .fw_name = "sleep_clk", .name = "sleep_clk" }, { .hw = &gpll0_out_even.clkr.hw }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map gcc_parent_map_4[] = { { P_BI_TCXO, 0 }, { P_SLEEP_CLK, 5 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parents_4[] = { { .fw_name = "bi_tcxo" }, { .fw_name = "sleep_clk", .name = "sleep_clk" }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map gcc_parent_map_5[] = { @@ -205,7 +195,6 @@ static const struct parent_map gcc_parent_map_5[] = { { P_GPLL0_OUT_MAIN, 1 }, { P_GPLL4_OUT_EVEN, 2 }, { P_GPLL0_OUT_EVEN, 6 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parents_5[] = { @@ -213,7 +202,6 @@ static const struct clk_parent_data gcc_parents_5[] = { { .hw = &gpll0.clkr.hw }, { .hw = &gpll4_out_even.clkr.hw }, { .hw = &gpll0_out_even.clkr.hw }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct freq_tbl ftbl_gcc_blsp1_qup1_i2c_apps_clk_src[] = { From patchwork Wed Dec 28 18:52:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13083130 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 87D36C4167B for ; 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[2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id s7-20020a2e83c7000000b00279d206a43bsm2031893ljh.34.2022.12.28.10.52.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Dec 2022 10:52:50 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Stephen Boyd , Michael Turquette , Rob Herring , Krzysztof Kozlowski , Taniya Das Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 13/16] clk: qcom: gcc-sm8150: get rid of test clock Date: Wed, 28 Dec 2022 20:52:34 +0200 Message-Id: <20221228185237.3111988-14-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221228185237.3111988-1-dmitry.baryshkov@linaro.org> References: <20221228185237.3111988-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The test clock apparently it's not used by anyone upstream. Remove it. Reviewed-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov Reviewed-by: Stephen Boyd --- drivers/clk/qcom/gcc-sm8150.c | 17 ----------------- 1 file changed, 17 deletions(-) diff --git a/drivers/clk/qcom/gcc-sm8150.c b/drivers/clk/qcom/gcc-sm8150.c index 09cf827addab..70b067f3618c 100644 --- a/drivers/clk/qcom/gcc-sm8150.c +++ b/drivers/clk/qcom/gcc-sm8150.c @@ -26,7 +26,6 @@ enum { P_BI_TCXO, P_AUD_REF_CLK, - P_CORE_BI_PLL_TEST_SE, P_GPLL0_OUT_EVEN, P_GPLL0_OUT_MAIN, P_GPLL7_OUT_MAIN, @@ -117,14 +116,12 @@ static const struct parent_map gcc_parent_map_0[] = { { P_BI_TCXO, 0 }, { P_GPLL0_OUT_MAIN, 1 }, { P_GPLL0_OUT_EVEN, 6 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parents_0[] = { { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, { .hw = &gpll0.clkr.hw }, { .hw = &gpll0_out_even.clkr.hw }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map gcc_parent_map_1[] = { @@ -132,7 +129,6 @@ static const struct parent_map gcc_parent_map_1[] = { { P_GPLL0_OUT_MAIN, 1 }, { P_SLEEP_CLK, 5 }, { P_GPLL0_OUT_EVEN, 6 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parents_1[] = { @@ -140,41 +136,34 @@ static const struct clk_parent_data gcc_parents_1[] = { { .hw = &gpll0.clkr.hw }, { .fw_name = "sleep_clk", .name = "sleep_clk" }, { .hw = &gpll0_out_even.clkr.hw }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map gcc_parent_map_2[] = { { P_BI_TCXO, 0 }, { P_SLEEP_CLK, 5 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parents_2[] = { { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, { .fw_name = "sleep_clk", .name = "sleep_clk" }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map gcc_parent_map_3[] = { { P_BI_TCXO, 0 }, { P_GPLL0_OUT_MAIN, 1 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parents_3[] = { { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, { .hw = &gpll0.clkr.hw }, - { .fw_name = "core_bi_pll_test_se"}, }; static const struct parent_map gcc_parent_map_4[] = { { P_BI_TCXO, 0 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parents_4[] = { { .fw_name = "bi_tcxo", .name = "bi_tcxo" }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map gcc_parent_map_5[] = { @@ -182,7 +171,6 @@ static const struct parent_map gcc_parent_map_5[] = { { P_GPLL0_OUT_MAIN, 1 }, { P_GPLL7_OUT_MAIN, 3 }, { P_GPLL0_OUT_EVEN, 6 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parents_5[] = { @@ -190,7 +178,6 @@ static const struct clk_parent_data gcc_parents_5[] = { { .hw = &gpll0.clkr.hw }, { .hw = &gpll7.clkr.hw }, { .hw = &gpll0_out_even.clkr.hw }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map gcc_parent_map_6[] = { @@ -198,7 +185,6 @@ static const struct parent_map gcc_parent_map_6[] = { { P_GPLL0_OUT_MAIN, 1 }, { P_GPLL9_OUT_MAIN, 2 }, { P_GPLL0_OUT_EVEN, 6 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parents_6[] = { @@ -206,7 +192,6 @@ static const struct clk_parent_data gcc_parents_6[] = { { .hw = &gpll0.clkr.hw }, { .hw = &gpll9.clkr.hw }, { .hw = &gpll0_out_even.clkr.hw }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map gcc_parent_map_7[] = { @@ -214,7 +199,6 @@ static const struct parent_map gcc_parent_map_7[] = { { P_GPLL0_OUT_MAIN, 1 }, { P_AUD_REF_CLK, 2 }, { P_GPLL0_OUT_EVEN, 6 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parents_7[] = { @@ -222,7 +206,6 @@ static const struct clk_parent_data gcc_parents_7[] = { { .hw = &gpll0.clkr.hw }, { .fw_name = "aud_ref_clk", .name = "aud_ref_clk" }, { .hw = &gpll0_out_even.clkr.hw }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct freq_tbl ftbl_gcc_cpuss_ahb_clk_src[] = { From patchwork Wed Dec 28 18:52:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13083131 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 174AAC4167B for ; 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[2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id s7-20020a2e83c7000000b00279d206a43bsm2031893ljh.34.2022.12.28.10.52.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Dec 2022 10:52:52 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Stephen Boyd , Michael Turquette , Rob Herring , Krzysztof Kozlowski , Taniya Das Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 14/16] clk: qcom: gcc-sm8350: get rid of test clock Date: Wed, 28 Dec 2022 20:52:35 +0200 Message-Id: <20221228185237.3111988-15-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221228185237.3111988-1-dmitry.baryshkov@linaro.org> References: <20221228185237.3111988-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The test clock apparently it's not used by anyone upstream. Remove it. Reviewed-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov Reviewed-by: Stephen Boyd --- drivers/clk/qcom/gcc-sm8350.c | 15 --------------- 1 file changed, 15 deletions(-) diff --git a/drivers/clk/qcom/gcc-sm8350.c b/drivers/clk/qcom/gcc-sm8350.c index c3731f96c8e6..af4a1ea28421 100644 --- a/drivers/clk/qcom/gcc-sm8350.c +++ b/drivers/clk/qcom/gcc-sm8350.c @@ -22,7 +22,6 @@ enum { P_BI_TCXO, - P_CORE_BI_PLL_TEST_SE, P_GCC_GPLL0_OUT_EVEN, P_GCC_GPLL0_OUT_MAIN, P_GCC_GPLL4_OUT_MAIN, @@ -119,14 +118,12 @@ static const struct parent_map gcc_parent_map_0[] = { { P_BI_TCXO, 0 }, { P_GCC_GPLL0_OUT_MAIN, 1 }, { P_GCC_GPLL0_OUT_EVEN, 6 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parent_data_0[] = { { .fw_name = "bi_tcxo" }, { .hw = &gcc_gpll0.clkr.hw }, { .hw = &gcc_gpll0_out_even.clkr.hw }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map gcc_parent_map_1[] = { @@ -134,7 +131,6 @@ static const struct parent_map gcc_parent_map_1[] = { { P_GCC_GPLL0_OUT_MAIN, 1 }, { P_SLEEP_CLK, 5 }, { P_GCC_GPLL0_OUT_EVEN, 6 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parent_data_1[] = { @@ -142,29 +138,24 @@ static const struct clk_parent_data gcc_parent_data_1[] = { { .hw = &gcc_gpll0.clkr.hw }, { .fw_name = "sleep_clk" }, { .hw = &gcc_gpll0_out_even.clkr.hw }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map gcc_parent_map_2[] = { { P_BI_TCXO, 0 }, { P_SLEEP_CLK, 5 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parent_data_2[] = { { .fw_name = "bi_tcxo" }, { .fw_name = "sleep_clk" }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map gcc_parent_map_3[] = { { P_BI_TCXO, 0 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parent_data_3[] = { { .fw_name = "bi_tcxo" }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map gcc_parent_map_4[] = { @@ -193,7 +184,6 @@ static const struct parent_map gcc_parent_map_6[] = { { P_GCC_GPLL9_OUT_MAIN, 2 }, { P_GCC_GPLL4_OUT_MAIN, 5 }, { P_GCC_GPLL0_OUT_EVEN, 6 }, - { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data gcc_parent_data_6[] = { @@ -202,7 +192,6 @@ static const struct clk_parent_data gcc_parent_data_6[] = { { .hw = &gcc_gpll9.clkr.hw }, { .hw = &gcc_gpll4.clkr.hw }, { .hw = &gcc_gpll0_out_even.clkr.hw }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map gcc_parent_map_7[] = { @@ -267,25 +256,21 @@ static const struct clk_parent_data gcc_parent_data_12[] = { static const struct parent_map gcc_parent_map_13[] = { { P_USB3_PHY_WRAPPER_GCC_USB30_PIPE_CLK, 0 }, - { P_CORE_BI_PLL_TEST_SE, 1 }, { P_BI_TCXO, 2 }, }; static const struct clk_parent_data gcc_parent_data_13[] = { { .fw_name = "usb3_phy_wrapper_gcc_usb30_pipe_clk" }, - { .fw_name = "core_bi_pll_test_se" }, { .fw_name = "bi_tcxo" }, }; static const struct parent_map gcc_parent_map_14[] = { { P_USB3_UNI_PHY_SEC_GCC_USB30_PIPE_CLK, 0 }, - { P_CORE_BI_PLL_TEST_SE, 1 }, { P_BI_TCXO, 2 }, }; static const struct clk_parent_data gcc_parent_data_14[] = { { .fw_name = "usb3_uni_phy_sec_gcc_usb30_pipe_clk" }, - { .fw_name = "core_bi_pll_test_se" }, { .fw_name = "bi_tcxo" }, }; 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[2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id s7-20020a2e83c7000000b00279d206a43bsm2031893ljh.34.2022.12.28.10.52.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Dec 2022 10:52:53 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Stephen Boyd , Michael Turquette , Rob Herring , Krzysztof Kozlowski , Taniya Das Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 15/16] clk: qcom: mmcc-msm8998: get rid of test clock Date: Wed, 28 Dec 2022 20:52:36 +0200 Message-Id: <20221228185237.3111988-16-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221228185237.3111988-1-dmitry.baryshkov@linaro.org> References: <20221228185237.3111988-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The test clock apparently it's not used by anyone upstream. Remove it. Reviewed-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov Reviewed-by: Stephen Boyd --- drivers/clk/qcom/mmcc-msm8998.c | 25 ------------------------- 1 file changed, 25 deletions(-) diff --git a/drivers/clk/qcom/mmcc-msm8998.c b/drivers/clk/qcom/mmcc-msm8998.c index c421b1291651..4490594bde69 100644 --- a/drivers/clk/qcom/mmcc-msm8998.c +++ b/drivers/clk/qcom/mmcc-msm8998.c @@ -44,7 +44,6 @@ enum { P_HDMIPLL, P_DPVCO, P_DPLINK, - P_CORE_BI_PLL_TEST_SE, }; static struct clk_fixed_factor gpll0_div = { @@ -303,69 +302,59 @@ static struct clk_alpha_pll_postdiv mmpll10_out_even = { static const struct parent_map mmss_xo_hdmi_map[] = { { P_XO, 0 }, { P_HDMIPLL, 1 }, - { P_CORE_BI_PLL_TEST_SE, 7 } }; static const struct clk_parent_data mmss_xo_hdmi[] = { { .fw_name = "xo" }, { .fw_name = "hdmipll" }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map mmss_xo_dsi0pll_dsi1pll_map[] = { { P_XO, 0 }, { P_DSI0PLL, 1 }, { P_DSI1PLL, 2 }, - { P_CORE_BI_PLL_TEST_SE, 7 } }; static const struct clk_parent_data mmss_xo_dsi0pll_dsi1pll[] = { { .fw_name = "xo" }, { .fw_name = "dsi0dsi" }, { .fw_name = "dsi1dsi" }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map mmss_xo_dsibyte_map[] = { { P_XO, 0 }, { P_DSI0PLL_BYTE, 1 }, { P_DSI1PLL_BYTE, 2 }, - { P_CORE_BI_PLL_TEST_SE, 7 } }; static const struct clk_parent_data mmss_xo_dsibyte[] = { { .fw_name = "xo" }, { .fw_name = "dsi0byte" }, { .fw_name = "dsi1byte" }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map mmss_xo_dp_map[] = { { P_XO, 0 }, { P_DPLINK, 1 }, { P_DPVCO, 2 }, - { P_CORE_BI_PLL_TEST_SE, 7 } }; static const struct clk_parent_data mmss_xo_dp[] = { { .fw_name = "xo" }, { .fw_name = "dplink" }, { .fw_name = "dpvco" }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map mmss_xo_gpll0_gpll0_div_map[] = { { P_XO, 0 }, { P_GPLL0, 5 }, { P_GPLL0_DIV, 6 }, - { P_CORE_BI_PLL_TEST_SE, 7 } }; static const struct clk_parent_data mmss_xo_gpll0_gpll0_div[] = { { .fw_name = "xo" }, { .fw_name = "gpll0" }, { .hw = &gpll0_div.hw }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map mmss_xo_mmpll0_gpll0_gpll0_div_map[] = { @@ -373,7 +362,6 @@ static const struct parent_map mmss_xo_mmpll0_gpll0_gpll0_div_map[] = { { P_MMPLL0_OUT_EVEN, 1 }, { P_GPLL0, 5 }, { P_GPLL0_DIV, 6 }, - { P_CORE_BI_PLL_TEST_SE, 7 } }; static const struct clk_parent_data mmss_xo_mmpll0_gpll0_gpll0_div[] = { @@ -381,7 +369,6 @@ static const struct clk_parent_data mmss_xo_mmpll0_gpll0_gpll0_div[] = { { .hw = &mmpll0_out_even.clkr.hw }, { .fw_name = "gpll0" }, { .hw = &gpll0_div.hw }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map mmss_xo_mmpll0_mmpll1_gpll0_gpll0_div_map[] = { @@ -390,7 +377,6 @@ static const struct parent_map mmss_xo_mmpll0_mmpll1_gpll0_gpll0_div_map[] = { { P_MMPLL1_OUT_EVEN, 2 }, { P_GPLL0, 5 }, { P_GPLL0_DIV, 6 }, - { P_CORE_BI_PLL_TEST_SE, 7 } }; static const struct clk_parent_data mmss_xo_mmpll0_mmpll1_gpll0_gpll0_div[] = { @@ -399,7 +385,6 @@ static const struct clk_parent_data mmss_xo_mmpll0_mmpll1_gpll0_gpll0_div[] = { { .hw = &mmpll1_out_even.clkr.hw }, { .fw_name = "gpll0" }, { .hw = &gpll0_div.hw }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map mmss_xo_mmpll0_mmpll5_gpll0_gpll0_div_map[] = { @@ -408,7 +393,6 @@ static const struct parent_map mmss_xo_mmpll0_mmpll5_gpll0_gpll0_div_map[] = { { P_MMPLL5_OUT_EVEN, 2 }, { P_GPLL0, 5 }, { P_GPLL0_DIV, 6 }, - { P_CORE_BI_PLL_TEST_SE, 7 } }; static const struct clk_parent_data mmss_xo_mmpll0_mmpll5_gpll0_gpll0_div[] = { @@ -417,7 +401,6 @@ static const struct clk_parent_data mmss_xo_mmpll0_mmpll5_gpll0_gpll0_div[] = { { .hw = &mmpll5_out_even.clkr.hw }, { .fw_name = "gpll0" }, { .hw = &gpll0_div.hw }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map mmss_xo_mmpll0_mmpll3_mmpll6_gpll0_gpll0_div_map[] = { @@ -427,7 +410,6 @@ static const struct parent_map mmss_xo_mmpll0_mmpll3_mmpll6_gpll0_gpll0_div_map[ { P_MMPLL6_OUT_EVEN, 4 }, { P_GPLL0, 5 }, { P_GPLL0_DIV, 6 }, - { P_CORE_BI_PLL_TEST_SE, 7 } }; static const struct clk_parent_data mmss_xo_mmpll0_mmpll3_mmpll6_gpll0_gpll0_div[] = { @@ -437,7 +419,6 @@ static const struct clk_parent_data mmss_xo_mmpll0_mmpll3_mmpll6_gpll0_gpll0_div { .hw = &mmpll6_out_even.clkr.hw }, { .fw_name = "gpll0" }, { .hw = &gpll0_div.hw }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map mmss_xo_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div_map[] = { @@ -447,7 +428,6 @@ static const struct parent_map mmss_xo_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div_map { P_MMPLL10_OUT_EVEN, 3 }, { P_GPLL0, 5 }, { P_GPLL0_DIV, 6 }, - { P_CORE_BI_PLL_TEST_SE, 7 } }; static const struct clk_parent_data mmss_xo_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div[] = { @@ -457,7 +437,6 @@ static const struct clk_parent_data mmss_xo_mmpll4_mmpll7_mmpll10_gpll0_gpll0_di { .hw = &mmpll10_out_even.clkr.hw }, { .fw_name = "gpll0" }, { .hw = &gpll0_div.hw }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map mmss_xo_mmpll0_mmpll7_mmpll10_gpll0_gpll0_div_map[] = { @@ -467,7 +446,6 @@ static const struct parent_map mmss_xo_mmpll0_mmpll7_mmpll10_gpll0_gpll0_div_map { P_MMPLL10_OUT_EVEN, 3 }, { P_GPLL0, 5 }, { P_GPLL0_DIV, 6 }, - { P_CORE_BI_PLL_TEST_SE, 7 } }; static const struct clk_parent_data mmss_xo_mmpll0_mmpll7_mmpll10_gpll0_gpll0_div[] = { @@ -477,7 +455,6 @@ static const struct clk_parent_data mmss_xo_mmpll0_mmpll7_mmpll10_gpll0_gpll0_di { .hw = &mmpll10_out_even.clkr.hw }, { .fw_name = "gpll0" }, { .hw = &gpll0_div.hw }, - { .fw_name = "core_bi_pll_test_se" }, }; static const struct parent_map mmss_xo_mmpll0_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div_map[] = { @@ -488,7 +465,6 @@ static const struct parent_map mmss_xo_mmpll0_mmpll4_mmpll7_mmpll10_gpll0_gpll0_ { P_MMPLL10_OUT_EVEN, 4 }, { P_GPLL0, 5 }, { P_GPLL0_DIV, 6 }, - { P_CORE_BI_PLL_TEST_SE, 7 } }; static const struct clk_parent_data mmss_xo_mmpll0_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div[] = { @@ -499,7 +475,6 @@ static const struct clk_parent_data mmss_xo_mmpll0_mmpll4_mmpll7_mmpll10_gpll0_g { .hw = &mmpll10_out_even.clkr.hw }, { .fw_name = "gpll0" }, { .hw = &gpll0_div.hw }, - { .fw_name = "core_bi_pll_test_se" }, }; static struct clk_rcg2 byte0_clk_src = { From patchwork Wed Dec 28 18:52:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13083132 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5E97BC4708D for ; Wed, 28 Dec 2022 18:53:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232770AbiL1SxJ (ORCPT ); Wed, 28 Dec 2022 13:53:09 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36608 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233513AbiL1Sw5 (ORCPT ); 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[2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id s7-20020a2e83c7000000b00279d206a43bsm2031893ljh.34.2022.12.28.10.52.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Dec 2022 10:52:54 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Stephen Boyd , Michael Turquette , Rob Herring , Krzysztof Kozlowski , Taniya Das Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 16/16] arm64: dts: qcom: msm8998: get rid of test clock Date: Wed, 28 Dec 2022 20:52:37 +0200 Message-Id: <20221228185237.3111988-17-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221228185237.3111988-1-dmitry.baryshkov@linaro.org> References: <20221228185237.3111988-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The test clock apparently it's not used by anyone upstream. Remove it. Reviewed-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/msm8998.dtsi | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi index 18cc149b6be4..6d69dce14dba 100644 --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi @@ -2398,8 +2398,7 @@ mmcc: clock-controller@c8c0000 { "dsi1byte", "hdmipll", "dplink", - "dpvco", - "core_bi_pll_test_se"; + "dpvco"; clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, <&gcc GCC_MMSS_GPLL0_CLK>, <0>, @@ -2408,7 +2407,6 @@ mmcc: clock-controller@c8c0000 { <0>, <0>, <0>, - <0>, <0>; };